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ath9k: fix power save race conditions
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
blob1dd8768c63dc987cff683ee14ed2c1add98aa16a
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
23 {
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
32 else
33 sc->cur_rate_mode = ATH9K_MODE_11G;
34 break;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
42 else
43 sc->cur_rate_mode = ATH9K_MODE_11A;
44 break;
45 default:
46 BUG_ON(1);
47 break;
48 }
49 }
50
51 static void ath_update_txpow(struct ath_softc *sc)
52 {
53 struct ath_hw *ah = sc->sc_ah;
54
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
59 }
60 }
61
62 static u8 parse_mpdudensity(u8 mpdudensity)
63 {
64 /*
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
67 * 1 for 1/4 us
68 * 2 for 1/2 us
69 * 3 for 1 us
70 * 4 for 2 us
71 * 5 for 4 us
72 * 6 for 8 us
73 * 7 for 16 us
74 */
75 switch (mpdudensity) {
76 case 0:
77 return 0;
78 case 1:
79 case 2:
80 case 3:
81 /* Our lower layer calculations limit our precision to
82 1 microsecond */
83 return 1;
84 case 4:
85 return 2;
86 case 5:
87 return 4;
88 case 6:
89 return 8;
90 case 7:
91 return 16;
92 default:
93 return 0;
94 }
95 }
96
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
99 {
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
102 u8 chan_idx;
103
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
107 return channel;
108 }
109
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
111 {
112 unsigned long flags;
113 bool ret;
114
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
118
119 return ret;
120 }
121
122 void ath9k_ps_wakeup(struct ath_softc *sc)
123 {
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
128 goto unlock;
129
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
131
132 unlock:
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
134 }
135
136 void ath9k_ps_restore(struct ath_softc *sc)
137 {
138 unsigned long flags;
139
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
142 goto unlock;
143
144 if (sc->ps_idle)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
148 PS_WAIT_FOR_CAB |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
152
153 unlock:
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
155 }
156
157 static void ath_start_ani(struct ath_common *common)
158 {
159 struct ath_hw *ah = common->ah;
160 unsigned long timestamp = jiffies_to_msecs(jiffies);
161 struct ath_softc *sc = (struct ath_softc *) common->priv;
162
163 if (!(sc->sc_flags & SC_OP_ANI_RUN))
164 return;
165
166 if (sc->sc_flags & SC_OP_OFFCHANNEL)
167 return;
168
169 common->ani.longcal_timer = timestamp;
170 common->ani.shortcal_timer = timestamp;
171 common->ani.checkani_timer = timestamp;
172
173 mod_timer(&common->ani.timer,
174 jiffies +
175 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
176 }
177
178 /*
179 * Set/change channels. If the channel is really being changed, it's done
180 * by reseting the chip. To accomplish this we must first cleanup any pending
181 * DMA, then restart stuff.
182 */
183 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
184 struct ath9k_channel *hchan)
185 {
186 struct ath_wiphy *aphy = hw->priv;
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ieee80211_conf *conf = &common->hw->conf;
190 bool fastcc = true, stopped;
191 struct ieee80211_channel *channel = hw->conf.channel;
192 struct ath9k_hw_cal_data *caldata = NULL;
193 int r;
194
195 if (sc->sc_flags & SC_OP_INVALID)
196 return -EIO;
197
198 del_timer_sync(&common->ani.timer);
199 cancel_work_sync(&sc->paprd_work);
200 cancel_work_sync(&sc->hw_check_work);
201 cancel_delayed_work_sync(&sc->tx_complete_work);
202
203 ath9k_ps_wakeup(sc);
204
205 /*
206 * This is only performed if the channel settings have
207 * actually changed.
208 *
209 * To switch channels clear any pending DMA operations;
210 * wait long enough for the RX fifo to drain, reset the
211 * hardware at the new frequency, and then re-enable
212 * the relevant bits of the h/w.
213 */
214 ath9k_hw_set_interrupts(ah, 0);
215 ath_drain_all_txq(sc, false);
216 stopped = ath_stoprecv(sc);
217
218 /* XXX: do not flush receive queue here. We don't want
219 * to flush data frames already in queue because of
220 * changing channel. */
221
222 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
223 fastcc = false;
224
225 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
226 caldata = &aphy->caldata;
227
228 ath_print(common, ATH_DBG_CONFIG,
229 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
230 sc->sc_ah->curchan->channel,
231 channel->center_freq, conf_is_ht40(conf),
232 fastcc);
233
234 spin_lock_bh(&sc->sc_resetlock);
235
236 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
237 if (r) {
238 ath_print(common, ATH_DBG_FATAL,
239 "Unable to reset channel (%u MHz), "
240 "reset status %d\n",
241 channel->center_freq, r);
242 spin_unlock_bh(&sc->sc_resetlock);
243 goto ps_restore;
244 }
245 spin_unlock_bh(&sc->sc_resetlock);
246
247 if (ath_startrecv(sc) != 0) {
248 ath_print(common, ATH_DBG_FATAL,
249 "Unable to restart recv logic\n");
250 r = -EIO;
251 goto ps_restore;
252 }
253
254 ath_cache_conf_rate(sc, &hw->conf);
255 ath_update_txpow(sc);
256 ath9k_hw_set_interrupts(ah, ah->imask);
257
258 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL | SC_OP_SCANNING))) {
259 ath_start_ani(common);
260 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
261 ath_beacon_config(sc, NULL);
262 }
263
264 ps_restore:
265 ath9k_ps_restore(sc);
266 return r;
267 }
268
269 static void ath_paprd_activate(struct ath_softc *sc)
270 {
271 struct ath_hw *ah = sc->sc_ah;
272 struct ath9k_hw_cal_data *caldata = ah->caldata;
273 int chain;
274
275 if (!caldata || !caldata->paprd_done)
276 return;
277
278 ath9k_ps_wakeup(sc);
279 ar9003_paprd_enable(ah, false);
280 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
281 if (!(ah->caps.tx_chainmask & BIT(chain)))
282 continue;
283
284 ar9003_paprd_populate_single_table(ah, caldata, chain);
285 }
286
287 ar9003_paprd_enable(ah, true);
288 ath9k_ps_restore(sc);
289 }
290
291 void ath_paprd_calibrate(struct work_struct *work)
292 {
293 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
294 struct ieee80211_hw *hw = sc->hw;
295 struct ath_hw *ah = sc->sc_ah;
296 struct ieee80211_hdr *hdr;
297 struct sk_buff *skb = NULL;
298 struct ieee80211_tx_info *tx_info;
299 int band = hw->conf.channel->band;
300 struct ieee80211_supported_band *sband = &sc->sbands[band];
301 struct ath_tx_control txctl;
302 struct ath9k_hw_cal_data *caldata = ah->caldata;
303 int qnum, ftype;
304 int chain_ok = 0;
305 int chain;
306 int len = 1800;
307 int time_left;
308 int i;
309
310 if (!caldata)
311 return;
312
313 skb = alloc_skb(len, GFP_KERNEL);
314 if (!skb)
315 return;
316
317 tx_info = IEEE80211_SKB_CB(skb);
318
319 skb_put(skb, len);
320 memset(skb->data, 0, len);
321 hdr = (struct ieee80211_hdr *)skb->data;
322 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
323 hdr->frame_control = cpu_to_le16(ftype);
324 hdr->duration_id = cpu_to_le16(10);
325 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
326 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
327 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
328
329 memset(&txctl, 0, sizeof(txctl));
330 qnum = sc->tx.hwq_map[WME_AC_BE];
331 txctl.txq = &sc->tx.txq[qnum];
332
333 ath9k_ps_wakeup(sc);
334 ar9003_paprd_init_table(ah);
335 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
336 if (!(ah->caps.tx_chainmask & BIT(chain)))
337 continue;
338
339 chain_ok = 0;
340 memset(tx_info, 0, sizeof(*tx_info));
341 tx_info->band = band;
342
343 for (i = 0; i < 4; i++) {
344 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
345 tx_info->control.rates[i].count = 6;
346 }
347
348 init_completion(&sc->paprd_complete);
349 ar9003_paprd_setup_gain_table(ah, chain);
350 txctl.paprd = BIT(chain);
351 if (ath_tx_start(hw, skb, &txctl) != 0)
352 break;
353
354 time_left = wait_for_completion_timeout(&sc->paprd_complete,
355 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
356 if (!time_left) {
357 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
358 "Timeout waiting for paprd training on "
359 "TX chain %d\n",
360 chain);
361 goto fail_paprd;
362 }
363
364 if (!ar9003_paprd_is_done(ah))
365 break;
366
367 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
368 break;
369
370 chain_ok = 1;
371 }
372 kfree_skb(skb);
373
374 if (chain_ok) {
375 caldata->paprd_done = true;
376 ath_paprd_activate(sc);
377 }
378
379 fail_paprd:
380 ath9k_ps_restore(sc);
381 }
382
383 /*
384 * This routine performs the periodic noise floor calibration function
385 * that is used to adjust and optimize the chip performance. This
386 * takes environmental changes (location, temperature) into account.
387 * When the task is complete, it reschedules itself depending on the
388 * appropriate interval that was calculated.
389 */
390 void ath_ani_calibrate(unsigned long data)
391 {
392 struct ath_softc *sc = (struct ath_softc *)data;
393 struct ath_hw *ah = sc->sc_ah;
394 struct ath_common *common = ath9k_hw_common(ah);
395 bool longcal = false;
396 bool shortcal = false;
397 bool aniflag = false;
398 unsigned int timestamp = jiffies_to_msecs(jiffies);
399 u32 cal_interval, short_cal_interval, long_cal_interval;
400
401 if (ah->caldata && ah->caldata->nfcal_interference)
402 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
403 else
404 long_cal_interval = ATH_LONG_CALINTERVAL;
405
406 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
407 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
408
409 /* Only calibrate if awake */
410 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
411 goto set_timer;
412
413 ath9k_ps_wakeup(sc);
414
415 /* Long calibration runs independently of short calibration. */
416 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
417 longcal = true;
418 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
419 common->ani.longcal_timer = timestamp;
420 }
421
422 /* Short calibration applies only while caldone is false */
423 if (!common->ani.caldone) {
424 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
425 shortcal = true;
426 ath_print(common, ATH_DBG_ANI,
427 "shortcal @%lu\n", jiffies);
428 common->ani.shortcal_timer = timestamp;
429 common->ani.resetcal_timer = timestamp;
430 }
431 } else {
432 if ((timestamp - common->ani.resetcal_timer) >=
433 ATH_RESTART_CALINTERVAL) {
434 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
435 if (common->ani.caldone)
436 common->ani.resetcal_timer = timestamp;
437 }
438 }
439
440 /* Verify whether we must check ANI */
441 if ((timestamp - common->ani.checkani_timer) >=
442 ah->config.ani_poll_interval) {
443 aniflag = true;
444 common->ani.checkani_timer = timestamp;
445 }
446
447 /* Skip all processing if there's nothing to do. */
448 if (longcal || shortcal || aniflag) {
449 /* Call ANI routine if necessary */
450 if (aniflag)
451 ath9k_hw_ani_monitor(ah, ah->curchan);
452
453 /* Perform calibration if necessary */
454 if (longcal || shortcal) {
455 common->ani.caldone =
456 ath9k_hw_calibrate(ah,
457 ah->curchan,
458 common->rx_chainmask,
459 longcal);
460
461 if (longcal)
462 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
463 ah->curchan);
464
465 ath_print(common, ATH_DBG_ANI,
466 " calibrate chan %u/%x nf: %d\n",
467 ah->curchan->channel,
468 ah->curchan->channelFlags,
469 common->ani.noise_floor);
470 }
471 }
472
473 ath9k_ps_restore(sc);
474
475 set_timer:
476 /*
477 * Set timer interval based on previous results.
478 * The interval must be the shortest necessary to satisfy ANI,
479 * short calibration and long calibration.
480 */
481 cal_interval = ATH_LONG_CALINTERVAL;
482 if (sc->sc_ah->config.enable_ani)
483 cal_interval = min(cal_interval,
484 (u32)ah->config.ani_poll_interval);
485 if (!common->ani.caldone)
486 cal_interval = min(cal_interval, (u32)short_cal_interval);
487
488 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
489 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
490 if (!ah->caldata->paprd_done)
491 ieee80211_queue_work(sc->hw, &sc->paprd_work);
492 else
493 ath_paprd_activate(sc);
494 }
495 }
496
497 /*
498 * Update tx/rx chainmask. For legacy association,
499 * hard code chainmask to 1x1, for 11n association, use
500 * the chainmask configuration, for bt coexistence, use
501 * the chainmask configuration even in legacy mode.
502 */
503 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
504 {
505 struct ath_hw *ah = sc->sc_ah;
506 struct ath_common *common = ath9k_hw_common(ah);
507
508 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
509 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
510 common->tx_chainmask = ah->caps.tx_chainmask;
511 common->rx_chainmask = ah->caps.rx_chainmask;
512 } else {
513 common->tx_chainmask = 1;
514 common->rx_chainmask = 1;
515 }
516
517 ath_print(common, ATH_DBG_CONFIG,
518 "tx chmask: %d, rx chmask: %d\n",
519 common->tx_chainmask,
520 common->rx_chainmask);
521 }
522
523 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
524 {
525 struct ath_node *an;
526
527 an = (struct ath_node *)sta->drv_priv;
528
529 if (sc->sc_flags & SC_OP_TXAGGR) {
530 ath_tx_node_init(sc, an);
531 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
532 sta->ht_cap.ampdu_factor);
533 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
534 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
535 }
536 }
537
538 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
539 {
540 struct ath_node *an = (struct ath_node *)sta->drv_priv;
541
542 if (sc->sc_flags & SC_OP_TXAGGR)
543 ath_tx_node_cleanup(sc, an);
544 }
545
546 void ath_hw_check(struct work_struct *work)
547 {
548 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
549 int i;
550
551 ath9k_ps_wakeup(sc);
552
553 for (i = 0; i < 3; i++) {
554 if (ath9k_hw_check_alive(sc->sc_ah))
555 goto out;
556
557 msleep(1);
558 }
559 ath_reset(sc, false);
560
561 out:
562 ath9k_ps_restore(sc);
563 }
564
565 void ath9k_tasklet(unsigned long data)
566 {
567 struct ath_softc *sc = (struct ath_softc *)data;
568 struct ath_hw *ah = sc->sc_ah;
569 struct ath_common *common = ath9k_hw_common(ah);
570
571 u32 status = sc->intrstatus;
572 u32 rxmask;
573
574 ath9k_ps_wakeup(sc);
575
576 if (status & ATH9K_INT_FATAL) {
577 ath_reset(sc, false);
578 ath9k_ps_restore(sc);
579 return;
580 }
581
582 if (!ath9k_hw_check_alive(ah))
583 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
584
585 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
586 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
587 ATH9K_INT_RXORN);
588 else
589 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
590
591 if (status & rxmask) {
592 spin_lock_bh(&sc->rx.rxflushlock);
593
594 /* Check for high priority Rx first */
595 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
596 (status & ATH9K_INT_RXHP))
597 ath_rx_tasklet(sc, 0, true);
598
599 ath_rx_tasklet(sc, 0, false);
600 spin_unlock_bh(&sc->rx.rxflushlock);
601 }
602
603 if (status & ATH9K_INT_TX) {
604 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
605 ath_tx_edma_tasklet(sc);
606 else
607 ath_tx_tasklet(sc);
608 }
609
610 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
611 /*
612 * TSF sync does not look correct; remain awake to sync with
613 * the next Beacon.
614 */
615 ath_print(common, ATH_DBG_PS,
616 "TSFOOR - Sync with next Beacon\n");
617 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
618 }
619
620 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
621 if (status & ATH9K_INT_GENTIMER)
622 ath_gen_timer_isr(sc->sc_ah);
623
624 /* re-enable hardware interrupt */
625 ath9k_hw_set_interrupts(ah, ah->imask);
626 ath9k_ps_restore(sc);
627 }
628
629 irqreturn_t ath_isr(int irq, void *dev)
630 {
631 #define SCHED_INTR ( \
632 ATH9K_INT_FATAL | \
633 ATH9K_INT_RXORN | \
634 ATH9K_INT_RXEOL | \
635 ATH9K_INT_RX | \
636 ATH9K_INT_RXLP | \
637 ATH9K_INT_RXHP | \
638 ATH9K_INT_TX | \
639 ATH9K_INT_BMISS | \
640 ATH9K_INT_CST | \
641 ATH9K_INT_TSFOOR | \
642 ATH9K_INT_GENTIMER)
643
644 struct ath_softc *sc = dev;
645 struct ath_hw *ah = sc->sc_ah;
646 enum ath9k_int status;
647 bool sched = false;
648
649 /*
650 * The hardware is not ready/present, don't
651 * touch anything. Note this can happen early
652 * on if the IRQ is shared.
653 */
654 if (sc->sc_flags & SC_OP_INVALID)
655 return IRQ_NONE;
656
657
658 /* shared irq, not for us */
659
660 if (!ath9k_hw_intrpend(ah))
661 return IRQ_NONE;
662
663 /*
664 * Figure out the reason(s) for the interrupt. Note
665 * that the hal returns a pseudo-ISR that may include
666 * bits we haven't explicitly enabled so we mask the
667 * value to insure we only process bits we requested.
668 */
669 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
670 status &= ah->imask; /* discard unasked-for bits */
671
672 /*
673 * If there are no status bits set, then this interrupt was not
674 * for me (should have been caught above).
675 */
676 if (!status)
677 return IRQ_NONE;
678
679 /* Cache the status */
680 sc->intrstatus = status;
681
682 if (status & SCHED_INTR)
683 sched = true;
684
685 /*
686 * If a FATAL or RXORN interrupt is received, we have to reset the
687 * chip immediately.
688 */
689 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
690 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
691 goto chip_reset;
692
693 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
694 (status & ATH9K_INT_BB_WATCHDOG)) {
695 ar9003_hw_bb_watchdog_dbg_info(ah);
696 goto chip_reset;
697 }
698
699 if (status & ATH9K_INT_SWBA)
700 tasklet_schedule(&sc->bcon_tasklet);
701
702 if (status & ATH9K_INT_TXURN)
703 ath9k_hw_updatetxtriglevel(ah, true);
704
705 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
706 if (status & ATH9K_INT_RXEOL) {
707 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
708 ath9k_hw_set_interrupts(ah, ah->imask);
709 }
710 }
711
712 if (status & ATH9K_INT_MIB) {
713 /*
714 * Disable interrupts until we service the MIB
715 * interrupt; otherwise it will continue to
716 * fire.
717 */
718 ath9k_hw_set_interrupts(ah, 0);
719 /*
720 * Let the hal handle the event. We assume
721 * it will clear whatever condition caused
722 * the interrupt.
723 */
724 ath9k_hw_procmibevent(ah);
725 ath9k_hw_set_interrupts(ah, ah->imask);
726 }
727
728 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
729 if (status & ATH9K_INT_TIM_TIMER) {
730 /* Clear RxAbort bit so that we can
731 * receive frames */
732 ath9k_setpower(sc, ATH9K_PM_AWAKE);
733 ath9k_hw_setrxabort(sc->sc_ah, 0);
734 sc->ps_flags |= PS_WAIT_FOR_BEACON;
735 }
736
737 chip_reset:
738
739 ath_debug_stat_interrupt(sc, status);
740
741 if (sched) {
742 /* turn off every interrupt except SWBA */
743 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
744 tasklet_schedule(&sc->intr_tq);
745 }
746
747 return IRQ_HANDLED;
748
749 #undef SCHED_INTR
750 }
751
752 static u32 ath_get_extchanmode(struct ath_softc *sc,
753 struct ieee80211_channel *chan,
754 enum nl80211_channel_type channel_type)
755 {
756 u32 chanmode = 0;
757
758 switch (chan->band) {
759 case IEEE80211_BAND_2GHZ:
760 switch(channel_type) {
761 case NL80211_CHAN_NO_HT:
762 case NL80211_CHAN_HT20:
763 chanmode = CHANNEL_G_HT20;
764 break;
765 case NL80211_CHAN_HT40PLUS:
766 chanmode = CHANNEL_G_HT40PLUS;
767 break;
768 case NL80211_CHAN_HT40MINUS:
769 chanmode = CHANNEL_G_HT40MINUS;
770 break;
771 }
772 break;
773 case IEEE80211_BAND_5GHZ:
774 switch(channel_type) {
775 case NL80211_CHAN_NO_HT:
776 case NL80211_CHAN_HT20:
777 chanmode = CHANNEL_A_HT20;
778 break;
779 case NL80211_CHAN_HT40PLUS:
780 chanmode = CHANNEL_A_HT40PLUS;
781 break;
782 case NL80211_CHAN_HT40MINUS:
783 chanmode = CHANNEL_A_HT40MINUS;
784 break;
785 }
786 break;
787 default:
788 break;
789 }
790
791 return chanmode;
792 }
793
794 static void ath9k_bss_assoc_info(struct ath_softc *sc,
795 struct ieee80211_vif *vif,
796 struct ieee80211_bss_conf *bss_conf)
797 {
798 struct ath_hw *ah = sc->sc_ah;
799 struct ath_common *common = ath9k_hw_common(ah);
800
801 if (bss_conf->assoc) {
802 ath_print(common, ATH_DBG_CONFIG,
803 "Bss Info ASSOC %d, bssid: %pM\n",
804 bss_conf->aid, common->curbssid);
805
806 /* New association, store aid */
807 common->curaid = bss_conf->aid;
808 ath9k_hw_write_associd(ah);
809
810 /*
811 * Request a re-configuration of Beacon related timers
812 * on the receipt of the first Beacon frame (i.e.,
813 * after time sync with the AP).
814 */
815 sc->ps_flags |= PS_BEACON_SYNC;
816
817 /* Configure the beacon */
818 ath_beacon_config(sc, vif);
819
820 /* Reset rssi stats */
821 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
822
823 sc->sc_flags |= SC_OP_ANI_RUN;
824 ath_start_ani(common);
825 } else {
826 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
827 common->curaid = 0;
828 /* Stop ANI */
829 sc->sc_flags &= ~SC_OP_ANI_RUN;
830 del_timer_sync(&common->ani.timer);
831 }
832 }
833
834 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
835 {
836 struct ath_hw *ah = sc->sc_ah;
837 struct ath_common *common = ath9k_hw_common(ah);
838 struct ieee80211_channel *channel = hw->conf.channel;
839 int r;
840
841 ath9k_ps_wakeup(sc);
842 ath9k_hw_configpcipowersave(ah, 0, 0);
843
844 if (!ah->curchan)
845 ah->curchan = ath_get_curchannel(sc, sc->hw);
846
847 spin_lock_bh(&sc->sc_resetlock);
848 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
849 if (r) {
850 ath_print(common, ATH_DBG_FATAL,
851 "Unable to reset channel (%u MHz), "
852 "reset status %d\n",
853 channel->center_freq, r);
854 }
855 spin_unlock_bh(&sc->sc_resetlock);
856
857 ath_update_txpow(sc);
858 if (ath_startrecv(sc) != 0) {
859 ath_print(common, ATH_DBG_FATAL,
860 "Unable to restart recv logic\n");
861 return;
862 }
863
864 if (sc->sc_flags & SC_OP_BEACONS)
865 ath_beacon_config(sc, NULL); /* restart beacons */
866
867 /* Re-Enable interrupts */
868 ath9k_hw_set_interrupts(ah, ah->imask);
869
870 /* Enable LED */
871 ath9k_hw_cfg_output(ah, ah->led_pin,
872 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
873 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
874
875 ieee80211_wake_queues(hw);
876 ath9k_ps_restore(sc);
877 }
878
879 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
880 {
881 struct ath_hw *ah = sc->sc_ah;
882 struct ieee80211_channel *channel = hw->conf.channel;
883 int r;
884
885 ath9k_ps_wakeup(sc);
886 ieee80211_stop_queues(hw);
887
888 /*
889 * Keep the LED on when the radio is disabled
890 * during idle unassociated state.
891 */
892 if (!sc->ps_idle) {
893 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
894 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
895 }
896
897 /* Disable interrupts */
898 ath9k_hw_set_interrupts(ah, 0);
899
900 ath_drain_all_txq(sc, false); /* clear pending tx frames */
901 ath_stoprecv(sc); /* turn off frame recv */
902 ath_flushrecv(sc); /* flush recv queue */
903
904 if (!ah->curchan)
905 ah->curchan = ath_get_curchannel(sc, hw);
906
907 spin_lock_bh(&sc->sc_resetlock);
908 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
909 if (r) {
910 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
911 "Unable to reset channel (%u MHz), "
912 "reset status %d\n",
913 channel->center_freq, r);
914 }
915 spin_unlock_bh(&sc->sc_resetlock);
916
917 ath9k_hw_phy_disable(ah);
918 ath9k_hw_configpcipowersave(ah, 1, 1);
919 ath9k_ps_restore(sc);
920 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
921 }
922
923 int ath_reset(struct ath_softc *sc, bool retry_tx)
924 {
925 struct ath_hw *ah = sc->sc_ah;
926 struct ath_common *common = ath9k_hw_common(ah);
927 struct ieee80211_hw *hw = sc->hw;
928 int r;
929
930 /* Stop ANI */
931 del_timer_sync(&common->ani.timer);
932
933 ieee80211_stop_queues(hw);
934
935 ath9k_hw_set_interrupts(ah, 0);
936 ath_drain_all_txq(sc, retry_tx);
937 ath_stoprecv(sc);
938 ath_flushrecv(sc);
939
940 spin_lock_bh(&sc->sc_resetlock);
941 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
942 if (r)
943 ath_print(common, ATH_DBG_FATAL,
944 "Unable to reset hardware; reset status %d\n", r);
945 spin_unlock_bh(&sc->sc_resetlock);
946
947 if (ath_startrecv(sc) != 0)
948 ath_print(common, ATH_DBG_FATAL,
949 "Unable to start recv logic\n");
950
951 /*
952 * We may be doing a reset in response to a request
953 * that changes the channel so update any state that
954 * might change as a result.
955 */
956 ath_cache_conf_rate(sc, &hw->conf);
957
958 ath_update_txpow(sc);
959
960 if (sc->sc_flags & SC_OP_BEACONS)
961 ath_beacon_config(sc, NULL); /* restart beacons */
962
963 ath9k_hw_set_interrupts(ah, ah->imask);
964
965 if (retry_tx) {
966 int i;
967 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
968 if (ATH_TXQ_SETUP(sc, i)) {
969 spin_lock_bh(&sc->tx.txq[i].axq_lock);
970 ath_txq_schedule(sc, &sc->tx.txq[i]);
971 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
972 }
973 }
974 }
975
976 ieee80211_wake_queues(hw);
977
978 /* Start ANI */
979 ath_start_ani(common);
980
981 return r;
982 }
983
984 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
985 {
986 int qnum;
987
988 switch (queue) {
989 case 0:
990 qnum = sc->tx.hwq_map[WME_AC_VO];
991 break;
992 case 1:
993 qnum = sc->tx.hwq_map[WME_AC_VI];
994 break;
995 case 2:
996 qnum = sc->tx.hwq_map[WME_AC_BE];
997 break;
998 case 3:
999 qnum = sc->tx.hwq_map[WME_AC_BK];
1000 break;
1001 default:
1002 qnum = sc->tx.hwq_map[WME_AC_BE];
1003 break;
1004 }
1005
1006 return qnum;
1007 }
1008
1009 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1010 {
1011 int qnum;
1012
1013 switch (queue) {
1014 case WME_AC_VO:
1015 qnum = 0;
1016 break;
1017 case WME_AC_VI:
1018 qnum = 1;
1019 break;
1020 case WME_AC_BE:
1021 qnum = 2;
1022 break;
1023 case WME_AC_BK:
1024 qnum = 3;
1025 break;
1026 default:
1027 qnum = -1;
1028 break;
1029 }
1030
1031 return qnum;
1032 }
1033
1034 /* XXX: Remove me once we don't depend on ath9k_channel for all
1035 * this redundant data */
1036 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1037 struct ath9k_channel *ichan)
1038 {
1039 struct ieee80211_channel *chan = hw->conf.channel;
1040 struct ieee80211_conf *conf = &hw->conf;
1041
1042 ichan->channel = chan->center_freq;
1043 ichan->chan = chan;
1044
1045 if (chan->band == IEEE80211_BAND_2GHZ) {
1046 ichan->chanmode = CHANNEL_G;
1047 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1048 } else {
1049 ichan->chanmode = CHANNEL_A;
1050 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1051 }
1052
1053 if (conf_is_ht(conf))
1054 ichan->chanmode = ath_get_extchanmode(sc, chan,
1055 conf->channel_type);
1056 }
1057
1058 /**********************/
1059 /* mac80211 callbacks */
1060 /**********************/
1061
1062 static int ath9k_start(struct ieee80211_hw *hw)
1063 {
1064 struct ath_wiphy *aphy = hw->priv;
1065 struct ath_softc *sc = aphy->sc;
1066 struct ath_hw *ah = sc->sc_ah;
1067 struct ath_common *common = ath9k_hw_common(ah);
1068 struct ieee80211_channel *curchan = hw->conf.channel;
1069 struct ath9k_channel *init_channel;
1070 int r;
1071
1072 ath_print(common, ATH_DBG_CONFIG,
1073 "Starting driver with initial channel: %d MHz\n",
1074 curchan->center_freq);
1075
1076 mutex_lock(&sc->mutex);
1077
1078 if (ath9k_wiphy_started(sc)) {
1079 if (sc->chan_idx == curchan->hw_value) {
1080 /*
1081 * Already on the operational channel, the new wiphy
1082 * can be marked active.
1083 */
1084 aphy->state = ATH_WIPHY_ACTIVE;
1085 ieee80211_wake_queues(hw);
1086 } else {
1087 /*
1088 * Another wiphy is on another channel, start the new
1089 * wiphy in paused state.
1090 */
1091 aphy->state = ATH_WIPHY_PAUSED;
1092 ieee80211_stop_queues(hw);
1093 }
1094 mutex_unlock(&sc->mutex);
1095 return 0;
1096 }
1097 aphy->state = ATH_WIPHY_ACTIVE;
1098
1099 /* setup initial channel */
1100
1101 sc->chan_idx = curchan->hw_value;
1102
1103 init_channel = ath_get_curchannel(sc, hw);
1104
1105 /* Reset SERDES registers */
1106 ath9k_hw_configpcipowersave(ah, 0, 0);
1107
1108 /*
1109 * The basic interface to setting the hardware in a good
1110 * state is ``reset''. On return the hardware is known to
1111 * be powered up and with interrupts disabled. This must
1112 * be followed by initialization of the appropriate bits
1113 * and then setup of the interrupt mask.
1114 */
1115 spin_lock_bh(&sc->sc_resetlock);
1116 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1117 if (r) {
1118 ath_print(common, ATH_DBG_FATAL,
1119 "Unable to reset hardware; reset status %d "
1120 "(freq %u MHz)\n", r,
1121 curchan->center_freq);
1122 spin_unlock_bh(&sc->sc_resetlock);
1123 goto mutex_unlock;
1124 }
1125 spin_unlock_bh(&sc->sc_resetlock);
1126
1127 /*
1128 * This is needed only to setup initial state
1129 * but it's best done after a reset.
1130 */
1131 ath_update_txpow(sc);
1132
1133 /*
1134 * Setup the hardware after reset:
1135 * The receive engine is set going.
1136 * Frame transmit is handled entirely
1137 * in the frame output path; there's nothing to do
1138 * here except setup the interrupt mask.
1139 */
1140 if (ath_startrecv(sc) != 0) {
1141 ath_print(common, ATH_DBG_FATAL,
1142 "Unable to start recv logic\n");
1143 r = -EIO;
1144 goto mutex_unlock;
1145 }
1146
1147 /* Setup our intr mask. */
1148 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1149 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1150 ATH9K_INT_GLOBAL;
1151
1152 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1153 ah->imask |= ATH9K_INT_RXHP |
1154 ATH9K_INT_RXLP |
1155 ATH9K_INT_BB_WATCHDOG;
1156 else
1157 ah->imask |= ATH9K_INT_RX;
1158
1159 ah->imask |= ATH9K_INT_GTT;
1160
1161 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1162 ah->imask |= ATH9K_INT_CST;
1163
1164 ath_cache_conf_rate(sc, &hw->conf);
1165
1166 sc->sc_flags &= ~SC_OP_INVALID;
1167
1168 /* Disable BMISS interrupt when we're not associated */
1169 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1170 ath9k_hw_set_interrupts(ah, ah->imask);
1171
1172 ieee80211_wake_queues(hw);
1173
1174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1175
1176 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1177 !ah->btcoex_hw.enabled) {
1178 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1179 AR_STOMP_LOW_WLAN_WGHT);
1180 ath9k_hw_btcoex_enable(ah);
1181
1182 if (common->bus_ops->bt_coex_prep)
1183 common->bus_ops->bt_coex_prep(common);
1184 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1185 ath9k_btcoex_timer_resume(sc);
1186 }
1187
1188 mutex_unlock:
1189 mutex_unlock(&sc->mutex);
1190
1191 return r;
1192 }
1193
1194 static int ath9k_tx(struct ieee80211_hw *hw,
1195 struct sk_buff *skb)
1196 {
1197 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1198 struct ath_wiphy *aphy = hw->priv;
1199 struct ath_softc *sc = aphy->sc;
1200 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1201 struct ath_tx_control txctl;
1202 int padpos, padsize;
1203 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1204 int qnum;
1205
1206 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1207 ath_print(common, ATH_DBG_XMIT,
1208 "ath9k: %s: TX in unexpected wiphy state "
1209 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1210 goto exit;
1211 }
1212
1213 if (sc->ps_enabled) {
1214 /*
1215 * mac80211 does not set PM field for normal data frames, so we
1216 * need to update that based on the current PS mode.
1217 */
1218 if (ieee80211_is_data(hdr->frame_control) &&
1219 !ieee80211_is_nullfunc(hdr->frame_control) &&
1220 !ieee80211_has_pm(hdr->frame_control)) {
1221 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1222 "while in PS mode\n");
1223 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1224 }
1225 }
1226
1227 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1228 /*
1229 * We are using PS-Poll and mac80211 can request TX while in
1230 * power save mode. Need to wake up hardware for the TX to be
1231 * completed and if needed, also for RX of buffered frames.
1232 */
1233 ath9k_ps_wakeup(sc);
1234 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1235 ath9k_hw_setrxabort(sc->sc_ah, 0);
1236 if (ieee80211_is_pspoll(hdr->frame_control)) {
1237 ath_print(common, ATH_DBG_PS,
1238 "Sending PS-Poll to pick a buffered frame\n");
1239 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1240 } else {
1241 ath_print(common, ATH_DBG_PS,
1242 "Wake up to complete TX\n");
1243 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1244 }
1245 /*
1246 * The actual restore operation will happen only after
1247 * the sc_flags bit is cleared. We are just dropping
1248 * the ps_usecount here.
1249 */
1250 ath9k_ps_restore(sc);
1251 }
1252
1253 memset(&txctl, 0, sizeof(struct ath_tx_control));
1254
1255 /*
1256 * As a temporary workaround, assign seq# here; this will likely need
1257 * to be cleaned up to work better with Beacon transmission and virtual
1258 * BSSes.
1259 */
1260 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1261 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1262 sc->tx.seq_no += 0x10;
1263 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1264 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1265 }
1266
1267 /* Add the padding after the header if this is not already done */
1268 padpos = ath9k_cmn_padpos(hdr->frame_control);
1269 padsize = padpos & 3;
1270 if (padsize && skb->len>padpos) {
1271 if (skb_headroom(skb) < padsize)
1272 return -1;
1273 skb_push(skb, padsize);
1274 memmove(skb->data, skb->data + padsize, padpos);
1275 }
1276
1277 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1278 txctl.txq = &sc->tx.txq[qnum];
1279
1280 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1281
1282 if (ath_tx_start(hw, skb, &txctl) != 0) {
1283 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1284 goto exit;
1285 }
1286
1287 return 0;
1288 exit:
1289 dev_kfree_skb_any(skb);
1290 return 0;
1291 }
1292
1293 static void ath9k_stop(struct ieee80211_hw *hw)
1294 {
1295 struct ath_wiphy *aphy = hw->priv;
1296 struct ath_softc *sc = aphy->sc;
1297 struct ath_hw *ah = sc->sc_ah;
1298 struct ath_common *common = ath9k_hw_common(ah);
1299 int i;
1300
1301 mutex_lock(&sc->mutex);
1302
1303 aphy->state = ATH_WIPHY_INACTIVE;
1304
1305 if (led_blink)
1306 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1307
1308 cancel_delayed_work_sync(&sc->tx_complete_work);
1309 cancel_work_sync(&sc->paprd_work);
1310 cancel_work_sync(&sc->hw_check_work);
1311
1312 for (i = 0; i < sc->num_sec_wiphy; i++) {
1313 if (sc->sec_wiphy[i])
1314 break;
1315 }
1316
1317 if (i == sc->num_sec_wiphy) {
1318 cancel_delayed_work_sync(&sc->wiphy_work);
1319 cancel_work_sync(&sc->chan_work);
1320 }
1321
1322 if (sc->sc_flags & SC_OP_INVALID) {
1323 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1324 mutex_unlock(&sc->mutex);
1325 return;
1326 }
1327
1328 if (ath9k_wiphy_started(sc)) {
1329 mutex_unlock(&sc->mutex);
1330 return; /* another wiphy still in use */
1331 }
1332
1333 /* Ensure HW is awake when we try to shut it down. */
1334 ath9k_ps_wakeup(sc);
1335
1336 if (ah->btcoex_hw.enabled) {
1337 ath9k_hw_btcoex_disable(ah);
1338 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1339 ath9k_btcoex_timer_pause(sc);
1340 }
1341
1342 /* make sure h/w will not generate any interrupt
1343 * before setting the invalid flag. */
1344 ath9k_hw_set_interrupts(ah, 0);
1345
1346 if (!(sc->sc_flags & SC_OP_INVALID)) {
1347 ath_drain_all_txq(sc, false);
1348 ath_stoprecv(sc);
1349 ath9k_hw_phy_disable(ah);
1350 } else
1351 sc->rx.rxlink = NULL;
1352
1353 /* disable HAL and put h/w to sleep */
1354 ath9k_hw_disable(ah);
1355 ath9k_hw_configpcipowersave(ah, 1, 1);
1356 ath9k_ps_restore(sc);
1357
1358 /* Finally, put the chip in FULL SLEEP mode */
1359 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1360
1361 sc->sc_flags |= SC_OP_INVALID;
1362
1363 mutex_unlock(&sc->mutex);
1364
1365 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1366 }
1367
1368 static int ath9k_add_interface(struct ieee80211_hw *hw,
1369 struct ieee80211_vif *vif)
1370 {
1371 struct ath_wiphy *aphy = hw->priv;
1372 struct ath_softc *sc = aphy->sc;
1373 struct ath_hw *ah = sc->sc_ah;
1374 struct ath_common *common = ath9k_hw_common(ah);
1375 struct ath_vif *avp = (void *)vif->drv_priv;
1376 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1377 int ret = 0;
1378
1379 mutex_lock(&sc->mutex);
1380
1381 switch (vif->type) {
1382 case NL80211_IFTYPE_STATION:
1383 ic_opmode = NL80211_IFTYPE_STATION;
1384 break;
1385 case NL80211_IFTYPE_ADHOC:
1386 case NL80211_IFTYPE_AP:
1387 case NL80211_IFTYPE_MESH_POINT:
1388 if (sc->nbcnvifs >= ATH_BCBUF) {
1389 ret = -ENOBUFS;
1390 goto out;
1391 }
1392 ic_opmode = vif->type;
1393 break;
1394 default:
1395 ath_print(common, ATH_DBG_FATAL,
1396 "Interface type %d not yet supported\n", vif->type);
1397 ret = -EOPNOTSUPP;
1398 goto out;
1399 }
1400
1401 ath_print(common, ATH_DBG_CONFIG,
1402 "Attach a VIF of type: %d\n", ic_opmode);
1403
1404 /* Set the VIF opmode */
1405 avp->av_opmode = ic_opmode;
1406 avp->av_bslot = -1;
1407
1408 sc->nvifs++;
1409
1410 ath9k_set_bssid_mask(hw, vif);
1411
1412 if (sc->nvifs > 1)
1413 goto out; /* skip global settings for secondary vif */
1414
1415 if (ic_opmode == NL80211_IFTYPE_AP) {
1416 ath9k_hw_set_tsfadjust(ah, 1);
1417 sc->sc_flags |= SC_OP_TSF_RESET;
1418 }
1419
1420 /* Set the device opmode */
1421 ah->opmode = ic_opmode;
1422
1423 /*
1424 * Enable MIB interrupts when there are hardware phy counters.
1425 * Note we only do this (at the moment) for station mode.
1426 */
1427 if ((vif->type == NL80211_IFTYPE_STATION) ||
1428 (vif->type == NL80211_IFTYPE_ADHOC) ||
1429 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1430 if (ah->config.enable_ani)
1431 ah->imask |= ATH9K_INT_MIB;
1432 ah->imask |= ATH9K_INT_TSFOOR;
1433 }
1434
1435 ath9k_hw_set_interrupts(ah, ah->imask);
1436
1437 if (vif->type == NL80211_IFTYPE_AP ||
1438 vif->type == NL80211_IFTYPE_ADHOC ||
1439 vif->type == NL80211_IFTYPE_MONITOR) {
1440 sc->sc_flags |= SC_OP_ANI_RUN;
1441 ath_start_ani(common);
1442 }
1443
1444 out:
1445 mutex_unlock(&sc->mutex);
1446 return ret;
1447 }
1448
1449 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1450 struct ieee80211_vif *vif)
1451 {
1452 struct ath_wiphy *aphy = hw->priv;
1453 struct ath_softc *sc = aphy->sc;
1454 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1455 struct ath_vif *avp = (void *)vif->drv_priv;
1456 int i;
1457
1458 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1459
1460 mutex_lock(&sc->mutex);
1461
1462 /* Stop ANI */
1463 sc->sc_flags &= ~SC_OP_ANI_RUN;
1464 del_timer_sync(&common->ani.timer);
1465
1466 /* Reclaim beacon resources */
1467 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1468 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1469 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1470 ath9k_ps_wakeup(sc);
1471 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1472 ath9k_ps_restore(sc);
1473 }
1474
1475 ath_beacon_return(sc, avp);
1476 sc->sc_flags &= ~SC_OP_BEACONS;
1477
1478 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1479 if (sc->beacon.bslot[i] == vif) {
1480 printk(KERN_DEBUG "%s: vif had allocated beacon "
1481 "slot\n", __func__);
1482 sc->beacon.bslot[i] = NULL;
1483 sc->beacon.bslot_aphy[i] = NULL;
1484 }
1485 }
1486
1487 sc->nvifs--;
1488
1489 mutex_unlock(&sc->mutex);
1490 }
1491
1492 void ath9k_enable_ps(struct ath_softc *sc)
1493 {
1494 struct ath_hw *ah = sc->sc_ah;
1495
1496 sc->ps_enabled = true;
1497 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1498 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1499 ah->imask |= ATH9K_INT_TIM_TIMER;
1500 ath9k_hw_set_interrupts(ah, ah->imask);
1501 }
1502 ath9k_hw_setrxabort(ah, 1);
1503 }
1504 }
1505
1506 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1507 {
1508 struct ath_wiphy *aphy = hw->priv;
1509 struct ath_softc *sc = aphy->sc;
1510 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1511 struct ieee80211_conf *conf = &hw->conf;
1512 struct ath_hw *ah = sc->sc_ah;
1513 bool disable_radio;
1514
1515 mutex_lock(&sc->mutex);
1516
1517 /*
1518 * Leave this as the first check because we need to turn on the
1519 * radio if it was disabled before prior to processing the rest
1520 * of the changes. Likewise we must only disable the radio towards
1521 * the end.
1522 */
1523 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1524 bool enable_radio;
1525 bool all_wiphys_idle;
1526 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1527
1528 spin_lock_bh(&sc->wiphy_lock);
1529 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1530 ath9k_set_wiphy_idle(aphy, idle);
1531
1532 enable_radio = (!idle && all_wiphys_idle);
1533
1534 /*
1535 * After we unlock here its possible another wiphy
1536 * can be re-renabled so to account for that we will
1537 * only disable the radio toward the end of this routine
1538 * if by then all wiphys are still idle.
1539 */
1540 spin_unlock_bh(&sc->wiphy_lock);
1541
1542 if (enable_radio) {
1543 sc->ps_idle = false;
1544 ath_radio_enable(sc, hw);
1545 ath_print(common, ATH_DBG_CONFIG,
1546 "not-idle: enabling radio\n");
1547 }
1548 }
1549
1550 /*
1551 * We just prepare to enable PS. We have to wait until our AP has
1552 * ACK'd our null data frame to disable RX otherwise we'll ignore
1553 * those ACKs and end up retransmitting the same null data frames.
1554 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1555 */
1556 if (changed & IEEE80211_CONF_CHANGE_PS) {
1557 unsigned long flags;
1558 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1559 if (conf->flags & IEEE80211_CONF_PS) {
1560 sc->ps_flags |= PS_ENABLED;
1561 /*
1562 * At this point we know hardware has received an ACK
1563 * of a previously sent null data frame.
1564 */
1565 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1566 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1567 ath9k_enable_ps(sc);
1568 }
1569 } else {
1570 sc->ps_enabled = false;
1571 sc->ps_flags &= ~(PS_ENABLED |
1572 PS_NULLFUNC_COMPLETED);
1573 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
1574 if (!(ah->caps.hw_caps &
1575 ATH9K_HW_CAP_AUTOSLEEP)) {
1576 ath9k_hw_setrxabort(sc->sc_ah, 0);
1577 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1578 PS_WAIT_FOR_CAB |
1579 PS_WAIT_FOR_PSPOLL_DATA |
1580 PS_WAIT_FOR_TX_ACK);
1581 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1582 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1583 ath9k_hw_set_interrupts(sc->sc_ah,
1584 ah->imask);
1585 }
1586 }
1587 }
1588 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1589 }
1590
1591 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1592 if (conf->flags & IEEE80211_CONF_MONITOR) {
1593 ath_print(common, ATH_DBG_CONFIG,
1594 "HW opmode set to Monitor mode\n");
1595 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1596 }
1597 }
1598
1599 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1600 struct ieee80211_channel *curchan = hw->conf.channel;
1601 int pos = curchan->hw_value;
1602
1603 aphy->chan_idx = pos;
1604 aphy->chan_is_ht = conf_is_ht(conf);
1605 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1606 sc->sc_flags |= SC_OP_OFFCHANNEL;
1607 else
1608 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1609
1610 if (aphy->state == ATH_WIPHY_SCAN ||
1611 aphy->state == ATH_WIPHY_ACTIVE)
1612 ath9k_wiphy_pause_all_forced(sc, aphy);
1613 else {
1614 /*
1615 * Do not change operational channel based on a paused
1616 * wiphy changes.
1617 */
1618 goto skip_chan_change;
1619 }
1620
1621 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1622 curchan->center_freq);
1623
1624 /* XXX: remove me eventualy */
1625 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1626
1627 ath_update_chainmask(sc, conf_is_ht(conf));
1628
1629 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1630 ath_print(common, ATH_DBG_FATAL,
1631 "Unable to set channel\n");
1632 mutex_unlock(&sc->mutex);
1633 return -EINVAL;
1634 }
1635 }
1636
1637 skip_chan_change:
1638 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1639 sc->config.txpowlimit = 2 * conf->power_level;
1640 ath_update_txpow(sc);
1641 }
1642
1643 spin_lock_bh(&sc->wiphy_lock);
1644 disable_radio = ath9k_all_wiphys_idle(sc);
1645 spin_unlock_bh(&sc->wiphy_lock);
1646
1647 if (disable_radio) {
1648 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1649 sc->ps_idle = true;
1650 ath_radio_disable(sc, hw);
1651 }
1652
1653 mutex_unlock(&sc->mutex);
1654
1655 return 0;
1656 }
1657
1658 #define SUPPORTED_FILTERS \
1659 (FIF_PROMISC_IN_BSS | \
1660 FIF_ALLMULTI | \
1661 FIF_CONTROL | \
1662 FIF_PSPOLL | \
1663 FIF_OTHER_BSS | \
1664 FIF_BCN_PRBRESP_PROMISC | \
1665 FIF_FCSFAIL)
1666
1667 /* FIXME: sc->sc_full_reset ? */
1668 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1669 unsigned int changed_flags,
1670 unsigned int *total_flags,
1671 u64 multicast)
1672 {
1673 struct ath_wiphy *aphy = hw->priv;
1674 struct ath_softc *sc = aphy->sc;
1675 u32 rfilt;
1676
1677 changed_flags &= SUPPORTED_FILTERS;
1678 *total_flags &= SUPPORTED_FILTERS;
1679
1680 sc->rx.rxfilter = *total_flags;
1681 ath9k_ps_wakeup(sc);
1682 rfilt = ath_calcrxfilter(sc);
1683 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1684 ath9k_ps_restore(sc);
1685
1686 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1687 "Set HW RX filter: 0x%x\n", rfilt);
1688 }
1689
1690 static int ath9k_sta_add(struct ieee80211_hw *hw,
1691 struct ieee80211_vif *vif,
1692 struct ieee80211_sta *sta)
1693 {
1694 struct ath_wiphy *aphy = hw->priv;
1695 struct ath_softc *sc = aphy->sc;
1696
1697 ath_node_attach(sc, sta);
1698
1699 return 0;
1700 }
1701
1702 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1703 struct ieee80211_vif *vif,
1704 struct ieee80211_sta *sta)
1705 {
1706 struct ath_wiphy *aphy = hw->priv;
1707 struct ath_softc *sc = aphy->sc;
1708
1709 ath_node_detach(sc, sta);
1710
1711 return 0;
1712 }
1713
1714 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1715 const struct ieee80211_tx_queue_params *params)
1716 {
1717 struct ath_wiphy *aphy = hw->priv;
1718 struct ath_softc *sc = aphy->sc;
1719 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1720 struct ath9k_tx_queue_info qi;
1721 int ret = 0, qnum;
1722
1723 if (queue >= WME_NUM_AC)
1724 return 0;
1725
1726 mutex_lock(&sc->mutex);
1727
1728 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1729
1730 qi.tqi_aifs = params->aifs;
1731 qi.tqi_cwmin = params->cw_min;
1732 qi.tqi_cwmax = params->cw_max;
1733 qi.tqi_burstTime = params->txop;
1734 qnum = ath_get_hal_qnum(queue, sc);
1735
1736 ath_print(common, ATH_DBG_CONFIG,
1737 "Configure tx [queue/halq] [%d/%d], "
1738 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1739 queue, qnum, params->aifs, params->cw_min,
1740 params->cw_max, params->txop);
1741
1742 ret = ath_txq_update(sc, qnum, &qi);
1743 if (ret)
1744 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1745
1746 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1747 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1748 ath_beaconq_config(sc);
1749
1750 mutex_unlock(&sc->mutex);
1751
1752 return ret;
1753 }
1754
1755 static int ath9k_set_key(struct ieee80211_hw *hw,
1756 enum set_key_cmd cmd,
1757 struct ieee80211_vif *vif,
1758 struct ieee80211_sta *sta,
1759 struct ieee80211_key_conf *key)
1760 {
1761 struct ath_wiphy *aphy = hw->priv;
1762 struct ath_softc *sc = aphy->sc;
1763 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1764 int ret = 0;
1765
1766 if (modparam_nohwcrypt)
1767 return -ENOSPC;
1768
1769 mutex_lock(&sc->mutex);
1770 ath9k_ps_wakeup(sc);
1771 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1772
1773 switch (cmd) {
1774 case SET_KEY:
1775 ret = ath_key_config(common, vif, sta, key);
1776 if (ret >= 0) {
1777 key->hw_key_idx = ret;
1778 /* push IV and Michael MIC generation to stack */
1779 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1780 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1781 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1782 if (sc->sc_ah->sw_mgmt_crypto &&
1783 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1784 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1785 ret = 0;
1786 }
1787 break;
1788 case DISABLE_KEY:
1789 ath_key_delete(common, key);
1790 break;
1791 default:
1792 ret = -EINVAL;
1793 }
1794
1795 ath9k_ps_restore(sc);
1796 mutex_unlock(&sc->mutex);
1797
1798 return ret;
1799 }
1800
1801 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1802 struct ieee80211_vif *vif,
1803 struct ieee80211_bss_conf *bss_conf,
1804 u32 changed)
1805 {
1806 struct ath_wiphy *aphy = hw->priv;
1807 struct ath_softc *sc = aphy->sc;
1808 struct ath_hw *ah = sc->sc_ah;
1809 struct ath_common *common = ath9k_hw_common(ah);
1810 struct ath_vif *avp = (void *)vif->drv_priv;
1811 int slottime;
1812 int error;
1813
1814 mutex_lock(&sc->mutex);
1815
1816 if (changed & BSS_CHANGED_BSSID) {
1817 /* Set BSSID */
1818 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1819 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1820 common->curaid = 0;
1821 ath9k_hw_write_associd(ah);
1822
1823 /* Set aggregation protection mode parameters */
1824 sc->config.ath_aggr_prot = 0;
1825
1826 /* Only legacy IBSS for now */
1827 if (vif->type == NL80211_IFTYPE_ADHOC)
1828 ath_update_chainmask(sc, 0);
1829
1830 ath_print(common, ATH_DBG_CONFIG,
1831 "BSSID: %pM aid: 0x%x\n",
1832 common->curbssid, common->curaid);
1833
1834 /* need to reconfigure the beacon */
1835 sc->sc_flags &= ~SC_OP_BEACONS ;
1836 }
1837
1838 /* Enable transmission of beacons (AP, IBSS, MESH) */
1839 if ((changed & BSS_CHANGED_BEACON) ||
1840 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1841 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1842 error = ath_beacon_alloc(aphy, vif);
1843 if (!error)
1844 ath_beacon_config(sc, vif);
1845 }
1846
1847 if (changed & BSS_CHANGED_ERP_SLOT) {
1848 if (bss_conf->use_short_slot)
1849 slottime = 9;
1850 else
1851 slottime = 20;
1852 if (vif->type == NL80211_IFTYPE_AP) {
1853 /*
1854 * Defer update, so that connected stations can adjust
1855 * their settings at the same time.
1856 * See beacon.c for more details
1857 */
1858 sc->beacon.slottime = slottime;
1859 sc->beacon.updateslot = UPDATE;
1860 } else {
1861 ah->slottime = slottime;
1862 ath9k_hw_init_global_settings(ah);
1863 }
1864 }
1865
1866 /* Disable transmission of beacons */
1867 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1868 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1869
1870 if (changed & BSS_CHANGED_BEACON_INT) {
1871 sc->beacon_interval = bss_conf->beacon_int;
1872 /*
1873 * In case of AP mode, the HW TSF has to be reset
1874 * when the beacon interval changes.
1875 */
1876 if (vif->type == NL80211_IFTYPE_AP) {
1877 sc->sc_flags |= SC_OP_TSF_RESET;
1878 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1879 error = ath_beacon_alloc(aphy, vif);
1880 if (!error)
1881 ath_beacon_config(sc, vif);
1882 } else {
1883 ath_beacon_config(sc, vif);
1884 }
1885 }
1886
1887 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1888 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1889 bss_conf->use_short_preamble);
1890 if (bss_conf->use_short_preamble)
1891 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1892 else
1893 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1894 }
1895
1896 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1897 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1898 bss_conf->use_cts_prot);
1899 if (bss_conf->use_cts_prot &&
1900 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1901 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1902 else
1903 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1904 }
1905
1906 if (changed & BSS_CHANGED_ASSOC) {
1907 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1908 bss_conf->assoc);
1909 ath9k_bss_assoc_info(sc, vif, bss_conf);
1910 }
1911
1912 mutex_unlock(&sc->mutex);
1913 }
1914
1915 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1916 {
1917 u64 tsf;
1918 struct ath_wiphy *aphy = hw->priv;
1919 struct ath_softc *sc = aphy->sc;
1920
1921 mutex_lock(&sc->mutex);
1922 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1923 mutex_unlock(&sc->mutex);
1924
1925 return tsf;
1926 }
1927
1928 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1929 {
1930 struct ath_wiphy *aphy = hw->priv;
1931 struct ath_softc *sc = aphy->sc;
1932
1933 mutex_lock(&sc->mutex);
1934 ath9k_hw_settsf64(sc->sc_ah, tsf);
1935 mutex_unlock(&sc->mutex);
1936 }
1937
1938 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1939 {
1940 struct ath_wiphy *aphy = hw->priv;
1941 struct ath_softc *sc = aphy->sc;
1942
1943 mutex_lock(&sc->mutex);
1944
1945 ath9k_ps_wakeup(sc);
1946 ath9k_hw_reset_tsf(sc->sc_ah);
1947 ath9k_ps_restore(sc);
1948
1949 mutex_unlock(&sc->mutex);
1950 }
1951
1952 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1953 struct ieee80211_vif *vif,
1954 enum ieee80211_ampdu_mlme_action action,
1955 struct ieee80211_sta *sta,
1956 u16 tid, u16 *ssn)
1957 {
1958 struct ath_wiphy *aphy = hw->priv;
1959 struct ath_softc *sc = aphy->sc;
1960 int ret = 0;
1961
1962 local_bh_disable();
1963
1964 switch (action) {
1965 case IEEE80211_AMPDU_RX_START:
1966 if (!(sc->sc_flags & SC_OP_RXAGGR))
1967 ret = -ENOTSUPP;
1968 break;
1969 case IEEE80211_AMPDU_RX_STOP:
1970 break;
1971 case IEEE80211_AMPDU_TX_START:
1972 ath9k_ps_wakeup(sc);
1973 ath_tx_aggr_start(sc, sta, tid, ssn);
1974 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1975 ath9k_ps_restore(sc);
1976 break;
1977 case IEEE80211_AMPDU_TX_STOP:
1978 ath9k_ps_wakeup(sc);
1979 ath_tx_aggr_stop(sc, sta, tid);
1980 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1981 ath9k_ps_restore(sc);
1982 break;
1983 case IEEE80211_AMPDU_TX_OPERATIONAL:
1984 ath9k_ps_wakeup(sc);
1985 ath_tx_aggr_resume(sc, sta, tid);
1986 ath9k_ps_restore(sc);
1987 break;
1988 default:
1989 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1990 "Unknown AMPDU action\n");
1991 }
1992
1993 local_bh_enable();
1994
1995 return ret;
1996 }
1997
1998 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1999 struct survey_info *survey)
2000 {
2001 struct ath_wiphy *aphy = hw->priv;
2002 struct ath_softc *sc = aphy->sc;
2003 struct ath_hw *ah = sc->sc_ah;
2004 struct ath_common *common = ath9k_hw_common(ah);
2005 struct ieee80211_conf *conf = &hw->conf;
2006
2007 if (idx != 0)
2008 return -ENOENT;
2009
2010 survey->channel = conf->channel;
2011 survey->filled = SURVEY_INFO_NOISE_DBM;
2012 survey->noise = common->ani.noise_floor;
2013
2014 return 0;
2015 }
2016
2017 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2018 {
2019 struct ath_wiphy *aphy = hw->priv;
2020 struct ath_softc *sc = aphy->sc;
2021
2022 mutex_lock(&sc->mutex);
2023 if (ath9k_wiphy_scanning(sc)) {
2024 /*
2025 * There is a race here in mac80211 but fixing it requires
2026 * we revisit how we handle the scan complete callback.
2027 * After mac80211 fixes we will not have configured hardware
2028 * to the home channel nor would we have configured the RX
2029 * filter yet.
2030 */
2031 mutex_unlock(&sc->mutex);
2032 return;
2033 }
2034
2035 aphy->state = ATH_WIPHY_SCAN;
2036 ath9k_wiphy_pause_all_forced(sc, aphy);
2037 sc->sc_flags |= SC_OP_SCANNING;
2038 mutex_unlock(&sc->mutex);
2039 }
2040
2041 /*
2042 * XXX: this requires a revisit after the driver
2043 * scan_complete gets moved to another place/removed in mac80211.
2044 */
2045 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2046 {
2047 struct ath_wiphy *aphy = hw->priv;
2048 struct ath_softc *sc = aphy->sc;
2049
2050 mutex_lock(&sc->mutex);
2051 aphy->state = ATH_WIPHY_ACTIVE;
2052 sc->sc_flags &= ~SC_OP_SCANNING;
2053 mutex_unlock(&sc->mutex);
2054 }
2055
2056 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2057 {
2058 struct ath_wiphy *aphy = hw->priv;
2059 struct ath_softc *sc = aphy->sc;
2060 struct ath_hw *ah = sc->sc_ah;
2061
2062 mutex_lock(&sc->mutex);
2063 ah->coverage_class = coverage_class;
2064 ath9k_hw_init_global_settings(ah);
2065 mutex_unlock(&sc->mutex);
2066 }
2067
2068 struct ieee80211_ops ath9k_ops = {
2069 .tx = ath9k_tx,
2070 .start = ath9k_start,
2071 .stop = ath9k_stop,
2072 .add_interface = ath9k_add_interface,
2073 .remove_interface = ath9k_remove_interface,
2074 .config = ath9k_config,
2075 .configure_filter = ath9k_configure_filter,
2076 .sta_add = ath9k_sta_add,
2077 .sta_remove = ath9k_sta_remove,
2078 .conf_tx = ath9k_conf_tx,
2079 .bss_info_changed = ath9k_bss_info_changed,
2080 .set_key = ath9k_set_key,
2081 .get_tsf = ath9k_get_tsf,
2082 .set_tsf = ath9k_set_tsf,
2083 .reset_tsf = ath9k_reset_tsf,
2084 .ampdu_action = ath9k_ampdu_action,
2085 .get_survey = ath9k_get_survey,
2086 .sw_scan_start = ath9k_sw_scan_start,
2087 .sw_scan_complete = ath9k_sw_scan_complete,
2088 .rfkill_poll = ath9k_rfkill_poll_state,
2089 .set_coverage_class = ath9k_set_coverage_class,
2090 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree