drivers/rtc/rtc-mxc.c

   1 /*
   2  * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <linux/io.h>
  13 #include <linux/rtc.h>
  14 #include <linux/module.h>
  15 #include <linux/slab.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/clk.h>
  19
  20 #include <mach/hardware.h>
  21
  22 #define RTC_INPUT_CLK_32768HZ   (0x00 << 5)
  23 #define RTC_INPUT_CLK_32000HZ   (0x01 << 5)
  24 #define RTC_INPUT_CLK_38400HZ   (0x02 << 5)
  25
  26 #define RTC_SW_BIT      (1 << 0)
  27 #define RTC_ALM_BIT     (1 << 2)
  28 #define RTC_1HZ_BIT     (1 << 4)
  29 #define RTC_2HZ_BIT     (1 << 7)
  30 #define RTC_SAM0_BIT    (1 << 8)
  31 #define RTC_SAM1_BIT    (1 << 9)
  32 #define RTC_SAM2_BIT    (1 << 10)
  33 #define RTC_SAM3_BIT    (1 << 11)
  34 #define RTC_SAM4_BIT    (1 << 12)
  35 #define RTC_SAM5_BIT    (1 << 13)
  36 #define RTC_SAM6_BIT    (1 << 14)
  37 #define RTC_SAM7_BIT    (1 << 15)
  38 #define PIT_ALL_ON      (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \
  39                          RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \
  40                          RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT)
  41
  42 #define RTC_ENABLE_BIT  (1 << 7)
  43
  44 #define MAX_PIE_NUM     9
  45 #define MAX_PIE_FREQ    512
  46 static const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = {
  47         { 2,            RTC_2HZ_BIT },
  48         { 4,            RTC_SAM0_BIT },
  49         { 8,            RTC_SAM1_BIT },
  50         { 16,           RTC_SAM2_BIT },
  51         { 32,           RTC_SAM3_BIT },
  52         { 64,           RTC_SAM4_BIT },
  53         { 128,          RTC_SAM5_BIT },
  54         { 256,          RTC_SAM6_BIT },
  55         { MAX_PIE_FREQ, RTC_SAM7_BIT },
  56 };
  57
  58 /* Those are the bits from a classic RTC we want to mimic */
  59 #define RTC_IRQF        0x80    /* any of the following 3 is active */
  60 #define RTC_PF          0x40    /* Periodic interrupt */
  61 #define RTC_AF          0x20    /* Alarm interrupt */
  62 #define RTC_UF          0x10    /* Update interrupt for 1Hz RTC */
  63
  64 #define MXC_RTC_TIME    0
  65 #define MXC_RTC_ALARM   1
  66
  67 #define RTC_HOURMIN     0x00    /*  32bit rtc hour/min counter reg */
  68 #define RTC_SECOND      0x04    /*  32bit rtc seconds counter reg */
  69 #define RTC_ALRM_HM     0x08    /*  32bit rtc alarm hour/min reg */
  70 #define RTC_ALRM_SEC    0x0C    /*  32bit rtc alarm seconds reg */
  71 #define RTC_RTCCTL      0x10    /*  32bit rtc control reg */
  72 #define RTC_RTCISR      0x14    /*  32bit rtc interrupt status reg */
  73 #define RTC_RTCIENR     0x18    /*  32bit rtc interrupt enable reg */
  74 #define RTC_STPWCH      0x1C    /*  32bit rtc stopwatch min reg */
  75 #define RTC_DAYR        0x20    /*  32bit rtc days counter reg */
  76 #define RTC_DAYALARM    0x24    /*  32bit rtc day alarm reg */
  77 #define RTC_TEST1       0x28    /*  32bit rtc test reg 1 */
  78 #define RTC_TEST2       0x2C    /*  32bit rtc test reg 2 */
  79 #define RTC_TEST3       0x30    /*  32bit rtc test reg 3 */
  80
  81 struct rtc_plat_data {
  82         struct rtc_device *rtc;
  83         void __iomem *ioaddr;
  84         int irq;
  85         struct clk *clk;
  86         unsigned int irqen;
  87         int alrm_sec;
  88         int alrm_min;
  89         int alrm_hour;
  90         int alrm_mday;
  91         struct timespec mxc_rtc_delta;
  92         struct rtc_time g_rtc_alarm;
  93 };
  94
  95 /*
  96  * This function is used to obtain the RTC time or the alarm value in
  97  * second.
  98  */
  99 static u32 get_alarm_or_time(struct device *dev, int time_alarm)
 100 {
 101         struct platform_device *pdev = to_platform_device(dev);
 102         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 103         void __iomem *ioaddr = pdata->ioaddr;
 104         u32 day = 0, hr = 0, min = 0, sec = 0, hr_min = 0;
 105
 106         switch (time_alarm) {
 107         case MXC_RTC_TIME:
 108                 day = readw(ioaddr + RTC_DAYR);
 109                 hr_min = readw(ioaddr + RTC_HOURMIN);
 110                 sec = readw(ioaddr + RTC_SECOND);
 111                 break;
 112         case MXC_RTC_ALARM:
 113                 day = readw(ioaddr + RTC_DAYALARM);
 114                 hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff;
 115                 sec = readw(ioaddr + RTC_ALRM_SEC);
 116                 break;
 117         }
 118
 119         hr = hr_min >> 8;
 120         min = hr_min & 0xff;
 121
 122         return (((day * 24 + hr) * 60) + min) * 60 + sec;
 123 }
 124
 125 /*
 126  * This function sets the RTC alarm value or the time value.
 127  */
 128 static void set_alarm_or_time(struct device *dev, int time_alarm, u32 time)
 129 {
 130         u32 day, hr, min, sec, temp;
 131         struct platform_device *pdev = to_platform_device(dev);
 132         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 133         void __iomem *ioaddr = pdata->ioaddr;
 134
 135         day = time / 86400;
 136         time -= day * 86400;
 137
 138         /* time is within a day now */
 139         hr = time / 3600;
 140         time -= hr * 3600;
 141
 142         /* time is within an hour now */
 143         min = time / 60;
 144         sec = time - min * 60;
 145
 146         temp = (hr << 8) + min;
 147
 148         switch (time_alarm) {
 149         case MXC_RTC_TIME:
 150                 writew(day, ioaddr + RTC_DAYR);
 151                 writew(sec, ioaddr + RTC_SECOND);
 152                 writew(temp, ioaddr + RTC_HOURMIN);
 153                 break;
 154         case MXC_RTC_ALARM:
 155                 writew(day, ioaddr + RTC_DAYALARM);
 156                 writew(sec, ioaddr + RTC_ALRM_SEC);
 157                 writew(temp, ioaddr + RTC_ALRM_HM);
 158                 break;
 159         }
 160 }
 161
 162 /*
 163  * This function updates the RTC alarm registers and then clears all the
 164  * interrupt status bits.
 165  */
 166 static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
 167 {
 168         struct rtc_time alarm_tm, now_tm;
 169         unsigned long now, time;
 170         int ret;
 171         struct platform_device *pdev = to_platform_device(dev);
 172         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 173         void __iomem *ioaddr = pdata->ioaddr;
 174
 175         now = get_alarm_or_time(dev, MXC_RTC_TIME);
 176         rtc_time_to_tm(now, &now_tm);
 177         alarm_tm.tm_year = now_tm.tm_year;
 178         alarm_tm.tm_mon = now_tm.tm_mon;
 179         alarm_tm.tm_mday = now_tm.tm_mday;
 180         alarm_tm.tm_hour = alrm->tm_hour;
 181         alarm_tm.tm_min = alrm->tm_min;
 182         alarm_tm.tm_sec = alrm->tm_sec;
 183         rtc_tm_to_time(&now_tm, &now);
 184         rtc_tm_to_time(&alarm_tm, &time);
 185
 186         if (time < now) {
 187                 time += 60 * 60 * 24;
 188                 rtc_time_to_tm(time, &alarm_tm);
 189         }
 190
 191         ret = rtc_tm_to_time(&alarm_tm, &time);
 192
 193         /* clear all the interrupt status bits */
 194         writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
 195         set_alarm_or_time(dev, MXC_RTC_ALARM, time);
 196
 197         return ret;
 198 }
 199
 200 /* This function is the RTC interrupt service routine. */
 201 static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id)
 202 {
 203         struct platform_device *pdev = dev_id;
 204         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 205         void __iomem *ioaddr = pdata->ioaddr;
 206         u32 status;
 207         u32 events = 0;
 208
 209         spin_lock_irq(&pdata->rtc->irq_lock);
 210         status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR);
 211         /* clear interrupt sources */
 212         writew(status, ioaddr + RTC_RTCISR);
 213
 214         /* clear alarm interrupt if it has occurred */
 215         if (status & RTC_ALM_BIT)
 216                 status &= ~RTC_ALM_BIT;
 217
 218         /* update irq data & counter */
 219         if (status & RTC_ALM_BIT)
 220                 events |= (RTC_AF | RTC_IRQF);
 221
 222         if (status & RTC_1HZ_BIT)
 223                 events |= (RTC_UF | RTC_IRQF);
 224
 225         if (status & PIT_ALL_ON)
 226                 events |= (RTC_PF | RTC_IRQF);
 227
 228         if ((status & RTC_ALM_BIT) && rtc_valid_tm(&pdata->g_rtc_alarm))
 229                 rtc_update_alarm(&pdev->dev, &pdata->g_rtc_alarm);
 230
 231         rtc_update_irq(pdata->rtc, 1, events);
 232         spin_unlock_irq(&pdata->rtc->irq_lock);
 233
 234         return IRQ_HANDLED;
 235 }
 236
 237 /*
 238  * Clear all interrupts and release the IRQ
 239  */
 240 static void mxc_rtc_release(struct device *dev)
 241 {
 242         struct platform_device *pdev = to_platform_device(dev);
 243         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 244         void __iomem *ioaddr = pdata->ioaddr;
 245
 246         spin_lock_irq(&pdata->rtc->irq_lock);
 247
 248         /* Disable all rtc interrupts */
 249         writew(0, ioaddr + RTC_RTCIENR);
 250
 251         /* Clear all interrupt status */
 252         writew(0xffffffff, ioaddr + RTC_RTCISR);
 253
 254         spin_unlock_irq(&pdata->rtc->irq_lock);
 255 }
 256
 257 static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit,
 258                                 unsigned int enabled)
 259 {
 260         struct platform_device *pdev = to_platform_device(dev);
 261         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 262         void __iomem *ioaddr = pdata->ioaddr;
 263         u32 reg;
 264
 265         spin_lock_irq(&pdata->rtc->irq_lock);
 266         reg = readw(ioaddr + RTC_RTCIENR);
 267
 268         if (enabled)
 269                 reg |= bit;
 270         else
 271                 reg &= ~bit;
 272
 273         writew(reg, ioaddr + RTC_RTCIENR);
 274         spin_unlock_irq(&pdata->rtc->irq_lock);
 275 }
 276
 277 static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 278 {
 279         mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled);
 280         return 0;
 281 }
 282
 283 static int mxc_rtc_update_irq_enable(struct device *dev, unsigned int enabled)
 284 {
 285         mxc_rtc_irq_enable(dev, RTC_1HZ_BIT, enabled);
 286         return 0;
 287 }
 288
 289 /*
 290  * This function reads the current RTC time into tm in Gregorian date.
 291  */
 292 static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm)
 293 {
 294         u32 val;
 295
 296         /* Avoid roll-over from reading the different registers */
 297         do {
 298                 val = get_alarm_or_time(dev, MXC_RTC_TIME);
 299         } while (val != get_alarm_or_time(dev, MXC_RTC_TIME));
 300
 301         rtc_time_to_tm(val, tm);
 302
 303         return 0;
 304 }
 305
 306 /*
 307  * This function sets the internal RTC time based on tm in Gregorian date.
 308  */
 309 static int mxc_rtc_set_mmss(struct device *dev, unsigned long time)
 310 {
 311         /* Avoid roll-over from reading the different registers */
 312         do {
 313                 set_alarm_or_time(dev, MXC_RTC_TIME, time);
 314         } while (time != get_alarm_or_time(dev, MXC_RTC_TIME));
 315
 316         return 0;
 317 }
 318
 319 /*
 320  * This function reads the current alarm value into the passed in 'alrm'
 321  * argument. It updates the alrm's pending field value based on the whether
 322  * an alarm interrupt occurs or not.
 323  */
 324 static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 325 {
 326         struct platform_device *pdev = to_platform_device(dev);
 327         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 328         void __iomem *ioaddr = pdata->ioaddr;
 329
 330         rtc_time_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time);
 331         alrm->pending = ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT)) ? 1 : 0;
 332
 333         return 0;
 334 }
 335
 336 /*
 337  * This function sets the RTC alarm based on passed in alrm.
 338  */
 339 static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 340 {
 341         struct platform_device *pdev = to_platform_device(dev);
 342         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 343         int ret;
 344
 345         if (rtc_valid_tm(&alrm->time)) {
 346                 if (alrm->time.tm_sec > 59 ||
 347                     alrm->time.tm_hour > 23 ||
 348                     alrm->time.tm_min > 59)
 349                         return -EINVAL;
 350
 351                 ret = rtc_update_alarm(dev, &alrm->time);
 352         } else {
 353                 ret = rtc_valid_tm(&alrm->time);
 354                 if (ret)
 355                         return ret;
 356
 357                 ret = rtc_update_alarm(dev, &alrm->time);
 358         }
 359
 360         if (ret)
 361                 return ret;
 362
 363         memcpy(&pdata->g_rtc_alarm, &alrm->time, sizeof(struct rtc_time));
 364         mxc_rtc_irq_enable(dev, RTC_ALM_BIT, alrm->enabled);
 365
 366         return 0;
 367 }
 368
 369 /* RTC layer */
 370 static struct rtc_class_ops mxc_rtc_ops = {
 371         .release                = mxc_rtc_release,
 372         .read_time              = mxc_rtc_read_time,
 373         .set_mmss               = mxc_rtc_set_mmss,
 374         .read_alarm             = mxc_rtc_read_alarm,
 375         .set_alarm              = mxc_rtc_set_alarm,
 376         .alarm_irq_enable       = mxc_rtc_alarm_irq_enable,
 377         .update_irq_enable      = mxc_rtc_update_irq_enable,
 378 };
 379
 380 static int __init mxc_rtc_probe(struct platform_device *pdev)
 381 {
 382         struct clk *clk;
 383         struct resource *res;
 384         struct rtc_device *rtc;
 385         struct rtc_plat_data *pdata = NULL;
 386         u32 reg;
 387         unsigned long rate;
 388         int ret;
 389
 390         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 391         if (!res)
 392                 return -ENODEV;
 393
 394         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 395         if (!pdata)
 396                 return -ENOMEM;
 397
 398         if (!devm_request_mem_region(&pdev->dev, res->start,
 399                                      resource_size(res), pdev->name))
 400                 return -EBUSY;
 401
 402         pdata->ioaddr = devm_ioremap(&pdev->dev, res->start,
 403                                      resource_size(res));
 404
 405         clk = clk_get(&pdev->dev, "ckil");
 406         if (IS_ERR(clk)) {
 407                 ret = PTR_ERR(clk);
 408                 goto exit_free_pdata;
 409         }
 410
 411         rate = clk_get_rate(clk);
 412         clk_put(clk);
 413
 414         if (rate == 32768)
 415                 reg = RTC_INPUT_CLK_32768HZ;
 416         else if (rate == 32000)
 417                 reg = RTC_INPUT_CLK_32000HZ;
 418         else if (rate == 38400)
 419                 reg = RTC_INPUT_CLK_38400HZ;
 420         else {
 421                 dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate);
 422                 ret = -EINVAL;
 423                 goto exit_free_pdata;
 424         }
 425
 426         reg |= RTC_ENABLE_BIT;
 427         writew(reg, (pdata->ioaddr + RTC_RTCCTL));
 428         if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) {
 429                 dev_err(&pdev->dev, "hardware module can't be enabled!\n");
 430                 ret = -EIO;
 431                 goto exit_free_pdata;
 432         }
 433
 434         pdata->clk = clk_get(&pdev->dev, "rtc");
 435         if (IS_ERR(pdata->clk)) {
 436                 dev_err(&pdev->dev, "unable to get clock!\n");
 437                 ret = PTR_ERR(pdata->clk);
 438                 goto exit_free_pdata;
 439         }
 440
 441         clk_enable(pdata->clk);
 442
 443         rtc = rtc_device_register(pdev->name, &pdev->dev, &mxc_rtc_ops,
 444                                   THIS_MODULE);
 445         if (IS_ERR(rtc)) {
 446                 ret = PTR_ERR(rtc);
 447                 goto exit_put_clk;
 448         }
 449
 450         pdata->rtc = rtc;
 451         platform_set_drvdata(pdev, pdata);
 452
 453         /* Configure and enable the RTC */
 454         pdata->irq = platform_get_irq(pdev, 0);
 455
 456         if (pdata->irq >= 0 &&
 457             devm_request_irq(&pdev->dev, pdata->irq, mxc_rtc_interrupt,
 458                              IRQF_SHARED, pdev->name, pdev) < 0) {
 459                 dev_warn(&pdev->dev, "interrupt not available.\n");
 460                 pdata->irq = -1;
 461         }
 462
 463         return 0;
 464
 465 exit_put_clk:
 466         clk_disable(pdata->clk);
 467         clk_put(pdata->clk);
 468
 469 exit_free_pdata:
 470
 471         return ret;
 472 }
 473
 474 static int __exit mxc_rtc_remove(struct platform_device *pdev)
 475 {
 476         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 477
 478         rtc_device_unregister(pdata->rtc);
 479
 480         clk_disable(pdata->clk);
 481         clk_put(pdata->clk);
 482         platform_set_drvdata(pdev, NULL);
 483
 484         return 0;
 485 }
 486
 487 static struct platform_driver mxc_rtc_driver = {
 488         .driver = {
 489                    .name        = "mxc_rtc",
 490                    .owner       = THIS_MODULE,
 491         },
 492         .remove         = __exit_p(mxc_rtc_remove),
 493 };
 494
 495 static int __init mxc_rtc_init(void)
 496 {
 497         return platform_driver_probe(&mxc_rtc_driver, mxc_rtc_probe);
 498 }
 499
 500 static void __exit mxc_rtc_exit(void)
 501 {
 502         platform_driver_unregister(&mxc_rtc_driver);
 503 }
 504
 505 module_init(mxc_rtc_init);
 506 module_exit(mxc_rtc_exit);
 507
 508 MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
 509 MODULE_DESCRIPTION("RTC driver for Freescale MXC");
 510 MODULE_LICENSE("GPL");
 511