2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
31 #include <linux/kvm_host.h>
33 static void pic_clear_isr(struct kvm_kpic_state
*s
, int irq
)
35 s
->isr
&= ~(1 << irq
);
36 s
->isr_ack
|= (1 << irq
);
39 void kvm_pic_clear_isr_ack(struct kvm
*kvm
)
41 struct kvm_pic
*s
= pic_irqchip(kvm
);
42 s
->pics
[0].isr_ack
= 0xff;
43 s
->pics
[1].isr_ack
= 0xff;
47 * set irq level. If an edge is detected, then the IRR is set to 1
49 static inline void pic_set_irq1(struct kvm_kpic_state
*s
, int irq
, int level
)
53 if (s
->elcr
& mask
) /* level triggered */
61 else /* edge triggered */
63 if ((s
->last_irr
& mask
) == 0)
71 * return the highest priority found in mask (highest = smallest
72 * number). Return 8 if no irq
74 static inline int get_priority(struct kvm_kpic_state
*s
, int mask
)
80 while ((mask
& (1 << ((priority
+ s
->priority_add
) & 7))) == 0)
86 * return the pic wanted interrupt. return -1 if none
88 static int pic_get_irq(struct kvm_kpic_state
*s
)
90 int mask
, cur_priority
, priority
;
92 mask
= s
->irr
& ~s
->imr
;
93 priority
= get_priority(s
, mask
);
97 * compute current priority. If special fully nested mode on the
98 * master, the IRQ coming from the slave is not taken into account
99 * for the priority computation.
102 if (s
->special_fully_nested_mode
&& s
== &s
->pics_state
->pics
[0])
104 cur_priority
= get_priority(s
, mask
);
105 if (priority
< cur_priority
)
107 * higher priority found: an irq should be generated
109 return (priority
+ s
->priority_add
) & 7;
115 * raise irq to CPU if necessary. must be called every time the active
118 static void pic_update_irq(struct kvm_pic
*s
)
122 irq2
= pic_get_irq(&s
->pics
[1]);
125 * if irq request by slave pic, signal master PIC
127 pic_set_irq1(&s
->pics
[0], 2, 1);
128 pic_set_irq1(&s
->pics
[0], 2, 0);
130 irq
= pic_get_irq(&s
->pics
[0]);
132 s
->irq_request(s
->irq_request_opaque
, 1);
134 s
->irq_request(s
->irq_request_opaque
, 0);
137 void kvm_pic_update_irq(struct kvm_pic
*s
)
142 void kvm_pic_set_irq(void *opaque
, int irq
, int level
)
144 struct kvm_pic
*s
= opaque
;
146 if (irq
>= 0 && irq
< PIC_NUM_PINS
) {
147 pic_set_irq1(&s
->pics
[irq
>> 3], irq
& 7, level
);
153 * acknowledge interrupt 'irq'
155 static inline void pic_intack(struct kvm_kpic_state
*s
, int irq
)
159 if (s
->rotate_on_auto_eoi
)
160 s
->priority_add
= (irq
+ 1) & 7;
161 pic_clear_isr(s
, irq
);
164 * We don't clear a level sensitive interrupt here
166 if (!(s
->elcr
& (1 << irq
)))
167 s
->irr
&= ~(1 << irq
);
170 int kvm_pic_read_irq(struct kvm
*kvm
)
172 int irq
, irq2
, intno
;
173 struct kvm_pic
*s
= pic_irqchip(kvm
);
175 irq
= pic_get_irq(&s
->pics
[0]);
177 pic_intack(&s
->pics
[0], irq
);
179 irq2
= pic_get_irq(&s
->pics
[1]);
181 pic_intack(&s
->pics
[1], irq2
);
184 * spurious IRQ on slave controller
187 intno
= s
->pics
[1].irq_base
+ irq2
;
190 intno
= s
->pics
[0].irq_base
+ irq
;
193 * spurious IRQ on host controller
196 intno
= s
->pics
[0].irq_base
+ irq
;
199 kvm_notify_acked_irq(kvm
, irq
);
204 void kvm_pic_reset(struct kvm_kpic_state
*s
)
207 struct kvm
*kvm
= s
->pics_state
->irq_request_opaque
;
208 struct kvm_vcpu
*vcpu0
= kvm
->vcpus
[0];
210 if (s
== &s
->pics_state
->pics
[0])
215 for (irq
= 0; irq
< PIC_NUM_PINS
/2; irq
++) {
216 if (vcpu0
&& kvm_apic_accept_pic_intr(vcpu0
))
217 if (s
->irr
& (1 << irq
) || s
->isr
& (1 << irq
))
218 kvm_notify_acked_irq(kvm
, irq
+irqbase
);
227 s
->read_reg_select
= 0;
232 s
->rotate_on_auto_eoi
= 0;
233 s
->special_fully_nested_mode
= 0;
237 static void pic_ioport_write(void *opaque
, u32 addr
, u32 val
)
239 struct kvm_kpic_state
*s
= opaque
;
240 int priority
, cmd
, irq
;
245 kvm_pic_reset(s
); /* init */
247 * deassert a pending interrupt
249 s
->pics_state
->irq_request(s
->pics_state
->
250 irq_request_opaque
, 0);
254 printk(KERN_ERR
"single mode not supported");
257 "level sensitive irq not supported");
258 } else if (val
& 0x08) {
262 s
->read_reg_select
= val
& 1;
264 s
->special_mask
= (val
>> 5) & 1;
270 s
->rotate_on_auto_eoi
= cmd
>> 2;
272 case 1: /* end of interrupt */
274 priority
= get_priority(s
, s
->isr
);
276 irq
= (priority
+ s
->priority_add
) & 7;
277 pic_clear_isr(s
, irq
);
279 s
->priority_add
= (irq
+ 1) & 7;
280 pic_update_irq(s
->pics_state
);
285 pic_clear_isr(s
, irq
);
286 pic_update_irq(s
->pics_state
);
289 s
->priority_add
= (val
+ 1) & 7;
290 pic_update_irq(s
->pics_state
);
294 s
->priority_add
= (irq
+ 1) & 7;
295 pic_clear_isr(s
, irq
);
296 pic_update_irq(s
->pics_state
);
299 break; /* no operation */
303 switch (s
->init_state
) {
304 case 0: /* normal mode */
306 pic_update_irq(s
->pics_state
);
309 s
->irq_base
= val
& 0xf8;
319 s
->special_fully_nested_mode
= (val
>> 4) & 1;
320 s
->auto_eoi
= (val
>> 1) & 1;
326 static u32
pic_poll_read(struct kvm_kpic_state
*s
, u32 addr1
)
330 ret
= pic_get_irq(s
);
333 s
->pics_state
->pics
[0].isr
&= ~(1 << 2);
334 s
->pics_state
->pics
[0].irr
&= ~(1 << 2);
336 s
->irr
&= ~(1 << ret
);
337 pic_clear_isr(s
, ret
);
338 if (addr1
>> 7 || ret
!= 2)
339 pic_update_irq(s
->pics_state
);
342 pic_update_irq(s
->pics_state
);
348 static u32
pic_ioport_read(void *opaque
, u32 addr1
)
350 struct kvm_kpic_state
*s
= opaque
;
357 ret
= pic_poll_read(s
, addr1
);
361 if (s
->read_reg_select
)
370 static void elcr_ioport_write(void *opaque
, u32 addr
, u32 val
)
372 struct kvm_kpic_state
*s
= opaque
;
373 s
->elcr
= val
& s
->elcr_mask
;
376 static u32
elcr_ioport_read(void *opaque
, u32 addr1
)
378 struct kvm_kpic_state
*s
= opaque
;
382 static int picdev_in_range(struct kvm_io_device
*this, gpa_t addr
,
383 int len
, int is_write
)
398 static void picdev_write(struct kvm_io_device
*this,
399 gpa_t addr
, int len
, const void *val
)
401 struct kvm_pic
*s
= this->private;
402 unsigned char data
= *(unsigned char *)val
;
405 if (printk_ratelimit())
406 printk(KERN_ERR
"PIC: non byte write\n");
414 pic_ioport_write(&s
->pics
[addr
>> 7], addr
, data
);
418 elcr_ioport_write(&s
->pics
[addr
& 1], addr
, data
);
423 static void picdev_read(struct kvm_io_device
*this,
424 gpa_t addr
, int len
, void *val
)
426 struct kvm_pic
*s
= this->private;
427 unsigned char data
= 0;
430 if (printk_ratelimit())
431 printk(KERN_ERR
"PIC: non byte read\n");
439 data
= pic_ioport_read(&s
->pics
[addr
>> 7], addr
);
443 data
= elcr_ioport_read(&s
->pics
[addr
& 1], addr
);
446 *(unsigned char *)val
= data
;
450 * callback when PIC0 irq status changed
452 static void pic_irq_request(void *opaque
, int level
)
454 struct kvm
*kvm
= opaque
;
455 struct kvm_vcpu
*vcpu
= kvm
->vcpus
[0];
456 struct kvm_pic
*s
= pic_irqchip(kvm
);
457 int irq
= pic_get_irq(&s
->pics
[0]);
460 if (vcpu
&& level
&& (s
->pics
[0].isr_ack
& (1 << irq
))) {
461 s
->pics
[0].isr_ack
&= ~(1 << irq
);
466 struct kvm_pic
*kvm_create_pic(struct kvm
*kvm
)
469 s
= kzalloc(sizeof(struct kvm_pic
), GFP_KERNEL
);
472 s
->pics
[0].elcr_mask
= 0xf8;
473 s
->pics
[1].elcr_mask
= 0xde;
474 s
->irq_request
= pic_irq_request
;
475 s
->irq_request_opaque
= kvm
;
476 s
->pics
[0].pics_state
= s
;
477 s
->pics
[1].pics_state
= s
;
480 * Initialize PIO device
482 s
->dev
.read
= picdev_read
;
483 s
->dev
.write
= picdev_write
;
484 s
->dev
.in_range
= picdev_in_range
;
486 kvm_io_bus_register_dev(&kvm
->pio_bus
, &s
->dev
);