drivers/pci/pci.h

   1 #ifndef DRIVERS_PCI_H
   2 #define DRIVERS_PCI_H
   3
   4 #include <linux/workqueue.h>
   5
   6 #define PCI_CFG_SPACE_SIZE      256
   7 #define PCI_CFG_SPACE_EXP_SIZE  4096
   8
   9 /* Functions internal to the PCI core code */
  10
  11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
  12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  14 extern void pci_cleanup_rom(struct pci_dev *dev);
  15 #ifdef HAVE_PCI_MMAP
  16 enum pci_mmap_api {
  17         PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
  18         PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
  19 };
  20 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
  21                          struct vm_area_struct *vmai,
  22                          enum pci_mmap_api mmap_api);
  23 #endif
  24 int pci_probe_reset_function(struct pci_dev *dev);
  25
  26 /**
  27  * struct pci_platform_pm_ops - Firmware PM callbacks
  28  *
  29  * @is_manageable: returns 'true' if given device is power manageable by the
  30  *                 platform firmware
  31  *
  32  * @set_state: invokes the platform firmware to set the device's power state
  33  *
  34  * @choose_state: returns PCI power state of given device preferred by the
  35  *                platform; to be used during system-wide transitions from a
  36  *                sleeping state to the working state and vice versa
  37  *
  38  * @can_wakeup: returns 'true' if given device is capable of waking up the
  39  *              system from a sleeping state
  40  *
  41  * @sleep_wake: enables/disables the system wake up capability of given device
  42  *
  43  * If given platform is generally capable of power managing PCI devices, all of
  44  * these callbacks are mandatory.
  45  */
  46 struct pci_platform_pm_ops {
  47         bool (*is_manageable)(struct pci_dev *dev);
  48         int (*set_state)(struct pci_dev *dev, pci_power_t state);
  49         pci_power_t (*choose_state)(struct pci_dev *dev);
  50         bool (*can_wakeup)(struct pci_dev *dev);
  51         int (*sleep_wake)(struct pci_dev *dev, bool enable);
  52 };
  53
  54 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
  55 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  56 extern void pci_disable_enabled_device(struct pci_dev *dev);
  57 extern void pci_pm_init(struct pci_dev *dev);
  58 extern void platform_pci_wakeup_init(struct pci_dev *dev);
  59 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  60
  61 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
  62 {
  63         return !!(pci_dev->subordinate);
  64 }
  65
  66 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
  67 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
  68 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
  69 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
  70 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
  71 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
  72
  73 struct pci_vpd_ops {
  74         ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  75         ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
  76         void (*release)(struct pci_dev *dev);
  77 };
  78
  79 struct pci_vpd {
  80         unsigned int len;
  81         const struct pci_vpd_ops *ops;
  82         struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
  83 };
  84
  85 extern int pci_vpd_pci22_init(struct pci_dev *dev);
  86 static inline void pci_vpd_release(struct pci_dev *dev)
  87 {
  88         if (dev->vpd)
  89                 dev->vpd->ops->release(dev);
  90 }
  91
  92 /* PCI /proc functions */
  93 #ifdef CONFIG_PROC_FS
  94 extern int pci_proc_attach_device(struct pci_dev *dev);
  95 extern int pci_proc_detach_device(struct pci_dev *dev);
  96 extern int pci_proc_detach_bus(struct pci_bus *bus);
  97 #else
  98 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
  99 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
 100 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
 101 #endif
 102
 103 /* Functions for PCI Hotplug drivers to use */
 104 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
 105
 106 #ifdef HAVE_PCI_LEGACY
 107 extern void pci_create_legacy_files(struct pci_bus *bus);
 108 extern void pci_remove_legacy_files(struct pci_bus *bus);
 109 #else
 110 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 111 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 112 #endif
 113
 114 /* Lock for read/write access to pci device and bus lists */
 115 extern struct rw_semaphore pci_bus_sem;
 116
 117 extern unsigned int pci_pm_d3_delay;
 118
 119 #ifdef CONFIG_PCI_MSI
 120 void pci_no_msi(void);
 121 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
 122 #else
 123 static inline void pci_no_msi(void) { }
 124 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 125 #endif
 126
 127 #ifdef CONFIG_PCIEAER
 128 void pci_no_aer(void);
 129 #else
 130 static inline void pci_no_aer(void) { }
 131 #endif
 132
 133 static inline int pci_no_d1d2(struct pci_dev *dev)
 134 {
 135         unsigned int parent_dstates = 0;
 136
 137         if (dev->bus->self)
 138                 parent_dstates = dev->bus->self->no_d1d2;
 139         return (dev->no_d1d2 || parent_dstates);
 140
 141 }
 142 extern struct device_attribute pci_dev_attrs[];
 143 extern struct device_attribute dev_attr_cpuaffinity;
 144 extern struct device_attribute dev_attr_cpulistaffinity;
 145 #ifdef CONFIG_HOTPLUG
 146 extern struct bus_attribute pci_bus_attrs[];
 147 #else
 148 #define pci_bus_attrs   NULL
 149 #endif
 150
 151
 152 /**
 153  * pci_match_one_device - Tell if a PCI device structure has a matching
 154  *                        PCI device id structure
 155  * @id: single PCI device id structure to match
 156  * @dev: the PCI device structure to match against
 157  *
 158  * Returns the matching pci_device_id structure or %NULL if there is no match.
 159  */
 160 static inline const struct pci_device_id *
 161 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 162 {
 163         if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 164             (id->device == PCI_ANY_ID || id->device == dev->device) &&
 165             (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 166             (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 167             !((id->class ^ dev->class) & id->class_mask))
 168                 return id;
 169         return NULL;
 170 }
 171
 172 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
 173
 174 /* PCI slot sysfs helper code */
 175 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 176
 177 extern struct kset *pci_slots_kset;
 178
 179 struct pci_slot_attribute {
 180         struct attribute attr;
 181         ssize_t (*show)(struct pci_slot *, char *);
 182         ssize_t (*store)(struct pci_slot *, const char *, size_t);
 183 };
 184 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 185
 186 enum pci_bar_type {
 187         pci_bar_unknown,        /* Standard PCI BAR probe */
 188         pci_bar_io,             /* An io port BAR */
 189         pci_bar_mem32,          /* A 32-bit memory BAR */
 190         pci_bar_mem64,          /* A 64-bit memory BAR */
 191 };
 192
 193 extern int pci_setup_device(struct pci_dev *dev);
 194 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 195                                 struct resource *res, unsigned int reg);
 196 extern int pci_resource_bar(struct pci_dev *dev, int resno,
 197                             enum pci_bar_type *type);
 198 extern int pci_bus_add_child(struct pci_bus *bus);
 199 extern void pci_enable_ari(struct pci_dev *dev);
 200 /**
 201  * pci_ari_enabled - query ARI forwarding status
 202  * @bus: the PCI bus
 203  *
 204  * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
 205  */
 206 static inline int pci_ari_enabled(struct pci_bus *bus)
 207 {
 208         return bus->self && bus->self->ari_enabled;
 209 }
 210
 211 #ifdef CONFIG_PCI_QUIRKS
 212 extern int pci_is_reassigndev(struct pci_dev *dev);
 213 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
 214 extern void pci_disable_bridge_window(struct pci_dev *dev);
 215 #endif
 216
 217 /* Single Root I/O Virtualization */
 218 struct pci_sriov {
 219         int pos;                /* capability position */
 220         int nres;               /* number of resources */
 221         u32 cap;                /* SR-IOV Capabilities */
 222         u16 ctrl;               /* SR-IOV Control */
 223         u16 total;              /* total VFs associated with the PF */
 224         u16 initial;            /* initial VFs associated with the PF */
 225         u16 nr_virtfn;          /* number of VFs available */
 226         u16 offset;             /* first VF Routing ID offset */
 227         u16 stride;             /* following VF stride */
 228         u32 pgsz;               /* page size for BAR alignment */
 229         u8 link;                /* Function Dependency Link */
 230         struct pci_dev *dev;    /* lowest numbered PF */
 231         struct pci_dev *self;   /* this PF */
 232         struct mutex lock;      /* lock for VF bus */
 233         struct work_struct mtask; /* VF Migration task */
 234         u8 __iomem *mstate;     /* VF Migration State Array */
 235 };
 236
 237 /* Address Translation Service */
 238 struct pci_ats {
 239         int pos;        /* capability position */
 240         int stu;        /* Smallest Translation Unit */
 241         int qdep;       /* Invalidate Queue Depth */
 242         int ref_cnt;    /* Physical Function reference count */
 243         int is_enabled:1;       /* Enable bit is set */
 244 };
 245
 246 #ifdef CONFIG_PCI_IOV
 247 extern int pci_iov_init(struct pci_dev *dev);
 248 extern void pci_iov_release(struct pci_dev *dev);
 249 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 250                                 enum pci_bar_type *type);
 251 extern int pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
 252 extern void pci_restore_iov_state(struct pci_dev *dev);
 253 extern int pci_iov_bus_range(struct pci_bus *bus);
 254
 255 extern int pci_enable_ats(struct pci_dev *dev, int ps);
 256 extern void pci_disable_ats(struct pci_dev *dev);
 257 extern int pci_ats_queue_depth(struct pci_dev *dev);
 258 /**
 259  * pci_ats_enabled - query the ATS status
 260  * @dev: the PCI device
 261  *
 262  * Returns 1 if ATS capability is enabled, or 0 if not.
 263  */
 264 static inline int pci_ats_enabled(struct pci_dev *dev)
 265 {
 266         return dev->ats && dev->ats->is_enabled;
 267 }
 268 #else
 269 static inline int pci_iov_init(struct pci_dev *dev)
 270 {
 271         return -ENODEV;
 272 }
 273 static inline void pci_iov_release(struct pci_dev *dev)
 274
 275 {
 276 }
 277 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 278                                        enum pci_bar_type *type)
 279 {
 280         return 0;
 281 }
 282 static inline void pci_restore_iov_state(struct pci_dev *dev)
 283 {
 284 }
 285 static inline int pci_iov_bus_range(struct pci_bus *bus)
 286 {
 287         return 0;
 288 }
 289
 290 static inline int pci_enable_ats(struct pci_dev *dev, int ps)
 291 {
 292         return -ENODEV;
 293 }
 294 static inline void pci_disable_ats(struct pci_dev *dev)
 295 {
 296 }
 297 static inline int pci_ats_queue_depth(struct pci_dev *dev)
 298 {
 299         return -ENODEV;
 300 }
 301 static inline int pci_ats_enabled(struct pci_dev *dev)
 302 {
 303         return 0;
 304 }
 305 #endif /* CONFIG_PCI_IOV */
 306
 307 static inline int pci_resource_alignment(struct pci_dev *dev,
 308                                          struct resource *res)
 309 {
 310 #ifdef CONFIG_PCI_IOV
 311         int resno = res - dev->resource;
 312
 313         if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 314                 return pci_sriov_resource_alignment(dev, resno);
 315 #endif
 316         return resource_alignment(res);
 317 }
 318
 319 #endif /* DRIVERS_PCI_H */