2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/spinlock.h>
22 #include <linux/workqueue.h>
23 #include <linux/interrupt.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/spi_bitbang.h>
32 /*----------------------------------------------------------------------*/
35 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
36 * Use this for GPIO or shift-register level hardware APIs.
38 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
39 * to glue code. These bitbang setup() and cleanup() routines are always
40 * used, though maybe they're called from controller-aware code.
42 * chipselect() and friends may use use spi_device->controller_data and
43 * controller registers as appropriate.
46 * NOTE: SPI controller pins can often be used as GPIO pins instead,
47 * which means you could use a bitbang driver either to get hardware
48 * working quickly, or testing for differences that aren't speed related.
51 struct spi_bitbang_cs
{
52 unsigned nsecs
; /* (clock cycle time)/2 */
53 u32 (*txrx_word
)(struct spi_device
*spi
, unsigned nsecs
,
55 unsigned (*txrx_bufs
)(struct spi_device
*,
57 struct spi_device
*spi
,
60 unsigned, struct spi_transfer
*);
63 static unsigned bitbang_txrx_8(
64 struct spi_device
*spi
,
65 u32 (*txrx_word
)(struct spi_device
*spi
,
69 struct spi_transfer
*t
71 unsigned bits
= spi
->bits_per_word
;
72 unsigned count
= t
->len
;
73 const u8
*tx
= t
->tx_buf
;
76 while (likely(count
> 0)) {
81 word
= txrx_word(spi
, ns
, word
, bits
);
86 return t
->len
- count
;
89 static unsigned bitbang_txrx_16(
90 struct spi_device
*spi
,
91 u32 (*txrx_word
)(struct spi_device
*spi
,
95 struct spi_transfer
*t
97 unsigned bits
= spi
->bits_per_word
;
98 unsigned count
= t
->len
;
99 const u16
*tx
= t
->tx_buf
;
102 while (likely(count
> 1)) {
107 word
= txrx_word(spi
, ns
, word
, bits
);
112 return t
->len
- count
;
115 static unsigned bitbang_txrx_32(
116 struct spi_device
*spi
,
117 u32 (*txrx_word
)(struct spi_device
*spi
,
121 struct spi_transfer
*t
123 unsigned bits
= spi
->bits_per_word
;
124 unsigned count
= t
->len
;
125 const u32
*tx
= t
->tx_buf
;
128 while (likely(count
> 3)) {
133 word
= txrx_word(spi
, ns
, word
, bits
);
138 return t
->len
- count
;
142 * spi_bitbang_setup - default setup for per-word I/O loops
144 int spi_bitbang_setup(struct spi_device
*spi
)
146 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
147 struct spi_bitbang
*bitbang
;
149 if (!spi
->max_speed_hz
)
153 cs
= kzalloc(sizeof *cs
, SLAB_KERNEL
);
156 spi
->controller_state
= cs
;
158 bitbang
= spi_master_get_devdata(spi
->master
);
160 if (!spi
->bits_per_word
)
161 spi
->bits_per_word
= 8;
163 /* spi_transfer level calls that work per-word */
164 if (spi
->bits_per_word
<= 8)
165 cs
->txrx_bufs
= bitbang_txrx_8
;
166 else if (spi
->bits_per_word
<= 16)
167 cs
->txrx_bufs
= bitbang_txrx_16
;
168 else if (spi
->bits_per_word
<= 32)
169 cs
->txrx_bufs
= bitbang_txrx_32
;
173 /* per-word shift register access, in hardware or bitbanging */
174 cs
->txrx_word
= bitbang
->txrx_word
[spi
->mode
& (SPI_CPOL
|SPI_CPHA
)];
178 /* nsecs = (clock period)/2 */
179 cs
->nsecs
= (1000000000/2) / (spi
->max_speed_hz
);
180 if (cs
->nsecs
> MAX_UDELAY_MS
* 1000)
183 dev_dbg(&spi
->dev
, "%s, mode %d, %u bits/w, %u nsec\n",
184 __FUNCTION__
, spi
->mode
& (SPI_CPOL
| SPI_CPHA
),
185 spi
->bits_per_word
, 2 * cs
->nsecs
);
187 /* NOTE we _need_ to call chipselect() early, ideally with adapter
188 * setup, unless the hardware defaults cooperate to avoid confusion
189 * between normal (active low) and inverted chipselects.
192 /* deselect chip (low or high) */
193 spin_lock(&bitbang
->lock
);
194 if (!bitbang
->busy
) {
195 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
198 spin_unlock(&bitbang
->lock
);
202 EXPORT_SYMBOL_GPL(spi_bitbang_setup
);
205 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
207 void spi_bitbang_cleanup(const struct spi_device
*spi
)
209 kfree(spi
->controller_state
);
211 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup
);
213 static int spi_bitbang_bufs(struct spi_device
*spi
, struct spi_transfer
*t
)
215 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
216 unsigned nsecs
= cs
->nsecs
;
218 return cs
->txrx_bufs(spi
, cs
->txrx_word
, nsecs
, t
);
221 /*----------------------------------------------------------------------*/
224 * SECOND PART ... simple transfer queue runner.
226 * This costs a task context per controller, running the queue by
227 * performing each transfer in sequence. Smarter hardware can queue
228 * several DMA transfers at once, and process several controller queues
229 * in parallel; this driver doesn't match such hardware very well.
231 * Drivers can provide word-at-a-time i/o primitives, or provide
232 * transfer-at-a-time ones to leverage dma or fifo hardware.
234 static void bitbang_work(void *_bitbang
)
236 struct spi_bitbang
*bitbang
= _bitbang
;
239 spin_lock_irqsave(&bitbang
->lock
, flags
);
241 while (!list_empty(&bitbang
->queue
)) {
242 struct spi_message
*m
;
243 struct spi_device
*spi
;
245 struct spi_transfer
*t
= NULL
;
250 m
= container_of(bitbang
->queue
.next
, struct spi_message
,
252 list_del_init(&m
->queue
);
253 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
255 /* FIXME this is made-up ... the correct value is known to
256 * word-at-a-time bitbang code, and presumably chipselect()
257 * should enforce these requirements too?
266 list_for_each_entry (t
, &m
->transfers
, transfer_list
) {
267 if (bitbang
->shutdown
) {
272 /* set up default clock polarity, and activate chip;
273 * this implicitly updates clock and spi modes as
274 * previously recorded for this device via setup().
275 * (and also deselects any other chip that might be
279 bitbang
->chipselect(spi
, BITBANG_CS_ACTIVE
);
282 cs_change
= t
->cs_change
;
283 if (!t
->tx_buf
&& !t
->rx_buf
&& t
->len
) {
288 /* transfer data. the lower level code handles any
289 * new dma mappings it needs. our caller always gave
290 * us dma-safe buffers.
293 /* REVISIT dma API still needs a designated
294 * DMA_ADDR_INVALID; ~0 might be better.
296 if (!m
->is_dma_mapped
)
297 t
->rx_dma
= t
->tx_dma
= 0;
298 status
= bitbang
->txrx_bufs(spi
, t
);
300 if (status
!= t
->len
) {
305 m
->actual_length
+= status
;
308 /* protocol tweaks before next transfer */
310 udelay(t
->delay_usecs
);
314 if (t
->transfer_list
.next
== &m
->transfers
)
317 /* sometimes a short mid-message deselect of the chip
318 * may be needed to terminate a mode or command
321 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
326 m
->complete(m
->context
);
328 /* normally deactivate chipselect ... unless no error and
329 * cs_change has hinted that the next message will probably
330 * be for this chip too.
332 if (!(status
== 0 && cs_change
)) {
334 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
338 spin_lock_irqsave(&bitbang
->lock
, flags
);
341 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
345 * spi_bitbang_transfer - default submit to transfer queue
347 int spi_bitbang_transfer(struct spi_device
*spi
, struct spi_message
*m
)
349 struct spi_bitbang
*bitbang
;
352 m
->actual_length
= 0;
353 m
->status
= -EINPROGRESS
;
355 bitbang
= spi_master_get_devdata(spi
->master
);
356 if (bitbang
->shutdown
)
359 spin_lock_irqsave(&bitbang
->lock
, flags
);
360 list_add_tail(&m
->queue
, &bitbang
->queue
);
361 queue_work(bitbang
->workqueue
, &bitbang
->work
);
362 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
366 EXPORT_SYMBOL_GPL(spi_bitbang_transfer
);
368 /*----------------------------------------------------------------------*/
371 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
372 * @bitbang: driver handle
374 * Caller should have zero-initialized all parts of the structure, and then
375 * provided callbacks for chip selection and I/O loops. If the master has
376 * a transfer method, its final step should call spi_bitbang_transfer; or,
377 * that's the default if the transfer routine is not initialized. It should
378 * also set up the bus number and number of chipselects.
380 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
381 * hardware that basically exposes a shift register) or per-spi_transfer
382 * (which takes better advantage of hardware like fifos or DMA engines).
384 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
385 * spi_bitbang_cleanup to handle those spi master methods. Those methods are
386 * the defaults if the bitbang->txrx_bufs routine isn't initialized.
388 * This routine registers the spi_master, which will process requests in a
389 * dedicated task, keeping IRQs unblocked most of the time. To stop
390 * processing those requests, call spi_bitbang_stop().
392 int spi_bitbang_start(struct spi_bitbang
*bitbang
)
396 if (!bitbang
->master
|| !bitbang
->chipselect
)
399 INIT_WORK(&bitbang
->work
, bitbang_work
, bitbang
);
400 spin_lock_init(&bitbang
->lock
);
401 INIT_LIST_HEAD(&bitbang
->queue
);
403 if (!bitbang
->master
->transfer
)
404 bitbang
->master
->transfer
= spi_bitbang_transfer
;
405 if (!bitbang
->txrx_bufs
) {
406 bitbang
->use_dma
= 0;
407 bitbang
->txrx_bufs
= spi_bitbang_bufs
;
408 if (!bitbang
->master
->setup
) {
409 bitbang
->master
->setup
= spi_bitbang_setup
;
410 bitbang
->master
->cleanup
= spi_bitbang_cleanup
;
412 } else if (!bitbang
->master
->setup
)
415 /* this task is the only thing to touch the SPI bits */
417 bitbang
->workqueue
= create_singlethread_workqueue(
418 bitbang
->master
->cdev
.dev
->bus_id
);
419 if (bitbang
->workqueue
== NULL
) {
424 /* driver may get busy before register() returns, especially
425 * if someone registered boardinfo for devices
427 status
= spi_register_master(bitbang
->master
);
434 destroy_workqueue(bitbang
->workqueue
);
438 EXPORT_SYMBOL_GPL(spi_bitbang_start
);
441 * spi_bitbang_stop - stops the task providing spi communication
443 int spi_bitbang_stop(struct spi_bitbang
*bitbang
)
445 unsigned limit
= 500;
447 spin_lock_irq(&bitbang
->lock
);
448 bitbang
->shutdown
= 0;
449 while (!list_empty(&bitbang
->queue
) && limit
--) {
450 spin_unlock_irq(&bitbang
->lock
);
452 dev_dbg(bitbang
->master
->cdev
.dev
, "wait for queue\n");
455 spin_lock_irq(&bitbang
->lock
);
457 spin_unlock_irq(&bitbang
->lock
);
458 if (!list_empty(&bitbang
->queue
)) {
459 dev_err(bitbang
->master
->cdev
.dev
, "queue didn't empty\n");
463 destroy_workqueue(bitbang
->workqueue
);
465 spi_unregister_master(bitbang
->master
);
469 EXPORT_SYMBOL_GPL(spi_bitbang_stop
);
471 MODULE_LICENSE("GPL");