2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
41 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
42 #include <asm-generic/rtc.h>
45 struct rtc_device
*rtc
;
48 struct resource
*iomem
;
50 void (*wake_on
)(struct device
*);
51 void (*wake_off
)(struct device
*);
56 /* newer hardware extends the original register set */
62 /* both platform and pnp busses use negative numbers for invalid irqs */
63 #define is_valid_irq(n) ((n) > 0)
65 static const char driver_name
[] = "rtc_cmos";
67 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
68 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
69 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
71 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
73 static inline int is_intr(u8 rtc_intr
)
75 if (!(rtc_intr
& RTC_IRQF
))
77 return rtc_intr
& RTC_IRQMASK
;
80 /*----------------------------------------------------------------*/
82 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
83 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
84 * used in a broken "legacy replacement" mode. The breakage includes
85 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
88 * When that broken mode is in use, platform glue provides a partial
89 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
90 * want to use HPET for anything except those IRQs though...
92 #ifdef CONFIG_HPET_EMULATE_RTC
96 static inline int is_hpet_enabled(void)
101 static inline int hpet_mask_rtc_irq_bit(unsigned long mask
)
106 static inline int hpet_set_rtc_irq_bit(unsigned long mask
)
112 hpet_set_alarm_time(unsigned char hrs
, unsigned char min
, unsigned char sec
)
117 static inline int hpet_set_periodic_freq(unsigned long freq
)
122 static inline int hpet_rtc_dropped_irq(void)
127 static inline int hpet_rtc_timer_init(void)
132 extern irq_handler_t hpet_rtc_interrupt
;
134 static inline int hpet_register_irq_handler(irq_handler_t handler
)
139 static inline int hpet_unregister_irq_handler(irq_handler_t handler
)
146 /*----------------------------------------------------------------*/
150 /* Most newer x86 systems have two register banks, the first used
151 * for RTC and NVRAM and the second only for NVRAM. Caller must
152 * own rtc_lock ... and we won't worry about access during NMI.
154 #define can_bank2 true
156 static inline unsigned char cmos_read_bank2(unsigned char addr
)
158 outb(addr
, RTC_PORT(2));
159 return inb(RTC_PORT(3));
162 static inline void cmos_write_bank2(unsigned char val
, unsigned char addr
)
164 outb(addr
, RTC_PORT(2));
165 outb(val
, RTC_PORT(2));
170 #define can_bank2 false
172 static inline unsigned char cmos_read_bank2(unsigned char addr
)
177 static inline void cmos_write_bank2(unsigned char val
, unsigned char addr
)
183 /*----------------------------------------------------------------*/
185 static int cmos_read_time(struct device
*dev
, struct rtc_time
*t
)
187 /* REVISIT: if the clock has a "century" register, use
188 * that instead of the heuristic in get_rtc_time().
189 * That'll make Y3K compatility (year > 2070) easy!
195 static int cmos_set_time(struct device
*dev
, struct rtc_time
*t
)
197 /* REVISIT: set the "century" register if available
199 * NOTE: this ignores the issue whereby updating the seconds
200 * takes effect exactly 500ms after we write the register.
201 * (Also queueing and other delays before we get this far.)
203 return set_rtc_time(t
);
206 static int cmos_read_alarm(struct device
*dev
, struct rtc_wkalrm
*t
)
208 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
209 unsigned char rtc_control
;
211 if (!is_valid_irq(cmos
->irq
))
214 /* Basic alarms only support hour, minute, and seconds fields.
215 * Some also support day and month, for alarms up to a year in
218 t
->time
.tm_mday
= -1;
221 spin_lock_irq(&rtc_lock
);
222 t
->time
.tm_sec
= CMOS_READ(RTC_SECONDS_ALARM
);
223 t
->time
.tm_min
= CMOS_READ(RTC_MINUTES_ALARM
);
224 t
->time
.tm_hour
= CMOS_READ(RTC_HOURS_ALARM
);
226 if (cmos
->day_alrm
) {
227 /* ignore upper bits on readback per ACPI spec */
228 t
->time
.tm_mday
= CMOS_READ(cmos
->day_alrm
) & 0x3f;
229 if (!t
->time
.tm_mday
)
230 t
->time
.tm_mday
= -1;
232 if (cmos
->mon_alrm
) {
233 t
->time
.tm_mon
= CMOS_READ(cmos
->mon_alrm
);
239 rtc_control
= CMOS_READ(RTC_CONTROL
);
240 spin_unlock_irq(&rtc_lock
);
242 if (!(rtc_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
243 if (((unsigned)t
->time
.tm_sec
) < 0x60)
244 t
->time
.tm_sec
= bcd2bin(t
->time
.tm_sec
);
247 if (((unsigned)t
->time
.tm_min
) < 0x60)
248 t
->time
.tm_min
= bcd2bin(t
->time
.tm_min
);
251 if (((unsigned)t
->time
.tm_hour
) < 0x24)
252 t
->time
.tm_hour
= bcd2bin(t
->time
.tm_hour
);
254 t
->time
.tm_hour
= -1;
256 if (cmos
->day_alrm
) {
257 if (((unsigned)t
->time
.tm_mday
) <= 0x31)
258 t
->time
.tm_mday
= bcd2bin(t
->time
.tm_mday
);
260 t
->time
.tm_mday
= -1;
262 if (cmos
->mon_alrm
) {
263 if (((unsigned)t
->time
.tm_mon
) <= 0x12)
264 t
->time
.tm_mon
= bcd2bin(t
->time
.tm_mon
)-1;
270 t
->time
.tm_year
= -1;
272 t
->enabled
= !!(rtc_control
& RTC_AIE
);
278 static void cmos_checkintr(struct cmos_rtc
*cmos
, unsigned char rtc_control
)
280 unsigned char rtc_intr
;
282 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
283 * allegedly some older rtcs need that to handle irqs properly
285 rtc_intr
= CMOS_READ(RTC_INTR_FLAGS
);
287 if (is_hpet_enabled())
290 rtc_intr
&= (rtc_control
& RTC_IRQMASK
) | RTC_IRQF
;
291 if (is_intr(rtc_intr
))
292 rtc_update_irq(cmos
->rtc
, 1, rtc_intr
);
295 static void cmos_irq_enable(struct cmos_rtc
*cmos
, unsigned char mask
)
297 unsigned char rtc_control
;
299 /* flush any pending IRQ status, notably for update irqs,
300 * before we enable new IRQs
302 rtc_control
= CMOS_READ(RTC_CONTROL
);
303 cmos_checkintr(cmos
, rtc_control
);
306 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
307 hpet_set_rtc_irq_bit(mask
);
309 cmos_checkintr(cmos
, rtc_control
);
312 static void cmos_irq_disable(struct cmos_rtc
*cmos
, unsigned char mask
)
314 unsigned char rtc_control
;
316 rtc_control
= CMOS_READ(RTC_CONTROL
);
317 rtc_control
&= ~mask
;
318 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
319 hpet_mask_rtc_irq_bit(mask
);
321 cmos_checkintr(cmos
, rtc_control
);
324 static int cmos_set_alarm(struct device
*dev
, struct rtc_wkalrm
*t
)
326 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
327 unsigned char mon
, mday
, hrs
, min
, sec
, rtc_control
;
329 if (!is_valid_irq(cmos
->irq
))
332 mon
= t
->time
.tm_mon
+ 1;
333 mday
= t
->time
.tm_mday
;
334 hrs
= t
->time
.tm_hour
;
335 min
= t
->time
.tm_min
;
336 sec
= t
->time
.tm_sec
;
338 rtc_control
= CMOS_READ(RTC_CONTROL
);
339 if (!(rtc_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
340 /* Writing 0xff means "don't care" or "match all". */
341 mon
= (mon
<= 12) ? bin2bcd(mon
) : 0xff;
342 mday
= (mday
>= 1 && mday
<= 31) ? bin2bcd(mday
) : 0xff;
343 hrs
= (hrs
< 24) ? bin2bcd(hrs
) : 0xff;
344 min
= (min
< 60) ? bin2bcd(min
) : 0xff;
345 sec
= (sec
< 60) ? bin2bcd(sec
) : 0xff;
348 spin_lock_irq(&rtc_lock
);
350 /* next rtc irq must not be from previous alarm setting */
351 cmos_irq_disable(cmos
, RTC_AIE
);
354 CMOS_WRITE(hrs
, RTC_HOURS_ALARM
);
355 CMOS_WRITE(min
, RTC_MINUTES_ALARM
);
356 CMOS_WRITE(sec
, RTC_SECONDS_ALARM
);
358 /* the system may support an "enhanced" alarm */
359 if (cmos
->day_alrm
) {
360 CMOS_WRITE(mday
, cmos
->day_alrm
);
362 CMOS_WRITE(mon
, cmos
->mon_alrm
);
365 /* FIXME the HPET alarm glue currently ignores day_alrm
368 hpet_set_alarm_time(t
->time
.tm_hour
, t
->time
.tm_min
, t
->time
.tm_sec
);
371 cmos_irq_enable(cmos
, RTC_AIE
);
373 spin_unlock_irq(&rtc_lock
);
378 static int cmos_irq_set_freq(struct device
*dev
, int freq
)
380 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
384 if (!is_valid_irq(cmos
->irq
))
387 if (!is_power_of_2(freq
))
389 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
395 spin_lock_irqsave(&rtc_lock
, flags
);
396 hpet_set_periodic_freq(freq
);
397 CMOS_WRITE(RTC_REF_CLCK_32KHZ
| f
, RTC_FREQ_SELECT
);
398 spin_unlock_irqrestore(&rtc_lock
, flags
);
403 static int cmos_irq_set_state(struct device
*dev
, int enabled
)
405 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
408 if (!is_valid_irq(cmos
->irq
))
411 spin_lock_irqsave(&rtc_lock
, flags
);
414 cmos_irq_enable(cmos
, RTC_PIE
);
416 cmos_irq_disable(cmos
, RTC_PIE
);
418 spin_unlock_irqrestore(&rtc_lock
, flags
);
422 static int cmos_alarm_irq_enable(struct device
*dev
, unsigned int enabled
)
424 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
427 if (!is_valid_irq(cmos
->irq
))
430 spin_lock_irqsave(&rtc_lock
, flags
);
433 cmos_irq_enable(cmos
, RTC_AIE
);
435 cmos_irq_disable(cmos
, RTC_AIE
);
437 spin_unlock_irqrestore(&rtc_lock
, flags
);
441 static int cmos_update_irq_enable(struct device
*dev
, unsigned int enabled
)
443 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
446 if (!is_valid_irq(cmos
->irq
))
449 spin_lock_irqsave(&rtc_lock
, flags
);
452 cmos_irq_enable(cmos
, RTC_UIE
);
454 cmos_irq_disable(cmos
, RTC_UIE
);
456 spin_unlock_irqrestore(&rtc_lock
, flags
);
460 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
462 static int cmos_procfs(struct device
*dev
, struct seq_file
*seq
)
464 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
465 unsigned char rtc_control
, valid
;
467 spin_lock_irq(&rtc_lock
);
468 rtc_control
= CMOS_READ(RTC_CONTROL
);
469 valid
= CMOS_READ(RTC_VALID
);
470 spin_unlock_irq(&rtc_lock
);
472 /* NOTE: at least ICH6 reports battery status using a different
473 * (non-RTC) bit; and SQWE is ignored on many current systems.
475 return seq_printf(seq
,
476 "periodic_IRQ\t: %s\n"
478 "HPET_emulated\t: %s\n"
479 // "square_wave\t: %s\n"
482 "periodic_freq\t: %d\n"
483 "batt_status\t: %s\n",
484 (rtc_control
& RTC_PIE
) ? "yes" : "no",
485 (rtc_control
& RTC_UIE
) ? "yes" : "no",
486 is_hpet_enabled() ? "yes" : "no",
487 // (rtc_control & RTC_SQWE) ? "yes" : "no",
488 (rtc_control
& RTC_DM_BINARY
) ? "no" : "yes",
489 (rtc_control
& RTC_DST_EN
) ? "yes" : "no",
491 (valid
& RTC_VRT
) ? "okay" : "dead");
495 #define cmos_procfs NULL
498 static const struct rtc_class_ops cmos_rtc_ops
= {
499 .read_time
= cmos_read_time
,
500 .set_time
= cmos_set_time
,
501 .read_alarm
= cmos_read_alarm
,
502 .set_alarm
= cmos_set_alarm
,
504 .irq_set_freq
= cmos_irq_set_freq
,
505 .irq_set_state
= cmos_irq_set_state
,
506 .alarm_irq_enable
= cmos_alarm_irq_enable
,
507 .update_irq_enable
= cmos_update_irq_enable
,
510 /*----------------------------------------------------------------*/
513 * All these chips have at least 64 bytes of address space, shared by
514 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
515 * by boot firmware. Modern chips have 128 or 256 bytes.
518 #define NVRAM_OFFSET (RTC_REG_D + 1)
521 cmos_nvram_read(struct file
*filp
, struct kobject
*kobj
,
522 struct bin_attribute
*attr
,
523 char *buf
, loff_t off
, size_t count
)
527 if (unlikely(off
>= attr
->size
))
529 if (unlikely(off
< 0))
531 if ((off
+ count
) > attr
->size
)
532 count
= attr
->size
- off
;
535 spin_lock_irq(&rtc_lock
);
536 for (retval
= 0; count
; count
--, off
++, retval
++) {
538 *buf
++ = CMOS_READ(off
);
540 *buf
++ = cmos_read_bank2(off
);
544 spin_unlock_irq(&rtc_lock
);
550 cmos_nvram_write(struct file
*filp
, struct kobject
*kobj
,
551 struct bin_attribute
*attr
,
552 char *buf
, loff_t off
, size_t count
)
554 struct cmos_rtc
*cmos
;
557 cmos
= dev_get_drvdata(container_of(kobj
, struct device
, kobj
));
558 if (unlikely(off
>= attr
->size
))
560 if (unlikely(off
< 0))
562 if ((off
+ count
) > attr
->size
)
563 count
= attr
->size
- off
;
565 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
566 * checksum on part of the NVRAM data. That's currently ignored
567 * here. If userspace is smart enough to know what fields of
568 * NVRAM to update, updating checksums is also part of its job.
571 spin_lock_irq(&rtc_lock
);
572 for (retval
= 0; count
; count
--, off
++, retval
++) {
573 /* don't trash RTC registers */
574 if (off
== cmos
->day_alrm
575 || off
== cmos
->mon_alrm
576 || off
== cmos
->century
)
579 CMOS_WRITE(*buf
++, off
);
581 cmos_write_bank2(*buf
++, off
);
585 spin_unlock_irq(&rtc_lock
);
590 static struct bin_attribute nvram
= {
593 .mode
= S_IRUGO
| S_IWUSR
,
596 .read
= cmos_nvram_read
,
597 .write
= cmos_nvram_write
,
598 /* size gets set up later */
601 /*----------------------------------------------------------------*/
603 static struct cmos_rtc cmos_rtc
;
605 static irqreturn_t
cmos_interrupt(int irq
, void *p
)
610 spin_lock(&rtc_lock
);
612 /* When the HPET interrupt handler calls us, the interrupt
613 * status is passed as arg1 instead of the irq number. But
614 * always clear irq status, even when HPET is in the way.
616 * Note that HPET and RTC are almost certainly out of phase,
617 * giving different IRQ status ...
619 irqstat
= CMOS_READ(RTC_INTR_FLAGS
);
620 rtc_control
= CMOS_READ(RTC_CONTROL
);
621 if (is_hpet_enabled())
622 irqstat
= (unsigned long)irq
& 0xF0;
623 irqstat
&= (rtc_control
& RTC_IRQMASK
) | RTC_IRQF
;
625 /* All Linux RTC alarms should be treated as if they were oneshot.
626 * Similar code may be needed in system wakeup paths, in case the
627 * alarm woke the system.
629 if (irqstat
& RTC_AIE
) {
630 rtc_control
&= ~RTC_AIE
;
631 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
632 hpet_mask_rtc_irq_bit(RTC_AIE
);
634 CMOS_READ(RTC_INTR_FLAGS
);
636 spin_unlock(&rtc_lock
);
638 if (is_intr(irqstat
)) {
639 rtc_update_irq(p
, 1, irqstat
);
649 #define INITSECTION __init
652 static int INITSECTION
653 cmos_do_probe(struct device
*dev
, struct resource
*ports
, int rtc_irq
)
655 struct cmos_rtc_board_info
*info
= dev
->platform_data
;
657 unsigned char rtc_control
;
658 unsigned address_space
;
660 /* there can be only one ... */
667 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
669 * REVISIT non-x86 systems may instead use memory space resources
670 * (needing ioremap etc), not i/o space resources like this ...
672 ports
= request_region(ports
->start
,
673 ports
->end
+ 1 - ports
->start
,
676 dev_dbg(dev
, "i/o registers already in use\n");
680 cmos_rtc
.irq
= rtc_irq
;
681 cmos_rtc
.iomem
= ports
;
683 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
684 * driver did, but don't reject unknown configs. Old hardware
685 * won't address 128 bytes. Newer chips have multiple banks,
686 * though they may not be listed in one I/O resource.
688 #if defined(CONFIG_ATARI)
690 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
691 || defined(__sparc__) || defined(__mips__)
694 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
697 if (can_bank2
&& ports
->end
> (ports
->start
+ 1))
700 /* For ACPI systems extension info comes from the FADT. On others,
701 * board specific setup provides it as appropriate. Systems where
702 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
703 * some almost-clones) can provide hooks to make that behave.
705 * Note that ACPI doesn't preclude putting these registers into
706 * "extended" areas of the chip, including some that we won't yet
707 * expect CMOS_READ and friends to handle.
710 if (info
->rtc_day_alarm
&& info
->rtc_day_alarm
< 128)
711 cmos_rtc
.day_alrm
= info
->rtc_day_alarm
;
712 if (info
->rtc_mon_alarm
&& info
->rtc_mon_alarm
< 128)
713 cmos_rtc
.mon_alrm
= info
->rtc_mon_alarm
;
714 if (info
->rtc_century
&& info
->rtc_century
< 128)
715 cmos_rtc
.century
= info
->rtc_century
;
717 if (info
->wake_on
&& info
->wake_off
) {
718 cmos_rtc
.wake_on
= info
->wake_on
;
719 cmos_rtc
.wake_off
= info
->wake_off
;
724 dev_set_drvdata(dev
, &cmos_rtc
);
726 cmos_rtc
.rtc
= rtc_device_register(driver_name
, dev
,
727 &cmos_rtc_ops
, THIS_MODULE
);
728 if (IS_ERR(cmos_rtc
.rtc
)) {
729 retval
= PTR_ERR(cmos_rtc
.rtc
);
733 rename_region(ports
, dev_name(&cmos_rtc
.rtc
->dev
));
735 spin_lock_irq(&rtc_lock
);
737 /* force periodic irq to CMOS reset default of 1024Hz;
739 * REVISIT it's been reported that at least one x86_64 ALI mobo
740 * doesn't use 32KHz here ... for portability we might need to
741 * do something about other clock frequencies.
743 cmos_rtc
.rtc
->irq_freq
= 1024;
744 hpet_set_periodic_freq(cmos_rtc
.rtc
->irq_freq
);
745 CMOS_WRITE(RTC_REF_CLCK_32KHZ
| 0x06, RTC_FREQ_SELECT
);
748 cmos_irq_disable(&cmos_rtc
, RTC_PIE
| RTC_AIE
| RTC_UIE
);
750 rtc_control
= CMOS_READ(RTC_CONTROL
);
752 spin_unlock_irq(&rtc_lock
);
755 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
757 if (is_valid_irq(rtc_irq
) && !(rtc_control
& RTC_24H
)) {
758 dev_warn(dev
, "only 24-hr supported\n");
763 if (is_valid_irq(rtc_irq
)) {
764 irq_handler_t rtc_cmos_int_handler
;
766 if (is_hpet_enabled()) {
769 rtc_cmos_int_handler
= hpet_rtc_interrupt
;
770 err
= hpet_register_irq_handler(cmos_interrupt
);
772 printk(KERN_WARNING
"hpet_register_irq_handler "
773 " failed in rtc_init().");
777 rtc_cmos_int_handler
= cmos_interrupt
;
779 retval
= request_irq(rtc_irq
, rtc_cmos_int_handler
,
780 IRQF_DISABLED
, dev_name(&cmos_rtc
.rtc
->dev
),
783 dev_dbg(dev
, "IRQ %d is already in use\n", rtc_irq
);
787 hpet_rtc_timer_init();
789 /* export at least the first block of NVRAM */
790 nvram
.size
= address_space
- NVRAM_OFFSET
;
791 retval
= sysfs_create_bin_file(&dev
->kobj
, &nvram
);
793 dev_dbg(dev
, "can't create nvram file? %d\n", retval
);
797 pr_info("%s: %s%s, %zd bytes nvram%s\n",
798 dev_name(&cmos_rtc
.rtc
->dev
),
799 !is_valid_irq(rtc_irq
) ? "no alarms" :
800 cmos_rtc
.mon_alrm
? "alarms up to one year" :
801 cmos_rtc
.day_alrm
? "alarms up to one month" :
802 "alarms up to one day",
803 cmos_rtc
.century
? ", y3k" : "",
805 is_hpet_enabled() ? ", hpet irqs" : "");
810 if (is_valid_irq(rtc_irq
))
811 free_irq(rtc_irq
, cmos_rtc
.rtc
);
814 rtc_device_unregister(cmos_rtc
.rtc
);
816 release_region(ports
->start
, ports
->end
+ 1 - ports
->start
);
820 static void cmos_do_shutdown(void)
822 spin_lock_irq(&rtc_lock
);
823 cmos_irq_disable(&cmos_rtc
, RTC_IRQMASK
);
824 spin_unlock_irq(&rtc_lock
);
827 static void __exit
cmos_do_remove(struct device
*dev
)
829 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
830 struct resource
*ports
;
834 sysfs_remove_bin_file(&dev
->kobj
, &nvram
);
836 if (is_valid_irq(cmos
->irq
)) {
837 free_irq(cmos
->irq
, cmos
->rtc
);
838 hpet_unregister_irq_handler(cmos_interrupt
);
841 rtc_device_unregister(cmos
->rtc
);
845 release_region(ports
->start
, ports
->end
+ 1 - ports
->start
);
849 dev_set_drvdata(dev
, NULL
);
854 static int cmos_suspend(struct device
*dev
)
856 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
859 /* only the alarm might be a wakeup event source */
860 spin_lock_irq(&rtc_lock
);
861 cmos
->suspend_ctrl
= tmp
= CMOS_READ(RTC_CONTROL
);
862 if (tmp
& (RTC_PIE
|RTC_AIE
|RTC_UIE
)) {
865 if (device_may_wakeup(dev
))
866 mask
= RTC_IRQMASK
& ~RTC_AIE
;
870 CMOS_WRITE(tmp
, RTC_CONTROL
);
872 /* shut down hpet emulation - we don't need it for alarm */
873 hpet_mask_rtc_irq_bit(RTC_PIE
|RTC_AIE
|RTC_UIE
);
874 cmos_checkintr(cmos
, tmp
);
876 spin_unlock_irq(&rtc_lock
);
879 cmos
->enabled_wake
= 1;
883 enable_irq_wake(cmos
->irq
);
886 pr_debug("%s: suspend%s, ctrl %02x\n",
887 dev_name(&cmos_rtc
.rtc
->dev
),
888 (tmp
& RTC_AIE
) ? ", alarm may wake" : "",
894 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
895 * after a detour through G3 "mechanical off", although the ACPI spec
896 * says wakeup should only work from G1/S4 "hibernate". To most users,
897 * distinctions between S4 and S5 are pointless. So when the hardware
898 * allows, don't draw that distinction.
900 static inline int cmos_poweroff(struct device
*dev
)
902 return cmos_suspend(dev
);
905 static int cmos_resume(struct device
*dev
)
907 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
908 unsigned char tmp
= cmos
->suspend_ctrl
;
910 /* re-enable any irqs previously active */
911 if (tmp
& RTC_IRQMASK
) {
914 if (cmos
->enabled_wake
) {
918 disable_irq_wake(cmos
->irq
);
919 cmos
->enabled_wake
= 0;
922 spin_lock_irq(&rtc_lock
);
924 CMOS_WRITE(tmp
, RTC_CONTROL
);
925 hpet_set_rtc_irq_bit(tmp
& RTC_IRQMASK
);
927 mask
= CMOS_READ(RTC_INTR_FLAGS
);
928 mask
&= (tmp
& RTC_IRQMASK
) | RTC_IRQF
;
929 if (!is_hpet_enabled() || !is_intr(mask
))
932 /* force one-shot behavior if HPET blocked
933 * the wake alarm's irq
935 rtc_update_irq(cmos
->rtc
, 1, mask
);
937 hpet_mask_rtc_irq_bit(RTC_AIE
);
938 } while (mask
& RTC_AIE
);
939 spin_unlock_irq(&rtc_lock
);
942 pr_debug("%s: resume, ctrl %02x\n",
943 dev_name(&cmos_rtc
.rtc
->dev
),
949 static SIMPLE_DEV_PM_OPS(cmos_pm_ops
, cmos_suspend
, cmos_resume
);
953 static inline int cmos_poweroff(struct device
*dev
)
960 /*----------------------------------------------------------------*/
962 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
963 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
964 * probably list them in similar PNPBIOS tables; so PNP is more common.
966 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
967 * predate even PNPBIOS should set up platform_bus devices.
972 #include <linux/acpi.h>
974 static u32
rtc_handler(void *context
)
976 acpi_clear_event(ACPI_EVENT_RTC
);
977 acpi_disable_event(ACPI_EVENT_RTC
, 0);
978 return ACPI_INTERRUPT_HANDLED
;
981 static inline void rtc_wake_setup(void)
983 acpi_install_fixed_event_handler(ACPI_EVENT_RTC
, rtc_handler
, NULL
);
985 * After the RTC handler is installed, the Fixed_RTC event should
986 * be disabled. Only when the RTC alarm is set will it be enabled.
988 acpi_clear_event(ACPI_EVENT_RTC
);
989 acpi_disable_event(ACPI_EVENT_RTC
, 0);
992 static void rtc_wake_on(struct device
*dev
)
994 acpi_clear_event(ACPI_EVENT_RTC
);
995 acpi_enable_event(ACPI_EVENT_RTC
, 0);
998 static void rtc_wake_off(struct device
*dev
)
1000 acpi_disable_event(ACPI_EVENT_RTC
, 0);
1003 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1004 * its device node and pass extra config data. This helps its driver use
1005 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1006 * that this board's RTC is wakeup-capable (per ACPI spec).
1008 static struct cmos_rtc_board_info acpi_rtc_info
;
1010 static void __devinit
1011 cmos_wake_setup(struct device
*dev
)
1017 acpi_rtc_info
.wake_on
= rtc_wake_on
;
1018 acpi_rtc_info
.wake_off
= rtc_wake_off
;
1020 /* workaround bug in some ACPI tables */
1021 if (acpi_gbl_FADT
.month_alarm
&& !acpi_gbl_FADT
.day_alarm
) {
1022 dev_dbg(dev
, "bogus FADT month_alarm (%d)\n",
1023 acpi_gbl_FADT
.month_alarm
);
1024 acpi_gbl_FADT
.month_alarm
= 0;
1027 acpi_rtc_info
.rtc_day_alarm
= acpi_gbl_FADT
.day_alarm
;
1028 acpi_rtc_info
.rtc_mon_alarm
= acpi_gbl_FADT
.month_alarm
;
1029 acpi_rtc_info
.rtc_century
= acpi_gbl_FADT
.century
;
1031 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1032 if (acpi_gbl_FADT
.flags
& ACPI_FADT_S4_RTC_WAKE
)
1033 dev_info(dev
, "RTC can wake from S4\n");
1035 dev
->platform_data
= &acpi_rtc_info
;
1037 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1038 device_init_wakeup(dev
, 1);
1043 static void __devinit
1044 cmos_wake_setup(struct device
*dev
)
1052 #include <linux/pnp.h>
1054 static int __devinit
1055 cmos_pnp_probe(struct pnp_dev
*pnp
, const struct pnp_device_id
*id
)
1057 cmos_wake_setup(&pnp
->dev
);
1059 if (pnp_port_start(pnp
,0) == 0x70 && !pnp_irq_valid(pnp
,0))
1060 /* Some machines contain a PNP entry for the RTC, but
1061 * don't define the IRQ. It should always be safe to
1062 * hardcode it in these cases
1064 return cmos_do_probe(&pnp
->dev
,
1065 pnp_get_resource(pnp
, IORESOURCE_IO
, 0), 8);
1067 return cmos_do_probe(&pnp
->dev
,
1068 pnp_get_resource(pnp
, IORESOURCE_IO
, 0),
1072 static void __exit
cmos_pnp_remove(struct pnp_dev
*pnp
)
1074 cmos_do_remove(&pnp
->dev
);
1079 static int cmos_pnp_suspend(struct pnp_dev
*pnp
, pm_message_t mesg
)
1081 return cmos_suspend(&pnp
->dev
);
1084 static int cmos_pnp_resume(struct pnp_dev
*pnp
)
1086 return cmos_resume(&pnp
->dev
);
1090 #define cmos_pnp_suspend NULL
1091 #define cmos_pnp_resume NULL
1094 static void cmos_pnp_shutdown(struct pnp_dev
*pnp
)
1096 if (system_state
== SYSTEM_POWER_OFF
&& !cmos_poweroff(&pnp
->dev
))
1102 static const struct pnp_device_id rtc_ids
[] = {
1103 { .id
= "PNP0b00", },
1104 { .id
= "PNP0b01", },
1105 { .id
= "PNP0b02", },
1108 MODULE_DEVICE_TABLE(pnp
, rtc_ids
);
1110 static struct pnp_driver cmos_pnp_driver
= {
1111 .name
= (char *) driver_name
,
1112 .id_table
= rtc_ids
,
1113 .probe
= cmos_pnp_probe
,
1114 .remove
= __exit_p(cmos_pnp_remove
),
1115 .shutdown
= cmos_pnp_shutdown
,
1117 /* flag ensures resume() gets called, and stops syslog spam */
1118 .flags
= PNP_DRIVER_RES_DO_NOT_CHANGE
,
1119 .suspend
= cmos_pnp_suspend
,
1120 .resume
= cmos_pnp_resume
,
1123 #endif /* CONFIG_PNP */
1125 /*----------------------------------------------------------------*/
1127 /* Platform setup should have set up an RTC device, when PNP is
1128 * unavailable ... this could happen even on (older) PCs.
1131 static int __init
cmos_platform_probe(struct platform_device
*pdev
)
1133 cmos_wake_setup(&pdev
->dev
);
1134 return cmos_do_probe(&pdev
->dev
,
1135 platform_get_resource(pdev
, IORESOURCE_IO
, 0),
1136 platform_get_irq(pdev
, 0));
1139 static int __exit
cmos_platform_remove(struct platform_device
*pdev
)
1141 cmos_do_remove(&pdev
->dev
);
1145 static void cmos_platform_shutdown(struct platform_device
*pdev
)
1147 if (system_state
== SYSTEM_POWER_OFF
&& !cmos_poweroff(&pdev
->dev
))
1153 /* work with hotplug and coldplug */
1154 MODULE_ALIAS("platform:rtc_cmos");
1156 static struct platform_driver cmos_platform_driver
= {
1157 .remove
= __exit_p(cmos_platform_remove
),
1158 .shutdown
= cmos_platform_shutdown
,
1160 .name
= (char *) driver_name
,
1168 static bool pnp_driver_registered
;
1170 static bool platform_driver_registered
;
1172 static int __init
cmos_init(void)
1177 retval
= pnp_register_driver(&cmos_pnp_driver
);
1179 pnp_driver_registered
= true;
1182 if (!cmos_rtc
.dev
) {
1183 retval
= platform_driver_probe(&cmos_platform_driver
,
1184 cmos_platform_probe
);
1186 platform_driver_registered
= true;
1193 if (pnp_driver_registered
)
1194 pnp_unregister_driver(&cmos_pnp_driver
);
1198 module_init(cmos_init
);
1200 static void __exit
cmos_exit(void)
1203 if (pnp_driver_registered
)
1204 pnp_unregister_driver(&cmos_pnp_driver
);
1206 if (platform_driver_registered
)
1207 platform_driver_unregister(&cmos_platform_driver
);
1209 module_exit(cmos_exit
);
1212 MODULE_AUTHOR("David Brownell");
1213 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1214 MODULE_LICENSE("GPL");