2 * arch/arm/mach-pnx4008/gpio.c
6 * Author: Dmitry Chigirev <source@mvista.com>
8 * Based on reference code by Iwo Mergler and Z.Tabaaloute from Philips:
9 * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
11 * 2005 (c) MontaVista Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
21 #include <mach/hardware.h>
22 #include <mach/platform.h>
23 #include <mach/gpio.h>
25 /* register definitions */
26 #define PIO_VA_BASE IO_ADDRESS(PNX4008_PIO_BASE)
28 #define PIO_INP_STATE (0x00U)
29 #define PIO_OUTP_SET (0x04U)
30 #define PIO_OUTP_CLR (0x08U)
31 #define PIO_OUTP_STATE (0x0CU)
32 #define PIO_DRV_SET (0x10U)
33 #define PIO_DRV_CLR (0x14U)
34 #define PIO_DRV_STATE (0x18U)
35 #define PIO_SDINP_STATE (0x1CU)
36 #define PIO_SDOUTP_SET (0x20U)
37 #define PIO_SDOUTP_CLR (0x24U)
38 #define PIO_MUX_SET (0x28U)
39 #define PIO_MUX_CLR (0x2CU)
40 #define PIO_MUX_STATE (0x30U)
42 static inline void gpio_lock(void)
47 static inline void gpio_unlock(void)
52 /* Inline functions */
53 static inline int gpio_read_bit(u32 reg
, int gpio
)
63 val
= __raw_readl(PIO_VA_BASE
+ reg
);
64 ret
= (val
& bit
) ? 1 : 0;
70 static inline int gpio_set_bit(u32 reg
, int gpio
)
80 val
= __raw_readl(PIO_VA_BASE
+ reg
);
82 __raw_writel(val
, PIO_VA_BASE
+ reg
);
89 /* Very simple access control, bitmap for allocated/free */
90 static unsigned long access_map
[4];
96 /*GPIO to Input Mapping */
97 static short gpio_to_inp_map
[32] = {
98 -1, -1, -1, -1, -1, -1, -1, -1,
99 -1, -1, -1, -1, -1, -1, -1, -1,
100 -1, -1, -1, -1, -1, -1, -1, -1,
101 -1, 10, 11, 12, 13, 14, 24, -1
104 /*GPIO to Mux Mapping */
105 static short gpio_to_mux_map
[32] = {
106 -1, -1, -1, -1, -1, -1, -1, -1,
107 -1, -1, -1, -1, -1, -1, -1, -1,
108 -1, -1, -1, -1, -1, -1, -1, -1,
109 -1, -1, -1, 0, 1, 4, 5, -1
112 /*Output to Mux Mapping */
113 static short outp_to_mux_map
[32] = {
114 -1, -1, -1, 6, -1, -1, -1, -1,
115 -1, -1, -1, -1, -1, -1, -1, -1,
116 -1, -1, -1, -1, -1, 2, -1, -1,
117 -1, -1, -1, -1, -1, -1, -1, -1
120 int pnx4008_gpio_register_pin(unsigned short pin
)
122 unsigned long bit
= GPIO_BIT(pin
);
123 int ret
= -EBUSY
; /* Already in use */
127 if (GPIO_ISBID(pin
)) {
128 if (access_map
[GPIO_INDEX
] & bit
)
130 access_map
[GPIO_INDEX
] |= bit
;
132 } else if (GPIO_ISRAM(pin
)) {
133 if (access_map
[GPIO_INDEX
] & bit
)
135 access_map
[GPIO_INDEX
] |= bit
;
137 } else if (GPIO_ISMUX(pin
)) {
138 if (access_map
[MUX_INDEX
] & bit
)
140 access_map
[MUX_INDEX
] |= bit
;
142 } else if (GPIO_ISOUT(pin
)) {
143 if (access_map
[OUTP_INDEX
] & bit
)
145 access_map
[OUTP_INDEX
] |= bit
;
147 } else if (GPIO_ISIN(pin
)) {
148 if (access_map
[INP_INDEX
] & bit
)
150 access_map
[INP_INDEX
] |= bit
;
160 EXPORT_SYMBOL(pnx4008_gpio_register_pin
);
162 int pnx4008_gpio_unregister_pin(unsigned short pin
)
164 unsigned long bit
= GPIO_BIT(pin
);
165 int ret
= -EFAULT
; /* Not registered */
169 if (GPIO_ISBID(pin
)) {
170 if (~access_map
[GPIO_INDEX
] & bit
)
172 access_map
[GPIO_INDEX
] &= ~bit
;
173 } else if (GPIO_ISRAM(pin
)) {
174 if (~access_map
[GPIO_INDEX
] & bit
)
176 access_map
[GPIO_INDEX
] &= ~bit
;
177 } else if (GPIO_ISMUX(pin
)) {
178 if (~access_map
[MUX_INDEX
] & bit
)
180 access_map
[MUX_INDEX
] &= ~bit
;
181 } else if (GPIO_ISOUT(pin
)) {
182 if (~access_map
[OUTP_INDEX
] & bit
)
184 access_map
[OUTP_INDEX
] &= ~bit
;
185 } else if (GPIO_ISIN(pin
)) {
186 if (~access_map
[INP_INDEX
] & bit
)
188 access_map
[INP_INDEX
] &= ~bit
;
198 EXPORT_SYMBOL(pnx4008_gpio_unregister_pin
);
200 unsigned long pnx4008_gpio_read_pin(unsigned short pin
)
202 unsigned long ret
= -EFAULT
;
203 int gpio
= GPIO_BIT_MASK(pin
);
205 if (GPIO_ISOUT(pin
)) {
206 ret
= gpio_read_bit(PIO_OUTP_STATE
, gpio
);
207 } else if (GPIO_ISRAM(pin
)) {
208 if (gpio_read_bit(PIO_DRV_STATE
, gpio
) == 0) {
209 ret
= gpio_read_bit(PIO_SDINP_STATE
, gpio
);
211 } else if (GPIO_ISBID(pin
)) {
212 ret
= gpio_read_bit(PIO_DRV_STATE
, gpio
);
214 ret
= gpio_read_bit(PIO_OUTP_STATE
, gpio
);
217 gpio_read_bit(PIO_INP_STATE
, gpio_to_inp_map
[gpio
]);
218 } else if (GPIO_ISIN(pin
)) {
219 ret
= gpio_read_bit(PIO_INP_STATE
, gpio
);
225 EXPORT_SYMBOL(pnx4008_gpio_read_pin
);
227 /* Write Value to output */
228 int pnx4008_gpio_write_pin(unsigned short pin
, int output
)
230 int gpio
= GPIO_BIT_MASK(pin
);
234 if (GPIO_ISOUT(pin
)) {
235 printk( "writing '%x' to '%x'\n",
236 gpio
, output
? PIO_OUTP_SET
: PIO_OUTP_CLR
);
237 ret
= gpio_set_bit(output
? PIO_OUTP_SET
: PIO_OUTP_CLR
, gpio
);
238 } else if (GPIO_ISRAM(pin
)) {
239 if (gpio_read_bit(PIO_DRV_STATE
, gpio
) > 0)
240 ret
= gpio_set_bit(output
? PIO_SDOUTP_SET
:
241 PIO_SDOUTP_CLR
, gpio
);
242 } else if (GPIO_ISBID(pin
)) {
243 if (gpio_read_bit(PIO_DRV_STATE
, gpio
) > 0)
244 ret
= gpio_set_bit(output
? PIO_OUTP_SET
:
251 EXPORT_SYMBOL(pnx4008_gpio_write_pin
);
253 /* Value = 1 : Set GPIO pin as output */
254 /* Value = 0 : Set GPIO pin as input */
255 int pnx4008_gpio_set_pin_direction(unsigned short pin
, int output
)
257 int gpio
= GPIO_BIT_MASK(pin
);
261 if (GPIO_ISBID(pin
) || GPIO_ISRAM(pin
)) {
262 ret
= gpio_set_bit(output
? PIO_DRV_SET
: PIO_DRV_CLR
, gpio
);
268 EXPORT_SYMBOL(pnx4008_gpio_set_pin_direction
);
270 /* Read GPIO pin direction: 0= pin used as input, 1= pin used as output*/
271 int pnx4008_gpio_read_pin_direction(unsigned short pin
)
273 int gpio
= GPIO_BIT_MASK(pin
);
277 if (GPIO_ISBID(pin
) || GPIO_ISRAM(pin
)) {
278 ret
= gpio_read_bit(PIO_DRV_STATE
, gpio
);
284 EXPORT_SYMBOL(pnx4008_gpio_read_pin_direction
);
286 /* Value = 1 : Set pin to muxed function */
287 /* Value = 0 : Set pin as GPIO */
288 int pnx4008_gpio_set_pin_mux(unsigned short pin
, int output
)
290 int gpio
= GPIO_BIT_MASK(pin
);
294 if (GPIO_ISBID(pin
)) {
296 gpio_set_bit(output
? PIO_MUX_SET
: PIO_MUX_CLR
,
297 gpio_to_mux_map
[gpio
]);
298 } else if (GPIO_ISOUT(pin
)) {
300 gpio_set_bit(output
? PIO_MUX_SET
: PIO_MUX_CLR
,
301 outp_to_mux_map
[gpio
]);
302 } else if (GPIO_ISMUX(pin
)) {
303 ret
= gpio_set_bit(output
? PIO_MUX_SET
: PIO_MUX_CLR
, gpio
);
309 EXPORT_SYMBOL(pnx4008_gpio_set_pin_mux
);
311 /* Read pin mux function: 0= pin used as GPIO, 1= pin used for muxed function*/
312 int pnx4008_gpio_read_pin_mux(unsigned short pin
)
314 int gpio
= GPIO_BIT_MASK(pin
);
318 if (GPIO_ISBID(pin
)) {
319 ret
= gpio_read_bit(PIO_MUX_STATE
, gpio_to_mux_map
[gpio
]);
320 } else if (GPIO_ISOUT(pin
)) {
321 ret
= gpio_read_bit(PIO_MUX_STATE
, outp_to_mux_map
[gpio
]);
322 } else if (GPIO_ISMUX(pin
)) {
323 ret
= gpio_read_bit(PIO_MUX_STATE
, gpio
);
329 EXPORT_SYMBOL(pnx4008_gpio_read_pin_mux
);