x86: Move notify_cpu_starting() callback to a later stage
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kernel / smpboot.c
blob6808b934d6c0a1e6854ceeb1037566212ddb237c
1 /*
2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
16 * later.
18 * Fixes
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
29 * from Jose Renau
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
51 #include <linux/stackprotector.h>
53 #include <asm/acpi.h>
54 #include <asm/desc.h>
55 #include <asm/nmi.h>
56 #include <asm/irq.h>
57 #include <asm/idle.h>
58 #include <asm/trampoline.h>
59 #include <asm/cpu.h>
60 #include <asm/numa.h>
61 #include <asm/pgtable.h>
62 #include <asm/tlbflush.h>
63 #include <asm/mtrr.h>
64 #include <asm/vmi.h>
65 #include <asm/apic.h>
66 #include <asm/setup.h>
67 #include <asm/uv/uv.h>
68 #include <linux/mc146818rtc.h>
70 #include <asm/smpboot_hooks.h>
71 #include <asm/i8259.h>
73 #ifdef CONFIG_X86_32
74 u8 apicid_2_node[MAX_APICID];
75 static int low_mappings;
76 #endif
78 /* State of each CPU */
79 DEFINE_PER_CPU(int, cpu_state) = { 0 };
81 /* Store all idle threads, this can be reused instead of creating
82 * a new thread. Also avoids complicated thread destroy functionality
83 * for idle threads.
85 #ifdef CONFIG_HOTPLUG_CPU
87 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
88 * removed after init for !CONFIG_HOTPLUG_CPU.
90 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
91 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
92 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
93 #else
94 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
95 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
96 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
97 #endif
99 /* Number of siblings per CPU package */
100 int smp_num_siblings = 1;
101 EXPORT_SYMBOL(smp_num_siblings);
103 /* Last level cache ID of each logical CPU */
104 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
106 /* representing HT siblings of each logical CPU */
107 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
108 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
110 /* representing HT and core siblings of each logical CPU */
111 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
112 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
114 /* Per CPU bogomips and other parameters */
115 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
116 EXPORT_PER_CPU_SYMBOL(cpu_info);
118 atomic_t init_deasserted;
120 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
121 /* which node each logical CPU is on */
122 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
123 EXPORT_SYMBOL(cpu_to_node_map);
125 /* set up a mapping between cpu and node. */
126 static void map_cpu_to_node(int cpu, int node)
128 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
129 cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
130 cpu_to_node_map[cpu] = node;
133 /* undo a mapping between cpu and node. */
134 static void unmap_cpu_to_node(int cpu)
136 int node;
138 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
139 for (node = 0; node < MAX_NUMNODES; node++)
140 cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
141 cpu_to_node_map[cpu] = 0;
143 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
144 #define map_cpu_to_node(cpu, node) ({})
145 #define unmap_cpu_to_node(cpu) ({})
146 #endif
148 #ifdef CONFIG_X86_32
149 static int boot_cpu_logical_apicid;
151 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
152 { [0 ... NR_CPUS-1] = BAD_APICID };
154 static void map_cpu_to_logical_apicid(void)
156 int cpu = smp_processor_id();
157 int apicid = logical_smp_processor_id();
158 int node = apic->apicid_to_node(apicid);
160 if (!node_online(node))
161 node = first_online_node;
163 cpu_2_logical_apicid[cpu] = apicid;
164 map_cpu_to_node(cpu, node);
167 void numa_remove_cpu(int cpu)
169 cpu_2_logical_apicid[cpu] = BAD_APICID;
170 unmap_cpu_to_node(cpu);
172 #else
173 #define map_cpu_to_logical_apicid() do {} while (0)
174 #endif
177 * Report back to the Boot Processor.
178 * Running on AP.
180 static void __cpuinit smp_callin(void)
182 int cpuid, phys_id;
183 unsigned long timeout;
186 * If waken up by an INIT in an 82489DX configuration
187 * we may get here before an INIT-deassert IPI reaches
188 * our local APIC. We have to wait for the IPI or we'll
189 * lock up on an APIC access.
191 if (apic->wait_for_init_deassert)
192 apic->wait_for_init_deassert(&init_deasserted);
195 * (This works even if the APIC is not enabled.)
197 phys_id = read_apic_id();
198 cpuid = smp_processor_id();
199 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
200 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
201 phys_id, cpuid);
203 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
206 * STARTUP IPIs are fragile beasts as they might sometimes
207 * trigger some glue motherboard logic. Complete APIC bus
208 * silence for 1 second, this overestimates the time the
209 * boot CPU is spending to send the up to 2 STARTUP IPIs
210 * by a factor of two. This should be enough.
214 * Waiting 2s total for startup (udelay is not yet working)
216 timeout = jiffies + 2*HZ;
217 while (time_before(jiffies, timeout)) {
219 * Has the boot CPU finished it's STARTUP sequence?
221 if (cpumask_test_cpu(cpuid, cpu_callout_mask))
222 break;
223 cpu_relax();
226 if (!time_before(jiffies, timeout)) {
227 panic("%s: CPU%d started up but did not get a callout!\n",
228 __func__, cpuid);
232 * the boot CPU has finished the init stage and is spinning
233 * on callin_map until we finish. We are free to set up this
234 * CPU, first the APIC. (this is probably redundant on most
235 * boards)
238 pr_debug("CALLIN, before setup_local_APIC().\n");
239 if (apic->smp_callin_clear_local_apic)
240 apic->smp_callin_clear_local_apic();
241 setup_local_APIC();
242 end_local_APIC_setup();
243 map_cpu_to_logical_apicid();
246 * Need to setup vector mappings before we enable interrupts.
248 setup_vector_irq(smp_processor_id());
250 * Get our bogomips.
252 * Need to enable IRQs because it can take longer and then
253 * the NMI watchdog might kill us.
255 local_irq_enable();
256 calibrate_delay();
257 local_irq_disable();
258 pr_debug("Stack at about %p\n", &cpuid);
261 * Save our processor parameters
263 smp_store_cpu_info(cpuid);
265 notify_cpu_starting(cpuid);
268 * Allow the master to continue.
270 cpumask_set_cpu(cpuid, cpu_callin_mask);
274 * Activate a secondary processor.
276 notrace static void __cpuinit start_secondary(void *unused)
279 * Don't put *anything* before cpu_init(), SMP booting is too
280 * fragile that we want to limit the things done here to the
281 * most necessary things.
283 vmi_bringup();
284 cpu_init();
285 preempt_disable();
286 smp_callin();
288 /* otherwise gcc will move up smp_processor_id before the cpu_init */
289 barrier();
291 * Check TSC synchronization with the BP:
293 check_tsc_sync_target();
295 if (nmi_watchdog == NMI_IO_APIC) {
296 legacy_pic->chip->mask(0);
297 enable_NMI_through_LVT0();
298 legacy_pic->chip->unmask(0);
301 #ifdef CONFIG_X86_32
302 while (low_mappings)
303 cpu_relax();
304 __flush_tlb_all();
305 #endif
307 /* This must be done before setting cpu_online_mask */
308 set_cpu_sibling_map(raw_smp_processor_id());
309 wmb();
312 * We need to hold call_lock, so there is no inconsistency
313 * between the time smp_call_function() determines number of
314 * IPI recipients, and the time when the determination is made
315 * for which cpus receive the IPI. Holding this
316 * lock helps us to not include this cpu in a currently in progress
317 * smp_call_function().
319 * We need to hold vector_lock so there the set of online cpus
320 * does not change while we are assigning vectors to cpus. Holding
321 * this lock ensures we don't half assign or remove an irq from a cpu.
323 ipi_call_lock();
324 lock_vector_lock();
325 set_cpu_online(smp_processor_id(), true);
326 unlock_vector_lock();
327 ipi_call_unlock();
328 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
329 x86_platform.nmi_init();
331 /* enable local interrupts */
332 local_irq_enable();
334 /* to prevent fake stack check failure in clock setup */
335 boot_init_stack_canary();
337 x86_cpuinit.setup_percpu_clockev();
339 wmb();
340 cpu_idle();
343 #ifdef CONFIG_CPUMASK_OFFSTACK
344 /* In this case, llc_shared_map is a pointer to a cpumask. */
345 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
346 const struct cpuinfo_x86 *src)
348 struct cpumask *llc = dst->llc_shared_map;
349 *dst = *src;
350 dst->llc_shared_map = llc;
352 #else
353 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
354 const struct cpuinfo_x86 *src)
356 *dst = *src;
358 #endif /* CONFIG_CPUMASK_OFFSTACK */
361 * The bootstrap kernel entry code has set these up. Save them for
362 * a given CPU
365 void __cpuinit smp_store_cpu_info(int id)
367 struct cpuinfo_x86 *c = &cpu_data(id);
369 copy_cpuinfo_x86(c, &boot_cpu_data);
370 c->cpu_index = id;
371 if (id != 0)
372 identify_secondary_cpu(c);
376 void __cpuinit set_cpu_sibling_map(int cpu)
378 int i;
379 struct cpuinfo_x86 *c = &cpu_data(cpu);
381 cpumask_set_cpu(cpu, cpu_sibling_setup_mask);
383 if (smp_num_siblings > 1) {
384 for_each_cpu(i, cpu_sibling_setup_mask) {
385 struct cpuinfo_x86 *o = &cpu_data(i);
387 if (c->phys_proc_id == o->phys_proc_id &&
388 c->cpu_core_id == o->cpu_core_id) {
389 cpumask_set_cpu(i, cpu_sibling_mask(cpu));
390 cpumask_set_cpu(cpu, cpu_sibling_mask(i));
391 cpumask_set_cpu(i, cpu_core_mask(cpu));
392 cpumask_set_cpu(cpu, cpu_core_mask(i));
393 cpumask_set_cpu(i, c->llc_shared_map);
394 cpumask_set_cpu(cpu, o->llc_shared_map);
397 } else {
398 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
401 cpumask_set_cpu(cpu, c->llc_shared_map);
403 if (current_cpu_data.x86_max_cores == 1) {
404 cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));
405 c->booted_cores = 1;
406 return;
409 for_each_cpu(i, cpu_sibling_setup_mask) {
410 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
411 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
412 cpumask_set_cpu(i, c->llc_shared_map);
413 cpumask_set_cpu(cpu, cpu_data(i).llc_shared_map);
415 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
416 cpumask_set_cpu(i, cpu_core_mask(cpu));
417 cpumask_set_cpu(cpu, cpu_core_mask(i));
419 * Does this new cpu bringup a new core?
421 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) {
423 * for each core in package, increment
424 * the booted_cores for this new cpu
426 if (cpumask_first(cpu_sibling_mask(i)) == i)
427 c->booted_cores++;
429 * increment the core count for all
430 * the other cpus in this package
432 if (i != cpu)
433 cpu_data(i).booted_cores++;
434 } else if (i != cpu && !c->booted_cores)
435 c->booted_cores = cpu_data(i).booted_cores;
440 /* maps the cpu to the sched domain representing multi-core */
441 const struct cpumask *cpu_coregroup_mask(int cpu)
443 struct cpuinfo_x86 *c = &cpu_data(cpu);
445 * For perf, we return last level cache shared map.
446 * And for power savings, we return cpu_core_map
448 if ((sched_mc_power_savings || sched_smt_power_savings) &&
449 !(cpu_has(c, X86_FEATURE_AMD_DCM)))
450 return cpu_core_mask(cpu);
451 else
452 return c->llc_shared_map;
455 static void impress_friends(void)
457 int cpu;
458 unsigned long bogosum = 0;
460 * Allow the user to impress friends.
462 pr_debug("Before bogomips.\n");
463 for_each_possible_cpu(cpu)
464 if (cpumask_test_cpu(cpu, cpu_callout_mask))
465 bogosum += cpu_data(cpu).loops_per_jiffy;
466 printk(KERN_INFO
467 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
468 num_online_cpus(),
469 bogosum/(500000/HZ),
470 (bogosum/(5000/HZ))%100);
472 pr_debug("Before bogocount - setting activated=1.\n");
475 void __inquire_remote_apic(int apicid)
477 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
478 char *names[] = { "ID", "VERSION", "SPIV" };
479 int timeout;
480 u32 status;
482 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
484 for (i = 0; i < ARRAY_SIZE(regs); i++) {
485 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
488 * Wait for idle.
490 status = safe_apic_wait_icr_idle();
491 if (status)
492 printk(KERN_CONT
493 "a previous APIC delivery may have failed\n");
495 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
497 timeout = 0;
498 do {
499 udelay(100);
500 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
501 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
503 switch (status) {
504 case APIC_ICR_RR_VALID:
505 status = apic_read(APIC_RRR);
506 printk(KERN_CONT "%08x\n", status);
507 break;
508 default:
509 printk(KERN_CONT "failed\n");
515 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
516 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
517 * won't ... remember to clear down the APIC, etc later.
519 int __cpuinit
520 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
522 unsigned long send_status, accept_status = 0;
523 int maxlvt;
525 /* Target chip */
526 /* Boot on the stack */
527 /* Kick the second */
528 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
530 pr_debug("Waiting for send to finish...\n");
531 send_status = safe_apic_wait_icr_idle();
534 * Give the other CPU some time to accept the IPI.
536 udelay(200);
537 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
538 maxlvt = lapic_get_maxlvt();
539 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
540 apic_write(APIC_ESR, 0);
541 accept_status = (apic_read(APIC_ESR) & 0xEF);
543 pr_debug("NMI sent.\n");
545 if (send_status)
546 printk(KERN_ERR "APIC never delivered???\n");
547 if (accept_status)
548 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
550 return (send_status | accept_status);
553 static int __cpuinit
554 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
556 unsigned long send_status, accept_status = 0;
557 int maxlvt, num_starts, j;
559 maxlvt = lapic_get_maxlvt();
562 * Be paranoid about clearing APIC errors.
564 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
565 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
566 apic_write(APIC_ESR, 0);
567 apic_read(APIC_ESR);
570 pr_debug("Asserting INIT.\n");
573 * Turn INIT on target chip
576 * Send IPI
578 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
579 phys_apicid);
581 pr_debug("Waiting for send to finish...\n");
582 send_status = safe_apic_wait_icr_idle();
584 mdelay(10);
586 pr_debug("Deasserting INIT.\n");
588 /* Target chip */
589 /* Send IPI */
590 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
592 pr_debug("Waiting for send to finish...\n");
593 send_status = safe_apic_wait_icr_idle();
595 mb();
596 atomic_set(&init_deasserted, 1);
599 * Should we send STARTUP IPIs ?
601 * Determine this based on the APIC version.
602 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
604 if (APIC_INTEGRATED(apic_version[phys_apicid]))
605 num_starts = 2;
606 else
607 num_starts = 0;
610 * Paravirt / VMI wants a startup IPI hook here to set up the
611 * target processor state.
613 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
614 (unsigned long)stack_start.sp);
617 * Run STARTUP IPI loop.
619 pr_debug("#startup loops: %d.\n", num_starts);
621 for (j = 1; j <= num_starts; j++) {
622 pr_debug("Sending STARTUP #%d.\n", j);
623 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
624 apic_write(APIC_ESR, 0);
625 apic_read(APIC_ESR);
626 pr_debug("After apic_write.\n");
629 * STARTUP IPI
632 /* Target chip */
633 /* Boot on the stack */
634 /* Kick the second */
635 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
636 phys_apicid);
639 * Give the other CPU some time to accept the IPI.
641 udelay(300);
643 pr_debug("Startup point 1.\n");
645 pr_debug("Waiting for send to finish...\n");
646 send_status = safe_apic_wait_icr_idle();
649 * Give the other CPU some time to accept the IPI.
651 udelay(200);
652 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
653 apic_write(APIC_ESR, 0);
654 accept_status = (apic_read(APIC_ESR) & 0xEF);
655 if (send_status || accept_status)
656 break;
658 pr_debug("After Startup.\n");
660 if (send_status)
661 printk(KERN_ERR "APIC never delivered???\n");
662 if (accept_status)
663 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
665 return (send_status | accept_status);
668 struct create_idle {
669 struct work_struct work;
670 struct task_struct *idle;
671 struct completion done;
672 int cpu;
675 static void __cpuinit do_fork_idle(struct work_struct *work)
677 struct create_idle *c_idle =
678 container_of(work, struct create_idle, work);
680 c_idle->idle = fork_idle(c_idle->cpu);
681 complete(&c_idle->done);
684 /* reduce the number of lines printed when booting a large cpu count system */
685 static void __cpuinit announce_cpu(int cpu, int apicid)
687 static int current_node = -1;
688 int node = cpu_to_node(cpu);
690 if (system_state == SYSTEM_BOOTING) {
691 if (node != current_node) {
692 if (current_node > (-1))
693 pr_cont(" Ok.\n");
694 current_node = node;
695 pr_info("Booting Node %3d, Processors ", node);
697 pr_cont(" #%d%s", cpu, cpu == (nr_cpu_ids - 1) ? " Ok.\n" : "");
698 return;
699 } else
700 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
701 node, cpu, apicid);
705 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
706 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
707 * Returns zero if CPU booted OK, else error code from
708 * ->wakeup_secondary_cpu.
710 static int __cpuinit do_boot_cpu(int apicid, int cpu)
712 unsigned long boot_error = 0;
713 unsigned long start_ip;
714 int timeout;
715 struct create_idle c_idle = {
716 .cpu = cpu,
717 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
720 INIT_WORK_ON_STACK(&c_idle.work, do_fork_idle);
722 alternatives_smp_switch(1);
724 c_idle.idle = get_idle_for_cpu(cpu);
727 * We can't use kernel_thread since we must avoid to
728 * reschedule the child.
730 if (c_idle.idle) {
731 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
732 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
733 init_idle(c_idle.idle, cpu);
734 goto do_rest;
737 if (!keventd_up() || current_is_keventd())
738 c_idle.work.func(&c_idle.work);
739 else {
740 schedule_work(&c_idle.work);
741 wait_for_completion(&c_idle.done);
744 if (IS_ERR(c_idle.idle)) {
745 printk("failed fork for CPU %d\n", cpu);
746 destroy_work_on_stack(&c_idle.work);
747 return PTR_ERR(c_idle.idle);
750 set_idle_for_cpu(cpu, c_idle.idle);
751 do_rest:
752 per_cpu(current_task, cpu) = c_idle.idle;
753 #ifdef CONFIG_X86_32
754 /* Stack for startup_32 can be just as for start_secondary onwards */
755 irq_ctx_init(cpu);
756 #else
757 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
758 initial_gs = per_cpu_offset(cpu);
759 per_cpu(kernel_stack, cpu) =
760 (unsigned long)task_stack_page(c_idle.idle) -
761 KERNEL_STACK_OFFSET + THREAD_SIZE;
762 #endif
763 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
764 initial_code = (unsigned long)start_secondary;
765 stack_start.sp = (void *) c_idle.idle->thread.sp;
767 /* start_ip had better be page-aligned! */
768 start_ip = setup_trampoline();
770 /* So we see what's up */
771 announce_cpu(cpu, apicid);
774 * This grunge runs the startup process for
775 * the targeted processor.
778 atomic_set(&init_deasserted, 0);
780 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
782 pr_debug("Setting warm reset code and vector.\n");
784 smpboot_setup_warm_reset_vector(start_ip);
786 * Be paranoid about clearing APIC errors.
788 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
789 apic_write(APIC_ESR, 0);
790 apic_read(APIC_ESR);
795 * Kick the secondary CPU. Use the method in the APIC driver
796 * if it's defined - or use an INIT boot APIC message otherwise:
798 if (apic->wakeup_secondary_cpu)
799 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
800 else
801 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
803 if (!boot_error) {
805 * allow APs to start initializing.
807 pr_debug("Before Callout %d.\n", cpu);
808 cpumask_set_cpu(cpu, cpu_callout_mask);
809 pr_debug("After Callout %d.\n", cpu);
812 * Wait 5s total for a response
814 for (timeout = 0; timeout < 50000; timeout++) {
815 if (cpumask_test_cpu(cpu, cpu_callin_mask))
816 break; /* It has booted */
817 udelay(100);
820 if (cpumask_test_cpu(cpu, cpu_callin_mask))
821 pr_debug("CPU%d: has booted.\n", cpu);
822 else {
823 boot_error = 1;
824 if (*((volatile unsigned char *)trampoline_base)
825 == 0xA5)
826 /* trampoline started but...? */
827 pr_err("CPU%d: Stuck ??\n", cpu);
828 else
829 /* trampoline code not run */
830 pr_err("CPU%d: Not responding.\n", cpu);
831 if (apic->inquire_remote_apic)
832 apic->inquire_remote_apic(apicid);
836 if (boot_error) {
837 /* Try to put things back the way they were before ... */
838 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
840 /* was set by do_boot_cpu() */
841 cpumask_clear_cpu(cpu, cpu_callout_mask);
843 /* was set by cpu_init() */
844 cpumask_clear_cpu(cpu, cpu_initialized_mask);
846 set_cpu_present(cpu, false);
847 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
850 /* mark "stuck" area as not stuck */
851 *((volatile unsigned long *)trampoline_base) = 0;
853 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
855 * Cleanup possible dangling ends...
857 smpboot_restore_warm_reset_vector();
860 destroy_work_on_stack(&c_idle.work);
861 return boot_error;
864 int __cpuinit native_cpu_up(unsigned int cpu)
866 int apicid = apic->cpu_present_to_apicid(cpu);
867 unsigned long flags;
868 int err;
870 WARN_ON(irqs_disabled());
872 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
874 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
875 !physid_isset(apicid, phys_cpu_present_map)) {
876 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
877 return -EINVAL;
881 * Already booted CPU?
883 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
884 pr_debug("do_boot_cpu %d Already started\n", cpu);
885 return -ENOSYS;
889 * Save current MTRR state in case it was changed since early boot
890 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
892 mtrr_save_state();
894 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
896 #ifdef CONFIG_X86_32
897 /* init low mem mapping */
898 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
899 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
900 flush_tlb_all();
901 low_mappings = 1;
903 err = do_boot_cpu(apicid, cpu);
905 zap_low_mappings(false);
906 low_mappings = 0;
907 #else
908 err = do_boot_cpu(apicid, cpu);
909 #endif
910 if (err) {
911 pr_debug("do_boot_cpu failed %d\n", err);
912 return -EIO;
916 * Check TSC synchronization with the AP (keep irqs disabled
917 * while doing so):
919 local_irq_save(flags);
920 check_tsc_sync_source(cpu);
921 local_irq_restore(flags);
923 while (!cpu_online(cpu)) {
924 cpu_relax();
925 touch_nmi_watchdog();
928 return 0;
932 * Fall back to non SMP mode after errors.
934 * RED-PEN audit/test this more. I bet there is more state messed up here.
936 static __init void disable_smp(void)
938 init_cpu_present(cpumask_of(0));
939 init_cpu_possible(cpumask_of(0));
940 smpboot_clear_io_apic_irqs();
942 if (smp_found_config)
943 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
944 else
945 physid_set_mask_of_physid(0, &phys_cpu_present_map);
946 map_cpu_to_logical_apicid();
947 cpumask_set_cpu(0, cpu_sibling_mask(0));
948 cpumask_set_cpu(0, cpu_core_mask(0));
952 * Various sanity checks.
954 static int __init smp_sanity_check(unsigned max_cpus)
956 preempt_disable();
958 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
959 if (def_to_bigsmp && nr_cpu_ids > 8) {
960 unsigned int cpu;
961 unsigned nr;
963 printk(KERN_WARNING
964 "More than 8 CPUs detected - skipping them.\n"
965 "Use CONFIG_X86_BIGSMP.\n");
967 nr = 0;
968 for_each_present_cpu(cpu) {
969 if (nr >= 8)
970 set_cpu_present(cpu, false);
971 nr++;
974 nr = 0;
975 for_each_possible_cpu(cpu) {
976 if (nr >= 8)
977 set_cpu_possible(cpu, false);
978 nr++;
981 nr_cpu_ids = 8;
983 #endif
985 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
986 printk(KERN_WARNING
987 "weird, boot CPU (#%d) not listed by the BIOS.\n",
988 hard_smp_processor_id());
990 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
994 * If we couldn't find an SMP configuration at boot time,
995 * get out of here now!
997 if (!smp_found_config && !acpi_lapic) {
998 preempt_enable();
999 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1000 disable_smp();
1001 if (APIC_init_uniprocessor())
1002 printk(KERN_NOTICE "Local APIC not detected."
1003 " Using dummy APIC emulation.\n");
1004 return -1;
1008 * Should not be necessary because the MP table should list the boot
1009 * CPU too, but we do it for the sake of robustness anyway.
1011 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
1012 printk(KERN_NOTICE
1013 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1014 boot_cpu_physical_apicid);
1015 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1017 preempt_enable();
1020 * If we couldn't find a local APIC, then get out of here now!
1022 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1023 !cpu_has_apic) {
1024 if (!disable_apic) {
1025 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1026 boot_cpu_physical_apicid);
1027 pr_err("... forcing use of dummy APIC emulation."
1028 "(tell your hw vendor)\n");
1030 smpboot_clear_io_apic();
1031 arch_disable_smp_support();
1032 return -1;
1035 verify_local_APIC();
1038 * If SMP should be disabled, then really disable it!
1040 if (!max_cpus) {
1041 printk(KERN_INFO "SMP mode deactivated.\n");
1042 smpboot_clear_io_apic();
1044 localise_nmi_watchdog();
1046 connect_bsp_APIC();
1047 setup_local_APIC();
1048 end_local_APIC_setup();
1049 return -1;
1052 return 0;
1055 static void __init smp_cpu_index_default(void)
1057 int i;
1058 struct cpuinfo_x86 *c;
1060 for_each_possible_cpu(i) {
1061 c = &cpu_data(i);
1062 /* mark all to hotplug */
1063 c->cpu_index = nr_cpu_ids;
1068 * Prepare for SMP bootup. The MP table or ACPI has been read
1069 * earlier. Just do some sanity checking here and enable APIC mode.
1071 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1073 unsigned int i;
1075 preempt_disable();
1076 smp_cpu_index_default();
1077 current_cpu_data = boot_cpu_data;
1078 cpumask_copy(cpu_callin_mask, cpumask_of(0));
1079 mb();
1081 * Setup boot CPU information
1083 smp_store_cpu_info(0); /* Final full version of the data */
1084 #ifdef CONFIG_X86_32
1085 boot_cpu_logical_apicid = logical_smp_processor_id();
1086 #endif
1087 current_thread_info()->cpu = 0; /* needed? */
1088 for_each_possible_cpu(i) {
1089 zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
1090 zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
1091 zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
1093 set_cpu_sibling_map(0);
1095 enable_IR_x2apic();
1096 default_setup_apic_routing();
1098 if (smp_sanity_check(max_cpus) < 0) {
1099 printk(KERN_INFO "SMP disabled\n");
1100 disable_smp();
1101 goto out;
1104 preempt_disable();
1105 if (read_apic_id() != boot_cpu_physical_apicid) {
1106 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1107 read_apic_id(), boot_cpu_physical_apicid);
1108 /* Or can we switch back to PIC here? */
1110 preempt_enable();
1112 connect_bsp_APIC();
1115 * Switch from PIC to APIC mode.
1117 setup_local_APIC();
1120 * Enable IO APIC before setting up error vector
1122 if (!skip_ioapic_setup && nr_ioapics)
1123 enable_IO_APIC();
1125 end_local_APIC_setup();
1127 map_cpu_to_logical_apicid();
1129 if (apic->setup_portio_remap)
1130 apic->setup_portio_remap();
1132 smpboot_setup_io_apic();
1134 * Set up local APIC timer on boot CPU.
1137 printk(KERN_INFO "CPU%d: ", 0);
1138 print_cpu_info(&cpu_data(0));
1139 x86_init.timers.setup_percpu_clockev();
1141 if (is_uv_system())
1142 uv_system_init();
1144 set_mtrr_aps_delayed_init();
1145 out:
1146 preempt_enable();
1149 void arch_enable_nonboot_cpus_begin(void)
1151 set_mtrr_aps_delayed_init();
1154 void arch_enable_nonboot_cpus_end(void)
1156 mtrr_aps_init();
1160 * Early setup to make printk work.
1162 void __init native_smp_prepare_boot_cpu(void)
1164 int me = smp_processor_id();
1165 switch_to_new_gdt(me);
1166 /* already set me in cpu_online_mask in boot_cpu_init() */
1167 cpumask_set_cpu(me, cpu_callout_mask);
1168 per_cpu(cpu_state, me) = CPU_ONLINE;
1171 void __init native_smp_cpus_done(unsigned int max_cpus)
1173 pr_debug("Boot done.\n");
1175 impress_friends();
1176 #ifdef CONFIG_X86_IO_APIC
1177 setup_ioapic_dest();
1178 #endif
1179 check_nmi_watchdog();
1180 mtrr_aps_init();
1183 static int __initdata setup_possible_cpus = -1;
1184 static int __init _setup_possible_cpus(char *str)
1186 get_option(&str, &setup_possible_cpus);
1187 return 0;
1189 early_param("possible_cpus", _setup_possible_cpus);
1193 * cpu_possible_mask should be static, it cannot change as cpu's
1194 * are onlined, or offlined. The reason is per-cpu data-structures
1195 * are allocated by some modules at init time, and dont expect to
1196 * do this dynamically on cpu arrival/departure.
1197 * cpu_present_mask on the other hand can change dynamically.
1198 * In case when cpu_hotplug is not compiled, then we resort to current
1199 * behaviour, which is cpu_possible == cpu_present.
1200 * - Ashok Raj
1202 * Three ways to find out the number of additional hotplug CPUs:
1203 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1204 * - The user can overwrite it with possible_cpus=NUM
1205 * - Otherwise don't reserve additional CPUs.
1206 * We do this because additional CPUs waste a lot of memory.
1207 * -AK
1209 __init void prefill_possible_map(void)
1211 int i, possible;
1213 /* no processor from mptable or madt */
1214 if (!num_processors)
1215 num_processors = 1;
1217 if (setup_possible_cpus == -1)
1218 possible = num_processors + disabled_cpus;
1219 else
1220 possible = setup_possible_cpus;
1222 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
1224 /* nr_cpu_ids could be reduced via nr_cpus= */
1225 if (possible > nr_cpu_ids) {
1226 printk(KERN_WARNING
1227 "%d Processors exceeds NR_CPUS limit of %d\n",
1228 possible, nr_cpu_ids);
1229 possible = nr_cpu_ids;
1232 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1233 possible, max_t(int, possible - num_processors, 0));
1235 for (i = 0; i < possible; i++)
1236 set_cpu_possible(i, true);
1238 nr_cpu_ids = possible;
1241 #ifdef CONFIG_HOTPLUG_CPU
1243 static void remove_siblinginfo(int cpu)
1245 int sibling;
1246 struct cpuinfo_x86 *c = &cpu_data(cpu);
1248 for_each_cpu(sibling, cpu_core_mask(cpu)) {
1249 cpumask_clear_cpu(cpu, cpu_core_mask(sibling));
1251 * last thread sibling in this cpu core going down
1253 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1)
1254 cpu_data(sibling).booted_cores--;
1257 for_each_cpu(sibling, cpu_sibling_mask(cpu))
1258 cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling));
1259 cpumask_clear(cpu_sibling_mask(cpu));
1260 cpumask_clear(cpu_core_mask(cpu));
1261 c->phys_proc_id = 0;
1262 c->cpu_core_id = 0;
1263 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
1266 static void __ref remove_cpu_from_maps(int cpu)
1268 set_cpu_online(cpu, false);
1269 cpumask_clear_cpu(cpu, cpu_callout_mask);
1270 cpumask_clear_cpu(cpu, cpu_callin_mask);
1271 /* was set by cpu_init() */
1272 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1273 numa_remove_cpu(cpu);
1276 void cpu_disable_common(void)
1278 int cpu = smp_processor_id();
1280 remove_siblinginfo(cpu);
1282 /* It's now safe to remove this processor from the online map */
1283 lock_vector_lock();
1284 remove_cpu_from_maps(cpu);
1285 unlock_vector_lock();
1286 fixup_irqs();
1289 int native_cpu_disable(void)
1291 int cpu = smp_processor_id();
1294 * Perhaps use cpufreq to drop frequency, but that could go
1295 * into generic code.
1297 * We won't take down the boot processor on i386 due to some
1298 * interrupts only being able to be serviced by the BSP.
1299 * Especially so if we're not using an IOAPIC -zwane
1301 if (cpu == 0)
1302 return -EBUSY;
1304 if (nmi_watchdog == NMI_LOCAL_APIC)
1305 stop_apic_nmi_watchdog(NULL);
1306 clear_local_APIC();
1308 cpu_disable_common();
1309 return 0;
1312 void native_cpu_die(unsigned int cpu)
1314 /* We don't do anything here: idle task is faking death itself. */
1315 unsigned int i;
1317 for (i = 0; i < 10; i++) {
1318 /* They ack this in play_dead by setting CPU_DEAD */
1319 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1320 if (system_state == SYSTEM_RUNNING)
1321 pr_info("CPU %u is now offline\n", cpu);
1323 if (1 == num_online_cpus())
1324 alternatives_smp_switch(0);
1325 return;
1327 msleep(100);
1329 pr_err("CPU %u didn't die...\n", cpu);
1332 void play_dead_common(void)
1334 idle_task_exit();
1335 reset_lazy_tlbstate();
1336 irq_ctx_exit(raw_smp_processor_id());
1337 c1e_remove_cpu(raw_smp_processor_id());
1339 mb();
1340 /* Ack it */
1341 __get_cpu_var(cpu_state) = CPU_DEAD;
1344 * With physical CPU hotplug, we should halt the cpu
1346 local_irq_disable();
1349 void native_play_dead(void)
1351 play_dead_common();
1352 tboot_shutdown(TB_SHUTDOWN_WFS);
1353 wbinvd_halt();
1356 #else /* ... !CONFIG_HOTPLUG_CPU */
1357 int native_cpu_disable(void)
1359 return -ENOSYS;
1362 void native_cpu_die(unsigned int cpu)
1364 /* We said "no" in __cpu_disable */
1365 BUG();
1368 void native_play_dead(void)
1370 BUG();
1373 #endif