2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
24 /* general boundary defintions */
25 #define SENSEINFOBYTES 32 /* may vary between hbas */
26 #define MAXSGENTRIES 31
27 #define MAXREPLYQS 256
29 /* Command Status value */
30 #define CMD_SUCCESS 0x0000
31 #define CMD_TARGET_STATUS 0x0001
32 #define CMD_DATA_UNDERRUN 0x0002
33 #define CMD_DATA_OVERRUN 0x0003
34 #define CMD_INVALID 0x0004
35 #define CMD_PROTOCOL_ERR 0x0005
36 #define CMD_HARDWARE_ERR 0x0006
37 #define CMD_CONNECTION_LOST 0x0007
38 #define CMD_ABORTED 0x0008
39 #define CMD_ABORT_FAILED 0x0009
40 #define CMD_UNSOLICITED_ABORT 0x000A
41 #define CMD_TIMEOUT 0x000B
42 #define CMD_UNABORTABLE 0x000C
44 /* Unit Attentions ASC's as defined for the MSA2012sa */
45 #define POWER_OR_RESET 0x29
46 #define STATE_CHANGED 0x2a
47 #define UNIT_ATTENTION_CLEARED 0x2f
48 #define LUN_FAILED 0x3e
49 #define REPORT_LUNS_CHANGED 0x3f
51 /* Unit Attentions ASCQ's as defined for the MSA2012sa */
53 /* These ASCQ's defined for ASC = POWER_OR_RESET */
54 #define POWER_ON_RESET 0x00
55 #define POWER_ON_REBOOT 0x01
56 #define SCSI_BUS_RESET 0x02
57 #define MSA_TARGET_RESET 0x03
58 #define CONTROLLER_FAILOVER 0x04
59 #define TRANSCEIVER_SE 0x05
60 #define TRANSCEIVER_LVD 0x06
62 /* These ASCQ's defined for ASC = STATE_CHANGED */
63 #define RESERVATION_PREEMPTED 0x03
64 #define ASYM_ACCESS_CHANGED 0x06
65 #define LUN_CAPACITY_CHANGED 0x09
67 /* transfer direction */
68 #define XFER_NONE 0x00
69 #define XFER_WRITE 0x01
70 #define XFER_READ 0x02
71 #define XFER_RSVD 0x03
74 #define ATTR_UNTAGGED 0x00
75 #define ATTR_SIMPLE 0x04
76 #define ATTR_HEADOFQUEUE 0x05
77 #define ATTR_ORDERED 0x06
84 /* config space register offsets */
85 #define CFG_VENDORID 0x00
86 #define CFG_DEVICEID 0x02
87 #define CFG_I2OBAR 0x10
88 #define CFG_MEM1BAR 0x14
90 /* i2o space register offsets */
91 #define I2O_IBDB_SET 0x20
92 #define I2O_IBDB_CLEAR 0x70
93 #define I2O_INT_STATUS 0x30
94 #define I2O_INT_MASK 0x34
95 #define I2O_IBPOST_Q 0x40
96 #define I2O_OBPOST_Q 0x44
97 #define I2O_DMA1_CFG 0x214
99 /* Configuration Table */
100 #define CFGTBL_ChangeReq 0x00000001l
101 #define CFGTBL_AccCmds 0x00000001l
103 #define CFGTBL_Trans_Simple 0x00000002l
105 #define CFGTBL_BusType_Ultra2 0x00000001l
106 #define CFGTBL_BusType_Ultra3 0x00000002l
107 #define CFGTBL_BusType_Fibre1G 0x00000100l
108 #define CFGTBL_BusType_Fibre2G 0x00000200l
119 /* FIXME this is a per controller value (barf!) */
120 #define HPSA_MAX_TARGETS_PER_CTLR 16
121 #define HPSA_MAX_LUN 256
122 #define HPSA_MAX_PHYS_LUN 1024
124 /* SCSI-3 Commands */
127 #define HPSA_INQUIRY 0x12
132 #define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */
133 #define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */
134 struct ReportLUNdata
{
135 __u8 LUNListLength
[4];
137 __u8 LUN
[HPSA_MAX_LUN
][8];
140 struct ReportExtendedLUNdata
{
141 __u8 LUNListLength
[4];
142 __u8 extended_response_flag
;
144 __u8 LUN
[HPSA_MAX_LUN
][24];
147 struct SenseSubsystem_info
{
150 __u8 reserved1
[1108];
153 #define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
155 __u8 total_size
[4]; /* Total size in blocks */
156 __u8 block_size
[4]; /* Size of blocks in bytes */
160 /* 12 byte commands not implemented in firmware yet. */
161 #define HPSA_READ 0xa8
162 #define HPSA_WRITE 0xaa
165 #define HPSA_READ 0x28 /* Read(10) */
166 #define HPSA_WRITE 0x2a /* Write(10) */
169 #define BMIC_READ 0x26
170 #define BMIC_WRITE 0x27
171 #define BMIC_CACHE_FLUSH 0xc2
172 #define HPSA_CACHE_FLUSH 0x01 /* C2 was already being used by HPSA */
174 /* Command List Structure */
179 __u8 Mode
:2; /* b00 */
184 __u8 Mode
:2; /* b01 */
190 __u8 Mode
:2; /* b10 */
198 /* 2 level target device addr */
199 union SCSI3Addr Target
[2];
209 __u8 LunAddrBytes
[8];
210 union SCSI3Addr SCSI3Lun
[4];
211 struct PhysDevAddr PhysDev
;
212 struct LogDevAddr LogDev
;
215 struct CommandListHeader
{
223 struct RequestBlock
{
234 struct ErrDescriptor
{
239 struct SGDescriptor
{
253 __u8 offense_size
; /* size of offending entry */
254 __u8 offense_num
; /* byte # of offense 0-base */
263 union MoreErrInfo MoreErrInfo
;
264 __u8 SenseInfo
[SENSEINFOBYTES
];
267 #define CMD_IOCTL_PEND 0x01
268 #define CMD_SCSI 0x03
270 struct ctlr_info
; /* defined in hpsa.h */
271 /* The size of this structure needs to be divisible by 8
272 * od on all architectures, because the controller uses 2
273 * lower bits of the address, and the driver uses 1 lower
274 * bit (3 bits total.)
277 struct CommandListHeader Header
;
278 struct RequestBlock Request
;
279 struct ErrDescriptor ErrDesc
;
280 struct SGDescriptor SG
[MAXSGENTRIES
];
281 /* information associated with the command */
282 __u32 busaddr
; /* physical addr of this record */
283 struct ErrorInfo
*err_info
; /* pointer to the allocated mem */
287 struct hlist_node list
;
288 struct CommandList
*prev
;
289 struct CommandList
*next
;
291 struct completion
*waiting
;
296 /* Configuration Table Structure */
298 __u32 TransportRequest
;
307 __u32 TransportSupport
;
308 __u32 TransportActive
;
309 struct HostWrite HostWrite
;
318 struct hpsa_pci_info
{
320 unsigned char dev_fn
;
321 unsigned short domain
;
326 #endif /* HPSA_CMD_H */