sfc: Allocate each channel separately, along with its RX and TX queues
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / enic / vnic_intr.h
blob09dc0b73ff46aec338fc0478a52d85955ea350ba
1 /*
2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
20 #ifndef _VNIC_INTR_H_
21 #define _VNIC_INTR_H_
23 #include <linux/pci.h>
25 #include "vnic_dev.h"
27 #define VNIC_INTR_TIMER_MAX 0xffff
29 #define VNIC_INTR_TIMER_TYPE_ABS 0
30 #define VNIC_INTR_TIMER_TYPE_QUIET 1
32 /* Interrupt control */
33 struct vnic_intr_ctrl {
34 u32 coalescing_timer; /* 0x00 */
35 u32 pad0;
36 u32 coalescing_value; /* 0x08 */
37 u32 pad1;
38 u32 coalescing_type; /* 0x10 */
39 u32 pad2;
40 u32 mask_on_assertion; /* 0x18 */
41 u32 pad3;
42 u32 mask; /* 0x20 */
43 u32 pad4;
44 u32 int_credits; /* 0x28 */
45 u32 pad5;
46 u32 int_credit_return; /* 0x30 */
47 u32 pad6;
50 struct vnic_intr {
51 unsigned int index;
52 struct vnic_dev *vdev;
53 struct vnic_intr_ctrl __iomem *ctrl; /* memory-mapped */
56 static inline void vnic_intr_unmask(struct vnic_intr *intr)
58 iowrite32(0, &intr->ctrl->mask);
61 static inline void vnic_intr_mask(struct vnic_intr *intr)
63 iowrite32(1, &intr->ctrl->mask);
66 static inline int vnic_intr_masked(struct vnic_intr *intr)
68 return ioread32(&intr->ctrl->mask);
71 static inline void vnic_intr_return_credits(struct vnic_intr *intr,
72 unsigned int credits, int unmask, int reset_timer)
74 #define VNIC_INTR_UNMASK_SHIFT 16
75 #define VNIC_INTR_RESET_TIMER_SHIFT 17
77 u32 int_credit_return = (credits & 0xffff) |
78 (unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) |
79 (reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0);
81 iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
84 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)
86 return ioread32(&intr->ctrl->int_credits);
89 static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)
91 unsigned int credits = vnic_intr_credits(intr);
92 int unmask = 1;
93 int reset_timer = 1;
95 vnic_intr_return_credits(intr, credits, unmask, reset_timer);
98 static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba)
100 /* read PBA without clearing */
101 return ioread32(legacy_pba);
104 void vnic_intr_free(struct vnic_intr *intr);
105 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,
106 unsigned int index);
107 void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer,
108 unsigned int coalescing_type, unsigned int mask_on_assertion);
109 void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,
110 unsigned int coalescing_timer);
111 void vnic_intr_clean(struct vnic_intr *intr);
113 #endif /* _VNIC_INTR_H_ */