1 /* Sparc SS1000/SC2000 SMP support.
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 #include <linux/clockchips.h>
10 #include <linux/interrupt.h>
11 #include <linux/profile.h>
12 #include <linux/delay.h>
13 #include <linux/sched.h>
14 #include <linux/cpu.h>
16 #include <asm/cacheflush.h>
17 #include <asm/switch_to.h>
18 #include <asm/tlbflush.h>
19 #include <asm/timer.h>
20 #include <asm/oplib.h>
27 #define IRQ_CROSS_CALL 15
29 static volatile int smp_processors_ready
;
30 static int smp_highest_cpu
;
32 static inline unsigned long sun4d_swap(volatile unsigned long *ptr
, unsigned long val
)
34 __asm__
__volatile__("swap [%1], %0\n\t" :
35 "=&r" (val
), "=&r" (ptr
) :
36 "0" (val
), "1" (ptr
));
40 static void smp4d_ipi_init(void);
42 static unsigned char cpu_leds
[32];
44 static inline void show_leds(int cpuid
)
47 __asm__
__volatile__ ("stba %0, [%1] %2" : :
48 "r" ((cpu_leds
[cpuid
] << 4) | cpu_leds
[cpuid
+1]),
49 "r" (ECSR_BASE(cpuid
) | BB_LEDS
),
53 void __cpuinit
smp4d_callin(void)
55 int cpuid
= hard_smp_processor_id();
58 /* Show we are alive */
59 cpu_leds
[cpuid
] = 0x6;
62 /* Enable level15 interrupt, disable level14 interrupt for now */
63 cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
65 local_ops
->cache_all();
68 notify_cpu_starting(cpuid
);
70 * Unblock the master CPU _only_ when the scheduler state
71 * of all secondary CPUs will be up-to-date, so after
72 * the SMP initialization the master will be just allowed
73 * to call the scheduler code.
75 /* Get our local ticker going. */
76 register_percpu_ce(cpuid
);
79 smp_store_cpu_info(cpuid
);
80 local_ops
->cache_all();
83 /* Allow master to continue. */
84 sun4d_swap((unsigned long *)&cpu_callin_map
[cpuid
], 1);
85 local_ops
->cache_all();
88 while ((unsigned long)current_set
[cpuid
] < PAGE_OFFSET
)
91 while (current_set
[cpuid
]->cpu
!= cpuid
)
94 /* Fix idle thread fields. */
95 __asm__
__volatile__("ld [%0], %%g6\n\t"
96 : : "r" (¤t_set
[cpuid
])
97 : "memory" /* paranoid */);
99 cpu_leds
[cpuid
] = 0x9;
102 /* Attach to the address space of init_task. */
103 atomic_inc(&init_mm
.mm_count
);
104 current
->active_mm
= &init_mm
;
106 local_ops
->cache_all();
107 local_ops
->tlb_all();
109 local_irq_enable(); /* We don't allow PIL 14 yet */
111 while (!cpumask_test_cpu(cpuid
, &smp_commenced_mask
))
114 spin_lock_irqsave(&sun4d_imsk_lock
, flags
);
115 cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
116 spin_unlock_irqrestore(&sun4d_imsk_lock
, flags
);
117 set_cpu_online(cpuid
, true);
122 * Cycle through the processors asking the PROM to start each one.
124 void __init
smp4d_boot_cpus(void)
128 current_set
[0] = NULL
;
129 local_ops
->cache_all();
132 int __cpuinit
smp4d_boot_one_cpu(int i
, struct task_struct
*idle
)
134 unsigned long *entry
= &sun4d_cpu_startup
;
138 cpu_find_by_instance(i
, &cpu_node
, NULL
);
139 current_set
[i
] = task_thread_info(idle
);
141 * Initialize the contexts table
142 * Since the call to prom_startcpu() trashes the structure,
143 * we need to re-initialize it for each cpu
145 smp_penguin_ctable
.which_io
= 0;
146 smp_penguin_ctable
.phys_addr
= (unsigned int) srmmu_ctx_table_phys
;
147 smp_penguin_ctable
.reg_size
= 0;
149 /* whirrr, whirrr, whirrrrrrrrr... */
150 printk(KERN_INFO
"Starting CPU %d at %p\n", i
, entry
);
151 local_ops
->cache_all();
152 prom_startcpu(cpu_node
,
153 &smp_penguin_ctable
, 0, (char *)entry
);
155 printk(KERN_INFO
"prom_startcpu returned :)\n");
157 /* wheee... it's going... */
158 for (timeout
= 0; timeout
< 10000; timeout
++) {
159 if (cpu_callin_map
[i
])
164 if (!(cpu_callin_map
[i
])) {
165 printk(KERN_ERR
"Processor %d is stuck.\n", i
);
169 local_ops
->cache_all();
173 void __init
smp4d_smp_done(void)
178 /* setup cpu list for irq rotation */
181 for_each_online_cpu(i
) {
183 prev
= &cpu_data(i
).next
;
186 local_ops
->cache_all();
188 /* Ok, they are spinning and ready to go. */
189 smp_processors_ready
= 1;
190 sun4d_distribute_irqs();
193 /* Memory structure giving interrupt handler information about IPI generated */
194 struct sun4d_ipi_work
{
200 static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work
, sun4d_ipi_work
);
202 /* Initialize IPIs on the SUN4D SMP machine */
203 static void __init
smp4d_ipi_init(void)
206 struct sun4d_ipi_work
*work
;
208 printk(KERN_INFO
"smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ
);
210 for_each_possible_cpu(cpu
) {
211 work
= &per_cpu(sun4d_ipi_work
, cpu
);
212 work
->single
= work
->msk
= work
->resched
= 0;
216 void sun4d_ipi_interrupt(void)
218 struct sun4d_ipi_work
*work
= &__get_cpu_var(sun4d_ipi_work
);
222 smp_call_function_single_interrupt();
226 smp_call_function_interrupt();
230 smp_resched_interrupt();
234 /* +-------+-------------+-----------+------------------------------------+
235 * | bcast | devid | sid | levels mask |
236 * +-------+-------------+-----------+------------------------------------+
237 * 31 30 23 22 15 14 0
239 #define IGEN_MESSAGE(bcast, devid, sid, levels) \
240 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
242 static void sun4d_send_ipi(int cpu
, int level
)
244 cc_set_igen(IGEN_MESSAGE(0, cpu
<< 3, 6 + ((level
>> 1) & 7), 1 << (level
- 1)));
247 static void sun4d_ipi_single(int cpu
)
249 struct sun4d_ipi_work
*work
= &per_cpu(sun4d_ipi_work
, cpu
);
254 /* Generate IRQ on the CPU */
255 sun4d_send_ipi(cpu
, SUN4D_IPI_IRQ
);
258 static void sun4d_ipi_mask_one(int cpu
)
260 struct sun4d_ipi_work
*work
= &per_cpu(sun4d_ipi_work
, cpu
);
265 /* Generate IRQ on the CPU */
266 sun4d_send_ipi(cpu
, SUN4D_IPI_IRQ
);
269 static void sun4d_ipi_resched(int cpu
)
271 struct sun4d_ipi_work
*work
= &per_cpu(sun4d_ipi_work
, cpu
);
276 /* Generate IRQ on the CPU (any IRQ will cause resched) */
277 sun4d_send_ipi(cpu
, SUN4D_IPI_IRQ
);
280 static struct smp_funcall
{
287 unsigned char processors_in
[NR_CPUS
]; /* Set when ipi entered. */
288 unsigned char processors_out
[NR_CPUS
]; /* Set when ipi exited. */
289 } ccall_info
__attribute__((aligned(8)));
291 static DEFINE_SPINLOCK(cross_call_lock
);
293 /* Cross calls must be serialized, at least currently. */
294 static void sun4d_cross_call(smpfunc_t func
, cpumask_t mask
, unsigned long arg1
,
295 unsigned long arg2
, unsigned long arg3
,
298 if (smp_processors_ready
) {
299 register int high
= smp_highest_cpu
;
302 spin_lock_irqsave(&cross_call_lock
, flags
);
306 * If you make changes here, make sure
307 * gcc generates proper code...
309 register smpfunc_t f
asm("i0") = func
;
310 register unsigned long a1
asm("i1") = arg1
;
311 register unsigned long a2
asm("i2") = arg2
;
312 register unsigned long a3
asm("i3") = arg3
;
313 register unsigned long a4
asm("i4") = arg4
;
314 register unsigned long a5
asm("i5") = 0;
316 __asm__
__volatile__(
318 "std %2, [%6 + 8]\n\t"
319 "std %4, [%6 + 16]\n\t" : :
320 "r"(f
), "r"(a1
), "r"(a2
), "r"(a3
), "r"(a4
), "r"(a5
),
321 "r" (&ccall_info
.func
));
324 /* Init receive/complete mapping, plus fire the IPI's off. */
328 cpumask_clear_cpu(smp_processor_id(), &mask
);
329 cpumask_and(&mask
, cpu_online_mask
, &mask
);
330 for (i
= 0; i
<= high
; i
++) {
331 if (cpumask_test_cpu(i
, &mask
)) {
332 ccall_info
.processors_in
[i
] = 0;
333 ccall_info
.processors_out
[i
] = 0;
334 sun4d_send_ipi(i
, IRQ_CROSS_CALL
);
344 if (!cpumask_test_cpu(i
, &mask
))
346 while (!ccall_info
.processors_in
[i
])
348 } while (++i
<= high
);
352 if (!cpumask_test_cpu(i
, &mask
))
354 while (!ccall_info
.processors_out
[i
])
356 } while (++i
<= high
);
359 spin_unlock_irqrestore(&cross_call_lock
, flags
);
363 /* Running cross calls. */
364 void smp4d_cross_call_irq(void)
366 int i
= hard_smp_processor_id();
368 ccall_info
.processors_in
[i
] = 1;
369 ccall_info
.func(ccall_info
.arg1
, ccall_info
.arg2
, ccall_info
.arg3
,
370 ccall_info
.arg4
, ccall_info
.arg5
);
371 ccall_info
.processors_out
[i
] = 1;
374 void smp4d_percpu_timer_interrupt(struct pt_regs
*regs
)
376 struct pt_regs
*old_regs
;
377 int cpu
= hard_smp_processor_id();
378 struct clock_event_device
*ce
;
379 static int cpu_tick
[NR_CPUS
];
380 static char led_mask
[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
382 old_regs
= set_irq_regs(regs
);
383 bw_get_prof_limit(cpu
);
384 bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
387 if (!(cpu_tick
[cpu
] & 15)) {
388 if (cpu_tick
[cpu
] == 0x60)
390 cpu_leds
[cpu
] = led_mask
[cpu_tick
[cpu
] >> 4];
394 ce
= &per_cpu(sparc32_clockevent
, cpu
);
397 ce
->event_handler(ce
);
400 set_irq_regs(old_regs
);
403 static const struct sparc32_ipi_ops sun4d_ipi_ops
= {
404 .cross_call
= sun4d_cross_call
,
405 .resched
= sun4d_ipi_resched
,
406 .single
= sun4d_ipi_single
,
407 .mask_one
= sun4d_ipi_mask_one
,
410 void __init
sun4d_init_smp(void)
414 /* Patch ipi15 trap table */
415 t_nmi
[1] = t_nmi
[1] + (linux_trap_ipi15_sun4d
- linux_trap_ipi15_sun4m
);
417 sparc32_ipi_ops
= &sun4d_ipi_ops
;
419 for (i
= 0; i
< NR_CPUS
; i
++) {
420 ccall_info
.processors_in
[i
] = 1;
421 ccall_info
.processors_out
[i
] = 1;