2 * Interrupt request handling routines. On the
3 * Sparc the IRQs are basically 'cast in stone'
4 * and you are supposed to probe the prom's device
5 * node trees to find out who's got which IRQ.
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
9 * Copyright (C) 1995,2002 Pete A. Zaitcev (zaitcev@yahoo.com)
10 * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
11 * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
14 #include <linux/kernel_stat.h>
15 #include <linux/seq_file.h>
16 #include <linux/export.h>
18 #include <asm/cacheflush.h>
19 #include <asm/cpudata.h>
26 /* platform specific irq setup */
27 struct sparc_config sparc_config
;
29 unsigned long arch_local_irq_save(void)
39 : "=&r" (retval
), "=r" (tmp
)
45 EXPORT_SYMBOL(arch_local_irq_save
);
47 void arch_local_irq_enable(void)
60 EXPORT_SYMBOL(arch_local_irq_enable
);
62 void arch_local_irq_restore(unsigned long old_psr
)
70 "wr %0, %2, %%psr\n\t"
73 : "i" (PSR_PIL
), "r" (old_psr
)
76 EXPORT_SYMBOL(arch_local_irq_restore
);
79 * Dave Redman (djhr@tadpole.co.uk)
81 * IRQ numbers.. These are no longer restricted to 15..
83 * this is done to enable SBUS cards and onboard IO to be masked
84 * correctly. using the interrupt level isn't good enough.
87 * A device interrupting at sbus level6 and the Floppy both come in
88 * at IRQ11, but enabling and disabling them requires writing to
89 * different bits in the SLAVIO/SEC.
91 * As a result of these changes sun4m machines could now support
92 * directed CPU interrupts using the existing enable/disable irq code
95 * Sun4d complicates things even further. IRQ numbers are arbitrary
96 * 32-bit values in that case. Since this is similar to sparc64,
97 * we adopt a virtual IRQ numbering scheme as is done there.
98 * Virutal interrupt numbers are allocated by build_irq(). So NR_IRQS
99 * just becomes a limit of how many interrupt sources we can handle in
100 * a single system. Even fully loaded SS2000 machines top off at
101 * about 32 interrupt sources or so, therefore a NR_IRQS value of 64
102 * is more than enough.
104 * We keep a map of per-PIL enable interrupts. These get wired
105 * up via the irq_chip->startup() method which gets invoked by
106 * the generic IRQ layer during request_irq().
110 /* Table of allocated irqs. Unused entries has irq == 0 */
111 static struct irq_bucket irq_table
[NR_IRQS
];
112 /* Protect access to irq_table */
113 static DEFINE_SPINLOCK(irq_table_lock
);
115 /* Map between the irq identifier used in hw to the irq_bucket. */
116 struct irq_bucket
*irq_map
[SUN4D_MAX_IRQ
];
117 /* Protect access to irq_map */
118 static DEFINE_SPINLOCK(irq_map_lock
);
120 /* Allocate a new irq from the irq_table */
121 unsigned int irq_alloc(unsigned int real_irq
, unsigned int pil
)
126 spin_lock_irqsave(&irq_table_lock
, flags
);
127 for (i
= 1; i
< NR_IRQS
; i
++) {
128 if (irq_table
[i
].real_irq
== real_irq
&& irq_table
[i
].pil
== pil
)
132 for (i
= 1; i
< NR_IRQS
; i
++) {
133 if (!irq_table
[i
].irq
)
138 irq_table
[i
].real_irq
= real_irq
;
139 irq_table
[i
].irq
= i
;
140 irq_table
[i
].pil
= pil
;
142 printk(KERN_ERR
"IRQ: Out of virtual IRQs.\n");
146 spin_unlock_irqrestore(&irq_table_lock
, flags
);
151 /* Based on a single pil handler_irq may need to call several
152 * interrupt handlers. Use irq_map as entry to irq_table,
153 * and let each entry in irq_table point to the next entry.
155 void irq_link(unsigned int irq
)
157 struct irq_bucket
*p
;
161 BUG_ON(irq
>= NR_IRQS
);
163 spin_lock_irqsave(&irq_map_lock
, flags
);
167 BUG_ON(pil
> SUN4D_MAX_IRQ
);
168 p
->next
= irq_map
[pil
];
171 spin_unlock_irqrestore(&irq_map_lock
, flags
);
174 void irq_unlink(unsigned int irq
)
176 struct irq_bucket
*p
, **pnext
;
179 BUG_ON(irq
>= NR_IRQS
);
181 spin_lock_irqsave(&irq_map_lock
, flags
);
184 BUG_ON(p
->pil
> SUN4D_MAX_IRQ
);
185 pnext
= &irq_map
[p
->pil
];
187 pnext
= &(*pnext
)->next
;
190 spin_unlock_irqrestore(&irq_map_lock
, flags
);
194 /* /proc/interrupts printing */
195 int arch_show_interrupts(struct seq_file
*p
, int prec
)
200 seq_printf(p
, "RES: ");
201 for_each_online_cpu(j
)
202 seq_printf(p
, "%10u ", cpu_data(j
).irq_resched_count
);
203 seq_printf(p
, " IPI rescheduling interrupts\n");
204 seq_printf(p
, "CAL: ");
205 for_each_online_cpu(j
)
206 seq_printf(p
, "%10u ", cpu_data(j
).irq_call_count
);
207 seq_printf(p
, " IPI function call interrupts\n");
209 seq_printf(p
, "NMI: ");
210 for_each_online_cpu(j
)
211 seq_printf(p
, "%10u ", cpu_data(j
).counter
);
212 seq_printf(p
, " Non-maskable interrupts\n");
216 void handler_irq(unsigned int pil
, struct pt_regs
*regs
)
218 struct pt_regs
*old_regs
;
219 struct irq_bucket
*p
;
222 old_regs
= set_irq_regs(regs
);
227 struct irq_bucket
*next
= p
->next
;
229 generic_handle_irq(p
->irq
);
233 set_irq_regs(old_regs
);
236 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
237 static unsigned int floppy_irq
;
239 int sparc_floppy_request_irq(unsigned int irq
, irq_handler_t irq_handler
)
241 unsigned int cpu_irq
;
245 err
= request_irq(irq
, irq_handler
, 0, "floppy", NULL
);
249 /* Save for later use in floppy interrupt handler */
252 cpu_irq
= (irq
& (NR_IRQS
- 1));
254 /* Dork with trap table if we get this far. */
255 #define INSTANTIATE(table) \
256 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_one = SPARC_RD_PSR_L0; \
257 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two = \
258 SPARC_BRANCH((unsigned long) floppy_hardint, \
259 (unsigned long) &table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two);\
260 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_three = SPARC_RD_WIM_L3; \
261 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP;
263 INSTANTIATE(sparc_ttable
)
265 #if defined CONFIG_SMP
266 if (sparc_cpu_model
!= sparc_leon
) {
267 struct tt_entry
*trap_table
;
269 trap_table
= &trapbase_cpu1
;
270 INSTANTIATE(trap_table
)
271 trap_table
= &trapbase_cpu2
;
272 INSTANTIATE(trap_table
)
273 trap_table
= &trapbase_cpu3
;
274 INSTANTIATE(trap_table
)
279 * XXX Correct thing whould be to flush only I- and D-cache lines
280 * which contain the handler in question. But as of time of the
281 * writing we have no CPU-neutral interface to fine-grained flushes.
286 EXPORT_SYMBOL(sparc_floppy_request_irq
);
289 * These variables are used to access state from the assembler
290 * interrupt handler, floppy_hardint, so we cannot put these in
291 * the floppy driver image because that would not work in the
294 volatile unsigned char *fdc_status
;
295 EXPORT_SYMBOL(fdc_status
);
298 EXPORT_SYMBOL(pdma_vaddr
);
300 unsigned long pdma_size
;
301 EXPORT_SYMBOL(pdma_size
);
303 volatile int doing_pdma
;
304 EXPORT_SYMBOL(doing_pdma
);
307 EXPORT_SYMBOL(pdma_base
);
309 unsigned long pdma_areasize
;
310 EXPORT_SYMBOL(pdma_areasize
);
312 /* Use the generic irq support to call floppy_interrupt
313 * which was setup using request_irq() in sparc_floppy_request_irq().
314 * We only have one floppy interrupt so we do not need to check
315 * for additional handlers being wired up by irq_link()
317 void sparc_floppy_irq(int irq
, void *dev_id
, struct pt_regs
*regs
)
319 struct pt_regs
*old_regs
;
321 old_regs
= set_irq_regs(regs
);
323 generic_handle_irq(floppy_irq
);
325 set_irq_regs(old_regs
);
330 * This could probably be made indirect too and assigned in the CPU
331 * bits of the code. That would be much nicer I think and would also
332 * fit in with the idea of being able to tune your kernel for your machine
333 * by removing unrequired machine and device support.
337 void __init
init_IRQ(void)
339 switch (sparc_cpu_model
) {
343 sun4m_pci_init_IRQ();
357 prom_printf("Cannot initialize IRQs on this Sun machine...");