arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/user.h>
  20
  21 #ifdef CONFIG_X86_64
  22 # include <asm/sigcontext32.h>
  23 # include <asm/user32.h>
  24 #else
  25 # define save_i387_xstate_ia32          save_i387_xstate
  26 # define restore_i387_xstate_ia32       restore_i387_xstate
  27 # define _fpstate_ia32          _fpstate
  28 # define _xstate_ia32           _xstate
  29 # define sig_xstate_ia32_size   sig_xstate_size
  30 # define fx_sw_reserved_ia32    fx_sw_reserved
  31 # define user_i387_ia32_struct  user_i387_struct
  32 # define user32_fxsr_struct     user_fxsr_struct
  33 #endif
  34
  35 #ifdef CONFIG_MATH_EMULATION
  36 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  37 #else
  38 # define HAVE_HWFP              1
  39 #endif
  40
  41 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  42 unsigned int xstate_size;
  43 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  44 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  45
  46 void __cpuinit mxcsr_feature_mask_init(void)
  47 {
  48         unsigned long mask = 0;
  49
  50         clts();
  51         if (cpu_has_fxsr) {
  52                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  53                 asm volatile("fxsave %0" : : "m" (fx_scratch));
  54                 mask = fx_scratch.mxcsr_mask;
  55                 if (mask == 0)
  56                         mask = 0x0000ffbf;
  57         }
  58         mxcsr_feature_mask &= mask;
  59         stts();
  60 }
  61
  62 void __cpuinit init_thread_xstate(void)
  63 {
  64         if (!HAVE_HWFP) {
  65                 xstate_size = sizeof(struct i387_soft_struct);
  66                 return;
  67         }
  68
  69         if (cpu_has_xsave) {
  70                 xsave_cntxt_init();
  71                 return;
  72         }
  73
  74         if (cpu_has_fxsr)
  75                 xstate_size = sizeof(struct i387_fxsave_struct);
  76 #ifdef CONFIG_X86_32
  77         else
  78                 xstate_size = sizeof(struct i387_fsave_struct);
  79 #endif
  80 }
  81
  82 #ifdef CONFIG_X86_64
  83 /*
  84  * Called at bootup to set up the initial FPU state that is later cloned
  85  * into all processes.
  86  */
  87 void __cpuinit fpu_init(void)
  88 {
  89         unsigned long oldcr0 = read_cr0();
  90
  91         set_in_cr4(X86_CR4_OSFXSR);
  92         set_in_cr4(X86_CR4_OSXMMEXCPT);
  93
  94         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  95
  96         xsave_init();
  97
  98         mxcsr_feature_mask_init();
  99         /* clean state in init */
 100         current_thread_info()->status = 0;
 101         clear_used_math();
 102 }
 103 #endif  /* CONFIG_X86_64 */
 104
 105 static void fpu_finit(struct fpu *fpu)
 106 {
 107 #ifdef CONFIG_X86_32
 108         if (!HAVE_HWFP) {
 109                 finit_soft_fpu(&fpu->state->soft);
 110                 return;
 111         }
 112 #endif
 113
 114         if (cpu_has_fxsr) {
 115                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
 116
 117                 memset(fx, 0, xstate_size);
 118                 fx->cwd = 0x37f;
 119                 if (cpu_has_xmm)
 120                         fx->mxcsr = MXCSR_DEFAULT;
 121         } else {
 122                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 123                 memset(fp, 0, xstate_size);
 124                 fp->cwd = 0xffff037fu;
 125                 fp->swd = 0xffff0000u;
 126                 fp->twd = 0xffffffffu;
 127                 fp->fos = 0xffff0000u;
 128         }
 129 }
 130
 131 /*
 132  * The _current_ task is using the FPU for the first time
 133  * so initialize it and set the mxcsr to its default
 134  * value at reset if we support XMM instructions and then
 135  * remeber the current task has used the FPU.
 136  */
 137 int init_fpu(struct task_struct *tsk)
 138 {
 139         int ret;
 140
 141         if (tsk_used_math(tsk)) {
 142                 if (HAVE_HWFP && tsk == current)
 143                         unlazy_fpu(tsk);
 144                 return 0;
 145         }
 146
 147         /*
 148          * Memory allocation at the first usage of the FPU and other state.
 149          */
 150         ret = fpu_alloc(&tsk->thread.fpu);
 151         if (ret)
 152                 return ret;
 153
 154         fpu_finit(&tsk->thread.fpu);
 155
 156         set_stopped_child_used_math(tsk);
 157         return 0;
 158 }
 159
 160 /*
 161  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 162  * as the "regset->n" for the xstate regset will be updated based on the feature
 163  * capabilites supported by the xsave.
 164  */
 165 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 166 {
 167         return tsk_used_math(target) ? regset->n : 0;
 168 }
 169
 170 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 171 {
 172         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 173 }
 174
 175 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 176                 unsigned int pos, unsigned int count,
 177                 void *kbuf, void __user *ubuf)
 178 {
 179         int ret;
 180
 181         if (!cpu_has_fxsr)
 182                 return -ENODEV;
 183
 184         ret = init_fpu(target);
 185         if (ret)
 186                 return ret;
 187
 188         sanitize_i387_state(target);
 189
 190         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 191                                    &target->thread.fpu.state->fxsave, 0, -1);
 192 }
 193
 194 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 195                 unsigned int pos, unsigned int count,
 196                 const void *kbuf, const void __user *ubuf)
 197 {
 198         int ret;
 199
 200         if (!cpu_has_fxsr)
 201                 return -ENODEV;
 202
 203         ret = init_fpu(target);
 204         if (ret)
 205                 return ret;
 206
 207         sanitize_i387_state(target);
 208
 209         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 210                                  &target->thread.fpu.state->fxsave, 0, -1);
 211
 212         /*
 213          * mxcsr reserved bits must be masked to zero for security reasons.
 214          */
 215         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 216
 217         /*
 218          * update the header bits in the xsave header, indicating the
 219          * presence of FP and SSE state.
 220          */
 221         if (cpu_has_xsave)
 222                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 223
 224         return ret;
 225 }
 226
 227 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 228                 unsigned int pos, unsigned int count,
 229                 void *kbuf, void __user *ubuf)
 230 {
 231         int ret;
 232
 233         if (!cpu_has_xsave)
 234                 return -ENODEV;
 235
 236         ret = init_fpu(target);
 237         if (ret)
 238                 return ret;
 239
 240         /*
 241          * Copy the 48bytes defined by the software first into the xstate
 242          * memory layout in the thread struct, so that we can copy the entire
 243          * xstateregs to the user using one user_regset_copyout().
 244          */
 245         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 246                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 247
 248         /*
 249          * Copy the xstate memory layout.
 250          */
 251         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 252                                   &target->thread.fpu.state->xsave, 0, -1);
 253         return ret;
 254 }
 255
 256 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 257                   unsigned int pos, unsigned int count,
 258                   const void *kbuf, const void __user *ubuf)
 259 {
 260         int ret;
 261         struct xsave_hdr_struct *xsave_hdr;
 262
 263         if (!cpu_has_xsave)
 264                 return -ENODEV;
 265
 266         ret = init_fpu(target);
 267         if (ret)
 268                 return ret;
 269
 270         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 271                                  &target->thread.fpu.state->xsave, 0, -1);
 272
 273         /*
 274          * mxcsr reserved bits must be masked to zero for security reasons.
 275          */
 276         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 277
 278         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 279
 280         xsave_hdr->xstate_bv &= pcntxt_mask;
 281         /*
 282          * These bits must be zero.
 283          */
 284         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 285
 286         return ret;
 287 }
 288
 289 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 290
 291 /*
 292  * FPU tag word conversions.
 293  */
 294
 295 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 296 {
 297         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 298
 299         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 300         tmp = ~twd;
 301         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 302         /* and move the valid bits to the lower byte. */
 303         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 304         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 305         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 306
 307         return tmp;
 308 }
 309
 310 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 311 #define FP_EXP_TAG_VALID        0
 312 #define FP_EXP_TAG_ZERO         1
 313 #define FP_EXP_TAG_SPECIAL      2
 314 #define FP_EXP_TAG_EMPTY        3
 315
 316 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 317 {
 318         struct _fpxreg *st;
 319         u32 tos = (fxsave->swd >> 11) & 7;
 320         u32 twd = (unsigned long) fxsave->twd;
 321         u32 tag;
 322         u32 ret = 0xffff0000u;
 323         int i;
 324
 325         for (i = 0; i < 8; i++, twd >>= 1) {
 326                 if (twd & 0x1) {
 327                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 328
 329                         switch (st->exponent & 0x7fff) {
 330                         case 0x7fff:
 331                                 tag = FP_EXP_TAG_SPECIAL;
 332                                 break;
 333                         case 0x0000:
 334                                 if (!st->significand[0] &&
 335                                     !st->significand[1] &&
 336                                     !st->significand[2] &&
 337                                     !st->significand[3])
 338                                         tag = FP_EXP_TAG_ZERO;
 339                                 else
 340                                         tag = FP_EXP_TAG_SPECIAL;
 341                                 break;
 342                         default:
 343                                 if (st->significand[3] & 0x8000)
 344                                         tag = FP_EXP_TAG_VALID;
 345                                 else
 346                                         tag = FP_EXP_TAG_SPECIAL;
 347                                 break;
 348                         }
 349                 } else {
 350                         tag = FP_EXP_TAG_EMPTY;
 351                 }
 352                 ret |= tag << (2 * i);
 353         }
 354         return ret;
 355 }
 356
 357 /*
 358  * FXSR floating point environment conversions.
 359  */
 360
 361 static void
 362 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 363 {
 364         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 365         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 366         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 367         int i;
 368
 369         env->cwd = fxsave->cwd | 0xffff0000u;
 370         env->swd = fxsave->swd | 0xffff0000u;
 371         env->twd = twd_fxsr_to_i387(fxsave);
 372
 373 #ifdef CONFIG_X86_64
 374         env->fip = fxsave->rip;
 375         env->foo = fxsave->rdp;
 376         if (tsk == current) {
 377                 /*
 378                  * should be actually ds/cs at fpu exception time, but
 379                  * that information is not available in 64bit mode.
 380                  */
 381                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
 382                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
 383         } else {
 384                 struct pt_regs *regs = task_pt_regs(tsk);
 385
 386                 env->fos = 0xffff0000 | tsk->thread.ds;
 387                 env->fcs = regs->cs;
 388         }
 389 #else
 390         env->fip = fxsave->fip;
 391         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 392         env->foo = fxsave->foo;
 393         env->fos = fxsave->fos;
 394 #endif
 395
 396         for (i = 0; i < 8; ++i)
 397                 memcpy(&to[i], &from[i], sizeof(to[0]));
 398 }
 399
 400 static void convert_to_fxsr(struct task_struct *tsk,
 401                             const struct user_i387_ia32_struct *env)
 402
 403 {
 404         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 405         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 406         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 407         int i;
 408
 409         fxsave->cwd = env->cwd;
 410         fxsave->swd = env->swd;
 411         fxsave->twd = twd_i387_to_fxsr(env->twd);
 412         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 413 #ifdef CONFIG_X86_64
 414         fxsave->rip = env->fip;
 415         fxsave->rdp = env->foo;
 416         /* cs and ds ignored */
 417 #else
 418         fxsave->fip = env->fip;
 419         fxsave->fcs = (env->fcs & 0xffff);
 420         fxsave->foo = env->foo;
 421         fxsave->fos = env->fos;
 422 #endif
 423
 424         for (i = 0; i < 8; ++i)
 425                 memcpy(&to[i], &from[i], sizeof(from[0]));
 426 }
 427
 428 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 429                unsigned int pos, unsigned int count,
 430                void *kbuf, void __user *ubuf)
 431 {
 432         struct user_i387_ia32_struct env;
 433         int ret;
 434
 435         ret = init_fpu(target);
 436         if (ret)
 437                 return ret;
 438
 439         if (!HAVE_HWFP)
 440                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 441
 442         if (!cpu_has_fxsr) {
 443                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 444                                            &target->thread.fpu.state->fsave, 0,
 445                                            -1);
 446         }
 447
 448         sanitize_i387_state(target);
 449
 450         if (kbuf && pos == 0 && count == sizeof(env)) {
 451                 convert_from_fxsr(kbuf, target);
 452                 return 0;
 453         }
 454
 455         convert_from_fxsr(&env, target);
 456
 457         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 458 }
 459
 460 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 461                unsigned int pos, unsigned int count,
 462                const void *kbuf, const void __user *ubuf)
 463 {
 464         struct user_i387_ia32_struct env;
 465         int ret;
 466
 467         ret = init_fpu(target);
 468         if (ret)
 469                 return ret;
 470
 471         sanitize_i387_state(target);
 472
 473         if (!HAVE_HWFP)
 474                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 475
 476         if (!cpu_has_fxsr) {
 477                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 478                                           &target->thread.fpu.state->fsave, 0, -1);
 479         }
 480
 481         if (pos > 0 || count < sizeof(env))
 482                 convert_from_fxsr(&env, target);
 483
 484         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 485         if (!ret)
 486                 convert_to_fxsr(target, &env);
 487
 488         /*
 489          * update the header bit in the xsave header, indicating the
 490          * presence of FP.
 491          */
 492         if (cpu_has_xsave)
 493                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 494         return ret;
 495 }
 496
 497 /*
 498  * Signal frame handlers.
 499  */
 500
 501 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 502 {
 503         struct task_struct *tsk = current;
 504         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
 505
 506         fp->status = fp->swd;
 507         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
 508                 return -1;
 509         return 1;
 510 }
 511
 512 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 513 {
 514         struct task_struct *tsk = current;
 515         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
 516         struct user_i387_ia32_struct env;
 517         int err = 0;
 518
 519         convert_from_fxsr(&env, tsk);
 520         if (__copy_to_user(buf, &env, sizeof(env)))
 521                 return -1;
 522
 523         err |= __put_user(fx->swd, &buf->status);
 524         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 525         if (err)
 526                 return -1;
 527
 528         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
 529                 return -1;
 530         return 1;
 531 }
 532
 533 static int save_i387_xsave(void __user *buf)
 534 {
 535         struct task_struct *tsk = current;
 536         struct _fpstate_ia32 __user *fx = buf;
 537         int err = 0;
 538
 539
 540         sanitize_i387_state(tsk);
 541
 542         /*
 543          * For legacy compatible, we always set FP/SSE bits in the bit
 544          * vector while saving the state to the user context.
 545          * This will enable us capturing any changes(during sigreturn) to
 546          * the FP/SSE bits by the legacy applications which don't touch
 547          * xstate_bv in the xsave header.
 548          *
 549          * xsave aware applications can change the xstate_bv in the xsave
 550          * header as well as change any contents in the memory layout.
 551          * xrestore as part of sigreturn will capture all the changes.
 552          */
 553         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 554
 555         if (save_i387_fxsave(fx) < 0)
 556                 return -1;
 557
 558         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
 559                              sizeof(struct _fpx_sw_bytes));
 560         err |= __put_user(FP_XSTATE_MAGIC2,
 561                           (__u32 __user *) (buf + sig_xstate_ia32_size
 562                                             - FP_XSTATE_MAGIC2_SIZE));
 563         if (err)
 564                 return -1;
 565
 566         return 1;
 567 }
 568
 569 int save_i387_xstate_ia32(void __user *buf)
 570 {
 571         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 572         struct task_struct *tsk = current;
 573
 574         if (!used_math())
 575                 return 0;
 576
 577         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
 578                 return -EACCES;
 579         /*
 580          * This will cause a "finit" to be triggered by the next
 581          * attempted FPU operation by the 'current' process.
 582          */
 583         clear_used_math();
 584
 585         if (!HAVE_HWFP) {
 586                 return fpregs_soft_get(current, NULL,
 587                                        0, sizeof(struct user_i387_ia32_struct),
 588                                        NULL, fp) ? -1 : 1;
 589         }
 590
 591         unlazy_fpu(tsk);
 592
 593         if (cpu_has_xsave)
 594                 return save_i387_xsave(fp);
 595         if (cpu_has_fxsr)
 596                 return save_i387_fxsave(fp);
 597         else
 598                 return save_i387_fsave(fp);
 599 }
 600
 601 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 602 {
 603         struct task_struct *tsk = current;
 604
 605         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
 606                                 sizeof(struct i387_fsave_struct));
 607 }
 608
 609 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
 610                                unsigned int size)
 611 {
 612         struct task_struct *tsk = current;
 613         struct user_i387_ia32_struct env;
 614         int err;
 615
 616         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
 617                                size);
 618         /* mxcsr reserved bits must be masked to zero for security reasons */
 619         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 620         if (err || __copy_from_user(&env, buf, sizeof(env)))
 621                 return 1;
 622         convert_to_fxsr(tsk, &env);
 623
 624         return 0;
 625 }
 626
 627 static int restore_i387_xsave(void __user *buf)
 628 {
 629         struct _fpx_sw_bytes fx_sw_user;
 630         struct _fpstate_ia32 __user *fx_user =
 631                         ((struct _fpstate_ia32 __user *) buf);
 632         struct i387_fxsave_struct __user *fx =
 633                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
 634         struct xsave_hdr_struct *xsave_hdr =
 635                                 &current->thread.fpu.state->xsave.xsave_hdr;
 636         u64 mask;
 637         int err;
 638
 639         if (check_for_xstate(fx, buf, &fx_sw_user))
 640                 goto fx_only;
 641
 642         mask = fx_sw_user.xstate_bv;
 643
 644         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
 645
 646         xsave_hdr->xstate_bv &= pcntxt_mask;
 647         /*
 648          * These bits must be zero.
 649          */
 650         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 651
 652         /*
 653          * Init the state that is not present in the memory layout
 654          * and enabled by the OS.
 655          */
 656         mask = ~(pcntxt_mask & ~mask);
 657         xsave_hdr->xstate_bv &= mask;
 658
 659         return err;
 660 fx_only:
 661         /*
 662          * Couldn't find the extended state information in the memory
 663          * layout. Restore the FP/SSE and init the other extended state
 664          * enabled by the OS.
 665          */
 666         xsave_hdr->xstate_bv = XSTATE_FPSSE;
 667         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
 668 }
 669
 670 int restore_i387_xstate_ia32(void __user *buf)
 671 {
 672         int err;
 673         struct task_struct *tsk = current;
 674         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 675
 676         if (HAVE_HWFP)
 677                 clear_fpu(tsk);
 678
 679         if (!buf) {
 680                 if (used_math()) {
 681                         clear_fpu(tsk);
 682                         clear_used_math();
 683                 }
 684
 685                 return 0;
 686         } else
 687                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
 688                         return -EACCES;
 689
 690         if (!used_math()) {
 691                 err = init_fpu(tsk);
 692                 if (err)
 693                         return err;
 694         }
 695
 696         if (HAVE_HWFP) {
 697                 if (cpu_has_xsave)
 698                         err = restore_i387_xsave(buf);
 699                 else if (cpu_has_fxsr)
 700                         err = restore_i387_fxsave(fp, sizeof(struct
 701                                                            i387_fxsave_struct));
 702                 else
 703                         err = restore_i387_fsave(fp);
 704         } else {
 705                 err = fpregs_soft_set(current, NULL,
 706                                       0, sizeof(struct user_i387_ia32_struct),
 707                                       NULL, fp) != 0;
 708         }
 709         set_used_math();
 710
 711         return err;
 712 }
 713
 714 /*
 715  * FPU state for core dumps.
 716  * This is only used for a.out dumps now.
 717  * It is declared generically using elf_fpregset_t (which is
 718  * struct user_i387_struct) but is in fact only used for 32-bit
 719  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 720  */
 721 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 722 {
 723         struct task_struct *tsk = current;
 724         int fpvalid;
 725
 726         fpvalid = !!used_math();
 727         if (fpvalid)
 728                 fpvalid = !fpregs_get(tsk, NULL,
 729                                       0, sizeof(struct user_i387_ia32_struct),
 730                                       fpu, NULL);
 731
 732         return fpvalid;
 733 }
 734 EXPORT_SYMBOL(dump_fpu);
 735
 736 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */