2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/sysdev.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/clocksource.h>
38 #include <linux/clockchips.h>
39 #include <linux/bootmem.h>
40 #include <asm/uaccess.h>
41 #include <asm/delay.h>
42 #include <asm/s390_ext.h>
43 #include <asm/div64.h>
46 #include <asm/irq_regs.h>
47 #include <asm/timer.h>
51 /* change this if you have some constant time drift */
52 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
53 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55 /* The value of the TOD clock for 1.1.1970. */
56 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
59 * Create a small time difference between the timer interrupts
60 * on the different cpus to avoid lock contention.
62 #define CPU_DEVIATION (smp_processor_id() << 12)
64 #define TICK_SIZE tick
66 static ext_int_info_t ext_int_info_cc
;
67 static ext_int_info_t ext_int_etr_cc
;
68 static u64 sched_clock_base_cc
;
70 static DEFINE_PER_CPU(struct clock_event_device
, comparators
);
73 * Scheduler clock - returns current time in nanosec units.
75 unsigned long long sched_clock(void)
77 return ((get_clock_xt() - sched_clock_base_cc
) * 125) >> 9;
81 * Monotonic_clock - returns # of nanoseconds passed since time_init()
83 unsigned long long monotonic_clock(void)
87 EXPORT_SYMBOL(monotonic_clock
);
89 void tod_to_timeval(__u64 todval
, struct timespec
*xtime
)
91 unsigned long long sec
;
96 todval
-= (sec
* 1000000) << 12;
97 xtime
->tv_nsec
= ((todval
* 1000) >> 12);
100 #ifdef CONFIG_PROFILING
101 #define s390_do_profile() profile_tick(CPU_PROFILING)
103 #define s390_do_profile() do { ; } while(0)
104 #endif /* CONFIG_PROFILING */
106 void clock_comparator_work(void)
108 struct clock_event_device
*cd
;
110 S390_lowcore
.clock_comparator
= -1ULL;
111 set_clock_comparator(S390_lowcore
.clock_comparator
);
112 cd
= &__get_cpu_var(comparators
);
113 cd
->event_handler(cd
);
118 * Fixup the clock comparator.
120 static void fixup_clock_comparator(unsigned long long delta
)
122 /* If nobody is waiting there's nothing to fix. */
123 if (S390_lowcore
.clock_comparator
== -1ULL)
125 S390_lowcore
.clock_comparator
+= delta
;
126 set_clock_comparator(S390_lowcore
.clock_comparator
);
129 static int s390_next_event(unsigned long delta
,
130 struct clock_event_device
*evt
)
132 S390_lowcore
.clock_comparator
= get_clock() + delta
;
133 set_clock_comparator(S390_lowcore
.clock_comparator
);
137 static void s390_set_mode(enum clock_event_mode mode
,
138 struct clock_event_device
*evt
)
143 * Set up lowcore and control register of the current cpu to
144 * enable TOD clock and clock comparator interrupts.
146 void init_cpu_timer(void)
148 struct clock_event_device
*cd
;
151 S390_lowcore
.clock_comparator
= -1ULL;
152 set_clock_comparator(S390_lowcore
.clock_comparator
);
154 cpu
= smp_processor_id();
155 cd
= &per_cpu(comparators
, cpu
);
156 cd
->name
= "comparator";
157 cd
->features
= CLOCK_EVT_FEAT_ONESHOT
;
160 cd
->min_delta_ns
= 1;
161 cd
->max_delta_ns
= LONG_MAX
;
163 cd
->cpumask
= cpumask_of(cpu
);
164 cd
->set_next_event
= s390_next_event
;
165 cd
->set_mode
= s390_set_mode
;
167 clockevents_register_device(cd
);
169 /* Enable clock comparator timer interrupt. */
172 /* Always allow the timing alert external interrupt. */
176 static void clock_comparator_interrupt(__u16 code
)
178 if (S390_lowcore
.clock_comparator
== -1ULL)
179 set_clock_comparator(S390_lowcore
.clock_comparator
);
182 static void etr_timing_alert(struct etr_irq_parm
*);
183 static void stp_timing_alert(struct stp_irq_parm
*);
185 static void timing_alert_interrupt(__u16 code
)
187 if (S390_lowcore
.ext_params
& 0x00c40000)
188 etr_timing_alert((struct etr_irq_parm
*)
189 &S390_lowcore
.ext_params
);
190 if (S390_lowcore
.ext_params
& 0x00038000)
191 stp_timing_alert((struct stp_irq_parm
*)
192 &S390_lowcore
.ext_params
);
195 static void etr_reset(void);
196 static void stp_reset(void);
199 * Get the TOD clock running.
201 static u64 __init
reset_tod_clock(void)
207 if (store_clock(&time
) == 0)
209 /* TOD clock not running. Set the clock to Unix Epoch. */
210 if (set_clock(TOD_UNIX_EPOCH
) != 0 || store_clock(&time
) != 0)
211 panic("TOD clock not operational.");
213 return TOD_UNIX_EPOCH
;
216 static cycle_t
read_tod_clock(void)
221 static struct clocksource clocksource_tod
= {
224 .read
= read_tod_clock
,
228 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
232 void update_vsyscall(struct timespec
*wall_time
, struct clocksource
*clock
)
234 if (clock
!= &clocksource_tod
)
237 /* Make userspace gettimeofday spin until we're done. */
238 ++vdso_data
->tb_update_count
;
240 vdso_data
->xtime_tod_stamp
= clock
->cycle_last
;
241 vdso_data
->xtime_clock_sec
= xtime
.tv_sec
;
242 vdso_data
->xtime_clock_nsec
= xtime
.tv_nsec
;
243 vdso_data
->wtom_clock_sec
= wall_to_monotonic
.tv_sec
;
244 vdso_data
->wtom_clock_nsec
= wall_to_monotonic
.tv_nsec
;
246 ++vdso_data
->tb_update_count
;
249 extern struct timezone sys_tz
;
251 void update_vsyscall_tz(void)
253 /* Make userspace gettimeofday spin until we're done. */
254 ++vdso_data
->tb_update_count
;
256 vdso_data
->tz_minuteswest
= sys_tz
.tz_minuteswest
;
257 vdso_data
->tz_dsttime
= sys_tz
.tz_dsttime
;
259 ++vdso_data
->tb_update_count
;
263 * Initialize the TOD clock and the CPU timer of
266 void __init
time_init(void)
268 sched_clock_base_cc
= reset_tod_clock();
271 tod_to_timeval(sched_clock_base_cc
- TOD_UNIX_EPOCH
, &xtime
);
272 set_normalized_timespec(&wall_to_monotonic
,
273 -xtime
.tv_sec
, -xtime
.tv_nsec
);
275 /* request the clock comparator external interrupt */
276 if (register_early_external_interrupt(0x1004,
277 clock_comparator_interrupt
,
278 &ext_int_info_cc
) != 0)
279 panic("Couldn't request external interrupt 0x1004");
281 if (clocksource_register(&clocksource_tod
) != 0)
282 panic("Could not register TOD clock source");
284 /* request the timing alert external interrupt */
285 if (register_early_external_interrupt(0x1406,
286 timing_alert_interrupt
,
287 &ext_int_etr_cc
) != 0)
288 panic("Couldn't request external interrupt 0x1406");
290 /* Enable TOD clock interrupts on the boot cpu. */
292 /* Enable cpu timer interrupts on the boot cpu. */
297 * The time is "clock". old is what we think the time is.
298 * Adjust the value by a multiple of jiffies and add the delta to ntp.
299 * "delay" is an approximation how long the synchronization took. If
300 * the time correction is positive, then "delay" is subtracted from
301 * the time difference and only the remaining part is passed to ntp.
303 static unsigned long long adjust_time(unsigned long long old
,
304 unsigned long long clock
,
305 unsigned long long delay
)
307 unsigned long long delta
, ticks
;
311 /* It is later than we thought. */
312 delta
= ticks
= clock
- old
;
313 delta
= ticks
= (delta
< delay
) ? 0 : delta
- delay
;
314 delta
-= do_div(ticks
, CLK_TICKS_PER_JIFFY
);
315 adjust
.offset
= ticks
* (1000000 / HZ
);
317 /* It is earlier than we thought. */
318 delta
= ticks
= old
- clock
;
319 delta
-= do_div(ticks
, CLK_TICKS_PER_JIFFY
);
321 adjust
.offset
= -ticks
* (1000000 / HZ
);
323 sched_clock_base_cc
+= delta
;
324 if (adjust
.offset
!= 0) {
325 pr_notice("The ETR interface has adjusted the clock "
326 "by %li microseconds\n", adjust
.offset
);
327 adjust
.modes
= ADJ_OFFSET_SINGLESHOT
;
328 do_adjtimex(&adjust
);
333 static DEFINE_PER_CPU(atomic_t
, clock_sync_word
);
334 static DEFINE_MUTEX(clock_sync_mutex
);
335 static unsigned long clock_sync_flags
;
337 #define CLOCK_SYNC_HAS_ETR 0
338 #define CLOCK_SYNC_HAS_STP 1
339 #define CLOCK_SYNC_ETR 2
340 #define CLOCK_SYNC_STP 3
343 * The synchronous get_clock function. It will write the current clock
344 * value to the clock pointer and return 0 if the clock is in sync with
345 * the external time source. If the clock mode is local it will return
346 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
349 int get_sync_clock(unsigned long long *clock
)
352 unsigned int sw0
, sw1
;
354 sw_ptr
= &get_cpu_var(clock_sync_word
);
355 sw0
= atomic_read(sw_ptr
);
356 *clock
= get_clock();
357 sw1
= atomic_read(sw_ptr
);
358 put_cpu_var(clock_sync_sync
);
359 if (sw0
== sw1
&& (sw0
& 0x80000000U
))
360 /* Success: time is in sync. */
362 if (!test_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
) &&
363 !test_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
))
365 if (!test_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
) &&
366 !test_bit(CLOCK_SYNC_STP
, &clock_sync_flags
))
370 EXPORT_SYMBOL(get_sync_clock
);
373 * Make get_sync_clock return -EAGAIN.
375 static void disable_sync_clock(void *dummy
)
377 atomic_t
*sw_ptr
= &__get_cpu_var(clock_sync_word
);
379 * Clear the in-sync bit 2^31. All get_sync_clock calls will
380 * fail until the sync bit is turned back on. In addition
381 * increase the "sequence" counter to avoid the race of an
382 * etr event and the complete recovery against get_sync_clock.
384 atomic_clear_mask(0x80000000, sw_ptr
);
389 * Make get_sync_clock return 0 again.
390 * Needs to be called from a context disabled for preemption.
392 static void enable_sync_clock(void)
394 atomic_t
*sw_ptr
= &__get_cpu_var(clock_sync_word
);
395 atomic_set_mask(0x80000000, sw_ptr
);
399 * Function to check if the clock is in sync.
401 static inline int check_sync_clock(void)
406 sw_ptr
= &get_cpu_var(clock_sync_word
);
407 rc
= (atomic_read(sw_ptr
) & 0x80000000U
) != 0;
408 put_cpu_var(clock_sync_sync
);
412 /* Single threaded workqueue used for etr and stp sync events */
413 static struct workqueue_struct
*time_sync_wq
;
415 static void __init
time_init_wq(void)
419 time_sync_wq
= create_singlethread_workqueue("timesync");
420 stop_machine_create();
424 * External Time Reference (ETR) code.
426 static int etr_port0_online
;
427 static int etr_port1_online
;
428 static int etr_steai_available
;
430 static int __init
early_parse_etr(char *p
)
432 if (strncmp(p
, "off", 3) == 0)
433 etr_port0_online
= etr_port1_online
= 0;
434 else if (strncmp(p
, "port0", 5) == 0)
435 etr_port0_online
= 1;
436 else if (strncmp(p
, "port1", 5) == 0)
437 etr_port1_online
= 1;
438 else if (strncmp(p
, "on", 2) == 0)
439 etr_port0_online
= etr_port1_online
= 1;
442 early_param("etr", early_parse_etr
);
445 ETR_EVENT_PORT0_CHANGE
,
446 ETR_EVENT_PORT1_CHANGE
,
447 ETR_EVENT_PORT_ALERT
,
448 ETR_EVENT_SYNC_CHECK
,
449 ETR_EVENT_SWITCH_LOCAL
,
454 * Valid bit combinations of the eacr register are (x = don't care):
455 * e0 e1 dp p0 p1 ea es sl
456 * 0 0 x 0 0 0 0 0 initial, disabled state
457 * 0 0 x 0 1 1 0 0 port 1 online
458 * 0 0 x 1 0 1 0 0 port 0 online
459 * 0 0 x 1 1 1 0 0 both ports online
460 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
461 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
462 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
463 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
464 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
465 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
466 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
467 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
468 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
469 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
470 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
471 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
472 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
473 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
474 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
475 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
477 static struct etr_eacr etr_eacr
;
478 static u64 etr_tolec
; /* time of last eacr update */
479 static struct etr_aib etr_port0
;
480 static int etr_port0_uptodate
;
481 static struct etr_aib etr_port1
;
482 static int etr_port1_uptodate
;
483 static unsigned long etr_events
;
484 static struct timer_list etr_timer
;
486 static void etr_timeout(unsigned long dummy
);
487 static void etr_work_fn(struct work_struct
*work
);
488 static DEFINE_MUTEX(etr_work_mutex
);
489 static DECLARE_WORK(etr_work
, etr_work_fn
);
492 * Reset ETR attachment.
494 static void etr_reset(void)
496 etr_eacr
= (struct etr_eacr
) {
497 .e0
= 0, .e1
= 0, ._pad0
= 4, .dp
= 0,
498 .p0
= 0, .p1
= 0, ._pad1
= 0, .ea
= 0,
500 if (etr_setr(&etr_eacr
) == 0) {
501 etr_tolec
= get_clock();
502 set_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
);
503 if (etr_port0_online
&& etr_port1_online
)
504 set_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
505 } else if (etr_port0_online
|| etr_port1_online
) {
506 pr_warning("The real or virtual hardware system does "
507 "not provide an ETR interface\n");
508 etr_port0_online
= etr_port1_online
= 0;
512 static int __init
etr_init(void)
516 if (!test_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
))
519 /* Check if this machine has the steai instruction. */
520 if (etr_steai(&aib
, ETR_STEAI_STEPPING_PORT
) == 0)
521 etr_steai_available
= 1;
522 setup_timer(&etr_timer
, etr_timeout
, 0UL);
523 if (etr_port0_online
) {
524 set_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
);
525 queue_work(time_sync_wq
, &etr_work
);
527 if (etr_port1_online
) {
528 set_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
);
529 queue_work(time_sync_wq
, &etr_work
);
534 arch_initcall(etr_init
);
537 * Two sorts of ETR machine checks. The architecture reads:
538 * "When a machine-check niterruption occurs and if a switch-to-local or
539 * ETR-sync-check interrupt request is pending but disabled, this pending
540 * disabled interruption request is indicated and is cleared".
541 * Which means that we can get etr_switch_to_local events from the machine
542 * check handler although the interruption condition is disabled. Lovely..
546 * Switch to local machine check. This is called when the last usable
547 * ETR port goes inactive. After switch to local the clock is not in sync.
549 void etr_switch_to_local(void)
553 disable_sync_clock(NULL
);
554 set_bit(ETR_EVENT_SWITCH_LOCAL
, &etr_events
);
555 queue_work(time_sync_wq
, &etr_work
);
559 * ETR sync check machine check. This is called when the ETR OTE and the
560 * local clock OTE are farther apart than the ETR sync check tolerance.
561 * After a ETR sync check the clock is not in sync. The machine check
562 * is broadcasted to all cpus at the same time.
564 void etr_sync_check(void)
568 disable_sync_clock(NULL
);
569 set_bit(ETR_EVENT_SYNC_CHECK
, &etr_events
);
570 queue_work(time_sync_wq
, &etr_work
);
574 * ETR timing alert. There are two causes:
575 * 1) port state change, check the usability of the port
576 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
577 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
578 * or ETR-data word 4 (edf4) has changed.
580 static void etr_timing_alert(struct etr_irq_parm
*intparm
)
583 /* ETR port 0 state change. */
584 set_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
);
586 /* ETR port 1 state change. */
587 set_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
);
590 * ETR port alert on either port 0, 1 or both.
591 * Both ports are not up-to-date now.
593 set_bit(ETR_EVENT_PORT_ALERT
, &etr_events
);
594 queue_work(time_sync_wq
, &etr_work
);
597 static void etr_timeout(unsigned long dummy
)
599 set_bit(ETR_EVENT_UPDATE
, &etr_events
);
600 queue_work(time_sync_wq
, &etr_work
);
604 * Check if the etr mode is pss.
606 static inline int etr_mode_is_pps(struct etr_eacr eacr
)
608 return eacr
.es
&& !eacr
.sl
;
612 * Check if the etr mode is etr.
614 static inline int etr_mode_is_etr(struct etr_eacr eacr
)
616 return eacr
.es
&& eacr
.sl
;
620 * Check if the port can be used for TOD synchronization.
621 * For PPS mode the port has to receive OTEs. For ETR mode
622 * the port has to receive OTEs, the ETR stepping bit has to
623 * be zero and the validity bits for data frame 1, 2, and 3
626 static int etr_port_valid(struct etr_aib
*aib
, int port
)
630 /* Check that this port is receiving OTEs. */
634 psc
= port
? aib
->esw
.psc1
: aib
->esw
.psc0
;
635 if (psc
== etr_lpsc_pps_mode
)
637 if (psc
== etr_lpsc_operational_step
)
638 return !aib
->esw
.y
&& aib
->slsw
.v1
&&
639 aib
->slsw
.v2
&& aib
->slsw
.v3
;
644 * Check if two ports are on the same network.
646 static int etr_compare_network(struct etr_aib
*aib1
, struct etr_aib
*aib2
)
648 // FIXME: any other fields we have to compare?
649 return aib1
->edf1
.net_id
== aib2
->edf1
.net_id
;
653 * Wrapper for etr_stei that converts physical port states
654 * to logical port states to be consistent with the output
655 * of stetr (see etr_psc vs. etr_lpsc).
657 static void etr_steai_cv(struct etr_aib
*aib
, unsigned int func
)
659 BUG_ON(etr_steai(aib
, func
) != 0);
660 /* Convert port state to logical port state. */
661 if (aib
->esw
.psc0
== 1)
663 else if (aib
->esw
.psc0
== 0 && aib
->esw
.p
== 0)
665 if (aib
->esw
.psc1
== 1)
667 else if (aib
->esw
.psc1
== 0 && aib
->esw
.p
== 1)
672 * Check if the aib a2 is still connected to the same attachment as
673 * aib a1, the etv values differ by one and a2 is valid.
675 static int etr_aib_follows(struct etr_aib
*a1
, struct etr_aib
*a2
, int p
)
677 int state_a1
, state_a2
;
679 /* Paranoia check: e0/e1 should better be the same. */
680 if (a1
->esw
.eacr
.e0
!= a2
->esw
.eacr
.e0
||
681 a1
->esw
.eacr
.e1
!= a2
->esw
.eacr
.e1
)
684 /* Still connected to the same etr ? */
685 state_a1
= p
? a1
->esw
.psc1
: a1
->esw
.psc0
;
686 state_a2
= p
? a2
->esw
.psc1
: a2
->esw
.psc0
;
687 if (state_a1
== etr_lpsc_operational_step
) {
688 if (state_a2
!= etr_lpsc_operational_step
||
689 a1
->edf1
.net_id
!= a2
->edf1
.net_id
||
690 a1
->edf1
.etr_id
!= a2
->edf1
.etr_id
||
691 a1
->edf1
.etr_pn
!= a2
->edf1
.etr_pn
)
693 } else if (state_a2
!= etr_lpsc_pps_mode
)
696 /* The ETV value of a2 needs to be ETV of a1 + 1. */
697 if (a1
->edf2
.etv
+ 1 != a2
->edf2
.etv
)
700 if (!etr_port_valid(a2
, p
))
706 struct clock_sync_data
{
709 unsigned long long fixup_cc
;
711 struct etr_aib
*etr_aib
;
714 static void clock_sync_cpu(struct clock_sync_data
*sync
)
716 atomic_dec(&sync
->cpus
);
719 * This looks like a busy wait loop but it isn't. etr_sync_cpus
720 * is called on all other cpus while the TOD clocks is stopped.
721 * __udelay will stop the cpu on an enabled wait psw until the
722 * TOD is running again.
724 while (sync
->in_sync
== 0) {
727 * A different cpu changes *in_sync. Therefore use
728 * barrier() to force memory access.
732 if (sync
->in_sync
!= 1)
733 /* Didn't work. Clear per-cpu in sync bit again. */
734 disable_sync_clock(NULL
);
736 * This round of TOD syncing is done. Set the clock comparator
737 * to the next tick and let the processor continue.
739 fixup_clock_comparator(sync
->fixup_cc
);
743 * Sync the TOD clock using the port refered to by aibp. This port
744 * has to be enabled and the other port has to be disabled. The
745 * last eacr update has to be more than 1.6 seconds in the past.
747 static int etr_sync_clock(void *data
)
750 unsigned long long clock
, old_clock
, delay
, delta
;
751 struct clock_sync_data
*etr_sync
;
752 struct etr_aib
*sync_port
, *aib
;
758 if (xchg(&first
, 1) == 1) {
760 clock_sync_cpu(etr_sync
);
764 /* Wait until all other cpus entered the sync function. */
765 while (atomic_read(&etr_sync
->cpus
) != 0)
768 port
= etr_sync
->etr_port
;
769 aib
= etr_sync
->etr_aib
;
770 sync_port
= (port
== 0) ? &etr_port0
: &etr_port1
;
773 /* Set clock to next OTE. */
774 __ctl_set_bit(14, 21);
775 __ctl_set_bit(0, 29);
776 clock
= ((unsigned long long) (aib
->edf2
.etv
+ 1)) << 32;
777 old_clock
= get_clock();
778 if (set_clock(clock
) == 0) {
779 __udelay(1); /* Wait for the clock to start. */
780 __ctl_clear_bit(0, 29);
781 __ctl_clear_bit(14, 21);
783 /* Adjust Linux timing variables. */
784 delay
= (unsigned long long)
785 (aib
->edf2
.etv
- sync_port
->edf2
.etv
) << 32;
786 delta
= adjust_time(old_clock
, clock
, delay
);
787 etr_sync
->fixup_cc
= delta
;
788 fixup_clock_comparator(delta
);
789 /* Verify that the clock is properly set. */
790 if (!etr_aib_follows(sync_port
, aib
, port
)) {
792 disable_sync_clock(NULL
);
793 etr_sync
->in_sync
= -EAGAIN
;
796 etr_sync
->in_sync
= 1;
800 /* Could not set the clock ?!? */
801 __ctl_clear_bit(0, 29);
802 __ctl_clear_bit(14, 21);
803 disable_sync_clock(NULL
);
804 etr_sync
->in_sync
= -EAGAIN
;
811 static int etr_sync_clock_stop(struct etr_aib
*aib
, int port
)
813 struct clock_sync_data etr_sync
;
814 struct etr_aib
*sync_port
;
818 /* Check if the current aib is adjacent to the sync port aib. */
819 sync_port
= (port
== 0) ? &etr_port0
: &etr_port1
;
820 follows
= etr_aib_follows(sync_port
, aib
, port
);
821 memcpy(sync_port
, aib
, sizeof(*aib
));
824 memset(&etr_sync
, 0, sizeof(etr_sync
));
825 etr_sync
.etr_aib
= aib
;
826 etr_sync
.etr_port
= port
;
828 atomic_set(&etr_sync
.cpus
, num_online_cpus() - 1);
829 rc
= stop_machine(etr_sync_clock
, &etr_sync
, &cpu_online_map
);
835 * Handle the immediate effects of the different events.
836 * The port change event is used for online/offline changes.
838 static struct etr_eacr
etr_handle_events(struct etr_eacr eacr
)
840 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK
, &etr_events
))
842 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL
, &etr_events
))
843 eacr
.es
= eacr
.sl
= 0;
844 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT
, &etr_events
))
845 etr_port0_uptodate
= etr_port1_uptodate
= 0;
847 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
)) {
850 * Port change of an enabled port. We have to
851 * assume that this can have caused an stepping
854 etr_tolec
= get_clock();
855 eacr
.p0
= etr_port0_online
;
858 etr_port0_uptodate
= 0;
860 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
)) {
863 * Port change of an enabled port. We have to
864 * assume that this can have caused an stepping
867 etr_tolec
= get_clock();
868 eacr
.p1
= etr_port1_online
;
871 etr_port1_uptodate
= 0;
873 clear_bit(ETR_EVENT_UPDATE
, &etr_events
);
878 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
879 * one of the ports needs an update.
881 static void etr_set_tolec_timeout(unsigned long long now
)
883 unsigned long micros
;
885 if ((!etr_eacr
.p0
|| etr_port0_uptodate
) &&
886 (!etr_eacr
.p1
|| etr_port1_uptodate
))
888 micros
= (now
> etr_tolec
) ? ((now
- etr_tolec
) >> 12) : 0;
889 micros
= (micros
> 1600000) ? 0 : 1600000 - micros
;
890 mod_timer(&etr_timer
, jiffies
+ (micros
* HZ
) / 1000000 + 1);
894 * Set up a time that expires after 1/2 second.
896 static void etr_set_sync_timeout(void)
898 mod_timer(&etr_timer
, jiffies
+ HZ
/2);
902 * Update the aib information for one or both ports.
904 static struct etr_eacr
etr_handle_update(struct etr_aib
*aib
,
905 struct etr_eacr eacr
)
907 /* With both ports disabled the aib information is useless. */
908 if (!eacr
.e0
&& !eacr
.e1
)
911 /* Update port0 or port1 with aib stored in etr_work_fn. */
912 if (aib
->esw
.q
== 0) {
913 /* Information for port 0 stored. */
914 if (eacr
.p0
&& !etr_port0_uptodate
) {
916 if (etr_port0_online
)
917 etr_port0_uptodate
= 1;
920 /* Information for port 1 stored. */
921 if (eacr
.p1
&& !etr_port1_uptodate
) {
923 if (etr_port0_online
)
924 etr_port1_uptodate
= 1;
929 * Do not try to get the alternate port aib if the clock
930 * is not in sync yet.
932 if (!check_sync_clock())
936 * If steai is available we can get the information about
937 * the other port immediately. If only stetr is available the
938 * data-port bit toggle has to be used.
940 if (etr_steai_available
) {
941 if (eacr
.p0
&& !etr_port0_uptodate
) {
942 etr_steai_cv(&etr_port0
, ETR_STEAI_PORT_0
);
943 etr_port0_uptodate
= 1;
945 if (eacr
.p1
&& !etr_port1_uptodate
) {
946 etr_steai_cv(&etr_port1
, ETR_STEAI_PORT_1
);
947 etr_port1_uptodate
= 1;
951 * One port was updated above, if the other
952 * port is not uptodate toggle dp bit.
954 if ((eacr
.p0
&& !etr_port0_uptodate
) ||
955 (eacr
.p1
&& !etr_port1_uptodate
))
964 * Write new etr control register if it differs from the current one.
965 * Return 1 if etr_tolec has been updated as well.
967 static void etr_update_eacr(struct etr_eacr eacr
)
971 if (memcmp(&etr_eacr
, &eacr
, sizeof(eacr
)) == 0)
972 /* No change, return. */
975 * The disable of an active port of the change of the data port
976 * bit can/will cause a change in the data port.
978 dp_changed
= etr_eacr
.e0
> eacr
.e0
|| etr_eacr
.e1
> eacr
.e1
||
979 (etr_eacr
.dp
^ eacr
.dp
) != 0;
983 etr_tolec
= get_clock();
987 * ETR work. In this function you'll find the main logic. In
988 * particular this is the only function that calls etr_update_eacr(),
989 * it "controls" the etr control register.
991 static void etr_work_fn(struct work_struct
*work
)
993 unsigned long long now
;
994 struct etr_eacr eacr
;
998 /* prevent multiple execution. */
999 mutex_lock(&etr_work_mutex
);
1001 /* Create working copy of etr_eacr. */
1004 /* Check for the different events and their immediate effects. */
1005 eacr
= etr_handle_events(eacr
);
1007 /* Check if ETR is supposed to be active. */
1008 eacr
.ea
= eacr
.p0
|| eacr
.p1
;
1010 /* Both ports offline. Reset everything. */
1011 eacr
.dp
= eacr
.es
= eacr
.sl
= 0;
1012 on_each_cpu(disable_sync_clock
, NULL
, 1);
1013 del_timer_sync(&etr_timer
);
1014 etr_update_eacr(eacr
);
1018 /* Store aib to get the current ETR status word. */
1019 BUG_ON(etr_stetr(&aib
) != 0);
1020 etr_port0
.esw
= etr_port1
.esw
= aib
.esw
; /* Copy status word. */
1024 * Update the port information if the last stepping port change
1025 * or data port change is older than 1.6 seconds.
1027 if (now
>= etr_tolec
+ (1600000 << 12))
1028 eacr
= etr_handle_update(&aib
, eacr
);
1031 * Select ports to enable. The prefered synchronization mode is PPS.
1032 * If a port can be enabled depends on a number of things:
1033 * 1) The port needs to be online and uptodate. A port is not
1034 * disabled just because it is not uptodate, but it is only
1035 * enabled if it is uptodate.
1036 * 2) The port needs to have the same mode (pps / etr).
1037 * 3) The port needs to be usable -> etr_port_valid() == 1
1038 * 4) To enable the second port the clock needs to be in sync.
1039 * 5) If both ports are useable and are ETR ports, the network id
1040 * has to be the same.
1041 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1043 if (eacr
.p0
&& aib
.esw
.psc0
== etr_lpsc_pps_mode
) {
1046 if (!etr_mode_is_pps(etr_eacr
))
1048 if (!eacr
.es
|| !eacr
.p1
|| aib
.esw
.psc1
!= etr_lpsc_pps_mode
)
1050 // FIXME: uptodate checks ?
1051 else if (etr_port0_uptodate
&& etr_port1_uptodate
)
1053 sync_port
= (etr_port0_uptodate
&&
1054 etr_port_valid(&etr_port0
, 0)) ? 0 : -1;
1055 } else if (eacr
.p1
&& aib
.esw
.psc1
== etr_lpsc_pps_mode
) {
1059 if (!etr_mode_is_pps(etr_eacr
))
1061 sync_port
= (etr_port1_uptodate
&&
1062 etr_port_valid(&etr_port1
, 1)) ? 1 : -1;
1063 } else if (eacr
.p0
&& aib
.esw
.psc0
== etr_lpsc_operational_step
) {
1066 if (!etr_mode_is_etr(etr_eacr
))
1068 if (!eacr
.es
|| !eacr
.p1
||
1069 aib
.esw
.psc1
!= etr_lpsc_operational_alt
)
1071 else if (etr_port0_uptodate
&& etr_port1_uptodate
&&
1072 etr_compare_network(&etr_port0
, &etr_port1
))
1074 sync_port
= (etr_port0_uptodate
&&
1075 etr_port_valid(&etr_port0
, 0)) ? 0 : -1;
1076 } else if (eacr
.p1
&& aib
.esw
.psc1
== etr_lpsc_operational_step
) {
1080 if (!etr_mode_is_etr(etr_eacr
))
1082 sync_port
= (etr_port1_uptodate
&&
1083 etr_port_valid(&etr_port1
, 1)) ? 1 : -1;
1085 /* Both ports not usable. */
1086 eacr
.es
= eacr
.sl
= 0;
1091 * If the clock is in sync just update the eacr and return.
1092 * If there is no valid sync port wait for a port update.
1094 if (check_sync_clock() || sync_port
< 0) {
1095 etr_update_eacr(eacr
);
1096 etr_set_tolec_timeout(now
);
1101 * Prepare control register for clock syncing
1102 * (reset data port bit, set sync check control.
1108 * Update eacr and try to synchronize the clock. If the update
1109 * of eacr caused a stepping port switch (or if we have to
1110 * assume that a stepping port switch has occured) or the
1111 * clock syncing failed, reset the sync check control bit
1112 * and set up a timer to try again after 0.5 seconds
1114 etr_update_eacr(eacr
);
1115 if (now
< etr_tolec
+ (1600000 << 12) ||
1116 etr_sync_clock_stop(&aib
, sync_port
) != 0) {
1117 /* Sync failed. Try again in 1/2 second. */
1119 etr_update_eacr(eacr
);
1120 etr_set_sync_timeout();
1122 etr_set_tolec_timeout(now
);
1124 mutex_unlock(&etr_work_mutex
);
1128 * Sysfs interface functions
1130 static struct sysdev_class etr_sysclass
= {
1134 static struct sys_device etr_port0_dev
= {
1136 .cls
= &etr_sysclass
,
1139 static struct sys_device etr_port1_dev
= {
1141 .cls
= &etr_sysclass
,
1145 * ETR class attributes
1147 static ssize_t
etr_stepping_port_show(struct sysdev_class
*class, char *buf
)
1149 return sprintf(buf
, "%i\n", etr_port0
.esw
.p
);
1152 static SYSDEV_CLASS_ATTR(stepping_port
, 0400, etr_stepping_port_show
, NULL
);
1154 static ssize_t
etr_stepping_mode_show(struct sysdev_class
*class, char *buf
)
1158 if (etr_mode_is_pps(etr_eacr
))
1160 else if (etr_mode_is_etr(etr_eacr
))
1164 return sprintf(buf
, "%s\n", mode_str
);
1167 static SYSDEV_CLASS_ATTR(stepping_mode
, 0400, etr_stepping_mode_show
, NULL
);
1170 * ETR port attributes
1172 static inline struct etr_aib
*etr_aib_from_dev(struct sys_device
*dev
)
1174 if (dev
== &etr_port0_dev
)
1175 return etr_port0_online
? &etr_port0
: NULL
;
1177 return etr_port1_online
? &etr_port1
: NULL
;
1180 static ssize_t
etr_online_show(struct sys_device
*dev
,
1181 struct sysdev_attribute
*attr
,
1184 unsigned int online
;
1186 online
= (dev
== &etr_port0_dev
) ? etr_port0_online
: etr_port1_online
;
1187 return sprintf(buf
, "%i\n", online
);
1190 static ssize_t
etr_online_store(struct sys_device
*dev
,
1191 struct sysdev_attribute
*attr
,
1192 const char *buf
, size_t count
)
1196 value
= simple_strtoul(buf
, NULL
, 0);
1197 if (value
!= 0 && value
!= 1)
1199 if (!test_bit(CLOCK_SYNC_HAS_ETR
, &clock_sync_flags
))
1201 mutex_lock(&clock_sync_mutex
);
1202 if (dev
== &etr_port0_dev
) {
1203 if (etr_port0_online
== value
)
1204 goto out
; /* Nothing to do. */
1205 etr_port0_online
= value
;
1206 if (etr_port0_online
&& etr_port1_online
)
1207 set_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1209 clear_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1210 set_bit(ETR_EVENT_PORT0_CHANGE
, &etr_events
);
1211 queue_work(time_sync_wq
, &etr_work
);
1213 if (etr_port1_online
== value
)
1214 goto out
; /* Nothing to do. */
1215 etr_port1_online
= value
;
1216 if (etr_port0_online
&& etr_port1_online
)
1217 set_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1219 clear_bit(CLOCK_SYNC_ETR
, &clock_sync_flags
);
1220 set_bit(ETR_EVENT_PORT1_CHANGE
, &etr_events
);
1221 queue_work(time_sync_wq
, &etr_work
);
1224 mutex_unlock(&clock_sync_mutex
);
1228 static SYSDEV_ATTR(online
, 0600, etr_online_show
, etr_online_store
);
1230 static ssize_t
etr_stepping_control_show(struct sys_device
*dev
,
1231 struct sysdev_attribute
*attr
,
1234 return sprintf(buf
, "%i\n", (dev
== &etr_port0_dev
) ?
1235 etr_eacr
.e0
: etr_eacr
.e1
);
1238 static SYSDEV_ATTR(stepping_control
, 0400, etr_stepping_control_show
, NULL
);
1240 static ssize_t
etr_mode_code_show(struct sys_device
*dev
,
1241 struct sysdev_attribute
*attr
, char *buf
)
1243 if (!etr_port0_online
&& !etr_port1_online
)
1244 /* Status word is not uptodate if both ports are offline. */
1246 return sprintf(buf
, "%i\n", (dev
== &etr_port0_dev
) ?
1247 etr_port0
.esw
.psc0
: etr_port0
.esw
.psc1
);
1250 static SYSDEV_ATTR(state_code
, 0400, etr_mode_code_show
, NULL
);
1252 static ssize_t
etr_untuned_show(struct sys_device
*dev
,
1253 struct sysdev_attribute
*attr
, char *buf
)
1255 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1257 if (!aib
|| !aib
->slsw
.v1
)
1259 return sprintf(buf
, "%i\n", aib
->edf1
.u
);
1262 static SYSDEV_ATTR(untuned
, 0400, etr_untuned_show
, NULL
);
1264 static ssize_t
etr_network_id_show(struct sys_device
*dev
,
1265 struct sysdev_attribute
*attr
, char *buf
)
1267 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1269 if (!aib
|| !aib
->slsw
.v1
)
1271 return sprintf(buf
, "%i\n", aib
->edf1
.net_id
);
1274 static SYSDEV_ATTR(network
, 0400, etr_network_id_show
, NULL
);
1276 static ssize_t
etr_id_show(struct sys_device
*dev
,
1277 struct sysdev_attribute
*attr
, char *buf
)
1279 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1281 if (!aib
|| !aib
->slsw
.v1
)
1283 return sprintf(buf
, "%i\n", aib
->edf1
.etr_id
);
1286 static SYSDEV_ATTR(id
, 0400, etr_id_show
, NULL
);
1288 static ssize_t
etr_port_number_show(struct sys_device
*dev
,
1289 struct sysdev_attribute
*attr
, char *buf
)
1291 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1293 if (!aib
|| !aib
->slsw
.v1
)
1295 return sprintf(buf
, "%i\n", aib
->edf1
.etr_pn
);
1298 static SYSDEV_ATTR(port
, 0400, etr_port_number_show
, NULL
);
1300 static ssize_t
etr_coupled_show(struct sys_device
*dev
,
1301 struct sysdev_attribute
*attr
, char *buf
)
1303 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1305 if (!aib
|| !aib
->slsw
.v3
)
1307 return sprintf(buf
, "%i\n", aib
->edf3
.c
);
1310 static SYSDEV_ATTR(coupled
, 0400, etr_coupled_show
, NULL
);
1312 static ssize_t
etr_local_time_show(struct sys_device
*dev
,
1313 struct sysdev_attribute
*attr
, char *buf
)
1315 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1317 if (!aib
|| !aib
->slsw
.v3
)
1319 return sprintf(buf
, "%i\n", aib
->edf3
.blto
);
1322 static SYSDEV_ATTR(local_time
, 0400, etr_local_time_show
, NULL
);
1324 static ssize_t
etr_utc_offset_show(struct sys_device
*dev
,
1325 struct sysdev_attribute
*attr
, char *buf
)
1327 struct etr_aib
*aib
= etr_aib_from_dev(dev
);
1329 if (!aib
|| !aib
->slsw
.v3
)
1331 return sprintf(buf
, "%i\n", aib
->edf3
.buo
);
1334 static SYSDEV_ATTR(utc_offset
, 0400, etr_utc_offset_show
, NULL
);
1336 static struct sysdev_attribute
*etr_port_attributes
[] = {
1338 &attr_stepping_control
,
1350 static int __init
etr_register_port(struct sys_device
*dev
)
1352 struct sysdev_attribute
**attr
;
1355 rc
= sysdev_register(dev
);
1358 for (attr
= etr_port_attributes
; *attr
; attr
++) {
1359 rc
= sysdev_create_file(dev
, *attr
);
1365 for (; attr
>= etr_port_attributes
; attr
--)
1366 sysdev_remove_file(dev
, *attr
);
1367 sysdev_unregister(dev
);
1372 static void __init
etr_unregister_port(struct sys_device
*dev
)
1374 struct sysdev_attribute
**attr
;
1376 for (attr
= etr_port_attributes
; *attr
; attr
++)
1377 sysdev_remove_file(dev
, *attr
);
1378 sysdev_unregister(dev
);
1381 static int __init
etr_init_sysfs(void)
1385 rc
= sysdev_class_register(&etr_sysclass
);
1388 rc
= sysdev_class_create_file(&etr_sysclass
, &attr_stepping_port
);
1390 goto out_unreg_class
;
1391 rc
= sysdev_class_create_file(&etr_sysclass
, &attr_stepping_mode
);
1393 goto out_remove_stepping_port
;
1394 rc
= etr_register_port(&etr_port0_dev
);
1396 goto out_remove_stepping_mode
;
1397 rc
= etr_register_port(&etr_port1_dev
);
1399 goto out_remove_port0
;
1403 etr_unregister_port(&etr_port0_dev
);
1404 out_remove_stepping_mode
:
1405 sysdev_class_remove_file(&etr_sysclass
, &attr_stepping_mode
);
1406 out_remove_stepping_port
:
1407 sysdev_class_remove_file(&etr_sysclass
, &attr_stepping_port
);
1409 sysdev_class_unregister(&etr_sysclass
);
1414 device_initcall(etr_init_sysfs
);
1417 * Server Time Protocol (STP) code.
1419 static int stp_online
;
1420 static struct stp_sstpi stp_info
;
1421 static void *stp_page
;
1423 static void stp_work_fn(struct work_struct
*work
);
1424 static DEFINE_MUTEX(stp_work_mutex
);
1425 static DECLARE_WORK(stp_work
, stp_work_fn
);
1427 static int __init
early_parse_stp(char *p
)
1429 if (strncmp(p
, "off", 3) == 0)
1431 else if (strncmp(p
, "on", 2) == 0)
1435 early_param("stp", early_parse_stp
);
1438 * Reset STP attachment.
1440 static void __init
stp_reset(void)
1444 stp_page
= alloc_bootmem_pages(PAGE_SIZE
);
1445 rc
= chsc_sstpc(stp_page
, STP_OP_CTRL
, 0x0000);
1447 set_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
);
1448 else if (stp_online
) {
1449 pr_warning("The real or virtual hardware system does "
1450 "not provide an STP interface\n");
1451 free_bootmem((unsigned long) stp_page
, PAGE_SIZE
);
1457 static int __init
stp_init(void)
1459 if (!test_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
))
1464 queue_work(time_sync_wq
, &stp_work
);
1468 arch_initcall(stp_init
);
1471 * STP timing alert. There are three causes:
1472 * 1) timing status change
1473 * 2) link availability change
1474 * 3) time control parameter change
1475 * In all three cases we are only interested in the clock source state.
1476 * If a STP clock source is now available use it.
1478 static void stp_timing_alert(struct stp_irq_parm
*intparm
)
1480 if (intparm
->tsc
|| intparm
->lac
|| intparm
->tcpc
)
1481 queue_work(time_sync_wq
, &stp_work
);
1485 * STP sync check machine check. This is called when the timing state
1486 * changes from the synchronized state to the unsynchronized state.
1487 * After a STP sync check the clock is not in sync. The machine check
1488 * is broadcasted to all cpus at the same time.
1490 void stp_sync_check(void)
1492 disable_sync_clock(NULL
);
1493 queue_work(time_sync_wq
, &stp_work
);
1497 * STP island condition machine check. This is called when an attached
1498 * server attempts to communicate over an STP link and the servers
1499 * have matching CTN ids and have a valid stratum-1 configuration
1500 * but the configurations do not match.
1502 void stp_island_check(void)
1504 disable_sync_clock(NULL
);
1505 queue_work(time_sync_wq
, &stp_work
);
1509 static int stp_sync_clock(void *data
)
1512 unsigned long long old_clock
, delta
;
1513 struct clock_sync_data
*stp_sync
;
1518 if (xchg(&first
, 1) == 1) {
1520 clock_sync_cpu(stp_sync
);
1524 /* Wait until all other cpus entered the sync function. */
1525 while (atomic_read(&stp_sync
->cpus
) != 0)
1528 enable_sync_clock();
1531 if (stp_info
.todoff
[0] || stp_info
.todoff
[1] ||
1532 stp_info
.todoff
[2] || stp_info
.todoff
[3] ||
1533 stp_info
.tmd
!= 2) {
1534 old_clock
= get_clock();
1535 rc
= chsc_sstpc(stp_page
, STP_OP_SYNC
, 0);
1537 delta
= adjust_time(old_clock
, get_clock(), 0);
1538 fixup_clock_comparator(delta
);
1539 rc
= chsc_sstpi(stp_page
, &stp_info
,
1540 sizeof(struct stp_sstpi
));
1541 if (rc
== 0 && stp_info
.tmd
!= 2)
1546 disable_sync_clock(NULL
);
1547 stp_sync
->in_sync
= -EAGAIN
;
1549 stp_sync
->in_sync
= 1;
1555 * STP work. Check for the STP state and take over the clock
1556 * synchronization if the STP clock source is usable.
1558 static void stp_work_fn(struct work_struct
*work
)
1560 struct clock_sync_data stp_sync
;
1563 /* prevent multiple execution. */
1564 mutex_lock(&stp_work_mutex
);
1567 chsc_sstpc(stp_page
, STP_OP_CTRL
, 0x0000);
1571 rc
= chsc_sstpc(stp_page
, STP_OP_CTRL
, 0xb0e0);
1575 rc
= chsc_sstpi(stp_page
, &stp_info
, sizeof(struct stp_sstpi
));
1576 if (rc
|| stp_info
.c
== 0)
1579 /* Skip synchronization if the clock is already in sync. */
1580 if (check_sync_clock())
1583 memset(&stp_sync
, 0, sizeof(stp_sync
));
1585 atomic_set(&stp_sync
.cpus
, num_online_cpus() - 1);
1586 stop_machine(stp_sync_clock
, &stp_sync
, &cpu_online_map
);
1590 mutex_unlock(&stp_work_mutex
);
1594 * STP class sysfs interface functions
1596 static struct sysdev_class stp_sysclass
= {
1600 static ssize_t
stp_ctn_id_show(struct sysdev_class
*class, char *buf
)
1604 return sprintf(buf
, "%016llx\n",
1605 *(unsigned long long *) stp_info
.ctnid
);
1608 static SYSDEV_CLASS_ATTR(ctn_id
, 0400, stp_ctn_id_show
, NULL
);
1610 static ssize_t
stp_ctn_type_show(struct sysdev_class
*class, char *buf
)
1614 return sprintf(buf
, "%i\n", stp_info
.ctn
);
1617 static SYSDEV_CLASS_ATTR(ctn_type
, 0400, stp_ctn_type_show
, NULL
);
1619 static ssize_t
stp_dst_offset_show(struct sysdev_class
*class, char *buf
)
1621 if (!stp_online
|| !(stp_info
.vbits
& 0x2000))
1623 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.dsto
);
1626 static SYSDEV_CLASS_ATTR(dst_offset
, 0400, stp_dst_offset_show
, NULL
);
1628 static ssize_t
stp_leap_seconds_show(struct sysdev_class
*class, char *buf
)
1630 if (!stp_online
|| !(stp_info
.vbits
& 0x8000))
1632 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.leaps
);
1635 static SYSDEV_CLASS_ATTR(leap_seconds
, 0400, stp_leap_seconds_show
, NULL
);
1637 static ssize_t
stp_stratum_show(struct sysdev_class
*class, char *buf
)
1641 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.stratum
);
1644 static SYSDEV_CLASS_ATTR(stratum
, 0400, stp_stratum_show
, NULL
);
1646 static ssize_t
stp_time_offset_show(struct sysdev_class
*class, char *buf
)
1648 if (!stp_online
|| !(stp_info
.vbits
& 0x0800))
1650 return sprintf(buf
, "%i\n", (int) stp_info
.tto
);
1653 static SYSDEV_CLASS_ATTR(time_offset
, 0400, stp_time_offset_show
, NULL
);
1655 static ssize_t
stp_time_zone_offset_show(struct sysdev_class
*class, char *buf
)
1657 if (!stp_online
|| !(stp_info
.vbits
& 0x4000))
1659 return sprintf(buf
, "%i\n", (int)(s16
) stp_info
.tzo
);
1662 static SYSDEV_CLASS_ATTR(time_zone_offset
, 0400,
1663 stp_time_zone_offset_show
, NULL
);
1665 static ssize_t
stp_timing_mode_show(struct sysdev_class
*class, char *buf
)
1669 return sprintf(buf
, "%i\n", stp_info
.tmd
);
1672 static SYSDEV_CLASS_ATTR(timing_mode
, 0400, stp_timing_mode_show
, NULL
);
1674 static ssize_t
stp_timing_state_show(struct sysdev_class
*class, char *buf
)
1678 return sprintf(buf
, "%i\n", stp_info
.tst
);
1681 static SYSDEV_CLASS_ATTR(timing_state
, 0400, stp_timing_state_show
, NULL
);
1683 static ssize_t
stp_online_show(struct sysdev_class
*class, char *buf
)
1685 return sprintf(buf
, "%i\n", stp_online
);
1688 static ssize_t
stp_online_store(struct sysdev_class
*class,
1689 const char *buf
, size_t count
)
1693 value
= simple_strtoul(buf
, NULL
, 0);
1694 if (value
!= 0 && value
!= 1)
1696 if (!test_bit(CLOCK_SYNC_HAS_STP
, &clock_sync_flags
))
1698 mutex_lock(&clock_sync_mutex
);
1701 set_bit(CLOCK_SYNC_STP
, &clock_sync_flags
);
1703 clear_bit(CLOCK_SYNC_STP
, &clock_sync_flags
);
1704 queue_work(time_sync_wq
, &stp_work
);
1705 mutex_unlock(&clock_sync_mutex
);
1710 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1711 * stp/online but attr_online already exists in this file ..
1713 static struct sysdev_class_attribute attr_stp_online
= {
1714 .attr
= { .name
= "online", .mode
= 0600 },
1715 .show
= stp_online_show
,
1716 .store
= stp_online_store
,
1719 static struct sysdev_class_attribute
*stp_attributes
[] = {
1727 &attr_time_zone_offset
,
1733 static int __init
stp_init_sysfs(void)
1735 struct sysdev_class_attribute
**attr
;
1738 rc
= sysdev_class_register(&stp_sysclass
);
1741 for (attr
= stp_attributes
; *attr
; attr
++) {
1742 rc
= sysdev_class_create_file(&stp_sysclass
, *attr
);
1748 for (; attr
>= stp_attributes
; attr
--)
1749 sysdev_class_remove_file(&stp_sysclass
, *attr
);
1750 sysdev_class_unregister(&stp_sysclass
);
1755 device_initcall(stp_init_sysfs
);