drivers/i2c/busses/i2c-pnx.c

   1 /*
   2  * Provides I2C support for Philips PNX010x/PNX4008 boards.
   3  *
   4  * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
   5  *          Vitaly Wool <vwool@ru.mvista.com>
   6  *
   7  * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
   8  * the terms of the GNU General Public License version 2. This program
   9  * is licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ioport.h>
  16 #include <linux/delay.h>
  17 #include <linux/i2c.h>
  18 #include <linux/timer.h>
  19 #include <linux/completion.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/i2c-pnx.h>
  22 #include <linux/io.h>
  23 #include <linux/err.h>
  24 #include <linux/clk.h>
  25
  26 #include <mach/hardware.h>
  27 #include <mach/i2c.h>
  28 #include <asm/irq.h>
  29 #include <asm/uaccess.h>
  30
  31 #define I2C_PNX_TIMEOUT         10 /* msec */
  32 #define I2C_PNX_SPEED_KHZ       100
  33 #define I2C_PNX_REGION_SIZE     0x100
  34
  35 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
  36 {
  37         while (timeout > 0 &&
  38                         (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
  39                 mdelay(1);
  40                 timeout--;
  41         }
  42         return (timeout <= 0);
  43 }
  44
  45 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
  46 {
  47         while (timeout > 0 &&
  48                         (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
  49                 mdelay(1);
  50                 timeout--;
  51         }
  52         return (timeout <= 0);
  53 }
  54
  55 static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
  56 {
  57         struct timer_list *timer = &alg_data->mif.timer;
  58         int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
  59
  60         if (expires <= 1)
  61                 expires = 2;
  62
  63         del_timer_sync(timer);
  64
  65         dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %u jiffies.\n",
  66                 jiffies, expires);
  67
  68         timer->expires = jiffies + expires;
  69         timer->data = (unsigned long)&alg_data;
  70
  71         add_timer(timer);
  72 }
  73
  74 /**
  75  * i2c_pnx_start - start a device
  76  * @slave_addr:         slave address
  77  * @adap:               pointer to adapter structure
  78  *
  79  * Generate a START signal in the desired mode.
  80  */
  81 static int i2c_pnx_start(unsigned char slave_addr,
  82         struct i2c_pnx_algo_data *alg_data)
  83 {
  84         dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
  85                 slave_addr, alg_data->mif.mode);
  86
  87         /* Check for 7 bit slave addresses only */
  88         if (slave_addr & ~0x7f) {
  89                 dev_err(&alg_data->adapter.dev, "%s: Invalid slave address %x. "
  90                        "Only 7-bit addresses are supported\n",
  91                        alg_data->adapter.name, slave_addr);
  92                 return -EINVAL;
  93         }
  94
  95         /* First, make sure bus is idle */
  96         if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
  97                 /* Somebody else is monopolizing the bus */
  98                 dev_err(&alg_data->adapter.dev, "%s: Bus busy. Slave addr = %02x, "
  99                        "cntrl = %x, stat = %x\n",
 100                        alg_data->adapter.name, slave_addr,
 101                        ioread32(I2C_REG_CTL(alg_data)),
 102                        ioread32(I2C_REG_STS(alg_data)));
 103                 return -EBUSY;
 104         } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
 105                 /* Sorry, we lost the bus */
 106                 dev_err(&alg_data->adapter.dev, "%s: Arbitration failure. "
 107                        "Slave addr = %02x\n", alg_data->adapter.name, slave_addr);
 108                 return -EIO;
 109         }
 110
 111         /*
 112          * OK, I2C is enabled and we have the bus.
 113          * Clear the current TDI and AFI status flags.
 114          */
 115         iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
 116                   I2C_REG_STS(alg_data));
 117
 118         dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
 119                 (slave_addr << 1) | start_bit | alg_data->mif.mode);
 120
 121         /* Write the slave address, START bit and R/W bit */
 122         iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
 123                   I2C_REG_TX(alg_data));
 124
 125         dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
 126
 127         return 0;
 128 }
 129
 130 /**
 131  * i2c_pnx_stop - stop a device
 132  * @adap:               pointer to I2C adapter structure
 133  *
 134  * Generate a STOP signal to terminate the master transaction.
 135  */
 136 static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
 137 {
 138         /* Only 1 msec max timeout due to interrupt context */
 139         long timeout = 1000;
 140
 141         dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
 142                 __func__, ioread32(I2C_REG_STS(alg_data)));
 143
 144         /* Write a STOP bit to TX FIFO */
 145         iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
 146
 147         /* Wait until the STOP is seen. */
 148         while (timeout > 0 &&
 149                (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
 150                 /* may be called from interrupt context */
 151                 udelay(1);
 152                 timeout--;
 153         }
 154
 155         dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
 156                 __func__, ioread32(I2C_REG_STS(alg_data)));
 157 }
 158
 159 /**
 160  * i2c_pnx_master_xmit - transmit data to slave
 161  * @adap:               pointer to I2C adapter structure
 162  *
 163  * Sends one byte of data to the slave
 164  */
 165 static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
 166 {
 167         u32 val;
 168
 169         dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
 170                 __func__, ioread32(I2C_REG_STS(alg_data)));
 171
 172         if (alg_data->mif.len > 0) {
 173                 /* We still have something to talk about... */
 174                 val = *alg_data->mif.buf++;
 175
 176                 if (alg_data->mif.len == 1) {
 177                         val |= stop_bit;
 178                         if (!alg_data->last)
 179                                 val |= start_bit;
 180                 }
 181
 182                 alg_data->mif.len--;
 183                 iowrite32(val, I2C_REG_TX(alg_data));
 184
 185                 dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n", __func__,
 186                         val, alg_data->mif.len + 1);
 187
 188                 if (alg_data->mif.len == 0) {
 189                         if (alg_data->last) {
 190                                 /* Wait until the STOP is seen. */
 191                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 192                                         dev_err(&alg_data->adapter.dev, "The bus is still "
 193                                                 "active after timeout\n");
 194                         }
 195                         /* Disable master interrupts */
 196                         iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 197                                 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 198                                   I2C_REG_CTL(alg_data));
 199
 200                         del_timer_sync(&alg_data->mif.timer);
 201
 202                         dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine.\n",
 203                                 __func__);
 204
 205                         complete(&alg_data->mif.complete);
 206                 }
 207         } else if (alg_data->mif.len == 0) {
 208                 /* zero-sized transfer */
 209                 i2c_pnx_stop(alg_data);
 210
 211                 /* Disable master interrupts. */
 212                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 213                         ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 214                           I2C_REG_CTL(alg_data));
 215
 216                 /* Stop timer. */
 217                 del_timer_sync(&alg_data->mif.timer);
 218                 dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine after "
 219                         "zero-xfer.\n", __func__);
 220
 221                 complete(&alg_data->mif.complete);
 222         }
 223
 224         dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
 225                 __func__, ioread32(I2C_REG_STS(alg_data)));
 226
 227         return 0;
 228 }
 229
 230 /**
 231  * i2c_pnx_master_rcv - receive data from slave
 232  * @adap:               pointer to I2C adapter structure
 233  *
 234  * Reads one byte data from the slave
 235  */
 236 static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
 237 {
 238         unsigned int val = 0;
 239         u32 ctl = 0;
 240
 241         dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
 242                 __func__, ioread32(I2C_REG_STS(alg_data)));
 243
 244         /* Check, whether there is already data,
 245          * or we didn't 'ask' for it yet.
 246          */
 247         if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
 248                 dev_dbg(&alg_data->adapter.dev, "%s(): Write dummy data to fill "
 249                         "Rx-fifo...\n", __func__);
 250
 251                 if (alg_data->mif.len == 1) {
 252                         /* Last byte, do not acknowledge next rcv. */
 253                         val |= stop_bit;
 254                         if (!alg_data->last)
 255                                 val |= start_bit;
 256
 257                         /*
 258                          * Enable interrupt RFDAIE (data in Rx fifo),
 259                          * and disable DRMIE (need data for Tx)
 260                          */
 261                         ctl = ioread32(I2C_REG_CTL(alg_data));
 262                         ctl |= mcntrl_rffie | mcntrl_daie;
 263                         ctl &= ~mcntrl_drmie;
 264                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 265                 }
 266
 267                 /*
 268                  * Now we'll 'ask' for data:
 269                  * For each byte we want to receive, we must
 270                  * write a (dummy) byte to the Tx-FIFO.
 271                  */
 272                 iowrite32(val, I2C_REG_TX(alg_data));
 273
 274                 return 0;
 275         }
 276
 277         /* Handle data. */
 278         if (alg_data->mif.len > 0) {
 279                 val = ioread32(I2C_REG_RX(alg_data));
 280                 *alg_data->mif.buf++ = (u8) (val & 0xff);
 281                 dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
 282                         alg_data->mif.len);
 283
 284                 alg_data->mif.len--;
 285                 if (alg_data->mif.len == 0) {
 286                         if (alg_data->last)
 287                                 /* Wait until the STOP is seen. */
 288                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 289                                         dev_err(&alg_data->adapter.dev, "The bus is still "
 290                                                 "active after timeout\n");
 291
 292                         /* Disable master interrupts */
 293                         ctl = ioread32(I2C_REG_CTL(alg_data));
 294                         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 295                                  mcntrl_drmie | mcntrl_daie);
 296                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 297
 298                         /* Kill timer. */
 299                         del_timer_sync(&alg_data->mif.timer);
 300                         complete(&alg_data->mif.complete);
 301                 }
 302         }
 303
 304         dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
 305                 __func__, ioread32(I2C_REG_STS(alg_data)));
 306
 307         return 0;
 308 }
 309
 310 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
 311 {
 312         struct i2c_pnx_algo_data *alg_data = dev_id;
 313         u32 stat, ctl;
 314
 315         dev_dbg(&alg_data->adapter.dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
 316                 __func__,
 317                 ioread32(I2C_REG_STS(alg_data)),
 318                 ioread32(I2C_REG_CTL(alg_data)),
 319                 alg_data->mif.mode);
 320         stat = ioread32(I2C_REG_STS(alg_data));
 321
 322         /* let's see what kind of event this is */
 323         if (stat & mstatus_afi) {
 324                 /* We lost arbitration in the midst of a transfer */
 325                 alg_data->mif.ret = -EIO;
 326
 327                 /* Disable master interrupts. */
 328                 ctl = ioread32(I2C_REG_CTL(alg_data));
 329                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 330                          mcntrl_drmie);
 331                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 332
 333                 /* Stop timer, to prevent timeout. */
 334                 del_timer_sync(&alg_data->mif.timer);
 335                 complete(&alg_data->mif.complete);
 336         } else if (stat & mstatus_nai) {
 337                 /* Slave did not acknowledge, generate a STOP */
 338                 dev_dbg(&alg_data->adapter.dev, "%s(): "
 339                         "Slave did not acknowledge, generating a STOP.\n",
 340                         __func__);
 341                 i2c_pnx_stop(alg_data);
 342
 343                 /* Disable master interrupts. */
 344                 ctl = ioread32(I2C_REG_CTL(alg_data));
 345                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 346                          mcntrl_drmie);
 347                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 348
 349                 /* Our return value. */
 350                 alg_data->mif.ret = -EIO;
 351
 352                 /* Stop timer, to prevent timeout. */
 353                 del_timer_sync(&alg_data->mif.timer);
 354                 complete(&alg_data->mif.complete);
 355         } else {
 356                 /*
 357                  * Two options:
 358                  * - Master Tx needs data.
 359                  * - There is data in the Rx-fifo
 360                  * The latter is only the case if we have requested for data,
 361                  * via a dummy write. (See 'i2c_pnx_master_rcv'.)
 362                  * We therefore check, as a sanity check, whether that interrupt
 363                  * has been enabled.
 364                  */
 365                 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
 366                         if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
 367                                 i2c_pnx_master_xmit(alg_data);
 368                         } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
 369                                 i2c_pnx_master_rcv(alg_data);
 370                         }
 371                 }
 372         }
 373
 374         /* Clear TDI and AFI bits */
 375         stat = ioread32(I2C_REG_STS(alg_data));
 376         iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
 377
 378         dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x ctrl = %x.\n",
 379                  __func__, ioread32(I2C_REG_STS(alg_data)),
 380                  ioread32(I2C_REG_CTL(alg_data)));
 381
 382         return IRQ_HANDLED;
 383 }
 384
 385 static void i2c_pnx_timeout(unsigned long data)
 386 {
 387         struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
 388         u32 ctl;
 389
 390         dev_err(&alg_data->adapter.dev, "Master timed out. stat = %04x, cntrl = %04x. "
 391                "Resetting master...\n",
 392                ioread32(I2C_REG_STS(alg_data)),
 393                ioread32(I2C_REG_CTL(alg_data)));
 394
 395         /* Reset master and disable interrupts */
 396         ctl = ioread32(I2C_REG_CTL(alg_data));
 397         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
 398         iowrite32(ctl, I2C_REG_CTL(alg_data));
 399
 400         ctl |= mcntrl_reset;
 401         iowrite32(ctl, I2C_REG_CTL(alg_data));
 402         wait_reset(I2C_PNX_TIMEOUT, alg_data);
 403         alg_data->mif.ret = -EIO;
 404         complete(&alg_data->mif.complete);
 405 }
 406
 407 static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
 408 {
 409         u32 stat;
 410
 411         if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
 412                 dev_err(&alg_data->adapter.dev,
 413                         "%s: Bus is still active after xfer. Reset it...\n",
 414                        alg_data->adapter.name);
 415                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 416                           I2C_REG_CTL(alg_data));
 417                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 418         } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
 419                 /* If there is data in the fifo's after transfer,
 420                  * flush fifo's by reset.
 421                  */
 422                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 423                           I2C_REG_CTL(alg_data));
 424                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 425         } else if (stat & mstatus_nai) {
 426                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 427                           I2C_REG_CTL(alg_data));
 428                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 429         }
 430 }
 431
 432 /**
 433  * i2c_pnx_xfer - generic transfer entry point
 434  * @adap:               pointer to I2C adapter structure
 435  * @msgs:               array of messages
 436  * @num:                number of messages
 437  *
 438  * Initiates the transfer
 439  */
 440 static int
 441 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 442 {
 443         struct i2c_msg *pmsg;
 444         int rc = 0, completed = 0, i;
 445         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 446         u32 stat = ioread32(I2C_REG_STS(alg_data));
 447
 448         dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n",
 449                 __func__, num, ioread32(I2C_REG_STS(alg_data)));
 450
 451         bus_reset_if_active(alg_data);
 452
 453         /* Process transactions in a loop. */
 454         for (i = 0; rc >= 0 && i < num; i++) {
 455                 u8 addr;
 456
 457                 pmsg = &msgs[i];
 458                 addr = pmsg->addr;
 459
 460                 if (pmsg->flags & I2C_M_TEN) {
 461                         dev_err(&alg_data->adapter.dev,
 462                                 "%s: 10 bits addr not supported!\n",
 463                                 alg_data->adapter.name);
 464                         rc = -EINVAL;
 465                         break;
 466                 }
 467
 468                 alg_data->mif.buf = pmsg->buf;
 469                 alg_data->mif.len = pmsg->len;
 470                 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
 471                         I2C_SMBUS_READ : I2C_SMBUS_WRITE;
 472                 alg_data->mif.ret = 0;
 473                 alg_data->last = (i == num - 1);
 474
 475                 dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n", __func__,
 476                         alg_data->mif.mode,
 477                         alg_data->mif.len);
 478
 479                 i2c_pnx_arm_timer(alg_data);
 480
 481                 /* initialize the completion var */
 482                 init_completion(&alg_data->mif.complete);
 483
 484                 /* Enable master interrupt */
 485                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
 486                                 mcntrl_naie | mcntrl_drmie,
 487                           I2C_REG_CTL(alg_data));
 488
 489                 /* Put start-code and slave-address on the bus. */
 490                 rc = i2c_pnx_start(addr, alg_data);
 491                 if (rc < 0)
 492                         break;
 493
 494                 /* Wait for completion */
 495                 wait_for_completion(&alg_data->mif.complete);
 496
 497                 if (!(rc = alg_data->mif.ret))
 498                         completed++;
 499                 dev_dbg(&alg_data->adapter.dev, "%s(): Complete, return code = %d.\n",
 500                         __func__, rc);
 501
 502                 /* Clear TDI and AFI bits in case they are set. */
 503                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
 504                         dev_dbg(&alg_data->adapter.dev,
 505                                 "%s: TDI still set... clearing now.\n",
 506                                 alg_data->adapter.name);
 507                         iowrite32(stat, I2C_REG_STS(alg_data));
 508                 }
 509                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
 510                         dev_dbg(&alg_data->adapter.dev,
 511                                 "%s: AFI still set... clearing now.\n",
 512                                 alg_data->adapter.name);
 513                         iowrite32(stat, I2C_REG_STS(alg_data));
 514                 }
 515         }
 516
 517         bus_reset_if_active(alg_data);
 518
 519         /* Cleanup to be sure... */
 520         alg_data->mif.buf = NULL;
 521         alg_data->mif.len = 0;
 522
 523         dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
 524                 __func__, ioread32(I2C_REG_STS(alg_data)));
 525
 526         if (completed != num)
 527                 return ((rc < 0) ? rc : -EREMOTEIO);
 528
 529         return num;
 530 }
 531
 532 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
 533 {
 534         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 535 }
 536
 537 static struct i2c_algorithm pnx_algorithm = {
 538         .master_xfer = i2c_pnx_xfer,
 539         .functionality = i2c_pnx_func,
 540 };
 541
 542 #ifdef CONFIG_PM
 543 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
 544                                       pm_message_t state)
 545 {
 546         struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
 547
 548         /* FIXME: shouldn't this be clk_disable? */
 549         clk_enable(alg_data->clk);
 550
 551         return 0;
 552 }
 553
 554 static int i2c_pnx_controller_resume(struct platform_device *pdev)
 555 {
 556         struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
 557
 558         return clk_enable(alg_data->clk);
 559 }
 560 #else
 561 #define i2c_pnx_controller_suspend      NULL
 562 #define i2c_pnx_controller_resume       NULL
 563 #endif
 564
 565 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
 566 {
 567         unsigned long tmp;
 568         int ret = 0;
 569         struct i2c_pnx_algo_data *alg_data;
 570         unsigned long freq;
 571         struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
 572
 573         if (!i2c_pnx || !i2c_pnx->name) {
 574                 dev_err(&pdev->dev, "%s: no platform data supplied\n",
 575                        __func__);
 576                 ret = -EINVAL;
 577                 goto out;
 578         }
 579
 580         alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
 581         if (!alg_data) {
 582                 ret = -ENOMEM;
 583                 goto err_kzalloc;
 584         }
 585
 586         platform_set_drvdata(pdev, alg_data);
 587
 588         strlcpy(alg_data->adapter.name, i2c_pnx->name,
 589                 sizeof(alg_data->adapter.name));
 590         alg_data->adapter.dev.parent = &pdev->dev;
 591         alg_data->adapter.algo = &pnx_algorithm;
 592         alg_data->adapter.algo_data = alg_data;
 593         alg_data->adapter.nr = pdev->id;
 594         alg_data->i2c_pnx = i2c_pnx;
 595
 596         alg_data->clk = clk_get(&pdev->dev, NULL);
 597         if (IS_ERR(alg_data->clk)) {
 598                 ret = PTR_ERR(alg_data->clk);
 599                 goto out_drvdata;
 600         }
 601
 602         init_timer(&alg_data->mif.timer);
 603         alg_data->mif.timer.function = i2c_pnx_timeout;
 604         alg_data->mif.timer.data = (unsigned long)alg_data;
 605
 606         /* Register I/O resource */
 607         if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
 608                                 pdev->name)) {
 609                 dev_err(&pdev->dev,
 610                        "I/O region 0x%08x for I2C already in use.\n",
 611                        i2c_pnx->base);
 612                 ret = -ENODEV;
 613                 goto out_clkget;
 614         }
 615
 616         alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 617         if (!alg_data->ioaddr) {
 618                 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
 619                 ret = -ENOMEM;
 620                 goto out_release;
 621         }
 622
 623         ret = clk_enable(alg_data->clk);
 624         if (ret)
 625                 goto out_unmap;
 626
 627         freq = clk_get_rate(alg_data->clk);
 628
 629         /*
 630          * Clock Divisor High This value is the number of system clocks
 631          * the serial clock (SCL) will be high.
 632          * For example, if the system clock period is 50 ns and the maximum
 633          * desired serial period is 10000 ns (100 kHz), then CLKHI would be
 634          * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
 635          * programmed into CLKHI will vary from this slightly due to
 636          * variations in the output pad's rise and fall times as well as
 637          * the deglitching filter length.
 638          */
 639
 640         tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
 641         iowrite32(tmp, I2C_REG_CKH(alg_data));
 642         iowrite32(tmp, I2C_REG_CKL(alg_data));
 643
 644         iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
 645         if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
 646                 ret = -ENODEV;
 647                 goto out_clock;
 648         }
 649         init_completion(&alg_data->mif.complete);
 650
 651         ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
 652                         0, pdev->name, alg_data);
 653         if (ret)
 654                 goto out_clock;
 655
 656         /* Register this adapter with the I2C subsystem */
 657         ret = i2c_add_numbered_adapter(&alg_data->adapter);
 658         if (ret < 0) {
 659                 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
 660                 goto out_irq;
 661         }
 662
 663         dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
 664                alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
 665
 666         return 0;
 667
 668 out_irq:
 669         free_irq(i2c_pnx->irq, alg_data);
 670 out_clock:
 671         clk_disable(alg_data->clk);
 672 out_unmap:
 673         iounmap(alg_data->ioaddr);
 674 out_release:
 675         release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 676 out_clkget:
 677         clk_put(alg_data->clk);
 678 out_drvdata:
 679         kfree(alg_data);
 680 err_kzalloc:
 681         platform_set_drvdata(pdev, NULL);
 682 out:
 683         return ret;
 684 }
 685
 686 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
 687 {
 688         struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
 689         struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
 690
 691         free_irq(i2c_pnx->irq, alg_data);
 692         i2c_del_adapter(&alg_data->adapter);
 693         clk_disable(alg_data->clk);
 694         iounmap(alg_data->ioaddr);
 695         release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 696         clk_put(alg_data->clk);
 697         kfree(alg_data);
 698         platform_set_drvdata(pdev, NULL);
 699
 700         return 0;
 701 }
 702
 703 static struct platform_driver i2c_pnx_driver = {
 704         .driver = {
 705                 .name = "pnx-i2c",
 706                 .owner = THIS_MODULE,
 707         },
 708         .probe = i2c_pnx_probe,
 709         .remove = __devexit_p(i2c_pnx_remove),
 710         .suspend = i2c_pnx_controller_suspend,
 711         .resume = i2c_pnx_controller_resume,
 712 };
 713
 714 static int __init i2c_adap_pnx_init(void)
 715 {
 716         return platform_driver_register(&i2c_pnx_driver);
 717 }
 718
 719 static void __exit i2c_adap_pnx_exit(void)
 720 {
 721         platform_driver_unregister(&i2c_pnx_driver);
 722 }
 723
 724 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
 725 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
 726 MODULE_LICENSE("GPL");
 727 MODULE_ALIAS("platform:pnx-i2c");
 728
 729 /* We need to make sure I2C is initialized before USB */
 730 subsys_initcall(i2c_adap_pnx_init);
 731 module_exit(i2c_adap_pnx_exit);