2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
46 config ARCH_USES_GETTIMEOFFSET
50 config GENERIC_CLOCKEVENTS
53 config GENERIC_CLOCKEVENTS_BROADCAST
55 depends on GENERIC_CLOCKEVENTS
60 select GENERIC_ALLOCATOR
71 The Extended Industry Standard Architecture (EISA) bus was
72 developed as an open alternative to the IBM MicroChannel bus.
74 The EISA bus provided some of the features of the IBM MicroChannel
75 bus while maintaining backward compatibility with cards made for
76 the older ISA bus. The EISA bus saw limited use between 1988 and
77 1995 when it was made obsolete by the PCI bus.
79 Say Y here if you are building a kernel for an EISA-based machine.
89 MicroChannel Architecture is found in some IBM PS/2 machines and
90 laptops. It is a bus system similar to PCI or ISA. See
91 <file:Documentation/mca.txt> (and especially the web page given
92 there) before attempting to build an MCA bus kernel.
94 config GENERIC_HARDIRQS
98 config STACKTRACE_SUPPORT
102 config HAVE_LATENCYTOP_SUPPORT
107 config LOCKDEP_SUPPORT
111 config TRACE_IRQFLAGS_SUPPORT
115 config HARDIRQS_SW_RESEND
119 config GENERIC_IRQ_PROBE
123 config GENERIC_LOCKBREAK
126 depends on SMP && PREEMPT
128 config RWSEM_GENERIC_SPINLOCK
132 config RWSEM_XCHGADD_ALGORITHM
135 config ARCH_HAS_ILOG2_U32
138 config ARCH_HAS_ILOG2_U64
141 config ARCH_HAS_CPUFREQ
144 Internal node to signify that the ARCH has CPUFREQ support
145 and that the relevant menu configurations are displayed for
148 config GENERIC_HWEIGHT
152 config GENERIC_CALIBRATE_DELAY
156 config ARCH_MAY_HAVE_PC_FDC
162 config NEED_DMA_MAP_STATE
165 config GENERIC_ISA_DMA
174 config GENERIC_HARDIRQS_NO__DO_IRQ
177 config ARM_L1_CACHE_SHIFT_6
180 Setting ARM L1 cache line size to 64 Bytes.
184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
188 The base address of exception vectors.
190 source "init/Kconfig"
192 source "kernel/Kconfig.freezer"
197 bool "MMU-based Paged Memory Management Support"
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
204 # The "ARM system type" choice list is ordered alphabetically by option
205 # text. Please add new entries in the option alphabetic order.
208 prompt "ARM system type"
209 default ARCH_VERSATILE
212 bool "Agilent AAEC-2000 based"
216 select ARCH_USES_GETTIMEOFFSET
218 This enables support for systems based on the Agilent AAEC-2000
220 config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
223 select ARCH_HAS_CPUFREQ
226 select GENERIC_CLOCKEVENTS
227 select PLAT_VERSATILE
229 Support for ARM's Integrator platform.
232 bool "ARM Ltd. RealView family"
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
250 select GENERIC_CLOCKEVENTS
251 select ARCH_WANT_OPTIONAL_GPIOLIB
252 select PLAT_VERSATILE
253 select ARM_TIMER_SP804
255 This enables support for ARM Ltd Versatile board.
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_TIMER_SP804
263 select GENERIC_CLOCKEVENTS
266 select PLAT_VERSATILE
268 This enables support for the ARM Ltd Versatile Express boards.
272 select ARCH_REQUIRE_GPIOLIB
275 This enables support for systems based on the Atmel AT91RM9200,
276 AT91SAM9 and AT91CAP9 processors.
279 bool "Broadcom BCMRING"
284 select GENERIC_CLOCKEVENTS
285 select ARCH_WANT_OPTIONAL_GPIOLIB
287 Support for Broadcom's BCMRing platform.
290 bool "Cirrus Logic CLPS711x/EP721x-based"
292 select ARCH_USES_GETTIMEOFFSET
294 Support for Cirrus Logic 711x/721x based boards.
297 bool "Cavium Networks CNS3XXX family"
299 select GENERIC_CLOCKEVENTS
301 select PCI_DOMAINS if PCI
303 Support for Cavium Networks CNS3XXX platform.
306 bool "Cortina Systems Gemini"
308 select ARCH_REQUIRE_GPIOLIB
309 select ARCH_USES_GETTIMEOFFSET
311 Support for the Cortina Systems Gemini family SoCs
318 select ARCH_USES_GETTIMEOFFSET
320 This is an evaluation board for the StrongARM processor available
321 from Digital. It has limited hardware on-board, including an
322 Ethernet interface, two PCMCIA sockets, two serial ports and a
331 select ARCH_REQUIRE_GPIOLIB
332 select ARCH_HAS_HOLES_MEMORYMODEL
333 select ARCH_USES_GETTIMEOFFSET
335 This enables support for the Cirrus EP93xx series of CPUs.
337 config ARCH_FOOTBRIDGE
341 select ARCH_USES_GETTIMEOFFSET
343 Support for systems based on the DC21285 companion chip
344 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
347 bool "Freescale MXC/iMX-based"
348 select GENERIC_CLOCKEVENTS
349 select ARCH_REQUIRE_GPIOLIB
352 Support for Freescale MXC/iMX-based family of processors
355 bool "Freescale STMP3xxx"
358 select ARCH_REQUIRE_GPIOLIB
359 select GENERIC_CLOCKEVENTS
360 select USB_ARCH_HAS_EHCI
362 Support for systems based on the Freescale 3xxx CPUs.
365 bool "Hilscher NetX based"
368 select GENERIC_CLOCKEVENTS
370 This enables support for systems based on the Hilscher NetX Soc
373 bool "Hynix HMS720x-based"
376 select ARCH_USES_GETTIMEOFFSET
378 This enables support for systems based on the Hynix HMS720x
386 select ARCH_SUPPORTS_MSI
389 Support for Intel's IOP13XX (XScale) family of processors.
397 select ARCH_REQUIRE_GPIOLIB
399 Support for Intel's 80219 and IOP32X (XScale) family of
408 select ARCH_REQUIRE_GPIOLIB
410 Support for Intel's IOP33X (XScale) family of processors.
417 select ARCH_USES_GETTIMEOFFSET
419 Support for Intel's IXP23xx (XScale) family of processors.
422 bool "IXP2400/2800-based"
426 select ARCH_USES_GETTIMEOFFSET
428 Support for Intel's IXP2400/2800 (XScale) family of processors.
435 select GENERIC_CLOCKEVENTS
436 select DMABOUNCE if PCI
438 Support for Intel's IXP4XX (XScale) family of processors.
443 select ARCH_REQUIRE_GPIOLIB
444 select GENERIC_CLOCKEVENTS
447 Support for the Marvell Dove SoC 88AP510
450 bool "Marvell Kirkwood"
453 select ARCH_REQUIRE_GPIOLIB
454 select GENERIC_CLOCKEVENTS
457 Support for the following Marvell Kirkwood series SoCs:
458 88F6180, 88F6192 and 88F6281.
461 bool "Marvell Loki (88RC8480)"
463 select GENERIC_CLOCKEVENTS
466 Support for the Marvell Loki (88RC8480) SoC.
471 select ARCH_REQUIRE_GPIOLIB
474 select USB_ARCH_HAS_OHCI
477 select GENERIC_CLOCKEVENTS
479 Support for the NXP LPC32XX family of processors
482 bool "Marvell MV78xx0"
485 select ARCH_REQUIRE_GPIOLIB
486 select GENERIC_CLOCKEVENTS
489 Support for the following Marvell MV78xx0 series SoCs:
497 select ARCH_REQUIRE_GPIOLIB
498 select GENERIC_CLOCKEVENTS
501 Support for the following Marvell Orion 5x series SoCs:
502 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
503 Orion-2 (5281), Orion-1-90 (6183).
506 bool "Marvell PXA168/910/MMP2"
508 select ARCH_REQUIRE_GPIOLIB
510 select GENERIC_CLOCKEVENTS
514 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
517 bool "Micrel/Kendin KS8695"
519 select ARCH_REQUIRE_GPIOLIB
520 select ARCH_USES_GETTIMEOFFSET
522 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
523 System-on-Chip devices.
526 bool "NetSilicon NS9xxx"
529 select GENERIC_CLOCKEVENTS
532 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
535 <http://www.digi.com/products/microprocessors/index.jsp>
538 bool "Nuvoton W90X900 CPU"
540 select ARCH_REQUIRE_GPIOLIB
542 select GENERIC_CLOCKEVENTS
544 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
545 At present, the w90x900 has been renamed nuc900, regarding
546 the ARM series product line, you can login the following
547 link address to know more.
549 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
550 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
553 bool "Nuvoton NUC93X CPU"
557 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
558 low-power and high performance MPEG-4/JPEG multimedia controller chip.
563 select GENERIC_CLOCKEVENTS
567 select ARCH_HAS_BARRIERS if CACHE_L2X0
569 This enables support for NVIDIA Tegra based systems (Tegra APX,
570 Tegra 6xx and Tegra 2 series).
573 bool "Philips Nexperia PNX4008 Mobile"
576 select ARCH_USES_GETTIMEOFFSET
578 This enables support for Philips PNX4008 mobile platform.
581 bool "PXA2xx/PXA3xx-based"
584 select ARCH_HAS_CPUFREQ
586 select ARCH_REQUIRE_GPIOLIB
587 select GENERIC_CLOCKEVENTS
591 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
596 select GENERIC_CLOCKEVENTS
597 select ARCH_REQUIRE_GPIOLIB
599 Support for Qualcomm MSM/QSD based systems. This runs on the
600 apps processor of the MSM/QSD and depends on a shared memory
601 interface to the modem processor which runs the baseband
602 stack and controls some vital subsystems
603 (clock and power control, etc).
606 bool "Renesas SH-Mobile"
608 Support for Renesas's SH-Mobile ARM platforms
615 select ARCH_MAY_HAVE_PC_FDC
616 select HAVE_PATA_PLATFORM
619 select ARCH_SPARSEMEM_ENABLE
620 select ARCH_USES_GETTIMEOFFSET
622 On the Acorn Risc-PC, Linux can support the internal IDE disk and
623 CD-ROM interface, serial and parallel port, and the floppy drive.
629 select ARCH_SPARSEMEM_ENABLE
631 select ARCH_HAS_CPUFREQ
633 select GENERIC_CLOCKEVENTS
636 select ARCH_REQUIRE_GPIOLIB
638 Support for StrongARM 11x0 based boards.
641 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
643 select ARCH_HAS_CPUFREQ
645 select ARCH_USES_GETTIMEOFFSET
646 select HAVE_S3C2410_I2C
648 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
649 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
650 the Samsung SMDK2410 development board (and derivatives).
652 Note, the S3C2416 and the S3C2450 are so close that they even share
653 the same SoC ID code. This means that there is no seperate machine
654 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
657 bool "Samsung S3C64XX"
663 select ARCH_USES_GETTIMEOFFSET
664 select ARCH_HAS_CPUFREQ
665 select ARCH_REQUIRE_GPIOLIB
666 select SAMSUNG_CLKSRC
667 select SAMSUNG_IRQ_VIC_TIMER
668 select SAMSUNG_IRQ_UART
669 select S3C_GPIO_TRACK
670 select S3C_GPIO_PULL_UPDOWN
671 select S3C_GPIO_CFG_S3C24XX
672 select S3C_GPIO_CFG_S3C64XX
674 select USB_ARCH_HAS_OHCI
675 select SAMSUNG_GPIOLIB_4BIT
676 select HAVE_S3C2410_I2C
677 select HAVE_S3C2410_WATCHDOG
679 Samsung S3C64XX series based systems
682 bool "Samsung S5P6440"
686 select HAVE_S3C2410_WATCHDOG
687 select ARCH_USES_GETTIMEOFFSET
688 select HAVE_S3C2410_I2C
691 Samsung S5P6440 CPU based systems
694 bool "Samsung S5P6442"
698 select ARCH_USES_GETTIMEOFFSET
699 select HAVE_S3C2410_WATCHDOG
701 Samsung S5P6442 CPU based systems
704 bool "Samsung S5PC100"
708 select ARM_L1_CACHE_SHIFT_6
709 select ARCH_USES_GETTIMEOFFSET
710 select HAVE_S3C2410_I2C
712 select HAVE_S3C2410_WATCHDOG
714 Samsung S5PC100 series based systems
717 bool "Samsung S5PV210/S5PC110"
721 select ARM_L1_CACHE_SHIFT_6
722 select ARCH_USES_GETTIMEOFFSET
723 select HAVE_S3C2410_I2C
725 select HAVE_S3C2410_WATCHDOG
727 Samsung S5PV210/S5PC110 series based systems
730 bool "Samsung S5PV310/S5PC210"
734 select GENERIC_CLOCKEVENTS
736 Samsung S5PV310 series based systems
745 select ARCH_USES_GETTIMEOFFSET
747 Support for the StrongARM based Digital DNARD machine, also known
748 as "Shark" (<http://www.shark-linux.de/shark.html>).
753 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
754 select ARCH_USES_GETTIMEOFFSET
756 Say Y here for systems based on one of the Sharp LH7A40X
757 System on a Chip processors. These CPUs include an ARM922T
758 core with a wide array of integrated devices for
759 hand-held and low-power applications.
762 bool "ST-Ericsson U300 Series"
768 select GENERIC_CLOCKEVENTS
772 Support for ST-Ericsson U300 series mobile platforms.
775 bool "ST-Ericsson U8500 Series"
778 select GENERIC_CLOCKEVENTS
780 select ARCH_REQUIRE_GPIOLIB
782 Support for ST-Ericsson's Ux500 architecture
785 bool "STMicroelectronics Nomadik"
790 select GENERIC_CLOCKEVENTS
791 select ARCH_REQUIRE_GPIOLIB
793 Support for the Nomadik platform by ST-Ericsson
797 select GENERIC_CLOCKEVENTS
798 select ARCH_REQUIRE_GPIOLIB
802 select GENERIC_ALLOCATOR
803 select ARCH_HAS_HOLES_MEMORYMODEL
805 Support for TI's DaVinci platform.
810 select ARCH_REQUIRE_GPIOLIB
811 select ARCH_HAS_CPUFREQ
812 select GENERIC_CLOCKEVENTS
813 select ARCH_HAS_HOLES_MEMORYMODEL
815 Support for TI's OMAP platform (OMAP1 and OMAP2).
820 select ARCH_REQUIRE_GPIOLIB
822 select GENERIC_CLOCKEVENTS
825 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
830 # This is sorted alphabetically by mach-* pathname. However, plat-*
831 # Kconfigs may be included either alphabetically (according to the
832 # plat- suffix) or along side the corresponding mach-* source.
834 source "arch/arm/mach-aaec2000/Kconfig"
836 source "arch/arm/mach-at91/Kconfig"
838 source "arch/arm/mach-bcmring/Kconfig"
840 source "arch/arm/mach-clps711x/Kconfig"
842 source "arch/arm/mach-cns3xxx/Kconfig"
844 source "arch/arm/mach-davinci/Kconfig"
846 source "arch/arm/mach-dove/Kconfig"
848 source "arch/arm/mach-ep93xx/Kconfig"
850 source "arch/arm/mach-footbridge/Kconfig"
852 source "arch/arm/mach-gemini/Kconfig"
854 source "arch/arm/mach-h720x/Kconfig"
856 source "arch/arm/mach-integrator/Kconfig"
858 source "arch/arm/mach-iop32x/Kconfig"
860 source "arch/arm/mach-iop33x/Kconfig"
862 source "arch/arm/mach-iop13xx/Kconfig"
864 source "arch/arm/mach-ixp4xx/Kconfig"
866 source "arch/arm/mach-ixp2000/Kconfig"
868 source "arch/arm/mach-ixp23xx/Kconfig"
870 source "arch/arm/mach-kirkwood/Kconfig"
872 source "arch/arm/mach-ks8695/Kconfig"
874 source "arch/arm/mach-lh7a40x/Kconfig"
876 source "arch/arm/mach-loki/Kconfig"
878 source "arch/arm/mach-lpc32xx/Kconfig"
880 source "arch/arm/mach-msm/Kconfig"
882 source "arch/arm/mach-mv78xx0/Kconfig"
884 source "arch/arm/plat-mxc/Kconfig"
886 source "arch/arm/mach-netx/Kconfig"
888 source "arch/arm/mach-nomadik/Kconfig"
889 source "arch/arm/plat-nomadik/Kconfig"
891 source "arch/arm/mach-ns9xxx/Kconfig"
893 source "arch/arm/mach-nuc93x/Kconfig"
895 source "arch/arm/plat-omap/Kconfig"
897 source "arch/arm/mach-omap1/Kconfig"
899 source "arch/arm/mach-omap2/Kconfig"
901 source "arch/arm/mach-orion5x/Kconfig"
903 source "arch/arm/mach-pxa/Kconfig"
904 source "arch/arm/plat-pxa/Kconfig"
906 source "arch/arm/mach-mmp/Kconfig"
908 source "arch/arm/mach-realview/Kconfig"
910 source "arch/arm/mach-sa1100/Kconfig"
912 source "arch/arm/plat-samsung/Kconfig"
913 source "arch/arm/plat-s3c24xx/Kconfig"
914 source "arch/arm/plat-s5p/Kconfig"
916 source "arch/arm/plat-spear/Kconfig"
919 source "arch/arm/mach-s3c2400/Kconfig"
920 source "arch/arm/mach-s3c2410/Kconfig"
921 source "arch/arm/mach-s3c2412/Kconfig"
922 source "arch/arm/mach-s3c2416/Kconfig"
923 source "arch/arm/mach-s3c2440/Kconfig"
924 source "arch/arm/mach-s3c2443/Kconfig"
928 source "arch/arm/mach-s3c64xx/Kconfig"
931 source "arch/arm/mach-s5p6440/Kconfig"
933 source "arch/arm/mach-s5p6442/Kconfig"
935 source "arch/arm/mach-s5pc100/Kconfig"
937 source "arch/arm/mach-s5pv210/Kconfig"
939 source "arch/arm/mach-s5pv310/Kconfig"
941 source "arch/arm/mach-shmobile/Kconfig"
943 source "arch/arm/plat-stmp3xxx/Kconfig"
945 source "arch/arm/mach-tegra/Kconfig"
947 source "arch/arm/mach-u300/Kconfig"
949 source "arch/arm/mach-ux500/Kconfig"
951 source "arch/arm/mach-versatile/Kconfig"
953 source "arch/arm/mach-vexpress/Kconfig"
955 source "arch/arm/mach-w90x900/Kconfig"
957 # Definitions to make life easier
963 select GENERIC_CLOCKEVENTS
971 config PLAT_VERSATILE
974 config ARM_TIMER_SP804
977 source arch/arm/mm/Kconfig
980 bool "Enable iWMMXt support"
981 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
982 default y if PXA27x || PXA3xx || ARCH_MMP
984 Enable support for iWMMXt context switching at run time if
985 running on a CPU that supports it.
987 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
990 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
994 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
995 (!ARCH_OMAP3 || OMAP3_EMU)
1000 source "arch/arm/Kconfig-nommu"
1003 config ARM_ERRATA_411920
1004 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1007 Invalidation of the Instruction Cache operation can
1008 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1009 It does not affect the MPCore. This option enables the ARM Ltd.
1010 recommended workaround.
1012 config ARM_ERRATA_430973
1013 bool "ARM errata: Stale prediction on replaced interworking branch"
1016 This option enables the workaround for the 430973 Cortex-A8
1017 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1018 interworking branch is replaced with another code sequence at the
1019 same virtual address, whether due to self-modifying code or virtual
1020 to physical address re-mapping, Cortex-A8 does not recover from the
1021 stale interworking branch prediction. This results in Cortex-A8
1022 executing the new code sequence in the incorrect ARM or Thumb state.
1023 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1024 and also flushes the branch target cache at every context switch.
1025 Note that setting specific bits in the ACTLR register may not be
1026 available in non-secure mode.
1028 config ARM_ERRATA_458693
1029 bool "ARM errata: Processor deadlock when a false hazard is created"
1032 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1033 erratum. For very specific sequences of memory operations, it is
1034 possible for a hazard condition intended for a cache line to instead
1035 be incorrectly associated with a different cache line. This false
1036 hazard might then cause a processor deadlock. The workaround enables
1037 the L1 caching of the NEON accesses and disables the PLD instruction
1038 in the ACTLR register. Note that setting specific bits in the ACTLR
1039 register may not be available in non-secure mode.
1041 config ARM_ERRATA_460075
1042 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1045 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1046 erratum. Any asynchronous access to the L2 cache may encounter a
1047 situation in which recent store transactions to the L2 cache are lost
1048 and overwritten with stale memory contents from external memory. The
1049 workaround disables the write-allocate mode for the L2 cache via the
1050 ACTLR register. Note that setting specific bits in the ACTLR register
1051 may not be available in non-secure mode.
1053 config ARM_ERRATA_742230
1054 bool "ARM errata: DMB operation may be faulty"
1055 depends on CPU_V7 && SMP
1057 This option enables the workaround for the 742230 Cortex-A9
1058 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1059 between two write operations may not ensure the correct visibility
1060 ordering of the two writes. This workaround sets a specific bit in
1061 the diagnostic register of the Cortex-A9 which causes the DMB
1062 instruction to behave as a DSB, ensuring the correct behaviour of
1065 config ARM_ERRATA_742231
1066 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1067 depends on CPU_V7 && SMP
1069 This option enables the workaround for the 742231 Cortex-A9
1070 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1071 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1072 accessing some data located in the same cache line, may get corrupted
1073 data due to bad handling of the address hazard when the line gets
1074 replaced from one of the CPUs at the same time as another CPU is
1075 accessing it. This workaround sets specific bits in the diagnostic
1076 register of the Cortex-A9 which reduces the linefill issuing
1077 capabilities of the processor.
1079 config PL310_ERRATA_588369
1080 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1081 depends on CACHE_L2X0 && ARCH_OMAP4
1083 The PL310 L2 cache controller implements three types of Clean &
1084 Invalidate maintenance operations: by Physical Address
1085 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1086 They are architecturally defined to behave as the execution of a
1087 clean operation followed immediately by an invalidate operation,
1088 both performing to the same memory location. This functionality
1089 is not correctly implemented in PL310 as clean lines are not
1090 invalidated as a result of these operations. Note that this errata
1091 uses Texas Instrument's secure monitor api.
1093 config ARM_ERRATA_720789
1094 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1095 depends on CPU_V7 && SMP
1097 This option enables the workaround for the 720789 Cortex-A9 (prior to
1098 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1099 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1100 As a consequence of this erratum, some TLB entries which should be
1101 invalidated are not, resulting in an incoherency in the system page
1102 tables. The workaround changes the TLB flushing routines to invalidate
1103 entries regardless of the ASID.
1106 source "arch/arm/common/Kconfig"
1116 Find out whether you have ISA slots on your motherboard. ISA is the
1117 name of a bus system, i.e. the way the CPU talks to the other stuff
1118 inside your box. Other bus systems are PCI, EISA, MicroChannel
1119 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1120 newer boards don't support it. If you have ISA, say Y, otherwise N.
1122 # Select ISA DMA controller support
1127 # Select ISA DMA interface
1132 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1134 Find out whether you have a PCI motherboard. PCI is the name of a
1135 bus system, i.e. the way the CPU talks to the other stuff inside
1136 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1137 VESA. If you have PCI, say Y, otherwise N.
1146 # Select the host bridge type
1147 config PCI_HOST_VIA82C505
1149 depends on PCI && ARCH_SHARK
1152 config PCI_HOST_ITE8152
1154 depends on PCI && MACH_ARMCORE
1158 source "drivers/pci/Kconfig"
1160 source "drivers/pcmcia/Kconfig"
1164 menu "Kernel Features"
1166 source "kernel/time/Kconfig"
1169 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1170 depends on EXPERIMENTAL
1171 depends on GENERIC_CLOCKEVENTS
1172 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1173 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1174 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1175 select USE_GENERIC_SMP_HELPERS
1178 This enables support for systems with more than one CPU. If you have
1179 a system with only one CPU, like most personal computers, say N. If
1180 you have a system with more than one CPU, say Y.
1182 If you say N here, the kernel will run on single and multiprocessor
1183 machines, but will use only one CPU of a multiprocessor machine. If
1184 you say Y here, the kernel will run on many, but not all, single
1185 processor machines. On a single processor machine, the kernel will
1186 run faster if you say N here.
1188 See also <file:Documentation/i386/IO-APIC.txt>,
1189 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1190 <http://www.linuxdoc.org/docs.html#howto>.
1192 If you don't know what to do here, say N.
1195 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1196 depends on EXPERIMENTAL
1197 depends on SMP && !XIP && !THUMB2_KERNEL
1200 SMP kernels contain instructions which fail on non-SMP processors.
1201 Enabling this option allows the kernel to modify itself to make
1202 these instructions safe. Disabling it allows about 1K of space
1205 If you don't know what to do here, say Y.
1211 This option enables support for the ARM system coherency unit
1217 This options enables support for the ARM timer and watchdog unit
1220 prompt "Memory split"
1223 Select the desired split between kernel and user memory.
1225 If you are not absolutely sure what you are doing, leave this
1229 bool "3G/1G user/kernel split"
1231 bool "2G/2G user/kernel split"
1233 bool "1G/3G user/kernel split"
1238 default 0x40000000 if VMSPLIT_1G
1239 default 0x80000000 if VMSPLIT_2G
1243 int "Maximum number of CPUs (2-32)"
1249 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1250 depends on SMP && HOTPLUG && EXPERIMENTAL
1252 Say Y here to experiment with turning CPUs off and on. CPUs
1253 can be controlled through /sys/devices/system/cpu.
1256 bool "Use local timer interrupts"
1261 Enable support for local timers on SMP platforms, rather then the
1262 legacy IPI broadcast method. Local timers allows the system
1263 accounting to be spread across the timer interval, preventing a
1264 "thundering herd" at every timer tick.
1266 source kernel/Kconfig.preempt
1270 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1271 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1272 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1273 default AT91_TIMER_HZ if ARCH_AT91
1274 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1277 config THUMB2_KERNEL
1278 bool "Compile the kernel in Thumb-2 mode"
1279 depends on CPU_V7 && EXPERIMENTAL
1281 select ARM_ASM_UNIFIED
1283 By enabling this option, the kernel will be compiled in
1284 Thumb-2 mode. A compiler/assembler that understand the unified
1285 ARM-Thumb syntax is needed.
1289 config ARM_ASM_UNIFIED
1293 bool "Use the ARM EABI to compile the kernel"
1295 This option allows for the kernel to be compiled using the latest
1296 ARM ABI (aka EABI). This is only useful if you are using a user
1297 space environment that is also compiled with EABI.
1299 Since there are major incompatibilities between the legacy ABI and
1300 EABI, especially with regard to structure member alignment, this
1301 option also changes the kernel syscall calling convention to
1302 disambiguate both ABIs and allow for backward compatibility support
1303 (selected with CONFIG_OABI_COMPAT).
1305 To use this you need GCC version 4.0.0 or later.
1308 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1309 depends on AEABI && EXPERIMENTAL
1312 This option preserves the old syscall interface along with the
1313 new (ARM EABI) one. It also provides a compatibility layer to
1314 intercept syscalls that have structure arguments which layout
1315 in memory differs between the legacy ABI and the new ARM EABI
1316 (only for non "thumb" binaries). This option adds a tiny
1317 overhead to all syscalls and produces a slightly larger kernel.
1318 If you know you'll be using only pure EABI user space then you
1319 can say N here. If this option is not selected and you attempt
1320 to execute a legacy ABI binary then the result will be
1321 UNPREDICTABLE (in fact it can be predicted that it won't work
1322 at all). If in doubt say Y.
1324 config ARCH_HAS_HOLES_MEMORYMODEL
1327 config ARCH_SPARSEMEM_ENABLE
1330 config ARCH_SPARSEMEM_DEFAULT
1331 def_bool ARCH_SPARSEMEM_ENABLE
1333 config ARCH_SELECT_MEMORY_MODEL
1334 def_bool ARCH_SPARSEMEM_ENABLE
1337 bool "High Memory Support (EXPERIMENTAL)"
1338 depends on MMU && EXPERIMENTAL
1340 The address space of ARM processors is only 4 Gigabytes large
1341 and it has to accommodate user address space, kernel address
1342 space as well as some memory mapped IO. That means that, if you
1343 have a large amount of physical memory and/or IO, not all of the
1344 memory can be "permanently mapped" by the kernel. The physical
1345 memory that is not permanently mapped is called "high memory".
1347 Depending on the selected kernel/user memory split, minimum
1348 vmalloc space and actual amount of RAM, you may not need this
1349 option which should result in a slightly faster kernel.
1354 bool "Allocate 2nd-level pagetables from highmem"
1356 depends on !OUTER_CACHE
1358 config HW_PERF_EVENTS
1359 bool "Enable hardware performance counter support for perf events"
1360 depends on PERF_EVENTS && CPU_HAS_PMU
1363 Enable hardware performance counter support for perf events. If
1364 disabled, perf events will use software events only.
1369 This enables support for sparse irqs. This is useful in general
1370 as most CPUs have a fairly sparse array of IRQ vectors, which
1371 the irq_desc then maps directly on to. Systems with a high
1372 number of off-chip IRQs will want to treat this as
1373 experimental until they have been independently verified.
1377 config FORCE_MAX_ZONEORDER
1378 int "Maximum zone order" if ARCH_SHMOBILE
1379 range 11 64 if ARCH_SHMOBILE
1380 default "9" if SA1111
1383 The kernel memory allocator divides physically contiguous memory
1384 blocks into "zones", where each zone is a power of two number of
1385 pages. This option selects the largest power of two that the kernel
1386 keeps in the memory allocator. If you need to allocate very large
1387 blocks of physically contiguous memory, then you may need to
1388 increase this value.
1390 This config option is actually maximum order plus one. For example,
1391 a value of 11 means that the largest free memory block is 2^10 pages.
1394 bool "Timer and CPU usage LEDs"
1395 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1396 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1397 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1398 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1399 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1400 ARCH_AT91 || ARCH_DAVINCI || \
1401 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1403 If you say Y here, the LEDs on your machine will be used
1404 to provide useful information about your current system status.
1406 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1407 be able to select which LEDs are active using the options below. If
1408 you are compiling a kernel for the EBSA-110 or the LART however, the
1409 red LED will simply flash regularly to indicate that the system is
1410 still functional. It is safe to say Y here if you have a CATS
1411 system, but the driver will do nothing.
1414 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1415 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1416 || MACH_OMAP_PERSEUS2
1418 depends on !GENERIC_CLOCKEVENTS
1419 default y if ARCH_EBSA110
1421 If you say Y here, one of the system LEDs (the green one on the
1422 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1423 will flash regularly to indicate that the system is still
1424 operational. This is mainly useful to kernel hackers who are
1425 debugging unstable kernels.
1427 The LART uses the same LED for both Timer LED and CPU usage LED
1428 functions. You may choose to use both, but the Timer LED function
1429 will overrule the CPU usage LED.
1432 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1434 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1435 || MACH_OMAP_PERSEUS2
1438 If you say Y here, the red LED will be used to give a good real
1439 time indication of CPU usage, by lighting whenever the idle task
1440 is not currently executing.
1442 The LART uses the same LED for both Timer LED and CPU usage LED
1443 functions. You may choose to use both, but the Timer LED function
1444 will overrule the CPU usage LED.
1446 config ALIGNMENT_TRAP
1448 depends on CPU_CP15_MMU
1449 default y if !ARCH_EBSA110
1450 select HAVE_PROC_CPU if PROC_FS
1452 ARM processors cannot fetch/store information which is not
1453 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1454 address divisible by 4. On 32-bit ARM processors, these non-aligned
1455 fetch/store instructions will be emulated in software if you say
1456 here, which has a severe performance impact. This is necessary for
1457 correct operation of some network protocols. With an IP-only
1458 configuration it is safe to say N, otherwise say Y.
1460 config UACCESS_WITH_MEMCPY
1461 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1462 depends on MMU && EXPERIMENTAL
1463 default y if CPU_FEROCEON
1465 Implement faster copy_to_user and clear_user methods for CPU
1466 cores where a 8-word STM instruction give significantly higher
1467 memory write throughput than a sequence of individual 32bit stores.
1469 A possible side effect is a slight increase in scheduling latency
1470 between threads sharing the same address space if they invoke
1471 such copy operations with large buffers.
1473 However, if the CPU data cache is using a write-allocate mode,
1474 this option is unlikely to provide any performance gain.
1476 config CC_STACKPROTECTOR
1477 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1479 This option turns on the -fstack-protector GCC feature. This
1480 feature puts, at the beginning of functions, a canary value on
1481 the stack just before the return address, and validates
1482 the value just before actually returning. Stack based buffer
1483 overflows (that need to overwrite this return address) now also
1484 overwrite the canary, which gets detected and the attack is then
1485 neutralized via a kernel panic.
1486 This feature requires gcc version 4.2 or above.
1488 config DEPRECATED_PARAM_STRUCT
1489 bool "Provide old way to pass kernel parameters"
1491 This was deprecated in 2001 and announced to live on for 5 years.
1492 Some old boot loaders still use this way.
1498 # Compressed boot loader in ROM. Yes, we really want to ask about
1499 # TEXT and BSS so we preserve their values in the config files.
1500 config ZBOOT_ROM_TEXT
1501 hex "Compressed ROM boot loader base address"
1504 The physical address at which the ROM-able zImage is to be
1505 placed in the target. Platforms which normally make use of
1506 ROM-able zImage formats normally set this to a suitable
1507 value in their defconfig file.
1509 If ZBOOT_ROM is not enabled, this has no effect.
1511 config ZBOOT_ROM_BSS
1512 hex "Compressed ROM boot loader BSS address"
1515 The base address of an area of read/write memory in the target
1516 for the ROM-able zImage which must be available while the
1517 decompressor is running. It must be large enough to hold the
1518 entire decompressed kernel plus an additional 128 KiB.
1519 Platforms which normally make use of ROM-able zImage formats
1520 normally set this to a suitable value in their defconfig file.
1522 If ZBOOT_ROM is not enabled, this has no effect.
1525 bool "Compressed boot loader in ROM/flash"
1526 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1528 Say Y here if you intend to execute your compressed kernel image
1529 (zImage) directly from ROM or flash. If unsure, say N.
1532 string "Default kernel command string"
1535 On some architectures (EBSA110 and CATS), there is currently no way
1536 for the boot loader to pass arguments to the kernel. For these
1537 architectures, you should supply some command-line options at build
1538 time by entering them here. As a minimum, you should specify the
1539 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1541 config CMDLINE_FORCE
1542 bool "Always use the default kernel command string"
1543 depends on CMDLINE != ""
1545 Always use the default kernel command string, even if the boot
1546 loader passes other arguments to the kernel.
1547 This is useful if you cannot or don't want to change the
1548 command-line options your boot loader passes to the kernel.
1553 bool "Kernel Execute-In-Place from ROM"
1554 depends on !ZBOOT_ROM
1556 Execute-In-Place allows the kernel to run from non-volatile storage
1557 directly addressable by the CPU, such as NOR flash. This saves RAM
1558 space since the text section of the kernel is not loaded from flash
1559 to RAM. Read-write sections, such as the data section and stack,
1560 are still copied to RAM. The XIP kernel is not compressed since
1561 it has to run directly from flash, so it will take more space to
1562 store it. The flash address used to link the kernel object files,
1563 and for storing it, is configuration dependent. Therefore, if you
1564 say Y here, you must know the proper physical address where to
1565 store the kernel image depending on your own flash memory usage.
1567 Also note that the make target becomes "make xipImage" rather than
1568 "make zImage" or "make Image". The final kernel binary to put in
1569 ROM memory will be arch/arm/boot/xipImage.
1573 config XIP_PHYS_ADDR
1574 hex "XIP Kernel Physical Location"
1575 depends on XIP_KERNEL
1576 default "0x00080000"
1578 This is the physical address in your flash memory the kernel will
1579 be linked for and stored to. This address is dependent on your
1583 bool "Kexec system call (EXPERIMENTAL)"
1584 depends on EXPERIMENTAL
1586 kexec is a system call that implements the ability to shutdown your
1587 current kernel, and to start another kernel. It is like a reboot
1588 but it is independent of the system firmware. And like a reboot
1589 you can start any kernel with it, not just Linux.
1591 It is an ongoing process to be certain the hardware in a machine
1592 is properly shutdown, so do not be surprised if this code does not
1593 initially work for you. It may help to enable device hotplugging
1597 bool "Export atags in procfs"
1601 Should the atags used to boot the kernel be exported in an "atags"
1602 file in procfs. Useful with kexec.
1604 config AUTO_ZRELADDR
1605 bool "Auto calculation of the decompressed kernel image address"
1606 depends on !ZBOOT_ROM && !ARCH_U300
1608 ZRELADDR is the physical address where the decompressed kernel
1609 image will be placed. If AUTO_ZRELADDR is selected, the address
1610 will be determined at run-time by masking the current IP with
1611 0xf8000000. This assumes the zImage being placed in the first 128MB
1612 from start of memory.
1616 menu "CPU Power Management"
1620 source "drivers/cpufreq/Kconfig"
1622 config CPU_FREQ_SA1100
1625 config CPU_FREQ_SA1110
1628 config CPU_FREQ_INTEGRATOR
1629 tristate "CPUfreq driver for ARM Integrator CPUs"
1630 depends on ARCH_INTEGRATOR && CPU_FREQ
1633 This enables the CPUfreq driver for ARM Integrator CPUs.
1635 For details, take a look at <file:Documentation/cpu-freq>.
1641 depends on CPU_FREQ && ARCH_PXA && PXA25x
1643 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1645 config CPU_FREQ_S3C64XX
1646 bool "CPUfreq support for Samsung S3C64XX CPUs"
1647 depends on CPU_FREQ && CPU_S3C6410
1652 Internal configuration node for common cpufreq on Samsung SoC
1654 config CPU_FREQ_S3C24XX
1655 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1656 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1659 This enables the CPUfreq driver for the Samsung S3C24XX family
1662 For details, take a look at <file:Documentation/cpu-freq>.
1666 config CPU_FREQ_S3C24XX_PLL
1667 bool "Support CPUfreq changing of PLL frequency"
1668 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1670 Compile in support for changing the PLL frequency from the
1671 S3C24XX series CPUfreq driver. The PLL takes time to settle
1672 after a frequency change, so by default it is not enabled.
1674 This also means that the PLL tables for the selected CPU(s) will
1675 be built which may increase the size of the kernel image.
1677 config CPU_FREQ_S3C24XX_DEBUG
1678 bool "Debug CPUfreq Samsung driver core"
1679 depends on CPU_FREQ_S3C24XX
1681 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1683 config CPU_FREQ_S3C24XX_IODEBUG
1684 bool "Debug CPUfreq Samsung driver IO timing"
1685 depends on CPU_FREQ_S3C24XX
1687 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1689 config CPU_FREQ_S3C24XX_DEBUGFS
1690 bool "Export debugfs for CPUFreq"
1691 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1693 Export status information via debugfs.
1697 source "drivers/cpuidle/Kconfig"
1701 menu "Floating point emulation"
1703 comment "At least one emulation must be selected"
1706 bool "NWFPE math emulation"
1707 depends on !AEABI || OABI_COMPAT
1709 Say Y to include the NWFPE floating point emulator in the kernel.
1710 This is necessary to run most binaries. Linux does not currently
1711 support floating point hardware so you need to say Y here even if
1712 your machine has an FPA or floating point co-processor podule.
1714 You may say N here if you are going to load the Acorn FPEmulator
1715 early in the bootup.
1718 bool "Support extended precision"
1719 depends on FPE_NWFPE
1721 Say Y to include 80-bit support in the kernel floating-point
1722 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1723 Note that gcc does not generate 80-bit operations by default,
1724 so in most cases this option only enlarges the size of the
1725 floating point emulator without any good reason.
1727 You almost surely want to say N here.
1730 bool "FastFPE math emulation (EXPERIMENTAL)"
1731 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1733 Say Y here to include the FAST floating point emulator in the kernel.
1734 This is an experimental much faster emulator which now also has full
1735 precision for the mantissa. It does not support any exceptions.
1736 It is very simple, and approximately 3-6 times faster than NWFPE.
1738 It should be sufficient for most programs. It may be not suitable
1739 for scientific calculations, but you have to check this for yourself.
1740 If you do not feel you need a faster FP emulation you should better
1744 bool "VFP-format floating point maths"
1745 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1747 Say Y to include VFP support code in the kernel. This is needed
1748 if your hardware includes a VFP unit.
1750 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1751 release notes and additional status information.
1753 Say N if your target does not have VFP hardware.
1761 bool "Advanced SIMD (NEON) Extension support"
1762 depends on VFPv3 && CPU_V7
1764 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1769 menu "Userspace binary formats"
1771 source "fs/Kconfig.binfmt"
1774 tristate "RISC OS personality"
1777 Say Y here to include the kernel code necessary if you want to run
1778 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1779 experimental; if this sounds frightening, say N and sleep in peace.
1780 You can also say M here to compile this support as a module (which
1781 will be called arthur).
1785 menu "Power management options"
1787 source "kernel/power/Kconfig"
1789 config ARCH_SUSPEND_POSSIBLE
1794 source "net/Kconfig"
1796 source "drivers/Kconfig"
1800 source "arch/arm/Kconfig.debug"
1802 source "security/Kconfig"
1804 source "crypto/Kconfig"
1806 source "lib/Kconfig"