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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / ata / pata_via.c
blobb6f55e83a22420ccdda324d3591c02f91a8a82ca
1 /*
2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Documentation
7 * Most chipset documentation available under NDA only
8 *
9 * VIA version guide
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133
26 * VIA VT8237S - UDMA133
27 * VIA VT8251 - UDMA133
28 *
29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings.
32 *
33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips.
35 *
36 * Based heavily on:
37 *
38 * Version 3.38
39 *
40 * VIA IDE driver for Linux. Supported southbridges:
41 *
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44 * vt8235, vt8237
45 *
46 * Copyright (c) 2000-2002 Vojtech Pavlik
47 *
48 * Based on the work of:
49 * Michel Aubry
50 * Jeff Garzik
51 * Andre Hedrick
52
53 */
54
55 #include <linux/kernel.h>
56 #include <linux/module.h>
57 #include <linux/pci.h>
58 #include <linux/init.h>
59 #include <linux/blkdev.h>
60 #include <linux/delay.h>
61 #include <scsi/scsi_host.h>
62 #include <linux/libata.h>
63 #include <linux/dmi.h>
64
65 #define DRV_NAME "pata_via"
66 #define DRV_VERSION "0.3.3"
67
68 /*
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70 * driver.
71 */
72
73 enum {
74 VIA_UDMA = 0x007,
75 VIA_UDMA_NONE = 0x000,
76 VIA_UDMA_33 = 0x001,
77 VIA_UDMA_66 = 0x002,
78 VIA_UDMA_100 = 0x003,
79 VIA_UDMA_133 = 0x004,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
87 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
88 };
89
90 enum {
91 VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
92 };
93
94 /*
95 * VIA SouthBridge chips.
96 */
97
98 static const struct via_isa_bridge {
99 const char *name;
100 u16 id;
101 u8 rev_min;
102 u8 rev_max;
103 u16 flags;
104 } via_isa_bridges[] = {
105 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f,
106 VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
107 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 |
108 VIA_BAD_AST | VIA_SATA_PATA },
109 { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f,
110 VIA_UDMA_133 | VIA_BAD_AST },
111 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
112 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
113 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
114 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
115 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
116 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
117 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
118 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
119 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
120 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
121 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
122 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
123 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
124 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
125 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
126 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
127 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
128 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
129 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
130 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
131 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
132 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
133 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
134 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
135 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f,
136 VIA_UDMA_133 | VIA_BAD_AST },
137 { NULL }
138 };
139
140
141 /*
142 * Cable special cases
143 */
144
145 static const struct dmi_system_id cable_dmi_table[] = {
146 {
147 .ident = "Acer Ferrari 3400",
148 .matches = {
149 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
150 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
151 },
152 },
153 { }
154 };
155
156 static int via_cable_override(struct pci_dev *pdev)
157 {
158 /* Systems by DMI */
159 if (dmi_check_system(cable_dmi_table))
160 return 1;
161 /* Arima W730-K8/Targa Visionary 811/... */
162 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
163 return 1;
164 return 0;
165 }
166
167
168 /**
169 * via_cable_detect - cable detection
170 * @ap: ATA port
171 *
172 * Perform cable detection. Actually for the VIA case the BIOS
173 * already did this for us. We read the values provided by the
174 * BIOS. If you are using an 8235 in a non-PC configuration you
175 * may need to update this code.
176 *
177 * Hotplug also impacts on this.
178 */
179
180 static int via_cable_detect(struct ata_port *ap) {
181 const struct via_isa_bridge *config = ap->host->private_data;
182 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
183 u32 ata66;
184
185 if (via_cable_override(pdev))
186 return ATA_CBL_PATA40_SHORT;
187
188 if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
189 return ATA_CBL_SATA;
190
191 /* Early chips are 40 wire */
192 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
193 return ATA_CBL_PATA40;
194 /* UDMA 66 chips have only drive side logic */
195 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
196 return ATA_CBL_PATA_UNK;
197 /* UDMA 100 or later */
198 pci_read_config_dword(pdev, 0x50, &ata66);
199 /* Check both the drive cable reporting bits, we might not have
200 two drives */
201 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
202 return ATA_CBL_PATA80;
203 /* Check with ACPI so we can spot BIOS reported SATA bridges */
204 if (ata_acpi_init_gtm(ap) &&
205 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
206 return ATA_CBL_PATA80;
207 return ATA_CBL_PATA40;
208 }
209
210 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
211 {
212 struct ata_port *ap = link->ap;
213 const struct via_isa_bridge *config = ap->host->private_data;
214
215 if (!(config->flags & VIA_NO_ENABLES)) {
216 static const struct pci_bits via_enable_bits[] = {
217 { 0x40, 1, 0x02, 0x02 },
218 { 0x40, 1, 0x01, 0x01 }
219 };
220 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
221 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
222 return -ENOENT;
223 }
224
225 return ata_sff_prereset(link, deadline);
226 }
227
228
229 /**
230 * via_do_set_mode - set initial PIO mode data
231 * @ap: ATA interface
232 * @adev: ATA device
233 * @mode: ATA mode being programmed
234 * @tdiv: Clocks per PCI clock
235 * @set_ast: Set to program address setup
236 * @udma_type: UDMA mode/format of registers
237 *
238 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
239 * support in order to compute modes.
240 *
241 * FIXME: Hotplug will require we serialize multiple mode changes
242 * on the two channels.
243 */
244
245 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
246 {
247 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
248 struct ata_device *peer = ata_dev_pair(adev);
249 struct ata_timing t, p;
250 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
251 unsigned long T = 1000000000 / via_clock;
252 unsigned long UT = T/tdiv;
253 int ut;
254 int offset = 3 - (2*ap->port_no) - adev->devno;
255
256 /* Calculate the timing values we require */
257 ata_timing_compute(adev, mode, &t, T, UT);
258
259 /* We share 8bit timing so we must merge the constraints */
260 if (peer) {
261 if (peer->pio_mode) {
262 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
263 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
264 }
265 }
266
267 /* Address setup is programmable but breaks on UDMA133 setups */
268 if (set_ast) {
269 u8 setup; /* 2 bits per drive */
270 int shift = 2 * offset;
271
272 pci_read_config_byte(pdev, 0x4C, &setup);
273 setup &= ~(3 << shift);
274 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
275 pci_write_config_byte(pdev, 0x4C, setup);
276 }
277
278 /* Load the PIO mode bits */
279 pci_write_config_byte(pdev, 0x4F - ap->port_no,
280 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
281 pci_write_config_byte(pdev, 0x48 + offset,
282 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
283
284 /* Load the UDMA bits according to type */
285 switch(udma_type) {
286 default:
287 /* BUG() ? */
288 /* fall through */
289 case 33:
290 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
291 break;
292 case 66:
293 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
294 break;
295 case 100:
296 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
297 break;
298 case 133:
299 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
300 break;
301 }
302
303 /* Set UDMA unless device is not UDMA capable */
304 if (udma_type && t.udma) {
305 u8 cable80_status;
306
307 /* Get 80-wire cable detection bit */
308 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
309 cable80_status &= 0x10;
310
311 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
312 }
313 }
314
315 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
316 {
317 const struct via_isa_bridge *config = ap->host->private_data;
318 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
319 int mode = config->flags & VIA_UDMA;
320 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
321 static u8 udma[5] = { 0, 33, 66, 100, 133 };
322
323 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
324 }
325
326 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
327 {
328 const struct via_isa_bridge *config = ap->host->private_data;
329 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
330 int mode = config->flags & VIA_UDMA;
331 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
332 static u8 udma[5] = { 0, 33, 66, 100, 133 };
333
334 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
335 }
336
337 /**
338 * via_tf_load - send taskfile registers to host controller
339 * @ap: Port to which output is sent
340 * @tf: ATA taskfile register set
341 *
342 * Outputs ATA taskfile to standard ATA host controller.
343 *
344 * Note: This is to fix the internal bug of via chipsets, which
345 * will reset the device register after changing the IEN bit on
346 * ctl register
347 */
348 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
349 {
350 struct ata_taskfile tmp_tf;
351
352 if (ap->ctl != ap->last_ctl && !(tf->flags & ATA_TFLAG_DEVICE)) {
353 tmp_tf = *tf;
354 tmp_tf.flags |= ATA_TFLAG_DEVICE;
355 tf = &tmp_tf;
356 }
357 ata_sff_tf_load(ap, tf);
358 }
359
360 static struct scsi_host_template via_sht = {
361 ATA_BMDMA_SHT(DRV_NAME),
362 };
363
364 static struct ata_port_operations via_port_ops = {
365 .inherits = &ata_bmdma_port_ops,
366 .cable_detect = via_cable_detect,
367 .set_piomode = via_set_piomode,
368 .set_dmamode = via_set_dmamode,
369 .prereset = via_pre_reset,
370 .sff_tf_load = via_tf_load,
371 };
372
373 static struct ata_port_operations via_port_ops_noirq = {
374 .inherits = &via_port_ops,
375 .sff_data_xfer = ata_sff_data_xfer_noirq,
376 };
377
378 /**
379 * via_config_fifo - set up the FIFO
380 * @pdev: PCI device
381 * @flags: configuration flags
382 *
383 * Set the FIFO properties for this device if necessary. Used both on
384 * set up and on and the resume path
385 */
386
387 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
388 {
389 u8 enable;
390
391 /* 0x40 low bits indicate enabled channels */
392 pci_read_config_byte(pdev, 0x40 , &enable);
393 enable &= 3;
394
395 if (flags & VIA_SET_FIFO) {
396 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
397 u8 fifo;
398
399 pci_read_config_byte(pdev, 0x43, &fifo);
400
401 /* Clear PREQ# until DDACK# for errata */
402 if (flags & VIA_BAD_PREQ)
403 fifo &= 0x7F;
404 else
405 fifo &= 0x9f;
406 /* Turn on FIFO for enabled channels */
407 fifo |= fifo_setting[enable];
408 pci_write_config_byte(pdev, 0x43, fifo);
409 }
410 }
411
412 /**
413 * via_init_one - discovery callback
414 * @pdev: PCI device
415 * @id: PCI table info
416 *
417 * A VIA IDE interface has been discovered. Figure out what revision
418 * and perform configuration work before handing it to the ATA layer
419 */
420
421 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
422 {
423 /* Early VIA without UDMA support */
424 static const struct ata_port_info via_mwdma_info = {
425 .flags = ATA_FLAG_SLAVE_POSS,
426 .pio_mask = 0x1f,
427 .mwdma_mask = 0x07,
428 .port_ops = &via_port_ops
429 };
430 /* Ditto with IRQ masking required */
431 static const struct ata_port_info via_mwdma_info_borked = {
432 .flags = ATA_FLAG_SLAVE_POSS,
433 .pio_mask = 0x1f,
434 .mwdma_mask = 0x07,
435 .port_ops = &via_port_ops_noirq,
436 };
437 /* VIA UDMA 33 devices (and borked 66) */
438 static const struct ata_port_info via_udma33_info = {
439 .flags = ATA_FLAG_SLAVE_POSS,
440 .pio_mask = 0x1f,
441 .mwdma_mask = 0x07,
442 .udma_mask = ATA_UDMA2,
443 .port_ops = &via_port_ops
444 };
445 /* VIA UDMA 66 devices */
446 static const struct ata_port_info via_udma66_info = {
447 .flags = ATA_FLAG_SLAVE_POSS,
448 .pio_mask = 0x1f,
449 .mwdma_mask = 0x07,
450 .udma_mask = ATA_UDMA4,
451 .port_ops = &via_port_ops
452 };
453 /* VIA UDMA 100 devices */
454 static const struct ata_port_info via_udma100_info = {
455 .flags = ATA_FLAG_SLAVE_POSS,
456 .pio_mask = 0x1f,
457 .mwdma_mask = 0x07,
458 .udma_mask = ATA_UDMA5,
459 .port_ops = &via_port_ops
460 };
461 /* UDMA133 with bad AST (All current 133) */
462 static const struct ata_port_info via_udma133_info = {
463 .flags = ATA_FLAG_SLAVE_POSS,
464 .pio_mask = 0x1f,
465 .mwdma_mask = 0x07,
466 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
467 .port_ops = &via_port_ops
468 };
469 const struct ata_port_info *ppi[] = { NULL, NULL };
470 struct pci_dev *isa = NULL;
471 const struct via_isa_bridge *config;
472 static int printed_version;
473 u8 enable;
474 u32 timing;
475 unsigned long flags = id->driver_data;
476 int rc;
477
478 if (!printed_version++)
479 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
480
481 rc = pcim_enable_device(pdev);
482 if (rc)
483 return rc;
484
485 if (flags & VIA_IDFLAG_SINGLE)
486 ppi[1] = &ata_dummy_port_info;
487
488 /* To find out how the IDE will behave and what features we
489 actually have to look at the bridge not the IDE controller */
490 for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
491 config++)
492 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
493 !!(config->flags & VIA_BAD_ID),
494 config->id, NULL))) {
495
496 if (isa->revision >= config->rev_min &&
497 isa->revision <= config->rev_max)
498 break;
499 pci_dev_put(isa);
500 }
501
502 pci_dev_put(isa);
503
504 if (!(config->flags & VIA_NO_ENABLES)) {
505 /* 0x40 low bits indicate enabled channels */
506 pci_read_config_byte(pdev, 0x40 , &enable);
507 enable &= 3;
508 if (enable == 0)
509 return -ENODEV;
510 }
511
512 /* Initialise the FIFO for the enabled channels. */
513 via_config_fifo(pdev, config->flags);
514
515 /* Clock set up */
516 switch(config->flags & VIA_UDMA) {
517 case VIA_UDMA_NONE:
518 if (config->flags & VIA_NO_UNMASK)
519 ppi[0] = &via_mwdma_info_borked;
520 else
521 ppi[0] = &via_mwdma_info;
522 break;
523 case VIA_UDMA_33:
524 ppi[0] = &via_udma33_info;
525 break;
526 case VIA_UDMA_66:
527 ppi[0] = &via_udma66_info;
528 /* The 66 MHz devices require we enable the clock */
529 pci_read_config_dword(pdev, 0x50, &timing);
530 timing |= 0x80008;
531 pci_write_config_dword(pdev, 0x50, timing);
532 break;
533 case VIA_UDMA_100:
534 ppi[0] = &via_udma100_info;
535 break;
536 case VIA_UDMA_133:
537 ppi[0] = &via_udma133_info;
538 break;
539 default:
540 WARN_ON(1);
541 return -ENODEV;
542 }
543
544 if (config->flags & VIA_BAD_CLK66) {
545 /* Disable the 66MHz clock on problem devices */
546 pci_read_config_dword(pdev, 0x50, &timing);
547 timing &= ~0x80008;
548 pci_write_config_dword(pdev, 0x50, timing);
549 }
550
551 /* We have established the device type, now fire it up */
552 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config);
553 }
554
555 #ifdef CONFIG_PM
556 /**
557 * via_reinit_one - reinit after resume
558 * @pdev; PCI device
559 *
560 * Called when the VIA PATA device is resumed. We must then
561 * reconfigure the fifo and other setup we may have altered. In
562 * addition the kernel needs to have the resume methods on PCI
563 * quirk supported.
564 */
565
566 static int via_reinit_one(struct pci_dev *pdev)
567 {
568 u32 timing;
569 struct ata_host *host = dev_get_drvdata(&pdev->dev);
570 const struct via_isa_bridge *config = host->private_data;
571 int rc;
572
573 rc = ata_pci_device_do_resume(pdev);
574 if (rc)
575 return rc;
576
577 via_config_fifo(pdev, config->flags);
578
579 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
580 /* The 66 MHz devices require we enable the clock */
581 pci_read_config_dword(pdev, 0x50, &timing);
582 timing |= 0x80008;
583 pci_write_config_dword(pdev, 0x50, timing);
584 }
585 if (config->flags & VIA_BAD_CLK66) {
586 /* Disable the 66MHz clock on problem devices */
587 pci_read_config_dword(pdev, 0x50, &timing);
588 timing &= ~0x80008;
589 pci_write_config_dword(pdev, 0x50, timing);
590 }
591
592 ata_host_resume(host);
593 return 0;
594 }
595 #endif
596
597 static const struct pci_device_id via[] = {
598 { PCI_VDEVICE(VIA, 0x0415), },
599 { PCI_VDEVICE(VIA, 0x0571), },
600 { PCI_VDEVICE(VIA, 0x0581), },
601 { PCI_VDEVICE(VIA, 0x1571), },
602 { PCI_VDEVICE(VIA, 0x3164), },
603 { PCI_VDEVICE(VIA, 0x5324), },
604 { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
605
606 { },
607 };
608
609 static struct pci_driver via_pci_driver = {
610 .name = DRV_NAME,
611 .id_table = via,
612 .probe = via_init_one,
613 .remove = ata_pci_remove_one,
614 #ifdef CONFIG_PM
615 .suspend = ata_pci_device_suspend,
616 .resume = via_reinit_one,
617 #endif
618 };
619
620 static int __init via_init(void)
621 {
622 return pci_register_driver(&via_pci_driver);
623 }
624
625 static void __exit via_exit(void)
626 {
627 pci_unregister_driver(&via_pci_driver);
628 }
629
630 MODULE_AUTHOR("Alan Cox");
631 MODULE_DESCRIPTION("low-level driver for VIA PATA");
632 MODULE_LICENSE("GPL");
633 MODULE_DEVICE_TABLE(pci, via);
634 MODULE_VERSION(DRV_VERSION);
635
636 module_init(via_init);
637 module_exit(via_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree