ceph: move readahead default to fs/ceph from libceph
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / sound / wss.h
blobfd01f22825cdda88235ee4c05aa0a834af309258
1 #ifndef __SOUND_WSS_H
2 #define __SOUND_WSS_H
4 /*
5 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
6 * Definitions for CS4231 & InterWave chips & compatible chips
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include "control.h"
26 #include "pcm.h"
27 #include "timer.h"
29 #include "cs4231-regs.h"
31 /* defines for codec.mode */
33 #define WSS_MODE_NONE 0x0000
34 #define WSS_MODE_PLAY 0x0001
35 #define WSS_MODE_RECORD 0x0002
36 #define WSS_MODE_TIMER 0x0004
37 #define WSS_MODE_OPEN (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
39 /* defines for codec.hardware */
41 #define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
42 #define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
43 #define WSS_HW_TYPE_MASK 0xff00 /* type mask */
44 #define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
45 #define WSS_HW_CS4231 0x0100 /* CS4231 chip */
46 #define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
47 #define WSS_HW_AD1845 0x0102 /* AD1845 chip */
48 #define WSS_HW_CS4232_MASK 0x0200 /* CS4232 serie (has control ports) */
49 #define WSS_HW_CS4232 0x0200 /* CS4232 */
50 #define WSS_HW_CS4232A 0x0201 /* CS4232A */
51 #define WSS_HW_CS4236 0x0202 /* CS4236 */
52 #define WSS_HW_CS4236B_MASK 0x0400 /* CS4236B serie (has extended control regs) */
53 #define WSS_HW_CS4235 0x0400 /* CS4235 - Crystal Clear (tm) stereo enhancement */
54 #define WSS_HW_CS4236B 0x0401 /* CS4236B */
55 #define WSS_HW_CS4237B 0x0402 /* CS4237B - SRS 3D */
56 #define WSS_HW_CS4238B 0x0403 /* CS4238B - QSOUND 3D */
57 #define WSS_HW_CS4239 0x0404 /* CS4239 - Crystal Clear (tm) stereo enhancement */
58 #define WSS_HW_AD1848_MASK 0x0800 /* AD1848 serie (half duplex) */
59 #define WSS_HW_AD1847 0x0801 /* AD1847 chip */
60 #define WSS_HW_AD1848 0x0802 /* AD1848 chip */
61 #define WSS_HW_CS4248 0x0803 /* CS4248 chip */
62 #define WSS_HW_CMI8330 0x0804 /* CMI8330 chip */
63 #define WSS_HW_THINKPAD 0x0805 /* Thinkpad 360/750/755 */
64 /* compatible, but clones */
65 #define WSS_HW_INTERWAVE 0x1000 /* InterWave chip */
66 #define WSS_HW_OPL3SA2 0x1101 /* OPL3-SA2 chip, similar to cs4231 */
67 #define WSS_HW_OPTI93X 0x1102 /* Opti 930/931/933 */
69 /* defines for codec.hwshare */
70 #define WSS_HWSHARE_IRQ (1<<0)
71 #define WSS_HWSHARE_DMA1 (1<<1)
72 #define WSS_HWSHARE_DMA2 (1<<2)
74 /* IBM Thinkpad specific stuff */
75 #define AD1848_THINKPAD_CTL_PORT1 0x15e8
76 #define AD1848_THINKPAD_CTL_PORT2 0x15e9
77 #define AD1848_THINKPAD_CS4248_ENABLE_BIT 0x02
79 struct snd_wss {
80 unsigned long port; /* base i/o port */
81 struct resource *res_port;
82 unsigned long cport; /* control base i/o port (CS4236) */
83 struct resource *res_cport;
84 int irq; /* IRQ line */
85 int dma1; /* playback DMA */
86 int dma2; /* record DMA */
87 unsigned short version; /* version of CODEC chip */
88 unsigned short mode; /* see to WSS_MODE_XXXX */
89 unsigned short hardware; /* see to WSS_HW_XXXX */
90 unsigned short hwshare; /* shared resources */
91 unsigned short single_dma:1, /* forced single DMA mode (GUS 16-bit */
92 /* daughter board) or dma1 == dma2 */
93 ebus_flag:1, /* SPARC: EBUS present */
94 thinkpad_flag:1; /* Thinkpad CS4248 needs extra help */
96 struct snd_card *card;
97 struct snd_pcm *pcm;
98 struct snd_pcm_substream *playback_substream;
99 struct snd_pcm_substream *capture_substream;
100 struct snd_timer *timer;
102 unsigned char image[32]; /* registers image */
103 unsigned char eimage[32]; /* extended registers image */
104 unsigned char cimage[16]; /* control registers image */
105 int mce_bit;
106 int calibrate_mute;
107 int sw_3d_bit;
108 unsigned int p_dma_size;
109 unsigned int c_dma_size;
111 spinlock_t reg_lock;
112 struct mutex mce_mutex;
113 struct mutex open_mutex;
115 int (*rate_constraint) (struct snd_pcm_runtime *runtime);
116 void (*set_playback_format) (struct snd_wss *chip,
117 struct snd_pcm_hw_params *hw_params,
118 unsigned char pdfr);
119 void (*set_capture_format) (struct snd_wss *chip,
120 struct snd_pcm_hw_params *hw_params,
121 unsigned char cdfr);
122 void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
123 #ifdef CONFIG_PM
124 void (*suspend) (struct snd_wss *chip);
125 void (*resume) (struct snd_wss *chip);
126 #endif
127 void *dma_private_data;
128 int (*claim_dma) (struct snd_wss *chip,
129 void *dma_private_data, int dma);
130 int (*release_dma) (struct snd_wss *chip,
131 void *dma_private_data, int dma);
134 /* exported functions */
136 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
137 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
138 void snd_cs4236_ext_out(struct snd_wss *chip,
139 unsigned char reg, unsigned char val);
140 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
141 void snd_wss_mce_up(struct snd_wss *chip);
142 void snd_wss_mce_down(struct snd_wss *chip);
144 void snd_wss_overrange(struct snd_wss *chip);
146 irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
148 const char *snd_wss_chip_id(struct snd_wss *chip);
150 int snd_wss_create(struct snd_card *card,
151 unsigned long port,
152 unsigned long cport,
153 int irq, int dma1, int dma2,
154 unsigned short hardware,
155 unsigned short hwshare,
156 struct snd_wss **rchip);
157 int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
158 int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer);
159 int snd_wss_mixer(struct snd_wss *chip);
161 const struct snd_pcm_ops *snd_wss_get_pcm_ops(int direction);
163 int snd_cs4236_create(struct snd_card *card,
164 unsigned long port,
165 unsigned long cport,
166 int irq, int dma1, int dma2,
167 unsigned short hardware,
168 unsigned short hwshare,
169 struct snd_wss **rchip);
170 int snd_cs4236_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
171 int snd_cs4236_mixer(struct snd_wss *chip);
174 * mixer library
177 #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
178 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
179 .name = xname, \
180 .index = xindex, \
181 .info = snd_wss_info_single, \
182 .get = snd_wss_get_single, \
183 .put = snd_wss_put_single, \
184 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
186 int snd_wss_info_single(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_info *uinfo);
188 int snd_wss_get_single(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol);
190 int snd_wss_put_single(struct snd_kcontrol *kcontrol,
191 struct snd_ctl_elem_value *ucontrol);
193 #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
194 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
195 .name = xname, \
196 .index = xindex, \
197 .info = snd_wss_info_double, \
198 .get = snd_wss_get_double, \
199 .put = snd_wss_put_double, \
200 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
201 (shift_right << 19) | (mask << 24) | (invert << 22) }
203 #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
204 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
205 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
206 .name = xname, \
207 .index = xindex, \
208 .info = snd_wss_info_single, \
209 .get = snd_wss_get_single, \
210 .put = snd_wss_put_single, \
211 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
212 .tlv = { .p = (xtlv) } }
214 #define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
215 shift_left, shift_right, mask, invert, xtlv) \
216 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
217 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
218 .name = xname, \
219 .index = xindex, \
220 .info = snd_wss_info_double, \
221 .get = snd_wss_get_double, \
222 .put = snd_wss_put_double, \
223 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
224 (shift_right << 19) | (mask << 24) | (invert << 22), \
225 .tlv = { .p = (xtlv) } }
228 int snd_wss_info_double(struct snd_kcontrol *kcontrol,
229 struct snd_ctl_elem_info *uinfo);
230 int snd_wss_get_double(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol);
232 int snd_wss_put_double(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_value *ucontrol);
235 #endif /* __SOUND_WSS_H */