2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * I/O routines for GF1/InterWave synthesizer chips
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/delay.h>
23 #include <linux/time.h>
24 #include <sound/core.h>
25 #include <sound/gus.h>
27 void snd_gf1_delay(struct snd_gus_card
* gus
)
31 for (i
= 0; i
< 6; i
++) {
38 * =======================================================================
42 * ok.. stop of control registers (wave & ramp) need some special things..
43 * big UltraClick (tm) elimination...
46 static inline void __snd_gf1_ctrl_stop(struct snd_gus_card
* gus
, unsigned char reg
)
50 outb(reg
| 0x80, gus
->gf1
.reg_regsel
);
52 value
= inb(gus
->gf1
.reg_data8
);
54 outb(reg
, gus
->gf1
.reg_regsel
);
56 outb((value
| 0x03) & ~(0x80 | 0x20), gus
->gf1
.reg_data8
);
60 static inline void __snd_gf1_write8(struct snd_gus_card
* gus
,
64 outb(reg
, gus
->gf1
.reg_regsel
);
66 outb(data
, gus
->gf1
.reg_data8
);
70 static inline unsigned char __snd_gf1_look8(struct snd_gus_card
* gus
,
73 outb(reg
, gus
->gf1
.reg_regsel
);
75 return inb(gus
->gf1
.reg_data8
);
78 static inline void __snd_gf1_write16(struct snd_gus_card
* gus
,
79 unsigned char reg
, unsigned int data
)
81 outb(reg
, gus
->gf1
.reg_regsel
);
83 outw((unsigned short) data
, gus
->gf1
.reg_data16
);
87 static inline unsigned short __snd_gf1_look16(struct snd_gus_card
* gus
,
90 outb(reg
, gus
->gf1
.reg_regsel
);
92 return inw(gus
->gf1
.reg_data16
);
95 static inline void __snd_gf1_adlib_write(struct snd_gus_card
* gus
,
96 unsigned char reg
, unsigned char data
)
98 outb(reg
, gus
->gf1
.reg_timerctrl
);
99 inb(gus
->gf1
.reg_timerctrl
);
100 inb(gus
->gf1
.reg_timerctrl
);
101 outb(data
, gus
->gf1
.reg_timerdata
);
102 inb(gus
->gf1
.reg_timerctrl
);
103 inb(gus
->gf1
.reg_timerctrl
);
106 static inline void __snd_gf1_write_addr(struct snd_gus_card
* gus
, unsigned char reg
,
107 unsigned int addr
, int w_16bit
)
109 if (gus
->gf1
.enh_mode
) {
111 addr
= ((addr
>> 1) & ~0x0000000f) | (addr
& 0x0000000f);
112 __snd_gf1_write8(gus
, SNDRV_GF1_VB_UPPER_ADDRESS
, (unsigned char) ((addr
>> 26) & 0x03));
114 addr
= (addr
& 0x00c0000f) | ((addr
& 0x003ffff0) >> 1);
115 __snd_gf1_write16(gus
, reg
, (unsigned short) (addr
>> 11));
116 __snd_gf1_write16(gus
, reg
+ 1, (unsigned short) (addr
<< 5));
119 static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card
* gus
,
120 unsigned char reg
, short w_16bit
)
124 res
= ((unsigned int) __snd_gf1_look16(gus
, reg
| 0x80) << 11) & 0xfff800;
125 res
|= ((unsigned int) __snd_gf1_look16(gus
, (reg
+ 1) | 0x80) >> 5) & 0x0007ff;
126 if (gus
->gf1
.enh_mode
) {
127 res
|= (unsigned int) __snd_gf1_look8(gus
, SNDRV_GF1_VB_UPPER_ADDRESS
| 0x80) << 26;
129 res
= ((res
<< 1) & 0xffffffe0) | (res
& 0x0000000f);
131 res
= ((res
& 0x001ffff0) << 1) | (res
& 0x00c0000f);
137 * =======================================================================
140 void snd_gf1_ctrl_stop(struct snd_gus_card
* gus
, unsigned char reg
)
142 __snd_gf1_ctrl_stop(gus
, reg
);
145 void snd_gf1_write8(struct snd_gus_card
* gus
,
149 __snd_gf1_write8(gus
, reg
, data
);
152 unsigned char snd_gf1_look8(struct snd_gus_card
* gus
, unsigned char reg
)
154 return __snd_gf1_look8(gus
, reg
);
157 void snd_gf1_write16(struct snd_gus_card
* gus
,
161 __snd_gf1_write16(gus
, reg
, data
);
164 unsigned short snd_gf1_look16(struct snd_gus_card
* gus
, unsigned char reg
)
166 return __snd_gf1_look16(gus
, reg
);
169 void snd_gf1_adlib_write(struct snd_gus_card
* gus
,
173 __snd_gf1_adlib_write(gus
, reg
, data
);
176 void snd_gf1_write_addr(struct snd_gus_card
* gus
, unsigned char reg
,
177 unsigned int addr
, short w_16bit
)
179 __snd_gf1_write_addr(gus
, reg
, addr
, w_16bit
);
182 unsigned int snd_gf1_read_addr(struct snd_gus_card
* gus
,
186 return __snd_gf1_read_addr(gus
, reg
, w_16bit
);
193 void snd_gf1_i_ctrl_stop(struct snd_gus_card
* gus
, unsigned char reg
)
197 spin_lock_irqsave(&gus
->reg_lock
, flags
);
198 __snd_gf1_ctrl_stop(gus
, reg
);
199 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
202 void snd_gf1_i_write8(struct snd_gus_card
* gus
,
208 spin_lock_irqsave(&gus
->reg_lock
, flags
);
209 __snd_gf1_write8(gus
, reg
, data
);
210 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
213 unsigned char snd_gf1_i_look8(struct snd_gus_card
* gus
, unsigned char reg
)
218 spin_lock_irqsave(&gus
->reg_lock
, flags
);
219 res
= __snd_gf1_look8(gus
, reg
);
220 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
224 void snd_gf1_i_write16(struct snd_gus_card
* gus
,
230 spin_lock_irqsave(&gus
->reg_lock
, flags
);
231 __snd_gf1_write16(gus
, reg
, data
);
232 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
235 unsigned short snd_gf1_i_look16(struct snd_gus_card
* gus
, unsigned char reg
)
240 spin_lock_irqsave(&gus
->reg_lock
, flags
);
241 res
= __snd_gf1_look16(gus
, reg
);
242 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
248 void snd_gf1_i_adlib_write(struct snd_gus_card
* gus
,
254 spin_lock_irqsave(&gus
->reg_lock
, flags
);
255 __snd_gf1_adlib_write(gus
, reg
, data
);
256 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
259 void snd_gf1_i_write_addr(struct snd_gus_card
* gus
, unsigned char reg
,
260 unsigned int addr
, short w_16bit
)
264 spin_lock_irqsave(&gus
->reg_lock
, flags
);
265 __snd_gf1_write_addr(gus
, reg
, addr
, w_16bit
);
266 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
271 #ifdef CONFIG_SND_DEBUG
272 static unsigned int snd_gf1_i_read_addr(struct snd_gus_card
* gus
,
273 unsigned char reg
, short w_16bit
)
278 spin_lock_irqsave(&gus
->reg_lock
, flags
);
279 res
= __snd_gf1_read_addr(gus
, reg
, w_16bit
);
280 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
289 void snd_gf1_dram_addr(struct snd_gus_card
* gus
, unsigned int addr
)
291 outb(0x43, gus
->gf1
.reg_regsel
);
293 outw((unsigned short) addr
, gus
->gf1
.reg_data16
);
295 outb(0x44, gus
->gf1
.reg_regsel
);
297 outb((unsigned char) (addr
>> 16), gus
->gf1
.reg_data8
);
301 void snd_gf1_poke(struct snd_gus_card
* gus
, unsigned int addr
, unsigned char data
)
305 spin_lock_irqsave(&gus
->reg_lock
, flags
);
306 outb(SNDRV_GF1_GW_DRAM_IO_LOW
, gus
->gf1
.reg_regsel
);
308 outw((unsigned short) addr
, gus
->gf1
.reg_data16
);
310 outb(SNDRV_GF1_GB_DRAM_IO_HIGH
, gus
->gf1
.reg_regsel
);
312 outb((unsigned char) (addr
>> 16), gus
->gf1
.reg_data8
);
314 outb(data
, gus
->gf1
.reg_dram
);
315 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
318 unsigned char snd_gf1_peek(struct snd_gus_card
* gus
, unsigned int addr
)
323 spin_lock_irqsave(&gus
->reg_lock
, flags
);
324 outb(SNDRV_GF1_GW_DRAM_IO_LOW
, gus
->gf1
.reg_regsel
);
326 outw((unsigned short) addr
, gus
->gf1
.reg_data16
);
328 outb(SNDRV_GF1_GB_DRAM_IO_HIGH
, gus
->gf1
.reg_regsel
);
330 outb((unsigned char) (addr
>> 16), gus
->gf1
.reg_data8
);
332 res
= inb(gus
->gf1
.reg_dram
);
333 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
339 void snd_gf1_pokew(struct snd_gus_card
* gus
, unsigned int addr
, unsigned short data
)
343 #ifdef CONFIG_SND_DEBUG
345 snd_printk(KERN_DEBUG
"snd_gf1_pokew - GF1!!!\n");
347 spin_lock_irqsave(&gus
->reg_lock
, flags
);
348 outb(SNDRV_GF1_GW_DRAM_IO_LOW
, gus
->gf1
.reg_regsel
);
350 outw((unsigned short) addr
, gus
->gf1
.reg_data16
);
352 outb(SNDRV_GF1_GB_DRAM_IO_HIGH
, gus
->gf1
.reg_regsel
);
354 outb((unsigned char) (addr
>> 16), gus
->gf1
.reg_data8
);
356 outb(SNDRV_GF1_GW_DRAM_IO16
, gus
->gf1
.reg_regsel
);
358 outw(data
, gus
->gf1
.reg_data16
);
359 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
362 unsigned short snd_gf1_peekw(struct snd_gus_card
* gus
, unsigned int addr
)
367 #ifdef CONFIG_SND_DEBUG
369 snd_printk(KERN_DEBUG
"snd_gf1_peekw - GF1!!!\n");
371 spin_lock_irqsave(&gus
->reg_lock
, flags
);
372 outb(SNDRV_GF1_GW_DRAM_IO_LOW
, gus
->gf1
.reg_regsel
);
374 outw((unsigned short) addr
, gus
->gf1
.reg_data16
);
376 outb(SNDRV_GF1_GB_DRAM_IO_HIGH
, gus
->gf1
.reg_regsel
);
378 outb((unsigned char) (addr
>> 16), gus
->gf1
.reg_data8
);
380 outb(SNDRV_GF1_GW_DRAM_IO16
, gus
->gf1
.reg_regsel
);
382 res
= inw(gus
->gf1
.reg_data16
);
383 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
387 void snd_gf1_dram_setmem(struct snd_gus_card
* gus
, unsigned int addr
,
388 unsigned short value
, unsigned int count
)
393 #ifdef CONFIG_SND_DEBUG
395 snd_printk(KERN_DEBUG
"snd_gf1_dram_setmem - GF1!!!\n");
399 port
= GUSP(gus
, GF1DATALOW
);
400 spin_lock_irqsave(&gus
->reg_lock
, flags
);
401 outb(SNDRV_GF1_GW_DRAM_IO_LOW
, gus
->gf1
.reg_regsel
);
403 outw((unsigned short) addr
, gus
->gf1
.reg_data16
);
405 outb(SNDRV_GF1_GB_DRAM_IO_HIGH
, gus
->gf1
.reg_regsel
);
407 outb((unsigned char) (addr
>> 16), gus
->gf1
.reg_data8
);
409 outb(SNDRV_GF1_GW_DRAM_IO16
, gus
->gf1
.reg_regsel
);
412 spin_unlock_irqrestore(&gus
->reg_lock
, flags
);
417 void snd_gf1_select_active_voices(struct snd_gus_card
* gus
)
419 unsigned short voices
;
421 static unsigned short voices_tbl
[32 - 14 + 1] =
423 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
424 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
427 voices
= gus
->gf1
.active_voices
;
432 if (gus
->gf1
.enh_mode
)
434 gus
->gf1
.active_voices
= voices
;
435 gus
->gf1
.playback_freq
=
436 gus
->gf1
.enh_mode
? 44100 : voices_tbl
[voices
- 14];
437 if (!gus
->gf1
.enh_mode
) {
438 snd_gf1_i_write8(gus
, SNDRV_GF1_GB_ACTIVE_VOICES
, 0xc0 | (voices
- 1));
443 #ifdef CONFIG_SND_DEBUG
445 void snd_gf1_print_voice_registers(struct snd_gus_card
* gus
)
450 voice
= gus
->gf1
.active_voice
;
451 printk(KERN_INFO
" -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n", voice
, ctrl
= snd_gf1_i_read8(gus
, 0), snd_gf1_i_read8(gus
, 0x0d));
452 printk(KERN_INFO
" -%i- GF1 frequency = 0x%x\n", voice
, snd_gf1_i_read16(gus
, 1));
453 printk(KERN_INFO
" -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n", voice
, snd_gf1_i_read_addr(gus
, 2, ctrl
& 4), snd_gf1_i_read_addr(gus
, 2, (ctrl
& 4) ^ 4), snd_gf1_i_read_addr(gus
, 4, ctrl
& 4), snd_gf1_i_read_addr(gus
, 4, (ctrl
& 4) ^ 4));
454 printk(KERN_INFO
" -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n", voice
, snd_gf1_i_read8(gus
, 7), snd_gf1_i_read8(gus
, 8), snd_gf1_i_read8(gus
, 6));
455 printk(KERN_INFO
" -%i- GF1 volume = 0x%x\n", voice
, snd_gf1_i_read16(gus
, 9));
456 printk(KERN_INFO
" -%i- GF1 position = 0x%x (0x%x)\n", voice
, snd_gf1_i_read_addr(gus
, 0x0a, ctrl
& 4), snd_gf1_i_read_addr(gus
, 0x0a, (ctrl
& 4) ^ 4));
457 if (gus
->interwave
&& snd_gf1_i_read8(gus
, 0x19) & 0x01) { /* enhanced mode */
458 mode
= snd_gf1_i_read8(gus
, 0x15);
459 printk(KERN_INFO
" -%i- GFA1 mode = 0x%x\n", voice
, mode
);
460 if (mode
& 0x01) { /* Effect processor */
461 printk(KERN_INFO
" -%i- GFA1 effect address = 0x%x\n", voice
, snd_gf1_i_read_addr(gus
, 0x11, ctrl
& 4));
462 printk(KERN_INFO
" -%i- GFA1 effect volume = 0x%x\n", voice
, snd_gf1_i_read16(gus
, 0x16));
463 printk(KERN_INFO
" -%i- GFA1 effect volume final = 0x%x\n", voice
, snd_gf1_i_read16(gus
, 0x1d));
464 printk(KERN_INFO
" -%i- GFA1 effect acumulator = 0x%x\n", voice
, snd_gf1_i_read8(gus
, 0x14));
467 printk(KERN_INFO
" -%i- GFA1 left offset = 0x%x (%i)\n", voice
, snd_gf1_i_read16(gus
, 0x13), snd_gf1_i_read16(gus
, 0x13) >> 4);
468 printk(KERN_INFO
" -%i- GFA1 left offset final = 0x%x (%i)\n", voice
, snd_gf1_i_read16(gus
, 0x1c), snd_gf1_i_read16(gus
, 0x1c) >> 4);
469 printk(KERN_INFO
" -%i- GFA1 right offset = 0x%x (%i)\n", voice
, snd_gf1_i_read16(gus
, 0x0c), snd_gf1_i_read16(gus
, 0x0c) >> 4);
470 printk(KERN_INFO
" -%i- GFA1 right offset final = 0x%x (%i)\n", voice
, snd_gf1_i_read16(gus
, 0x1b), snd_gf1_i_read16(gus
, 0x1b) >> 4);
472 printk(KERN_INFO
" -%i- GF1 pan = 0x%x\n", voice
, snd_gf1_i_read8(gus
, 0x0c));
474 printk(KERN_INFO
" -%i- GF1 pan = 0x%x\n", voice
, snd_gf1_i_read8(gus
, 0x0c));
479 void snd_gf1_print_global_registers(struct snd_gus_card
* gus
)
481 unsigned char global_mode
= 0x00;
483 printk(KERN_INFO
" -G- GF1 active voices = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_ACTIVE_VOICES
));
484 if (gus
->interwave
) {
485 global_mode
= snd_gf1_i_read8(gus
, SNDRV_GF1_GB_GLOBAL_MODE
);
486 printk(KERN_INFO
" -G- GF1 global mode = 0x%x\n", global_mode
);
488 if (global_mode
& 0x02) /* LFO enabled? */
489 printk(KERN_INFO
" -G- GF1 LFO base = 0x%x\n", snd_gf1_i_look16(gus
, SNDRV_GF1_GW_LFO_BASE
));
490 printk(KERN_INFO
" -G- GF1 voices IRQ read = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_VOICES_IRQ_READ
));
491 printk(KERN_INFO
" -G- GF1 DRAM DMA control = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_DRAM_DMA_CONTROL
));
492 printk(KERN_INFO
" -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_DRAM_DMA_HIGH
), snd_gf1_i_read16(gus
, SNDRV_GF1_GW_DRAM_DMA_LOW
));
493 printk(KERN_INFO
" -G- GF1 DRAM IO high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_DRAM_IO_HIGH
), snd_gf1_i_read16(gus
, SNDRV_GF1_GW_DRAM_IO_LOW
));
495 printk(KERN_INFO
" -G- GF1 record DMA control = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_REC_DMA_CONTROL
));
496 printk(KERN_INFO
" -G- GF1 DRAM IO 16 = 0x%x\n", snd_gf1_i_look16(gus
, SNDRV_GF1_GW_DRAM_IO16
));
497 if (gus
->gf1
.enh_mode
) {
498 printk(KERN_INFO
" -G- GFA1 memory config = 0x%x\n", snd_gf1_i_look16(gus
, SNDRV_GF1_GW_MEMORY_CONFIG
));
499 printk(KERN_INFO
" -G- GFA1 memory control = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_MEMORY_CONTROL
));
500 printk(KERN_INFO
" -G- GFA1 FIFO record base = 0x%x\n", snd_gf1_i_look16(gus
, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR
));
501 printk(KERN_INFO
" -G- GFA1 FIFO playback base = 0x%x\n", snd_gf1_i_look16(gus
, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR
));
502 printk(KERN_INFO
" -G- GFA1 interleave control = 0x%x\n", snd_gf1_i_look16(gus
, SNDRV_GF1_GW_INTERLEAVE
));
506 void snd_gf1_print_setup_registers(struct snd_gus_card
* gus
)
508 printk(KERN_INFO
" -S- mix control = 0x%x\n", inb(GUSP(gus
, MIXCNTRLREG
)));
509 printk(KERN_INFO
" -S- IRQ status = 0x%x\n", inb(GUSP(gus
, IRQSTAT
)));
510 printk(KERN_INFO
" -S- timer control = 0x%x\n", inb(GUSP(gus
, TIMERCNTRL
)));
511 printk(KERN_INFO
" -S- timer data = 0x%x\n", inb(GUSP(gus
, TIMERDATA
)));
512 printk(KERN_INFO
" -S- status read = 0x%x\n", inb(GUSP(gus
, REGCNTRLS
)));
513 printk(KERN_INFO
" -S- Sound Blaster control = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL
));
514 printk(KERN_INFO
" -S- AdLib timer 1/2 = 0x%x/0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_ADLIB_TIMER_1
), snd_gf1_i_look8(gus
, SNDRV_GF1_GB_ADLIB_TIMER_2
));
515 printk(KERN_INFO
" -S- reset = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_RESET
));
516 if (gus
->interwave
) {
517 printk(KERN_INFO
" -S- compatibility = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_COMPATIBILITY
));
518 printk(KERN_INFO
" -S- decode control = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_DECODE_CONTROL
));
519 printk(KERN_INFO
" -S- version number = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_VERSION_NUMBER
));
520 printk(KERN_INFO
" -S- MPU-401 emul. control A/B = 0x%x/0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_MPU401_CONTROL_A
), snd_gf1_i_look8(gus
, SNDRV_GF1_GB_MPU401_CONTROL_B
));
521 printk(KERN_INFO
" -S- emulation IRQ = 0x%x\n", snd_gf1_i_look8(gus
, SNDRV_GF1_GB_EMULATION_IRQ
));
525 void snd_gf1_peek_print_block(struct snd_gus_card
* gus
, unsigned int addr
, int count
, int w_16bit
)
529 printk(count
> 0 ? "%02x:" : "%02x", snd_gf1_peek(gus
, addr
++));
531 while (count
-- > 0) {
532 printk(count
> 0 ? "%04x:" : "%04x", snd_gf1_peek(gus
, addr
) | (snd_gf1_peek(gus
, addr
+ 1) << 8));