arch/x86/oprofile/nmi_int.c

   1 /**
   2  * @file nmi_int.c
   3  *
   4  * @remark Copyright 2002-2008 OProfile authors
   5  * @remark Read the file COPYING
   6  *
   7  * @author John Levon <levon@movementarian.org>
   8  * @author Robert Richter <robert.richter@amd.com>
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/notifier.h>
  13 #include <linux/smp.h>
  14 #include <linux/oprofile.h>
  15 #include <linux/sysdev.h>
  16 #include <linux/slab.h>
  17 #include <linux/moduleparam.h>
  18 #include <linux/kdebug.h>
  19 #include <linux/cpu.h>
  20 #include <asm/nmi.h>
  21 #include <asm/msr.h>
  22 #include <asm/apic.h>
  23
  24 #include "op_counter.h"
  25 #include "op_x86_model.h"
  26
  27 static struct op_x86_model_spec const *model;
  28 static DEFINE_PER_CPU(struct op_msrs, cpu_msrs);
  29 static DEFINE_PER_CPU(unsigned long, saved_lvtpc);
  30
  31 /* 0 == registered but off, 1 == registered and on */
  32 static int nmi_enabled = 0;
  33
  34 /* common functions */
  35
  36 u64 op_x86_get_ctrl(struct op_x86_model_spec const *model,
  37                     struct op_counter_config *counter_config)
  38 {
  39         u64 val = 0;
  40         u16 event = (u16)counter_config->event;
  41
  42         val |= ARCH_PERFMON_EVENTSEL_INT;
  43         val |= counter_config->user ? ARCH_PERFMON_EVENTSEL_USR : 0;
  44         val |= counter_config->kernel ? ARCH_PERFMON_EVENTSEL_OS : 0;
  45         val |= (counter_config->unit_mask & 0xFF) << 8;
  46         event &= model->event_mask ? model->event_mask : 0xFF;
  47         val |= event & 0xFF;
  48         val |= (event & 0x0F00) << 24;
  49
  50         return val;
  51 }
  52
  53
  54 static int profile_exceptions_notify(struct notifier_block *self,
  55                                      unsigned long val, void *data)
  56 {
  57         struct die_args *args = (struct die_args *)data;
  58         int ret = NOTIFY_DONE;
  59         int cpu = smp_processor_id();
  60
  61         switch (val) {
  62         case DIE_NMI:
  63         case DIE_NMI_IPI:
  64                 model->check_ctrs(args->regs, &per_cpu(cpu_msrs, cpu));
  65                 ret = NOTIFY_STOP;
  66                 break;
  67         default:
  68                 break;
  69         }
  70         return ret;
  71 }
  72
  73 static void nmi_cpu_save_registers(struct op_msrs *msrs)
  74 {
  75         struct op_msr *counters = msrs->counters;
  76         struct op_msr *controls = msrs->controls;
  77         unsigned int i;
  78
  79         for (i = 0; i < model->num_counters; ++i) {
  80                 if (counters[i].addr)
  81                         rdmsrl(counters[i].addr, counters[i].saved);
  82         }
  83
  84         for (i = 0; i < model->num_controls; ++i) {
  85                 if (controls[i].addr)
  86                         rdmsrl(controls[i].addr, controls[i].saved);
  87         }
  88 }
  89
  90 static void nmi_save_registers(void *dummy)
  91 {
  92         int cpu = smp_processor_id();
  93         struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
  94         nmi_cpu_save_registers(msrs);
  95 }
  96
  97 static void free_msrs(void)
  98 {
  99         int i;
 100         for_each_possible_cpu(i) {
 101                 kfree(per_cpu(cpu_msrs, i).counters);
 102                 per_cpu(cpu_msrs, i).counters = NULL;
 103                 kfree(per_cpu(cpu_msrs, i).controls);
 104                 per_cpu(cpu_msrs, i).controls = NULL;
 105         }
 106 }
 107
 108 static int allocate_msrs(void)
 109 {
 110         int success = 1;
 111         size_t controls_size = sizeof(struct op_msr) * model->num_controls;
 112         size_t counters_size = sizeof(struct op_msr) * model->num_counters;
 113
 114         int i;
 115         for_each_possible_cpu(i) {
 116                 per_cpu(cpu_msrs, i).counters = kmalloc(counters_size,
 117                                                                 GFP_KERNEL);
 118                 if (!per_cpu(cpu_msrs, i).counters) {
 119                         success = 0;
 120                         break;
 121                 }
 122                 per_cpu(cpu_msrs, i).controls = kmalloc(controls_size,
 123                                                                 GFP_KERNEL);
 124                 if (!per_cpu(cpu_msrs, i).controls) {
 125                         success = 0;
 126                         break;
 127                 }
 128         }
 129
 130         if (!success)
 131                 free_msrs();
 132
 133         return success;
 134 }
 135
 136 static void nmi_cpu_setup(void *dummy)
 137 {
 138         int cpu = smp_processor_id();
 139         struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
 140         spin_lock(&oprofilefs_lock);
 141         model->setup_ctrs(model, msrs);
 142         spin_unlock(&oprofilefs_lock);
 143         per_cpu(saved_lvtpc, cpu) = apic_read(APIC_LVTPC);
 144         apic_write(APIC_LVTPC, APIC_DM_NMI);
 145 }
 146
 147 static struct notifier_block profile_exceptions_nb = {
 148         .notifier_call = profile_exceptions_notify,
 149         .next = NULL,
 150         .priority = 2
 151 };
 152
 153 static int nmi_setup(void)
 154 {
 155         int err = 0;
 156         int cpu;
 157
 158         if (!allocate_msrs())
 159                 return -ENOMEM;
 160
 161         err = register_die_notifier(&profile_exceptions_nb);
 162         if (err) {
 163                 free_msrs();
 164                 return err;
 165         }
 166
 167         /* We need to serialize save and setup for HT because the subset
 168          * of msrs are distinct for save and setup operations
 169          */
 170
 171         /* Assume saved/restored counters are the same on all CPUs */
 172         model->fill_in_addresses(&per_cpu(cpu_msrs, 0));
 173         for_each_possible_cpu(cpu) {
 174                 if (cpu != 0) {
 175                         memcpy(per_cpu(cpu_msrs, cpu).counters,
 176                                 per_cpu(cpu_msrs, 0).counters,
 177                                 sizeof(struct op_msr) * model->num_counters);
 178
 179                         memcpy(per_cpu(cpu_msrs, cpu).controls,
 180                                 per_cpu(cpu_msrs, 0).controls,
 181                                 sizeof(struct op_msr) * model->num_controls);
 182                 }
 183
 184         }
 185         on_each_cpu(nmi_save_registers, NULL, 1);
 186         on_each_cpu(nmi_cpu_setup, NULL, 1);
 187         nmi_enabled = 1;
 188         return 0;
 189 }
 190
 191 static void nmi_restore_registers(struct op_msrs *msrs)
 192 {
 193         struct op_msr *counters = msrs->counters;
 194         struct op_msr *controls = msrs->controls;
 195         unsigned int i;
 196
 197         for (i = 0; i < model->num_controls; ++i) {
 198                 if (controls[i].addr)
 199                         wrmsrl(controls[i].addr, controls[i].saved);
 200         }
 201
 202         for (i = 0; i < model->num_counters; ++i) {
 203                 if (counters[i].addr)
 204                         wrmsrl(counters[i].addr, counters[i].saved);
 205         }
 206 }
 207
 208 static void nmi_cpu_shutdown(void *dummy)
 209 {
 210         unsigned int v;
 211         int cpu = smp_processor_id();
 212         struct op_msrs *msrs = &__get_cpu_var(cpu_msrs);
 213
 214         /* restoring APIC_LVTPC can trigger an apic error because the delivery
 215          * mode and vector nr combination can be illegal. That's by design: on
 216          * power on apic lvt contain a zero vector nr which are legal only for
 217          * NMI delivery mode. So inhibit apic err before restoring lvtpc
 218          */
 219         v = apic_read(APIC_LVTERR);
 220         apic_write(APIC_LVTERR, v | APIC_LVT_MASKED);
 221         apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu));
 222         apic_write(APIC_LVTERR, v);
 223         nmi_restore_registers(msrs);
 224 }
 225
 226 static void nmi_shutdown(void)
 227 {
 228         struct op_msrs *msrs;
 229
 230         nmi_enabled = 0;
 231         on_each_cpu(nmi_cpu_shutdown, NULL, 1);
 232         unregister_die_notifier(&profile_exceptions_nb);
 233         msrs = &get_cpu_var(cpu_msrs);
 234         model->shutdown(msrs);
 235         free_msrs();
 236         put_cpu_var(cpu_msrs);
 237 }
 238
 239 static void nmi_cpu_start(void *dummy)
 240 {
 241         struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
 242         model->start(msrs);
 243 }
 244
 245 static int nmi_start(void)
 246 {
 247         on_each_cpu(nmi_cpu_start, NULL, 1);
 248         return 0;
 249 }
 250
 251 static void nmi_cpu_stop(void *dummy)
 252 {
 253         struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
 254         model->stop(msrs);
 255 }
 256
 257 static void nmi_stop(void)
 258 {
 259         on_each_cpu(nmi_cpu_stop, NULL, 1);
 260 }
 261
 262 struct op_counter_config counter_config[OP_MAX_COUNTER];
 263
 264 static int nmi_create_files(struct super_block *sb, struct dentry *root)
 265 {
 266         unsigned int i;
 267
 268         for (i = 0; i < model->num_counters; ++i) {
 269                 struct dentry *dir;
 270                 char buf[4];
 271
 272                 /* quick little hack to _not_ expose a counter if it is not
 273                  * available for use.  This should protect userspace app.
 274                  * NOTE:  assumes 1:1 mapping here (that counters are organized
 275                  *        sequentially in their struct assignment).
 276                  */
 277                 if (unlikely(!avail_to_resrv_perfctr_nmi_bit(i)))
 278                         continue;
 279
 280                 snprintf(buf,  sizeof(buf), "%d", i);
 281                 dir = oprofilefs_mkdir(sb, root, buf);
 282                 oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled);
 283                 oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event);
 284                 oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count);
 285                 oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask);
 286                 oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel);
 287                 oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user);
 288         }
 289
 290         return 0;
 291 }
 292
 293 #ifdef CONFIG_SMP
 294 static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
 295                                  void *data)
 296 {
 297         int cpu = (unsigned long)data;
 298         switch (action) {
 299         case CPU_DOWN_FAILED:
 300         case CPU_ONLINE:
 301                 smp_call_function_single(cpu, nmi_cpu_start, NULL, 0);
 302                 break;
 303         case CPU_DOWN_PREPARE:
 304                 smp_call_function_single(cpu, nmi_cpu_stop, NULL, 1);
 305                 break;
 306         }
 307         return NOTIFY_DONE;
 308 }
 309
 310 static struct notifier_block oprofile_cpu_nb = {
 311         .notifier_call = oprofile_cpu_notifier
 312 };
 313 #endif
 314
 315 #ifdef CONFIG_PM
 316
 317 static int nmi_suspend(struct sys_device *dev, pm_message_t state)
 318 {
 319         /* Only one CPU left, just stop that one */
 320         if (nmi_enabled == 1)
 321                 nmi_cpu_stop(NULL);
 322         return 0;
 323 }
 324
 325 static int nmi_resume(struct sys_device *dev)
 326 {
 327         if (nmi_enabled == 1)
 328                 nmi_cpu_start(NULL);
 329         return 0;
 330 }
 331
 332 static struct sysdev_class oprofile_sysclass = {
 333         .name           = "oprofile",
 334         .resume         = nmi_resume,
 335         .suspend        = nmi_suspend,
 336 };
 337
 338 static struct sys_device device_oprofile = {
 339         .id     = 0,
 340         .cls    = &oprofile_sysclass,
 341 };
 342
 343 static int __init init_sysfs(void)
 344 {
 345         int error;
 346
 347         error = sysdev_class_register(&oprofile_sysclass);
 348         if (!error)
 349                 error = sysdev_register(&device_oprofile);
 350         return error;
 351 }
 352
 353 static void exit_sysfs(void)
 354 {
 355         sysdev_unregister(&device_oprofile);
 356         sysdev_class_unregister(&oprofile_sysclass);
 357 }
 358
 359 #else
 360 #define init_sysfs() do { } while (0)
 361 #define exit_sysfs() do { } while (0)
 362 #endif /* CONFIG_PM */
 363
 364 static int __init p4_init(char **cpu_type)
 365 {
 366         __u8 cpu_model = boot_cpu_data.x86_model;
 367
 368         if (cpu_model > 6 || cpu_model == 5)
 369                 return 0;
 370
 371 #ifndef CONFIG_SMP
 372         *cpu_type = "i386/p4";
 373         model = &op_p4_spec;
 374         return 1;
 375 #else
 376         switch (smp_num_siblings) {
 377         case 1:
 378                 *cpu_type = "i386/p4";
 379                 model = &op_p4_spec;
 380                 return 1;
 381
 382         case 2:
 383                 *cpu_type = "i386/p4-ht";
 384                 model = &op_p4_ht2_spec;
 385                 return 1;
 386         }
 387 #endif
 388
 389         printk(KERN_INFO "oprofile: P4 HyperThreading detected with > 2 threads\n");
 390         printk(KERN_INFO "oprofile: Reverting to timer mode.\n");
 391         return 0;
 392 }
 393
 394 static int force_arch_perfmon;
 395 static int force_cpu_type(const char *str, struct kernel_param *kp)
 396 {
 397         if (!strcmp(str, "archperfmon")) {
 398                 force_arch_perfmon = 1;
 399                 printk(KERN_INFO "oprofile: forcing architectural perfmon\n");
 400         }
 401
 402         return 0;
 403 }
 404 module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0);
 405
 406 static int __init ppro_init(char **cpu_type)
 407 {
 408         __u8 cpu_model = boot_cpu_data.x86_model;
 409         struct op_x86_model_spec const *spec = &op_ppro_spec;   /* default */
 410
 411         if (force_arch_perfmon && cpu_has_arch_perfmon)
 412                 return 0;
 413
 414         switch (cpu_model) {
 415         case 0 ... 2:
 416                 *cpu_type = "i386/ppro";
 417                 break;
 418         case 3 ... 5:
 419                 *cpu_type = "i386/pii";
 420                 break;
 421         case 6 ... 8:
 422         case 10 ... 11:
 423                 *cpu_type = "i386/piii";
 424                 break;
 425         case 9:
 426         case 13:
 427                 *cpu_type = "i386/p6_mobile";
 428                 break;
 429         case 14:
 430                 *cpu_type = "i386/core";
 431                 break;
 432         case 15: case 23:
 433                 *cpu_type = "i386/core_2";
 434                 break;
 435         case 26:
 436                 spec = &op_arch_perfmon_spec;
 437                 *cpu_type = "i386/core_i7";
 438                 break;
 439         case 28:
 440                 *cpu_type = "i386/atom";
 441                 break;
 442         default:
 443                 /* Unknown */
 444                 return 0;
 445         }
 446
 447         model = spec;
 448         return 1;
 449 }
 450
 451 /* in order to get sysfs right */
 452 static int using_nmi;
 453
 454 int __init op_nmi_init(struct oprofile_operations *ops)
 455 {
 456         __u8 vendor = boot_cpu_data.x86_vendor;
 457         __u8 family = boot_cpu_data.x86;
 458         char *cpu_type = NULL;
 459         int ret = 0;
 460
 461         if (!cpu_has_apic)
 462                 return -ENODEV;
 463
 464         switch (vendor) {
 465         case X86_VENDOR_AMD:
 466                 /* Needs to be at least an Athlon (or hammer in 32bit mode) */
 467
 468                 switch (family) {
 469                 case 6:
 470                         cpu_type = "i386/athlon";
 471                         break;
 472                 case 0xf:
 473                         /*
 474                          * Actually it could be i386/hammer too, but
 475                          * give user space an consistent name.
 476                          */
 477                         cpu_type = "x86-64/hammer";
 478                         break;
 479                 case 0x10:
 480                         cpu_type = "x86-64/family10";
 481                         break;
 482                 case 0x11:
 483                         cpu_type = "x86-64/family11h";
 484                         break;
 485                 default:
 486                         return -ENODEV;
 487                 }
 488                 model = &op_amd_spec;
 489                 break;
 490
 491         case X86_VENDOR_INTEL:
 492                 switch (family) {
 493                         /* Pentium IV */
 494                 case 0xf:
 495                         p4_init(&cpu_type);
 496                         break;
 497
 498                         /* A P6-class processor */
 499                 case 6:
 500                         ppro_init(&cpu_type);
 501                         break;
 502
 503                 default:
 504                         break;
 505                 }
 506
 507                 if (cpu_type)
 508                         break;
 509
 510                 if (!cpu_has_arch_perfmon)
 511                         return -ENODEV;
 512
 513                 /* use arch perfmon as fallback */
 514                 cpu_type = "i386/arch_perfmon";
 515                 model = &op_arch_perfmon_spec;
 516                 break;
 517
 518         default:
 519                 return -ENODEV;
 520         }
 521
 522 #ifdef CONFIG_SMP
 523         register_cpu_notifier(&oprofile_cpu_nb);
 524 #endif
 525         /* default values, can be overwritten by model */
 526         ops->create_files = nmi_create_files;
 527         ops->setup = nmi_setup;
 528         ops->shutdown = nmi_shutdown;
 529         ops->start = nmi_start;
 530         ops->stop = nmi_stop;
 531         ops->cpu_type = cpu_type;
 532
 533         if (model->init)
 534                 ret = model->init(ops);
 535         if (ret)
 536                 return ret;
 537
 538         init_sysfs();
 539         using_nmi = 1;
 540         printk(KERN_INFO "oprofile: using NMI interrupt.\n");
 541         return 0;
 542 }
 543
 544 void op_nmi_exit(void)
 545 {
 546         if (using_nmi) {
 547                 exit_sysfs();
 548 #ifdef CONFIG_SMP
 549                 unregister_cpu_notifier(&oprofile_cpu_nb);
 550 #endif
 551         }
 552         if (model->exit)
 553                 model->exit();
 554 }