2 * pata_cmd64x.c - ATI PATA for new ATA layer
4 * Alan Cox <alan@redhat.com>
7 * linux/drivers/ide/pci/cmd64x.c Version 1.30 Sept 10, 2002
9 * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
10 * Note, this driver is not used at all on other systems because
11 * there the "BIOS" has done all of the following already.
12 * Due to massive hardware bugs, UltraDMA is only supported
13 * on the 646U2 and not on the 646U.
15 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
16 * Copyright (C) 1998 David S. Miller (davem@redhat.com)
18 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/init.h>
28 #include <linux/blkdev.h>
29 #include <linux/delay.h>
30 #include <scsi/scsi_host.h>
31 #include <linux/libata.h>
33 #define DRV_NAME "pata_cmd64x"
34 #define DRV_VERSION "0.2.2"
37 * CMD64x specific registers definition.
53 ARTTIM23_DIS_RA2
= 0x04,
54 ARTTIM23_DIS_RA3
= 0x08,
55 ARTTIM23_INTR_CH1
= 0x10,
64 MRDMODE_INTR_CH0
= 0x04,
65 MRDMODE_INTR_CH1
= 0x08,
66 MRDMODE_BLK_CH0
= 0x10,
67 MRDMODE_BLK_CH1
= 0x20,
78 static int cmd64x_pre_reset(struct ata_port
*ap
)
80 ap
->cbl
= ATA_CBL_PATA40
;
81 return ata_std_prereset(ap
);
84 static int cmd648_pre_reset(struct ata_port
*ap
)
86 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
89 /* Check cable detect bits */
90 pci_read_config_byte(pdev
, BMIDECSR
, &r
);
91 if (r
& (1 << ap
->port_no
))
92 ap
->cbl
= ATA_CBL_PATA80
;
94 ap
->cbl
= ATA_CBL_PATA40
;
96 return ata_std_prereset(ap
);
99 static void cmd64x_error_handler(struct ata_port
*ap
)
101 return ata_bmdma_drive_eh(ap
, cmd64x_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
104 static void cmd648_error_handler(struct ata_port
*ap
)
106 ata_bmdma_drive_eh(ap
, cmd648_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
110 * cmd64x_set_piomode - set initial PIO mode data
114 * Called to do the PIO mode setup.
117 static void cmd64x_set_piomode(struct ata_port
*ap
, struct ata_device
*adev
)
119 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
121 const unsigned long T
= 1000000 / 33;
122 const u8 setup_data
[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
126 /* Port layout is not logical so use a table */
127 const u8 arttim_port
[2][2] = {
128 { ARTTIM0
, ARTTIM1
},
129 { ARTTIM23
, ARTTIM23
}
131 const u8 drwtim_port
[2][2] = {
132 { DRWTIM0
, DRWTIM1
},
136 int arttim
= arttim_port
[ap
->port_no
][adev
->devno
];
137 int drwtim
= drwtim_port
[ap
->port_no
][adev
->devno
];
140 if (ata_timing_compute(adev
, adev
->pio_mode
, &t
, T
, 0) < 0) {
141 printk(KERN_ERR DRV_NAME
": mode computation failed.\n");
145 /* Slave has shared address setup */
146 struct ata_device
*pair
= ata_dev_pair(adev
);
149 struct ata_timing tp
;
150 ata_timing_compute(pair
, pair
->pio_mode
, &tp
, T
, 0);
151 ata_timing_merge(&t
, &tp
, &t
, ATA_TIMING_SETUP
);
155 printk(KERN_DEBUG DRV_NAME
": active %d recovery %d setup %d.\n",
156 t
.active
, t
.recover
, t
.setup
);
157 if (t
.recover
> 16) {
158 t
.active
+= t
.recover
- 16;
164 /* Now convert the clocks into values we can actually stuff into
175 t
.setup
= setup_data
[t
.setup
];
177 t
.active
&= 0x0F; /* 0 = 16 */
179 /* Load setup timing */
180 pci_read_config_byte(pdev
, arttim
, ®
);
183 pci_write_config_byte(pdev
, arttim
, reg
);
185 /* Load active/recovery */
186 pci_write_config_byte(pdev
, drwtim
, (t
.active
<< 4) | t
.recover
);
190 * cmd64x_set_dmamode - set initial DMA mode data
194 * Called to do the DMA mode setup.
197 static void cmd64x_set_dmamode(struct ata_port
*ap
, struct ata_device
*adev
)
199 static const u8 udma_data
[] = {
200 0x31, 0x21, 0x11, 0x25, 0x15, 0x05
202 static const u8 mwdma_data
[] = {
206 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
209 int pciU
= UDIDETCR0
+ 8 * ap
->port_no
;
210 int pciD
= BMIDESR0
+ 8 * ap
->port_no
;
211 int shift
= 2 * adev
->devno
;
213 pci_read_config_byte(pdev
, pciD
, ®D
);
214 pci_read_config_byte(pdev
, pciU
, ®U
);
216 regD
&= ~(0x20 << shift
);
217 regU
&= ~(0x35 << shift
);
219 if (adev
->dma_mode
>= XFER_UDMA_0
)
220 regU
|= udma_data
[adev
->dma_mode
- XFER_UDMA_0
] << shift
;
222 regD
|= mwdma_data
[adev
->dma_mode
- XFER_MW_DMA_0
] << shift
;
224 regD
|= 0x20 << adev
->devno
;
226 pci_write_config_byte(pdev
, pciU
, regU
);
227 pci_write_config_byte(pdev
, pciD
, regD
);
231 * cmd648_dma_stop - DMA stop callback
232 * @qc: Command in progress
237 static void cmd648_bmdma_stop(struct ata_queued_cmd
*qc
)
239 struct ata_port
*ap
= qc
->ap
;
240 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
242 int dma_reg
= ap
->port_no
? ARTTIM23_INTR_CH1
: CFR_INTR_CH0
;
243 int dma_mask
= ap
->port_no
? ARTTIM2
: CFR
;
247 pci_read_config_byte(pdev
, dma_reg
, &dma_intr
);
248 pci_write_config_byte(pdev
, dma_reg
, dma_intr
| dma_mask
);
252 * cmd646r1_dma_stop - DMA stop callback
253 * @qc: Command in progress
255 * Stub for now while investigating the r1 quirk in the old driver.
258 static void cmd646r1_bmdma_stop(struct ata_queued_cmd
*qc
)
263 static struct scsi_host_template cmd64x_sht
= {
264 .module
= THIS_MODULE
,
266 .ioctl
= ata_scsi_ioctl
,
267 .queuecommand
= ata_scsi_queuecmd
,
268 .can_queue
= ATA_DEF_QUEUE
,
269 .this_id
= ATA_SHT_THIS_ID
,
270 .sg_tablesize
= LIBATA_MAX_PRD
,
271 .max_sectors
= ATA_MAX_SECTORS
,
272 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
273 .emulated
= ATA_SHT_EMULATED
,
274 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
275 .proc_name
= DRV_NAME
,
276 .dma_boundary
= ATA_DMA_BOUNDARY
,
277 .slave_configure
= ata_scsi_slave_config
,
278 .slave_destroy
= ata_scsi_slave_destroy
,
279 .bios_param
= ata_std_bios_param
,
280 .resume
= ata_scsi_device_resume
,
281 .suspend
= ata_scsi_device_suspend
,
284 static struct ata_port_operations cmd64x_port_ops
= {
285 .port_disable
= ata_port_disable
,
286 .set_piomode
= cmd64x_set_piomode
,
287 .set_dmamode
= cmd64x_set_dmamode
,
288 .mode_filter
= ata_pci_default_filter
,
289 .tf_load
= ata_tf_load
,
290 .tf_read
= ata_tf_read
,
291 .check_status
= ata_check_status
,
292 .exec_command
= ata_exec_command
,
293 .dev_select
= ata_std_dev_select
,
295 .freeze
= ata_bmdma_freeze
,
296 .thaw
= ata_bmdma_thaw
,
297 .error_handler
= cmd64x_error_handler
,
298 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
300 .bmdma_setup
= ata_bmdma_setup
,
301 .bmdma_start
= ata_bmdma_start
,
302 .bmdma_stop
= ata_bmdma_stop
,
303 .bmdma_status
= ata_bmdma_status
,
305 .qc_prep
= ata_qc_prep
,
306 .qc_issue
= ata_qc_issue_prot
,
308 .data_xfer
= ata_pio_data_xfer
,
310 .irq_handler
= ata_interrupt
,
311 .irq_clear
= ata_bmdma_irq_clear
,
313 .port_start
= ata_port_start
,
314 .port_stop
= ata_port_stop
,
315 .host_stop
= ata_host_stop
318 static struct ata_port_operations cmd646r1_port_ops
= {
319 .port_disable
= ata_port_disable
,
320 .set_piomode
= cmd64x_set_piomode
,
321 .set_dmamode
= cmd64x_set_dmamode
,
322 .mode_filter
= ata_pci_default_filter
,
323 .tf_load
= ata_tf_load
,
324 .tf_read
= ata_tf_read
,
325 .check_status
= ata_check_status
,
326 .exec_command
= ata_exec_command
,
327 .dev_select
= ata_std_dev_select
,
329 .freeze
= ata_bmdma_freeze
,
330 .thaw
= ata_bmdma_thaw
,
331 .error_handler
= cmd64x_error_handler
,
332 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
334 .bmdma_setup
= ata_bmdma_setup
,
335 .bmdma_start
= ata_bmdma_start
,
336 .bmdma_stop
= cmd646r1_bmdma_stop
,
337 .bmdma_status
= ata_bmdma_status
,
339 .qc_prep
= ata_qc_prep
,
340 .qc_issue
= ata_qc_issue_prot
,
342 .data_xfer
= ata_pio_data_xfer
,
344 .irq_handler
= ata_interrupt
,
345 .irq_clear
= ata_bmdma_irq_clear
,
347 .port_start
= ata_port_start
,
348 .port_stop
= ata_port_stop
,
349 .host_stop
= ata_host_stop
352 static struct ata_port_operations cmd648_port_ops
= {
353 .port_disable
= ata_port_disable
,
354 .set_piomode
= cmd64x_set_piomode
,
355 .set_dmamode
= cmd64x_set_dmamode
,
356 .mode_filter
= ata_pci_default_filter
,
357 .tf_load
= ata_tf_load
,
358 .tf_read
= ata_tf_read
,
359 .check_status
= ata_check_status
,
360 .exec_command
= ata_exec_command
,
361 .dev_select
= ata_std_dev_select
,
363 .freeze
= ata_bmdma_freeze
,
364 .thaw
= ata_bmdma_thaw
,
365 .error_handler
= cmd648_error_handler
,
366 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
368 .bmdma_setup
= ata_bmdma_setup
,
369 .bmdma_start
= ata_bmdma_start
,
370 .bmdma_stop
= cmd648_bmdma_stop
,
371 .bmdma_status
= ata_bmdma_status
,
373 .qc_prep
= ata_qc_prep
,
374 .qc_issue
= ata_qc_issue_prot
,
376 .data_xfer
= ata_pio_data_xfer
,
378 .irq_handler
= ata_interrupt
,
379 .irq_clear
= ata_bmdma_irq_clear
,
381 .port_start
= ata_port_start
,
382 .port_stop
= ata_port_stop
,
383 .host_stop
= ata_host_stop
386 static int cmd64x_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
390 static struct ata_port_info cmd_info
[6] = {
391 { /* CMD 643 - no UDMA */
393 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
396 .port_ops
= &cmd64x_port_ops
398 { /* CMD 646 with broken UDMA */
400 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
403 .port_ops
= &cmd64x_port_ops
405 { /* CMD 646 with working UDMA */
407 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
410 .udma_mask
= ATA_UDMA1
,
411 .port_ops
= &cmd64x_port_ops
413 { /* CMD 646 rev 1 */
415 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
418 .port_ops
= &cmd646r1_port_ops
422 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
425 .udma_mask
= ATA_UDMA2
,
426 .port_ops
= &cmd648_port_ops
430 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
433 .udma_mask
= ATA_UDMA3
,
434 .port_ops
= &cmd648_port_ops
437 static struct ata_port_info
*port_info
[2], *info
;
440 info
= &cmd_info
[id
->driver_data
];
442 pci_read_config_dword(pdev
, PCI_CLASS_REVISION
, &class_rev
);
445 if (id
->driver_data
== 0) /* 643 */
446 ata_pci_clear_simplex(pdev
);
448 if (pdev
->device
== PCI_DEVICE_ID_CMD_646
) {
449 /* Does UDMA work ? */
452 /* Early rev with other problems ? */
453 else if (class_rev
== 1)
457 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 64);
458 pci_read_config_byte(pdev
, MRDMODE
, &mrdmode
);
459 mrdmode
&= ~ 0x30; /* IRQ set up */
460 mrdmode
|= 0x02; /* Memory read line enable */
461 pci_write_config_byte(pdev
, MRDMODE
, mrdmode
);
463 /* Force PIO 0 here.. */
465 /* PPC specific fixup copied from old driver */
467 pci_write_config_byte(pdev
, UDIDETCR0
, 0xF0);
470 port_info
[0] = port_info
[1] = info
;
471 return ata_pci_init_one(pdev
, port_info
, 2);
474 static int cmd64x_reinit_one(struct pci_dev
*pdev
)
477 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 64);
478 pci_read_config_byte(pdev
, MRDMODE
, &mrdmode
);
479 mrdmode
&= ~ 0x30; /* IRQ set up */
480 mrdmode
|= 0x02; /* Memory read line enable */
481 pci_write_config_byte(pdev
, MRDMODE
, mrdmode
);
483 pci_write_config_byte(pdev
, UDIDETCR0
, 0xF0);
485 return ata_pci_device_resume(pdev
);
488 static const struct pci_device_id cmd64x
[] = {
489 { PCI_VDEVICE(CMD
, PCI_DEVICE_ID_CMD_643
), 0 },
490 { PCI_VDEVICE(CMD
, PCI_DEVICE_ID_CMD_646
), 1 },
491 { PCI_VDEVICE(CMD
, PCI_DEVICE_ID_CMD_648
), 4 },
492 { PCI_VDEVICE(CMD
, PCI_DEVICE_ID_CMD_649
), 5 },
497 static struct pci_driver cmd64x_pci_driver
= {
500 .probe
= cmd64x_init_one
,
501 .remove
= ata_pci_remove_one
,
502 .suspend
= ata_pci_device_suspend
,
503 .resume
= cmd64x_reinit_one
,
506 static int __init
cmd64x_init(void)
508 return pci_register_driver(&cmd64x_pci_driver
);
511 static void __exit
cmd64x_exit(void)
513 pci_unregister_driver(&cmd64x_pci_driver
);
516 MODULE_AUTHOR("Alan Cox");
517 MODULE_DESCRIPTION("low-level driver for CMD64x series PATA controllers");
518 MODULE_LICENSE("GPL");
519 MODULE_DEVICE_TABLE(pci
, cmd64x
);
520 MODULE_VERSION(DRV_VERSION
);
522 module_init(cmd64x_init
);
523 module_exit(cmd64x_exit
);