USB: whci-hcd: provide a endpoint_reset method
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / pci / msi.h
blob71f4df2ef65499d84481441be24015f3b0c17398
1 /*
2 * Copyright (C) 2003-2004 Intel
3 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
4 */
6 #ifndef MSI_H
7 #define MSI_H
9 #define PCI_MSIX_ENTRY_SIZE 16
10 #define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0
11 #define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4
12 #define PCI_MSIX_ENTRY_DATA_OFFSET 8
13 #define PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET 12
15 #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
16 #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
17 #define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI)
18 #define msi_data_reg(base, is64bit) \
19 ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 )
20 #define msi_mask_bits_reg(base, is64bit) \
21 ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4)
22 #define msi_disable(control) control &= ~PCI_MSI_FLAGS_ENABLE
23 #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT))
24 #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT))
26 #define msix_table_offset_reg(base) (base + 0x04)
27 #define msix_pba_offset_reg(base) (base + 0x08)
28 #define msix_enable(control) control |= PCI_MSIX_FLAGS_ENABLE
29 #define msix_disable(control) control &= ~PCI_MSIX_FLAGS_ENABLE
30 #define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1)
31 #define multi_msix_capable msix_table_size
32 #define msix_unmask(address) (address & ~PCI_MSIX_FLAGS_BITMASK)
33 #define msix_mask(address) (address | PCI_MSIX_FLAGS_BITMASK)
34 #define msix_is_pending(address) (address & PCI_MSIX_FLAGS_PENDMASK)
36 #endif /* MSI_H */