arch/arm/mach-davinci/psc.c

   1 /*
   2  * TI DaVinci Power and Sleep Controller (PSC)
   3  *
   4  * Copyright (C) 2006 Texas Instruments.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  */
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/io.h>
  24
  25 #include <mach/cputype.h>
  26 #include <mach/psc.h>
  27
  28 /* PSC register offsets */
  29 #define EPCPR           0x070
  30 #define PTCMD           0x120
  31 #define PTSTAT          0x128
  32 #define PDSTAT          0x200
  33 #define PDCTL1          0x304
  34 #define MDSTAT          0x800
  35 #define MDCTL           0xA00
  36
  37 #define MDSTAT_STATE_MASK 0x1f
  38
  39 /* Return nonzero iff the domain's clock is active */
  40 int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
  41 {
  42         void __iomem *psc_base;
  43         u32 mdstat;
  44         struct davinci_soc_info *soc_info = &davinci_soc_info;
  45
  46         if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
  47                 pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
  48                                 (int)soc_info->psc_bases, ctlr);
  49                 return 0;
  50         }
  51
  52         psc_base = soc_info->psc_bases[ctlr];
  53         mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
  54
  55         /* if clocked, state can be "Enable" or "SyncReset" */
  56         return mdstat & BIT(12);
  57 }
  58
  59 /* Enable or disable a PSC domain */
  60 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
  61                 unsigned int id, char enable)
  62 {
  63         u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
  64         void __iomem *psc_base;
  65         struct davinci_soc_info *soc_info = &davinci_soc_info;
  66         u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */
  67
  68         if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
  69                 pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
  70                                 (int)soc_info->psc_bases, ctlr);
  71                 return;
  72         }
  73
  74         psc_base = soc_info->psc_bases[ctlr];
  75
  76         mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
  77         mdctl &= ~MDSTAT_STATE_MASK;
  78         mdctl |= next_state;
  79         __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
  80
  81         pdstat = __raw_readl(psc_base + PDSTAT);
  82         if ((pdstat & 0x00000001) == 0) {
  83                 pdctl1 = __raw_readl(psc_base + PDCTL1);
  84                 pdctl1 |= 0x1;
  85                 __raw_writel(pdctl1, psc_base + PDCTL1);
  86
  87                 ptcmd = 1 << domain;
  88                 __raw_writel(ptcmd, psc_base + PTCMD);
  89
  90                 do {
  91                         epcpr = __raw_readl(psc_base + EPCPR);
  92                 } while ((((epcpr >> domain) & 1) == 0));
  93
  94                 pdctl1 = __raw_readl(psc_base + PDCTL1);
  95                 pdctl1 |= 0x100;
  96                 __raw_writel(pdctl1, psc_base + PDCTL1);
  97
  98                 do {
  99                         ptstat = __raw_readl(psc_base +
 100                                                PTSTAT);
 101                 } while (!(((ptstat >> domain) & 1) == 0));
 102         } else {
 103                 ptcmd = 1 << domain;
 104                 __raw_writel(ptcmd, psc_base + PTCMD);
 105
 106                 do {
 107                         ptstat = __raw_readl(psc_base + PTSTAT);
 108                 } while (!(((ptstat >> domain) & 1) == 0));
 109         }
 110
 111         do {
 112                 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
 113         } while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
 114 }