?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
davinci: move DDR2 controller defines to memory.h
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-davinci / board-da830-evm.c
blobdc19870b23cd326dcc99795266d00f85df08da7f
1 /*
2 * TI DA830/OMAP L137 EVM board
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6 *
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c/pcf857x.h>
20 #include <linux/i2c/at24.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23
24 #include <asm/mach-types.h>
25 #include <asm/mach/arch.h>
26
27 #include <mach/cp_intc.h>
28 #include <mach/mux.h>
29 #include <mach/nand.h>
30 #include <mach/da8xx.h>
31 #include <mach/usb.h>
32
33 #define DA830_EVM_PHY_MASK 0x0
34 #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
35
36 #define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
37 #define DA830_EMIF25_CONTROL_BASE 0x68000000
38
39 /*
40 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
41 */
42 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
43 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
44
45 static const short da830_evm_usb11_pins[] = {
46 DA830_GPIO1_15, DA830_GPIO2_4,
47 -1
48 };
49
50 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
51
52 static int da830_evm_usb_set_power(unsigned port, int on)
53 {
54 gpio_set_value(ON_BD_USB_DRV, on);
55 return 0;
56 }
57
58 static int da830_evm_usb_get_power(unsigned port)
59 {
60 return gpio_get_value(ON_BD_USB_DRV);
61 }
62
63 static int da830_evm_usb_get_oci(unsigned port)
64 {
65 return !gpio_get_value(ON_BD_USB_OVC);
66 }
67
68 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
69
70 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
71 {
72 int irq = gpio_to_irq(ON_BD_USB_OVC);
73 int error = 0;
74
75 if (handler != NULL) {
76 da830_evm_usb_ocic_handler = handler;
77
78 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
79 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
80 "OHCI over-current indicator", NULL);
81 if (error)
82 printk(KERN_ERR "%s: could not request IRQ to watch "
83 "over-current indicator changes\n", __func__);
84 } else
85 free_irq(irq, NULL);
86
87 return error;
88 }
89
90 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
91 .set_power = da830_evm_usb_set_power,
92 .get_power = da830_evm_usb_get_power,
93 .get_oci = da830_evm_usb_get_oci,
94 .ocic_notify = da830_evm_usb_ocic_notify,
95
96 /* TPS2065 switch @ 5V */
97 .potpgt = (3 + 1) / 2, /* 3 ms max */
98 };
99
100 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
101 {
102 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
103 return IRQ_HANDLED;
104 }
105
106 static __init void da830_evm_usb_init(void)
107 {
108 u32 cfgchip2;
109 int ret;
110
111 /*
112 * Set up USB clock/mode in the CFGCHIP2 register.
113 * FYI: CFGCHIP2 is 0x0000ef00 initially.
114 */
115 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
116
117 /* USB2.0 PHY reference clock is 24 MHz */
118 cfgchip2 &= ~CFGCHIP2_REFFREQ;
119 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
120
121 /*
122 * Select internal reference clock for USB 2.0 PHY
123 * and use it as a clock source for USB 1.1 PHY
124 * (this is the default setting anyway).
125 */
126 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
127 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
128
129 /*
130 * We have to override VBUS/ID signals when MUSB is configured into the
131 * host-only mode -- ID pin will float if no cable is connected, so the
132 * controller won't be able to drive VBUS thinking that it's a B-device.
133 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
134 */
135 cfgchip2 &= ~CFGCHIP2_OTGMODE;
136 #ifdef CONFIG_USB_MUSB_HOST
137 cfgchip2 |= CFGCHIP2_FORCE_HOST;
138 #else
139 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
140 #endif
141
142 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
143
144 /* USB_REFCLKIN is not used. */
145 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
146 if (ret)
147 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
148 __func__, ret);
149 else {
150 /*
151 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
152 * with the power on to power good time of 3 ms.
153 */
154 ret = da8xx_register_usb20(1000, 3);
155 if (ret)
156 pr_warning("%s: USB 2.0 registration failed: %d\n",
157 __func__, ret);
158 }
159
160 ret = da8xx_pinmux_setup(da830_evm_usb11_pins);
161 if (ret) {
162 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
163 __func__, ret);
164 return;
165 }
166
167 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
168 if (ret) {
169 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
170 "power control: %d\n", __func__, ret);
171 return;
172 }
173 gpio_direction_output(ON_BD_USB_DRV, 0);
174
175 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
176 if (ret) {
177 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
178 "over-current indicator: %d\n", __func__, ret);
179 return;
180 }
181 gpio_direction_input(ON_BD_USB_OVC);
182
183 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
184 if (ret)
185 pr_warning("%s: USB 1.1 registration failed: %d\n",
186 __func__, ret);
187 }
188
189 static struct davinci_uart_config da830_evm_uart_config __initdata = {
190 .enabled_uarts = 0x7,
191 };
192
193 static const short da830_evm_mcasp1_pins[] = {
194 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
195 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
196 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
197 DA830_AXR1_11,
198 -1
199 };
200
201 static u8 da830_iis_serializer_direction[] = {
202 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
203 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
204 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
205 };
206
207 static struct snd_platform_data da830_evm_snd_data = {
208 .tx_dma_offset = 0x2000,
209 .rx_dma_offset = 0x2000,
210 .op_mode = DAVINCI_MCASP_IIS_MODE,
211 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
212 .tdm_slots = 2,
213 .serial_dir = da830_iis_serializer_direction,
214 .eventq_no = EVENTQ_0,
215 .version = MCASP_VERSION_2,
216 .txnumevt = 1,
217 .rxnumevt = 1,
218 };
219
220 /*
221 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
222 */
223 static const short da830_evm_mmc_sd_pins[] = {
224 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
225 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
226 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
227 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
228 -1
229 };
230
231 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
232
233 static int da830_evm_mmc_get_ro(int index)
234 {
235 return gpio_get_value(DA830_MMCSD_WP_PIN);
236 }
237
238 static struct davinci_mmc_config da830_evm_mmc_config = {
239 .get_ro = da830_evm_mmc_get_ro,
240 .wires = 4,
241 .max_freq = 50000000,
242 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
243 .version = MMC_CTLR_VERSION_2,
244 };
245
246 static inline void da830_evm_init_mmc(void)
247 {
248 int ret;
249
250 ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins);
251 if (ret) {
252 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
253 ret);
254 return;
255 }
256
257 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
258 if (ret) {
259 pr_warning("da830_evm_init: can not open GPIO %d\n",
260 DA830_MMCSD_WP_PIN);
261 return;
262 }
263 gpio_direction_input(DA830_MMCSD_WP_PIN);
264
265 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
266 if (ret) {
267 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
268 ret);
269 gpio_free(DA830_MMCSD_WP_PIN);
270 }
271 }
272
273 /*
274 * UI board NAND/NOR flashes only use 8-bit data bus.
275 */
276 static const short da830_evm_emif25_pins[] = {
277 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
278 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
279 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
280 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
281 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
282 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
283 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
284 -1
285 };
286
287 #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
288 #define HAS_MMC 1
289 #else
290 #define HAS_MMC 0
291 #endif
292
293 #ifdef CONFIG_DA830_UI_NAND
294 static struct mtd_partition da830_evm_nand_partitions[] = {
295 /* bootloader (U-Boot, etc) in first sector */
296 [0] = {
297 .name = "bootloader",
298 .offset = 0,
299 .size = SZ_128K,
300 .mask_flags = MTD_WRITEABLE, /* force read-only */
301 },
302 /* bootloader params in the next sector */
303 [1] = {
304 .name = "params",
305 .offset = MTDPART_OFS_APPEND,
306 .size = SZ_128K,
307 .mask_flags = MTD_WRITEABLE, /* force read-only */
308 },
309 /* kernel */
310 [2] = {
311 .name = "kernel",
312 .offset = MTDPART_OFS_APPEND,
313 .size = SZ_2M,
314 .mask_flags = 0,
315 },
316 /* file system */
317 [3] = {
318 .name = "filesystem",
319 .offset = MTDPART_OFS_APPEND,
320 .size = MTDPART_SIZ_FULL,
321 .mask_flags = 0,
322 }
323 };
324
325 /* flash bbt decriptors */
326 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
327 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
328
329 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
330 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
331 NAND_BBT_WRITE | NAND_BBT_2BIT |
332 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
333 .offs = 2,
334 .len = 4,
335 .veroffs = 16,
336 .maxblocks = 4,
337 .pattern = da830_evm_nand_bbt_pattern
338 };
339
340 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
341 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
342 NAND_BBT_WRITE | NAND_BBT_2BIT |
343 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
344 .offs = 2,
345 .len = 4,
346 .veroffs = 16,
347 .maxblocks = 4,
348 .pattern = da830_evm_nand_mirror_pattern
349 };
350
351 static struct davinci_nand_pdata da830_evm_nand_pdata = {
352 .parts = da830_evm_nand_partitions,
353 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
354 .ecc_mode = NAND_ECC_HW,
355 .ecc_bits = 4,
356 .options = NAND_USE_FLASH_BBT,
357 .bbt_td = &da830_evm_nand_bbt_main_descr,
358 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
359 };
360
361 static struct resource da830_evm_nand_resources[] = {
362 [0] = { /* First memory resource is NAND I/O window */
363 .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE,
364 .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1,
365 .flags = IORESOURCE_MEM,
366 },
367 [1] = { /* Second memory resource is AEMIF control registers */
368 .start = DA830_EMIF25_CONTROL_BASE,
369 .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1,
370 .flags = IORESOURCE_MEM,
371 },
372 };
373
374 static struct platform_device da830_evm_nand_device = {
375 .name = "davinci_nand",
376 .id = 1,
377 .dev = {
378 .platform_data = &da830_evm_nand_pdata,
379 },
380 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
381 .resource = da830_evm_nand_resources,
382 };
383
384 static inline void da830_evm_init_nand(int mux_mode)
385 {
386 int ret;
387
388 if (HAS_MMC) {
389 pr_warning("WARNING: both MMC/SD and NAND are "
390 "enabled, but they share AEMIF pins.\n"
391 "\tDisable MMC/SD for NAND support.\n");
392 return;
393 }
394
395 ret = da8xx_pinmux_setup(da830_evm_emif25_pins);
396 if (ret)
397 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
398 ret);
399
400 ret = platform_device_register(&da830_evm_nand_device);
401 if (ret)
402 pr_warning("da830_evm_init: NAND device not registered.\n");
403
404 gpio_direction_output(mux_mode, 1);
405 }
406 #else
407 static inline void da830_evm_init_nand(int mux_mode) { }
408 #endif
409
410 #ifdef CONFIG_DA830_UI_LCD
411 static inline void da830_evm_init_lcdc(int mux_mode)
412 {
413 int ret;
414
415 ret = da8xx_pinmux_setup(da830_lcdcntl_pins);
416 if (ret)
417 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
418 ret);
419
420 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
421 if (ret)
422 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
423
424 gpio_direction_output(mux_mode, 0);
425 }
426 #else
427 static inline void da830_evm_init_lcdc(int mux_mode) { }
428 #endif
429
430 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
431 .byte_len = SZ_256K / 8,
432 .page_size = 64,
433 .flags = AT24_FLAG_ADDR16,
434 .setup = davinci_get_mac_addr,
435 .context = (void *)0x7f00,
436 };
437
438 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
439 int gpio, unsigned ngpio, void *context)
440 {
441 gpio_request(gpio + 6, "UI MUX_MODE");
442
443 /* Drive mux mode low to match the default without UI card */
444 gpio_direction_output(gpio + 6, 0);
445
446 da830_evm_init_lcdc(gpio + 6);
447
448 da830_evm_init_nand(gpio + 6);
449
450 return 0;
451 }
452
453 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
454 unsigned ngpio, void *context)
455 {
456 gpio_free(gpio + 6);
457 return 0;
458 }
459
460 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
461 .gpio_base = DAVINCI_N_GPIO,
462 .setup = da830_evm_ui_expander_setup,
463 .teardown = da830_evm_ui_expander_teardown,
464 };
465
466 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
467 {
468 I2C_BOARD_INFO("24c256", 0x50),
469 .platform_data = &da830_evm_i2c_eeprom_info,
470 },
471 {
472 I2C_BOARD_INFO("tlv320aic3x", 0x18),
473 },
474 {
475 I2C_BOARD_INFO("pcf8574", 0x3f),
476 .platform_data = &da830_evm_ui_expander_info,
477 },
478 };
479
480 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
481 .bus_freq = 100, /* kHz */
482 .bus_delay = 0, /* usec */
483 };
484
485 static __init void da830_evm_init(void)
486 {
487 struct davinci_soc_info *soc_info = &davinci_soc_info;
488 int ret;
489
490 ret = da8xx_register_edma();
491 if (ret)
492 pr_warning("da830_evm_init: edma registration failed: %d\n",
493 ret);
494
495 ret = da8xx_pinmux_setup(da830_i2c0_pins);
496 if (ret)
497 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
498 ret);
499
500 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
501 if (ret)
502 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
503 ret);
504
505 da830_evm_usb_init();
506
507 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
508 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
509 soc_info->emac_pdata->rmii_en = 1;
510
511 ret = da8xx_pinmux_setup(da830_cpgmac_pins);
512 if (ret)
513 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
514 ret);
515
516 ret = da8xx_register_emac();
517 if (ret)
518 pr_warning("da830_evm_init: emac registration failed: %d\n",
519 ret);
520
521 ret = da8xx_register_watchdog();
522 if (ret)
523 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
524 ret);
525
526 davinci_serial_init(&da830_evm_uart_config);
527 i2c_register_board_info(1, da830_evm_i2c_devices,
528 ARRAY_SIZE(da830_evm_i2c_devices));
529
530 ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins);
531 if (ret)
532 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
533 ret);
534
535 da8xx_register_mcasp(1, &da830_evm_snd_data);
536
537 da830_evm_init_mmc();
538
539 ret = da8xx_register_rtc();
540 if (ret)
541 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
542 }
543
544 #ifdef CONFIG_SERIAL_8250_CONSOLE
545 static int __init da830_evm_console_init(void)
546 {
547 return add_preferred_console("ttyS", 2, "115200");
548 }
549 console_initcall(da830_evm_console_init);
550 #endif
551
552 static __init void da830_evm_irq_init(void)
553 {
554 struct davinci_soc_info *soc_info = &davinci_soc_info;
555
556 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
557 soc_info->intc_irq_prios);
558 }
559
560 static void __init da830_evm_map_io(void)
561 {
562 da830_init();
563 }
564
565 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
566 .phys_io = IO_PHYS,
567 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
568 .boot_params = (DA8XX_DDR_BASE + 0x100),
569 .map_io = da830_evm_map_io,
570 .init_irq = da830_evm_irq_init,
571 .timer = &davinci_timer,
572 .init_machine = da830_evm_init,
573 MACHINE_END
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree