2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
37 #include <asm/delay.h>
43 /* Board/System/Debug information/definition ---------------- */
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
47 #define CARDNAME "dm9000"
48 #define DRV_VERSION "1.31"
50 #ifdef CONFIG_BLACKFIN
60 * Transmit timeout, default 5 seconds.
62 static int watchdog
= 5000;
63 module_param(watchdog
, int, 0400);
64 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
66 /* DM9000 register address locking.
68 * The DM9000 uses an address register to control where data written
69 * to the data register goes. This means that the address register
70 * must be preserved over interrupts or similar calls.
72 * During interrupt and other critical calls, a spinlock is used to
73 * protect the system, but the calls themselves save the address
74 * in the address register in case they are interrupting another
75 * access to the device.
77 * For general accesses a lock is provided so that calls which are
78 * allowed to sleep are serialised so that the address register does
79 * not need to be saved. This lock also serves to serialise access
80 * to the EEPROM and PHY access registers which are shared between
84 /* The driver supports the original DM9000E, and now the two newer
85 * devices, DM9000A and DM9000B.
89 TYPE_DM9000E
, /* original DM9000 */
94 /* Structure/enum declaration ------------------------------- */
95 typedef struct board_info
{
97 void __iomem
*io_addr
; /* Register I/O base address */
98 void __iomem
*io_data
; /* Data I/O address */
103 u16 queue_start_addr
;
105 u8 io_mode
; /* 0:word, 2:byte */
110 unsigned int in_suspend
:1;
113 enum dm9000_type type
;
115 void (*inblk
)(void __iomem
*port
, void *data
, int length
);
116 void (*outblk
)(void __iomem
*port
, void *data
, int length
);
117 void (*dumpblk
)(void __iomem
*port
, int length
);
119 struct device
*dev
; /* parent device */
121 struct resource
*addr_res
; /* resources found */
122 struct resource
*data_res
;
123 struct resource
*addr_req
; /* resources requested */
124 struct resource
*data_req
;
125 struct resource
*irq_res
;
127 struct mutex addr_lock
; /* phy and eeprom access lock */
129 struct delayed_work phy_poll
;
130 struct net_device
*ndev
;
134 struct mii_if_info mii
;
140 #define dm9000_dbg(db, lev, msg...) do { \
141 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
142 (lev) < db->debug_level) { \
143 dev_dbg(db->dev, msg); \
147 static inline board_info_t
*to_dm9000_board(struct net_device
*dev
)
152 /* DM9000 network board routine ---------------------------- */
155 dm9000_reset(board_info_t
* db
)
157 dev_dbg(db
->dev
, "resetting device\n");
160 writeb(DM9000_NCR
, db
->io_addr
);
162 writeb(NCR_RST
, db
->io_data
);
167 * Read a byte from I/O port
170 ior(board_info_t
* db
, int reg
)
172 writeb(reg
, db
->io_addr
);
173 return readb(db
->io_data
);
177 * Write a byte to I/O port
181 iow(board_info_t
* db
, int reg
, int value
)
183 writeb(reg
, db
->io_addr
);
184 writeb(value
, db
->io_data
);
187 /* routines for sending block to chip */
189 static void dm9000_outblk_8bit(void __iomem
*reg
, void *data
, int count
)
191 writesb(reg
, data
, count
);
194 static void dm9000_outblk_16bit(void __iomem
*reg
, void *data
, int count
)
196 writesw(reg
, data
, (count
+1) >> 1);
199 static void dm9000_outblk_32bit(void __iomem
*reg
, void *data
, int count
)
201 writesl(reg
, data
, (count
+3) >> 2);
204 /* input block from chip to memory */
206 static void dm9000_inblk_8bit(void __iomem
*reg
, void *data
, int count
)
208 readsb(reg
, data
, count
);
212 static void dm9000_inblk_16bit(void __iomem
*reg
, void *data
, int count
)
214 readsw(reg
, data
, (count
+1) >> 1);
217 static void dm9000_inblk_32bit(void __iomem
*reg
, void *data
, int count
)
219 readsl(reg
, data
, (count
+3) >> 2);
222 /* dump block from chip to null */
224 static void dm9000_dumpblk_8bit(void __iomem
*reg
, int count
)
229 for (i
= 0; i
< count
; i
++)
233 static void dm9000_dumpblk_16bit(void __iomem
*reg
, int count
)
238 count
= (count
+ 1) >> 1;
240 for (i
= 0; i
< count
; i
++)
244 static void dm9000_dumpblk_32bit(void __iomem
*reg
, int count
)
249 count
= (count
+ 3) >> 2;
251 for (i
= 0; i
< count
; i
++)
257 * select the specified set of io routines to use with the
261 static void dm9000_set_io(struct board_info
*db
, int byte_width
)
263 /* use the size of the data resource to work out what IO
264 * routines we want to use
267 switch (byte_width
) {
269 db
->dumpblk
= dm9000_dumpblk_8bit
;
270 db
->outblk
= dm9000_outblk_8bit
;
271 db
->inblk
= dm9000_inblk_8bit
;
276 dev_dbg(db
->dev
, ": 3 byte IO, falling back to 16bit\n");
278 db
->dumpblk
= dm9000_dumpblk_16bit
;
279 db
->outblk
= dm9000_outblk_16bit
;
280 db
->inblk
= dm9000_inblk_16bit
;
285 db
->dumpblk
= dm9000_dumpblk_32bit
;
286 db
->outblk
= dm9000_outblk_32bit
;
287 db
->inblk
= dm9000_inblk_32bit
;
292 static void dm9000_schedule_poll(board_info_t
*db
)
294 if (db
->type
== TYPE_DM9000E
)
295 schedule_delayed_work(&db
->phy_poll
, HZ
* 2);
298 static int dm9000_ioctl(struct net_device
*dev
, struct ifreq
*req
, int cmd
)
300 board_info_t
*dm
= to_dm9000_board(dev
);
302 if (!netif_running(dev
))
305 return generic_mii_ioctl(&dm
->mii
, if_mii(req
), cmd
, NULL
);
309 dm9000_read_locked(board_info_t
*db
, int reg
)
314 spin_lock_irqsave(&db
->lock
, flags
);
316 spin_unlock_irqrestore(&db
->lock
, flags
);
321 static int dm9000_wait_eeprom(board_info_t
*db
)
324 int timeout
= 8; /* wait max 8msec */
326 /* The DM9000 data sheets say we should be able to
327 * poll the ERRE bit in EPCR to wait for the EEPROM
328 * operation. From testing several chips, this bit
329 * does not seem to work.
331 * We attempt to use the bit, but fall back to the
332 * timeout (which is why we do not return an error
333 * on expiry) to say that the EEPROM operation has
338 status
= dm9000_read_locked(db
, DM9000_EPCR
);
340 if ((status
& EPCR_ERRE
) == 0)
346 dev_dbg(db
->dev
, "timeout waiting EEPROM\n");
355 * Read a word data from EEPROM
358 dm9000_read_eeprom(board_info_t
*db
, int offset
, u8
*to
)
362 if (db
->flags
& DM9000_PLATF_NO_EEPROM
) {
368 mutex_lock(&db
->addr_lock
);
370 spin_lock_irqsave(&db
->lock
, flags
);
372 iow(db
, DM9000_EPAR
, offset
);
373 iow(db
, DM9000_EPCR
, EPCR_ERPRR
);
375 spin_unlock_irqrestore(&db
->lock
, flags
);
377 dm9000_wait_eeprom(db
);
379 /* delay for at-least 150uS */
382 spin_lock_irqsave(&db
->lock
, flags
);
384 iow(db
, DM9000_EPCR
, 0x0);
386 to
[0] = ior(db
, DM9000_EPDRL
);
387 to
[1] = ior(db
, DM9000_EPDRH
);
389 spin_unlock_irqrestore(&db
->lock
, flags
);
391 mutex_unlock(&db
->addr_lock
);
395 * Write a word data to SROM
398 dm9000_write_eeprom(board_info_t
*db
, int offset
, u8
*data
)
402 if (db
->flags
& DM9000_PLATF_NO_EEPROM
)
405 mutex_lock(&db
->addr_lock
);
407 spin_lock_irqsave(&db
->lock
, flags
);
408 iow(db
, DM9000_EPAR
, offset
);
409 iow(db
, DM9000_EPDRH
, data
[1]);
410 iow(db
, DM9000_EPDRL
, data
[0]);
411 iow(db
, DM9000_EPCR
, EPCR_WEP
| EPCR_ERPRW
);
412 spin_unlock_irqrestore(&db
->lock
, flags
);
414 dm9000_wait_eeprom(db
);
416 mdelay(1); /* wait at least 150uS to clear */
418 spin_lock_irqsave(&db
->lock
, flags
);
419 iow(db
, DM9000_EPCR
, 0);
420 spin_unlock_irqrestore(&db
->lock
, flags
);
422 mutex_unlock(&db
->addr_lock
);
427 static void dm9000_get_drvinfo(struct net_device
*dev
,
428 struct ethtool_drvinfo
*info
)
430 board_info_t
*dm
= to_dm9000_board(dev
);
432 strcpy(info
->driver
, CARDNAME
);
433 strcpy(info
->version
, DRV_VERSION
);
434 strcpy(info
->bus_info
, to_platform_device(dm
->dev
)->name
);
437 static u32
dm9000_get_msglevel(struct net_device
*dev
)
439 board_info_t
*dm
= to_dm9000_board(dev
);
441 return dm
->msg_enable
;
444 static void dm9000_set_msglevel(struct net_device
*dev
, u32 value
)
446 board_info_t
*dm
= to_dm9000_board(dev
);
448 dm
->msg_enable
= value
;
451 static int dm9000_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
453 board_info_t
*dm
= to_dm9000_board(dev
);
455 mii_ethtool_gset(&dm
->mii
, cmd
);
459 static int dm9000_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
461 board_info_t
*dm
= to_dm9000_board(dev
);
463 return mii_ethtool_sset(&dm
->mii
, cmd
);
466 static int dm9000_nway_reset(struct net_device
*dev
)
468 board_info_t
*dm
= to_dm9000_board(dev
);
469 return mii_nway_restart(&dm
->mii
);
472 static u32
dm9000_get_link(struct net_device
*dev
)
474 board_info_t
*dm
= to_dm9000_board(dev
);
477 if (dm
->flags
& DM9000_PLATF_EXT_PHY
)
478 ret
= mii_link_ok(&dm
->mii
);
480 ret
= dm9000_read_locked(dm
, DM9000_NSR
) & NSR_LINKST
? 1 : 0;
485 #define DM_EEPROM_MAGIC (0x444D394B)
487 static int dm9000_get_eeprom_len(struct net_device
*dev
)
492 static int dm9000_get_eeprom(struct net_device
*dev
,
493 struct ethtool_eeprom
*ee
, u8
*data
)
495 board_info_t
*dm
= to_dm9000_board(dev
);
496 int offset
= ee
->offset
;
500 /* EEPROM access is aligned to two bytes */
502 if ((len
& 1) != 0 || (offset
& 1) != 0)
505 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
508 ee
->magic
= DM_EEPROM_MAGIC
;
510 for (i
= 0; i
< len
; i
+= 2)
511 dm9000_read_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
516 static int dm9000_set_eeprom(struct net_device
*dev
,
517 struct ethtool_eeprom
*ee
, u8
*data
)
519 board_info_t
*dm
= to_dm9000_board(dev
);
520 int offset
= ee
->offset
;
524 /* EEPROM access is aligned to two bytes */
526 if ((len
& 1) != 0 || (offset
& 1) != 0)
529 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
532 if (ee
->magic
!= DM_EEPROM_MAGIC
)
535 for (i
= 0; i
< len
; i
+= 2)
536 dm9000_write_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
541 static const struct ethtool_ops dm9000_ethtool_ops
= {
542 .get_drvinfo
= dm9000_get_drvinfo
,
543 .get_settings
= dm9000_get_settings
,
544 .set_settings
= dm9000_set_settings
,
545 .get_msglevel
= dm9000_get_msglevel
,
546 .set_msglevel
= dm9000_set_msglevel
,
547 .nway_reset
= dm9000_nway_reset
,
548 .get_link
= dm9000_get_link
,
549 .get_eeprom_len
= dm9000_get_eeprom_len
,
550 .get_eeprom
= dm9000_get_eeprom
,
551 .set_eeprom
= dm9000_set_eeprom
,
554 static void dm9000_show_carrier(board_info_t
*db
,
555 unsigned carrier
, unsigned nsr
)
557 struct net_device
*ndev
= db
->ndev
;
558 unsigned ncr
= dm9000_read_locked(db
, DM9000_NCR
);
561 dev_info(db
->dev
, "%s: link up, %dMbps, %s-duplex, no LPA\n",
562 ndev
->name
, (nsr
& NSR_SPEED
) ? 10 : 100,
563 (ncr
& NCR_FDX
) ? "full" : "half");
565 dev_info(db
->dev
, "%s: link down\n", ndev
->name
);
569 dm9000_poll_work(struct work_struct
*w
)
571 struct delayed_work
*dw
= container_of(w
, struct delayed_work
, work
);
572 board_info_t
*db
= container_of(dw
, board_info_t
, phy_poll
);
573 struct net_device
*ndev
= db
->ndev
;
575 if (db
->flags
& DM9000_PLATF_SIMPLE_PHY
&&
576 !(db
->flags
& DM9000_PLATF_EXT_PHY
)) {
577 unsigned nsr
= dm9000_read_locked(db
, DM9000_NSR
);
578 unsigned old_carrier
= netif_carrier_ok(ndev
) ? 1 : 0;
579 unsigned new_carrier
;
581 new_carrier
= (nsr
& NSR_LINKST
) ? 1 : 0;
583 if (old_carrier
!= new_carrier
) {
584 if (netif_msg_link(db
))
585 dm9000_show_carrier(db
, new_carrier
, nsr
);
588 netif_carrier_off(ndev
);
590 netif_carrier_on(ndev
);
593 mii_check_media(&db
->mii
, netif_msg_link(db
), 0);
595 if (netif_running(ndev
))
596 dm9000_schedule_poll(db
);
599 /* dm9000_release_board
601 * release a board, and any mapped resources
605 dm9000_release_board(struct platform_device
*pdev
, struct board_info
*db
)
607 /* unmap our resources */
609 iounmap(db
->io_addr
);
610 iounmap(db
->io_data
);
612 /* release the resources */
614 release_resource(db
->data_req
);
617 release_resource(db
->addr_req
);
621 static unsigned char dm9000_type_to_char(enum dm9000_type type
)
624 case TYPE_DM9000E
: return 'e';
625 case TYPE_DM9000A
: return 'a';
626 case TYPE_DM9000B
: return 'b';
633 * Set DM9000 multicast address
636 dm9000_hash_table(struct net_device
*dev
)
638 board_info_t
*db
= (board_info_t
*) dev
->priv
;
639 struct dev_mc_list
*mcptr
= dev
->mc_list
;
640 int mc_cnt
= dev
->mc_count
;
644 u8 rcr
= RCR_DIS_LONG
| RCR_DIS_CRC
| RCR_RXEN
;
647 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
649 spin_lock_irqsave(&db
->lock
, flags
);
651 for (i
= 0, oft
= DM9000_PAR
; i
< 6; i
++, oft
++)
652 iow(db
, oft
, dev
->dev_addr
[i
]);
654 /* Clear Hash Table */
655 for (i
= 0; i
< 4; i
++)
658 /* broadcast address */
659 hash_table
[3] = 0x8000;
661 if (dev
->flags
& IFF_PROMISC
)
664 if (dev
->flags
& IFF_ALLMULTI
)
667 /* the multicast address in Hash Table : 64 bits */
668 for (i
= 0; i
< mc_cnt
; i
++, mcptr
= mcptr
->next
) {
669 hash_val
= ether_crc_le(6, mcptr
->dmi_addr
) & 0x3f;
670 hash_table
[hash_val
/ 16] |= (u16
) 1 << (hash_val
% 16);
673 /* Write the hash table to MAC MD table */
674 for (i
= 0, oft
= DM9000_MAR
; i
< 4; i
++) {
675 iow(db
, oft
++, hash_table
[i
]);
676 iow(db
, oft
++, hash_table
[i
] >> 8);
679 iow(db
, DM9000_RCR
, rcr
);
680 spin_unlock_irqrestore(&db
->lock
, flags
);
684 * Initilize dm9000 board
687 dm9000_init_dm9000(struct net_device
*dev
)
689 board_info_t
*db
= dev
->priv
;
692 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
695 db
->io_mode
= ior(db
, DM9000_ISR
) >> 6; /* ISR bit7:6 keeps I/O mode */
697 /* GPIO0 on pre-activate PHY */
698 iow(db
, DM9000_GPR
, 0); /* REG_1F bit0 activate phyxcer */
699 iow(db
, DM9000_GPCR
, GPCR_GEP_CNTL
); /* Let GPIO0 output */
700 iow(db
, DM9000_GPR
, 0); /* Enable PHY */
702 if (db
->flags
& DM9000_PLATF_EXT_PHY
)
703 iow(db
, DM9000_NCR
, NCR_EXT_PHY
);
705 /* Program operating register */
706 iow(db
, DM9000_TCR
, 0); /* TX Polling clear */
707 iow(db
, DM9000_BPTR
, 0x3f); /* Less 3Kb, 200us */
708 iow(db
, DM9000_FCR
, 0xff); /* Flow Control */
709 iow(db
, DM9000_SMCR
, 0); /* Special Mode */
710 /* clear TX status */
711 iow(db
, DM9000_NSR
, NSR_WAKEST
| NSR_TX2END
| NSR_TX1END
);
712 iow(db
, DM9000_ISR
, ISR_CLR_STATUS
); /* Clear interrupt status */
714 /* Set address filter table */
715 dm9000_hash_table(dev
);
717 imr
= IMR_PAR
| IMR_PTM
| IMR_PRM
;
718 if (db
->type
!= TYPE_DM9000E
)
723 /* Enable TX/RX interrupt mask */
724 iow(db
, DM9000_IMR
, imr
);
726 /* Init Driver variable */
728 db
->queue_pkt_len
= 0;
729 dev
->trans_start
= 0;
732 /* Our watchdog timed out. Called by the networking layer */
733 static void dm9000_timeout(struct net_device
*dev
)
735 board_info_t
*db
= (board_info_t
*) dev
->priv
;
739 /* Save previous register address */
740 reg_save
= readb(db
->io_addr
);
741 spin_lock_irqsave(&db
->lock
, flags
);
743 netif_stop_queue(dev
);
745 dm9000_init_dm9000(dev
);
746 /* We can accept TX packets again */
747 dev
->trans_start
= jiffies
;
748 netif_wake_queue(dev
);
750 /* Restore previous register address */
751 writeb(reg_save
, db
->io_addr
);
752 spin_unlock_irqrestore(&db
->lock
, flags
);
756 * Hardware start transmission.
757 * Send a packet to media from the upper layer.
760 dm9000_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
763 board_info_t
*db
= dev
->priv
;
765 dm9000_dbg(db
, 3, "%s:\n", __func__
);
767 if (db
->tx_pkt_cnt
> 1)
770 spin_lock_irqsave(&db
->lock
, flags
);
772 /* Move data to DM9000 TX RAM */
773 writeb(DM9000_MWCMD
, db
->io_addr
);
775 (db
->outblk
)(db
->io_data
, skb
->data
, skb
->len
);
776 dev
->stats
.tx_bytes
+= skb
->len
;
779 /* TX control: First packet immediately send, second packet queue */
780 if (db
->tx_pkt_cnt
== 1) {
781 /* Set TX length to DM9000 */
782 iow(db
, DM9000_TXPLL
, skb
->len
);
783 iow(db
, DM9000_TXPLH
, skb
->len
>> 8);
785 /* Issue TX polling command */
786 iow(db
, DM9000_TCR
, TCR_TXREQ
); /* Cleared after TX complete */
788 dev
->trans_start
= jiffies
; /* save the time stamp */
791 db
->queue_pkt_len
= skb
->len
;
792 netif_stop_queue(dev
);
795 spin_unlock_irqrestore(&db
->lock
, flags
);
804 * DM9000 interrupt handler
805 * receive the packet to upper layer, free the transmitted packet
808 static void dm9000_tx_done(struct net_device
*dev
, board_info_t
*db
)
810 int tx_status
= ior(db
, DM9000_NSR
); /* Got TX status */
812 if (tx_status
& (NSR_TX2END
| NSR_TX1END
)) {
813 /* One packet sent complete */
815 dev
->stats
.tx_packets
++;
817 if (netif_msg_tx_done(db
))
818 dev_dbg(db
->dev
, "tx done, NSR %02x\n", tx_status
);
820 /* Queue packet check & send */
821 if (db
->tx_pkt_cnt
> 0) {
822 iow(db
, DM9000_TXPLL
, db
->queue_pkt_len
);
823 iow(db
, DM9000_TXPLH
, db
->queue_pkt_len
>> 8);
824 iow(db
, DM9000_TCR
, TCR_TXREQ
);
825 dev
->trans_start
= jiffies
;
827 netif_wake_queue(dev
);
831 struct dm9000_rxhdr
{
835 } __attribute__((__packed__
));
838 * Received a packet and pass to upper layer
841 dm9000_rx(struct net_device
*dev
)
843 board_info_t
*db
= (board_info_t
*) dev
->priv
;
844 struct dm9000_rxhdr rxhdr
;
850 /* Check packet ready or not */
852 ior(db
, DM9000_MRCMDX
); /* Dummy read */
854 /* Get most updated data */
855 rxbyte
= readb(db
->io_data
);
857 /* Status check: this byte must be 0 or 1 */
858 if (rxbyte
> DM9000_PKT_RDY
) {
859 dev_warn(db
->dev
, "status check fail: %d\n", rxbyte
);
860 iow(db
, DM9000_RCR
, 0x00); /* Stop Device */
861 iow(db
, DM9000_ISR
, IMR_PAR
); /* Stop INT request */
865 if (rxbyte
!= DM9000_PKT_RDY
)
868 /* A packet ready now & Get status/length */
870 writeb(DM9000_MRCMD
, db
->io_addr
);
872 (db
->inblk
)(db
->io_data
, &rxhdr
, sizeof(rxhdr
));
874 RxLen
= le16_to_cpu(rxhdr
.RxLen
);
876 if (netif_msg_rx_status(db
))
877 dev_dbg(db
->dev
, "RX: status %02x, length %04x\n",
878 rxhdr
.RxStatus
, RxLen
);
880 /* Packet Status check */
883 if (netif_msg_rx_err(db
))
884 dev_dbg(db
->dev
, "RX: Bad Packet (runt)\n");
887 if (RxLen
> DM9000_PKT_MAX
) {
888 dev_dbg(db
->dev
, "RST: RX Len:%x\n", RxLen
);
891 if (rxhdr
.RxStatus
& 0xbf) {
893 if (rxhdr
.RxStatus
& 0x01) {
894 if (netif_msg_rx_err(db
))
895 dev_dbg(db
->dev
, "fifo error\n");
896 dev
->stats
.rx_fifo_errors
++;
898 if (rxhdr
.RxStatus
& 0x02) {
899 if (netif_msg_rx_err(db
))
900 dev_dbg(db
->dev
, "crc error\n");
901 dev
->stats
.rx_crc_errors
++;
903 if (rxhdr
.RxStatus
& 0x80) {
904 if (netif_msg_rx_err(db
))
905 dev_dbg(db
->dev
, "length error\n");
906 dev
->stats
.rx_length_errors
++;
910 /* Move data from DM9000 */
912 && ((skb
= dev_alloc_skb(RxLen
+ 4)) != NULL
)) {
914 rdptr
= (u8
*) skb_put(skb
, RxLen
- 4);
916 /* Read received packet from RX SRAM */
918 (db
->inblk
)(db
->io_data
, rdptr
, RxLen
);
919 dev
->stats
.rx_bytes
+= RxLen
;
921 /* Pass to upper layer */
922 skb
->protocol
= eth_type_trans(skb
, dev
);
924 dev
->stats
.rx_packets
++;
927 /* need to dump the packet's data */
929 (db
->dumpblk
)(db
->io_data
, RxLen
);
931 } while (rxbyte
== DM9000_PKT_RDY
);
934 static irqreturn_t
dm9000_interrupt(int irq
, void *dev_id
)
936 struct net_device
*dev
= dev_id
;
937 board_info_t
*db
= dev
->priv
;
941 dm9000_dbg(db
, 3, "entering %s\n", __func__
);
943 /* A real interrupt coming */
945 spin_lock(&db
->lock
);
947 /* Save previous register address */
948 reg_save
= readb(db
->io_addr
);
950 /* Disable all interrupts */
951 iow(db
, DM9000_IMR
, IMR_PAR
);
953 /* Got DM9000 interrupt status */
954 int_status
= ior(db
, DM9000_ISR
); /* Got ISR */
955 iow(db
, DM9000_ISR
, int_status
); /* Clear ISR status */
957 if (netif_msg_intr(db
))
958 dev_dbg(db
->dev
, "interrupt status %02x\n", int_status
);
960 /* Received the coming packet */
961 if (int_status
& ISR_PRS
)
964 /* Trnasmit Interrupt check */
965 if (int_status
& ISR_PTS
)
966 dm9000_tx_done(dev
, db
);
968 if (db
->type
!= TYPE_DM9000E
) {
969 if (int_status
& ISR_LNKCHNG
) {
970 /* fire a link-change request */
971 schedule_delayed_work(&db
->phy_poll
, 1);
975 /* Re-enable interrupt mask */
976 iow(db
, DM9000_IMR
, db
->imr_all
);
978 /* Restore previous register address */
979 writeb(reg_save
, db
->io_addr
);
981 spin_unlock(&db
->lock
);
986 #ifdef CONFIG_NET_POLL_CONTROLLER
990 static void dm9000_poll_controller(struct net_device
*dev
)
992 disable_irq(dev
->irq
);
993 dm9000_interrupt(dev
->irq
, dev
);
994 enable_irq(dev
->irq
);
999 * Open the interface.
1000 * The interface is opened whenever "ifconfig" actives it.
1003 dm9000_open(struct net_device
*dev
)
1005 board_info_t
*db
= dev
->priv
;
1006 unsigned long irqflags
= db
->irq_res
->flags
& IRQF_TRIGGER_MASK
;
1008 if (netif_msg_ifup(db
))
1009 dev_dbg(db
->dev
, "enabling %s\n", dev
->name
);
1011 /* If there is no IRQ type specified, default to something that
1012 * may work, and tell the user that this is a problem */
1014 if (irqflags
== IRQF_TRIGGER_NONE
)
1015 dev_warn(db
->dev
, "WARNING: no IRQ resource flags set.\n");
1017 irqflags
|= IRQF_SHARED
;
1019 if (request_irq(dev
->irq
, &dm9000_interrupt
, irqflags
, dev
->name
, dev
))
1022 /* Initialize DM9000 board */
1024 dm9000_init_dm9000(dev
);
1026 /* Init driver variable */
1029 mii_check_media(&db
->mii
, netif_msg_link(db
), 1);
1030 netif_start_queue(dev
);
1032 dm9000_schedule_poll(db
);
1038 * Sleep, either by using msleep() or if we are suspending, then
1039 * use mdelay() to sleep.
1041 static void dm9000_msleep(board_info_t
*db
, unsigned int ms
)
1050 * Read a word from phyxcer
1053 dm9000_phy_read(struct net_device
*dev
, int phy_reg_unused
, int reg
)
1055 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1056 unsigned long flags
;
1057 unsigned int reg_save
;
1060 mutex_lock(&db
->addr_lock
);
1062 spin_lock_irqsave(&db
->lock
,flags
);
1064 /* Save previous register address */
1065 reg_save
= readb(db
->io_addr
);
1067 /* Fill the phyxcer register into REG_0C */
1068 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1070 iow(db
, DM9000_EPCR
, 0xc); /* Issue phyxcer read command */
1072 writeb(reg_save
, db
->io_addr
);
1073 spin_unlock_irqrestore(&db
->lock
,flags
);
1075 dm9000_msleep(db
, 1); /* Wait read complete */
1077 spin_lock_irqsave(&db
->lock
,flags
);
1078 reg_save
= readb(db
->io_addr
);
1080 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer read command */
1082 /* The read data keeps on REG_0D & REG_0E */
1083 ret
= (ior(db
, DM9000_EPDRH
) << 8) | ior(db
, DM9000_EPDRL
);
1085 /* restore the previous address */
1086 writeb(reg_save
, db
->io_addr
);
1087 spin_unlock_irqrestore(&db
->lock
,flags
);
1089 mutex_unlock(&db
->addr_lock
);
1091 dm9000_dbg(db
, 5, "phy_read[%02x] -> %04x\n", reg
, ret
);
1096 * Write a word to phyxcer
1099 dm9000_phy_write(struct net_device
*dev
,
1100 int phyaddr_unused
, int reg
, int value
)
1102 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1103 unsigned long flags
;
1104 unsigned long reg_save
;
1106 dm9000_dbg(db
, 5, "phy_write[%02x] = %04x\n", reg
, value
);
1107 mutex_lock(&db
->addr_lock
);
1109 spin_lock_irqsave(&db
->lock
,flags
);
1111 /* Save previous register address */
1112 reg_save
= readb(db
->io_addr
);
1114 /* Fill the phyxcer register into REG_0C */
1115 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1117 /* Fill the written data into REG_0D & REG_0E */
1118 iow(db
, DM9000_EPDRL
, value
);
1119 iow(db
, DM9000_EPDRH
, value
>> 8);
1121 iow(db
, DM9000_EPCR
, 0xa); /* Issue phyxcer write command */
1123 writeb(reg_save
, db
->io_addr
);
1124 spin_unlock_irqrestore(&db
->lock
, flags
);
1126 dm9000_msleep(db
, 1); /* Wait write complete */
1128 spin_lock_irqsave(&db
->lock
,flags
);
1129 reg_save
= readb(db
->io_addr
);
1131 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer write command */
1133 /* restore the previous address */
1134 writeb(reg_save
, db
->io_addr
);
1136 spin_unlock_irqrestore(&db
->lock
, flags
);
1137 mutex_unlock(&db
->addr_lock
);
1141 dm9000_shutdown(struct net_device
*dev
)
1143 board_info_t
*db
= dev
->priv
;
1146 dm9000_phy_write(dev
, 0, MII_BMCR
, BMCR_RESET
); /* PHY RESET */
1147 iow(db
, DM9000_GPR
, 0x01); /* Power-Down PHY */
1148 iow(db
, DM9000_IMR
, IMR_PAR
); /* Disable all interrupt */
1149 iow(db
, DM9000_RCR
, 0x00); /* Disable RX */
1153 * Stop the interface.
1154 * The interface is stopped when it is brought.
1157 dm9000_stop(struct net_device
*ndev
)
1159 board_info_t
*db
= ndev
->priv
;
1161 if (netif_msg_ifdown(db
))
1162 dev_dbg(db
->dev
, "shutting down %s\n", ndev
->name
);
1164 cancel_delayed_work_sync(&db
->phy_poll
);
1166 netif_stop_queue(ndev
);
1167 netif_carrier_off(ndev
);
1169 /* free interrupt */
1170 free_irq(ndev
->irq
, ndev
);
1172 dm9000_shutdown(ndev
);
1177 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
1180 * Search DM9000 board, allocate space and register it
1182 static int __devinit
1183 dm9000_probe(struct platform_device
*pdev
)
1185 struct dm9000_plat_data
*pdata
= pdev
->dev
.platform_data
;
1186 struct board_info
*db
; /* Point a board information structure */
1187 struct net_device
*ndev
;
1188 const unsigned char *mac_src
;
1194 /* Init network device */
1195 ndev
= alloc_etherdev(sizeof(struct board_info
));
1197 dev_err(&pdev
->dev
, "could not allocate device.\n");
1201 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1203 dev_dbg(&pdev
->dev
, "dm9000_probe()\n");
1205 /* setup board info structure */
1207 memset(db
, 0, sizeof(*db
));
1209 db
->dev
= &pdev
->dev
;
1212 spin_lock_init(&db
->lock
);
1213 mutex_init(&db
->addr_lock
);
1215 INIT_DELAYED_WORK(&db
->phy_poll
, dm9000_poll_work
);
1217 db
->addr_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1218 db
->data_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1219 db
->irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1221 if (db
->addr_res
== NULL
|| db
->data_res
== NULL
||
1222 db
->irq_res
== NULL
) {
1223 dev_err(db
->dev
, "insufficient resources\n");
1228 iosize
= res_size(db
->addr_res
);
1229 db
->addr_req
= request_mem_region(db
->addr_res
->start
, iosize
,
1232 if (db
->addr_req
== NULL
) {
1233 dev_err(db
->dev
, "cannot claim address reg area\n");
1238 db
->io_addr
= ioremap(db
->addr_res
->start
, iosize
);
1240 if (db
->io_addr
== NULL
) {
1241 dev_err(db
->dev
, "failed to ioremap address reg\n");
1246 iosize
= res_size(db
->data_res
);
1247 db
->data_req
= request_mem_region(db
->data_res
->start
, iosize
,
1250 if (db
->data_req
== NULL
) {
1251 dev_err(db
->dev
, "cannot claim data reg area\n");
1256 db
->io_data
= ioremap(db
->data_res
->start
, iosize
);
1258 if (db
->io_data
== NULL
) {
1259 dev_err(db
->dev
, "failed to ioremap data reg\n");
1264 /* fill in parameters for net-dev structure */
1265 ndev
->base_addr
= (unsigned long)db
->io_addr
;
1266 ndev
->irq
= db
->irq_res
->start
;
1268 /* ensure at least we have a default set of IO routines */
1269 dm9000_set_io(db
, iosize
);
1271 /* check to see if anything is being over-ridden */
1272 if (pdata
!= NULL
) {
1273 /* check to see if the driver wants to over-ride the
1274 * default IO width */
1276 if (pdata
->flags
& DM9000_PLATF_8BITONLY
)
1277 dm9000_set_io(db
, 1);
1279 if (pdata
->flags
& DM9000_PLATF_16BITONLY
)
1280 dm9000_set_io(db
, 2);
1282 if (pdata
->flags
& DM9000_PLATF_32BITONLY
)
1283 dm9000_set_io(db
, 4);
1285 /* check to see if there are any IO routine
1288 if (pdata
->inblk
!= NULL
)
1289 db
->inblk
= pdata
->inblk
;
1291 if (pdata
->outblk
!= NULL
)
1292 db
->outblk
= pdata
->outblk
;
1294 if (pdata
->dumpblk
!= NULL
)
1295 db
->dumpblk
= pdata
->dumpblk
;
1297 db
->flags
= pdata
->flags
;
1300 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1301 db
->flags
|= DM9000_PLATF_SIMPLE_PHY
;
1306 /* try multiple times, DM9000 sometimes gets the read wrong */
1307 for (i
= 0; i
< 8; i
++) {
1308 id_val
= ior(db
, DM9000_VIDL
);
1309 id_val
|= (u32
)ior(db
, DM9000_VIDH
) << 8;
1310 id_val
|= (u32
)ior(db
, DM9000_PIDL
) << 16;
1311 id_val
|= (u32
)ior(db
, DM9000_PIDH
) << 24;
1313 if (id_val
== DM9000_ID
)
1315 dev_err(db
->dev
, "read wrong id 0x%08x\n", id_val
);
1318 if (id_val
!= DM9000_ID
) {
1319 dev_err(db
->dev
, "wrong id: 0x%08x\n", id_val
);
1324 /* Identify what type of DM9000 we are working on */
1326 id_val
= ior(db
, DM9000_CHIPR
);
1327 dev_dbg(db
->dev
, "dm9000 revision 0x%02x\n", id_val
);
1331 db
->type
= TYPE_DM9000A
;
1334 db
->type
= TYPE_DM9000B
;
1337 dev_dbg(db
->dev
, "ID %02x => defaulting to DM9000E\n", id_val
);
1338 db
->type
= TYPE_DM9000E
;
1341 /* from this point we assume that we have found a DM9000 */
1343 /* driver system function */
1346 ndev
->open
= &dm9000_open
;
1347 ndev
->hard_start_xmit
= &dm9000_start_xmit
;
1348 ndev
->tx_timeout
= &dm9000_timeout
;
1349 ndev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1350 ndev
->stop
= &dm9000_stop
;
1351 ndev
->set_multicast_list
= &dm9000_hash_table
;
1352 ndev
->ethtool_ops
= &dm9000_ethtool_ops
;
1353 ndev
->do_ioctl
= &dm9000_ioctl
;
1355 #ifdef CONFIG_NET_POLL_CONTROLLER
1356 ndev
->poll_controller
= &dm9000_poll_controller
;
1359 db
->msg_enable
= NETIF_MSG_LINK
;
1360 db
->mii
.phy_id_mask
= 0x1f;
1361 db
->mii
.reg_num_mask
= 0x1f;
1362 db
->mii
.force_media
= 0;
1363 db
->mii
.full_duplex
= 0;
1365 db
->mii
.mdio_read
= dm9000_phy_read
;
1366 db
->mii
.mdio_write
= dm9000_phy_write
;
1370 /* try reading the node address from the attached EEPROM */
1371 for (i
= 0; i
< 6; i
+= 2)
1372 dm9000_read_eeprom(db
, i
/ 2, ndev
->dev_addr
+i
);
1374 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
1375 /* try reading from mac */
1378 for (i
= 0; i
< 6; i
++)
1379 ndev
->dev_addr
[i
] = ior(db
, i
+DM9000_PAR
);
1382 if (!is_valid_ether_addr(ndev
->dev_addr
))
1383 dev_warn(db
->dev
, "%s: Invalid ethernet MAC address. Please "
1384 "set using ifconfig\n", ndev
->name
);
1386 platform_set_drvdata(pdev
, ndev
);
1387 ret
= register_netdev(ndev
);
1390 DECLARE_MAC_BUF(mac
);
1391 printk(KERN_INFO
"%s: dm9000%c at %p,%p IRQ %d MAC: %s (%s)\n",
1392 ndev
->name
, dm9000_type_to_char(db
->type
),
1393 db
->io_addr
, db
->io_data
, ndev
->irq
,
1394 print_mac(mac
, ndev
->dev_addr
), mac_src
);
1399 dev_err(db
->dev
, "not found (%d).\n", ret
);
1401 dm9000_release_board(pdev
, db
);
1408 dm9000_drv_suspend(struct platform_device
*dev
, pm_message_t state
)
1410 struct net_device
*ndev
= platform_get_drvdata(dev
);
1414 db
= (board_info_t
*) ndev
->priv
;
1417 if (netif_running(ndev
)) {
1418 netif_device_detach(ndev
);
1419 dm9000_shutdown(ndev
);
1426 dm9000_drv_resume(struct platform_device
*dev
)
1428 struct net_device
*ndev
= platform_get_drvdata(dev
);
1429 board_info_t
*db
= (board_info_t
*) ndev
->priv
;
1433 if (netif_running(ndev
)) {
1435 dm9000_init_dm9000(ndev
);
1437 netif_device_attach(ndev
);
1445 static int __devexit
1446 dm9000_drv_remove(struct platform_device
*pdev
)
1448 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1450 platform_set_drvdata(pdev
, NULL
);
1452 unregister_netdev(ndev
);
1453 dm9000_release_board(pdev
, (board_info_t
*) ndev
->priv
);
1454 free_netdev(ndev
); /* free device structure */
1456 dev_dbg(&pdev
->dev
, "released and freed device\n");
1460 static struct platform_driver dm9000_driver
= {
1463 .owner
= THIS_MODULE
,
1465 .probe
= dm9000_probe
,
1466 .remove
= __devexit_p(dm9000_drv_remove
),
1467 .suspend
= dm9000_drv_suspend
,
1468 .resume
= dm9000_drv_resume
,
1474 printk(KERN_INFO
"%s Ethernet Driver, V%s\n", CARDNAME
, DRV_VERSION
);
1476 return platform_driver_register(&dm9000_driver
);
1480 dm9000_cleanup(void)
1482 platform_driver_unregister(&dm9000_driver
);
1485 module_init(dm9000_init
);
1486 module_exit(dm9000_cleanup
);
1488 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1489 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1490 MODULE_LICENSE("GPL");
1491 MODULE_ALIAS("platform:dm9000");