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pcmcia: remove pxa2xx_lubbock build warning
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-at91 / at91sam9261_devices.c
blob64979a9023c2cb4e0a674cbb8cc9303ae0066074
1 /*
2 * arch/arm/mach-at91/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
18
19 #include <linux/fb.h>
20 #include <video/atmel_lcdc.h>
21
22 #include <asm/arch/board.h>
23 #include <asm/arch/gpio.h>
24 #include <asm/arch/at91sam9261.h>
25 #include <asm/arch/at91sam9261_matrix.h>
26 #include <asm/arch/at91sam926x_mc.h>
27
28 #include "generic.h"
29
30
31 /* --------------------------------------------------------------------
32 * USB Host
33 * -------------------------------------------------------------------- */
34
35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
36 static u64 ohci_dmamask = 0xffffffffUL;
37 static struct at91_usbh_data usbh_data;
38
39 static struct resource usbh_resources[] = {
40 [0] = {
41 .start = AT91SAM9261_UHP_BASE,
42 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .start = AT91SAM9261_ID_UHP,
47 .end = AT91SAM9261_ID_UHP,
48 .flags = IORESOURCE_IRQ,
49 },
50 };
51
52 static struct platform_device at91sam9261_usbh_device = {
53 .name = "at91_ohci",
54 .id = -1,
55 .dev = {
56 .dma_mask = &ohci_dmamask,
57 .coherent_dma_mask = 0xffffffff,
58 .platform_data = &usbh_data,
59 },
60 .resource = usbh_resources,
61 .num_resources = ARRAY_SIZE(usbh_resources),
62 };
63
64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
65 {
66 if (!data)
67 return;
68
69 usbh_data = *data;
70 platform_device_register(&at91sam9261_usbh_device);
71 }
72 #else
73 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
74 #endif
75
76
77 /* --------------------------------------------------------------------
78 * USB Device (Gadget)
79 * -------------------------------------------------------------------- */
80
81 #ifdef CONFIG_USB_GADGET_AT91
82 static struct at91_udc_data udc_data;
83
84 static struct resource udc_resources[] = {
85 [0] = {
86 .start = AT91SAM9261_BASE_UDP,
87 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
88 .flags = IORESOURCE_MEM,
89 },
90 [1] = {
91 .start = AT91SAM9261_ID_UDP,
92 .end = AT91SAM9261_ID_UDP,
93 .flags = IORESOURCE_IRQ,
94 },
95 };
96
97 static struct platform_device at91sam9261_udc_device = {
98 .name = "at91_udc",
99 .id = -1,
100 .dev = {
101 .platform_data = &udc_data,
102 },
103 .resource = udc_resources,
104 .num_resources = ARRAY_SIZE(udc_resources),
105 };
106
107 void __init at91_add_device_udc(struct at91_udc_data *data)
108 {
109 unsigned long x;
110
111 if (!data)
112 return;
113
114 if (data->vbus_pin) {
115 at91_set_gpio_input(data->vbus_pin, 0);
116 at91_set_deglitch(data->vbus_pin, 1);
117 }
118
119 /* Pullup pin is handled internally */
120 x = at91_sys_read(AT91_MATRIX_USBPUCR);
121 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
122
123 udc_data = *data;
124 platform_device_register(&at91sam9261_udc_device);
125 }
126 #else
127 void __init at91_add_device_udc(struct at91_udc_data *data) {}
128 #endif
129
130 /* --------------------------------------------------------------------
131 * MMC / SD
132 * -------------------------------------------------------------------- */
133
134 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
135 static u64 mmc_dmamask = 0xffffffffUL;
136 static struct at91_mmc_data mmc_data;
137
138 static struct resource mmc_resources[] = {
139 [0] = {
140 .start = AT91SAM9261_BASE_MCI,
141 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
142 .flags = IORESOURCE_MEM,
143 },
144 [1] = {
145 .start = AT91SAM9261_ID_MCI,
146 .end = AT91SAM9261_ID_MCI,
147 .flags = IORESOURCE_IRQ,
148 },
149 };
150
151 static struct platform_device at91sam9261_mmc_device = {
152 .name = "at91_mci",
153 .id = -1,
154 .dev = {
155 .dma_mask = &mmc_dmamask,
156 .coherent_dma_mask = 0xffffffff,
157 .platform_data = &mmc_data,
158 },
159 .resource = mmc_resources,
160 .num_resources = ARRAY_SIZE(mmc_resources),
161 };
162
163 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
164 {
165 if (!data)
166 return;
167
168 /* input/irq */
169 if (data->det_pin) {
170 at91_set_gpio_input(data->det_pin, 1);
171 at91_set_deglitch(data->det_pin, 1);
172 }
173 if (data->wp_pin)
174 at91_set_gpio_input(data->wp_pin, 1);
175 if (data->vcc_pin)
176 at91_set_gpio_output(data->vcc_pin, 0);
177
178 /* CLK */
179 at91_set_B_periph(AT91_PIN_PA2, 0);
180
181 /* CMD */
182 at91_set_B_periph(AT91_PIN_PA1, 1);
183
184 /* DAT0, maybe DAT1..DAT3 */
185 at91_set_B_periph(AT91_PIN_PA0, 1);
186 if (data->wire4) {
187 at91_set_B_periph(AT91_PIN_PA4, 1);
188 at91_set_B_periph(AT91_PIN_PA5, 1);
189 at91_set_B_periph(AT91_PIN_PA6, 1);
190 }
191
192 mmc_data = *data;
193 platform_device_register(&at91sam9261_mmc_device);
194 }
195 #else
196 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
197 #endif
198
199
200 /* --------------------------------------------------------------------
201 * NAND / SmartMedia
202 * -------------------------------------------------------------------- */
203
204 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
205 static struct at91_nand_data nand_data;
206
207 #define NAND_BASE AT91_CHIPSELECT_3
208
209 static struct resource nand_resources[] = {
210 {
211 .start = NAND_BASE,
212 .end = NAND_BASE + SZ_256M - 1,
213 .flags = IORESOURCE_MEM,
214 }
215 };
216
217 static struct platform_device at91_nand_device = {
218 .name = "at91_nand",
219 .id = -1,
220 .dev = {
221 .platform_data = &nand_data,
222 },
223 .resource = nand_resources,
224 .num_resources = ARRAY_SIZE(nand_resources),
225 };
226
227 void __init at91_add_device_nand(struct at91_nand_data *data)
228 {
229 unsigned long csa, mode;
230
231 if (!data)
232 return;
233
234 csa = at91_sys_read(AT91_MATRIX_EBICSA);
235 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
236
237 /* set the bus interface characteristics */
238 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
239 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
240
241 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
242 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
243
244 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
245
246 if (data->bus_width_16)
247 mode = AT91_SMC_DBW_16;
248 else
249 mode = AT91_SMC_DBW_8;
250 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
251
252 /* enable pin */
253 if (data->enable_pin)
254 at91_set_gpio_output(data->enable_pin, 1);
255
256 /* ready/busy pin */
257 if (data->rdy_pin)
258 at91_set_gpio_input(data->rdy_pin, 1);
259
260 /* card detect pin */
261 if (data->det_pin)
262 at91_set_gpio_input(data->det_pin, 1);
263
264 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
265 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
266
267 nand_data = *data;
268 platform_device_register(&at91_nand_device);
269 }
270
271 #else
272 void __init at91_add_device_nand(struct at91_nand_data *data) {}
273 #endif
274
275
276 /* --------------------------------------------------------------------
277 * TWI (i2c)
278 * -------------------------------------------------------------------- */
279
280 /*
281 * Prefer the GPIO code since the TWI controller isn't robust
282 * (gets overruns and underruns under load) and can only issue
283 * repeated STARTs in one scenario (the driver doesn't yet handle them).
284 */
285 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
286
287 static struct i2c_gpio_platform_data pdata = {
288 .sda_pin = AT91_PIN_PA7,
289 .sda_is_open_drain = 1,
290 .scl_pin = AT91_PIN_PA8,
291 .scl_is_open_drain = 1,
292 .udelay = 2, /* ~100 kHz */
293 };
294
295 static struct platform_device at91sam9261_twi_device = {
296 .name = "i2c-gpio",
297 .id = -1,
298 .dev.platform_data = &pdata,
299 };
300
301 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
302 {
303 at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */
304 at91_set_multi_drive(AT91_PIN_PA7, 1);
305
306 at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */
307 at91_set_multi_drive(AT91_PIN_PA8, 1);
308
309 i2c_register_board_info(0, devices, nr_devices);
310 platform_device_register(&at91sam9261_twi_device);
311 }
312
313 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
314
315 static struct resource twi_resources[] = {
316 [0] = {
317 .start = AT91SAM9261_BASE_TWI,
318 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
319 .flags = IORESOURCE_MEM,
320 },
321 [1] = {
322 .start = AT91SAM9261_ID_TWI,
323 .end = AT91SAM9261_ID_TWI,
324 .flags = IORESOURCE_IRQ,
325 },
326 };
327
328 static struct platform_device at91sam9261_twi_device = {
329 .name = "at91_i2c",
330 .id = -1,
331 .resource = twi_resources,
332 .num_resources = ARRAY_SIZE(twi_resources),
333 };
334
335 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
336 {
337 /* pins used for TWI interface */
338 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
339 at91_set_multi_drive(AT91_PIN_PA7, 1);
340
341 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
342 at91_set_multi_drive(AT91_PIN_PA8, 1);
343
344 i2c_register_board_info(0, devices, nr_devices);
345 platform_device_register(&at91sam9261_twi_device);
346 }
347 #else
348 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
349 #endif
350
351
352 /* --------------------------------------------------------------------
353 * SPI
354 * -------------------------------------------------------------------- */
355
356 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
357 static u64 spi_dmamask = 0xffffffffUL;
358
359 static struct resource spi0_resources[] = {
360 [0] = {
361 .start = AT91SAM9261_BASE_SPI0,
362 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
363 .flags = IORESOURCE_MEM,
364 },
365 [1] = {
366 .start = AT91SAM9261_ID_SPI0,
367 .end = AT91SAM9261_ID_SPI0,
368 .flags = IORESOURCE_IRQ,
369 },
370 };
371
372 static struct platform_device at91sam9261_spi0_device = {
373 .name = "atmel_spi",
374 .id = 0,
375 .dev = {
376 .dma_mask = &spi_dmamask,
377 .coherent_dma_mask = 0xffffffff,
378 },
379 .resource = spi0_resources,
380 .num_resources = ARRAY_SIZE(spi0_resources),
381 };
382
383 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
384
385 static struct resource spi1_resources[] = {
386 [0] = {
387 .start = AT91SAM9261_BASE_SPI1,
388 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
389 .flags = IORESOURCE_MEM,
390 },
391 [1] = {
392 .start = AT91SAM9261_ID_SPI1,
393 .end = AT91SAM9261_ID_SPI1,
394 .flags = IORESOURCE_IRQ,
395 },
396 };
397
398 static struct platform_device at91sam9261_spi1_device = {
399 .name = "atmel_spi",
400 .id = 1,
401 .dev = {
402 .dma_mask = &spi_dmamask,
403 .coherent_dma_mask = 0xffffffff,
404 },
405 .resource = spi1_resources,
406 .num_resources = ARRAY_SIZE(spi1_resources),
407 };
408
409 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
410
411 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
412 {
413 int i;
414 unsigned long cs_pin;
415 short enable_spi0 = 0;
416 short enable_spi1 = 0;
417
418 /* Choose SPI chip-selects */
419 for (i = 0; i < nr_devices; i++) {
420 if (devices[i].controller_data)
421 cs_pin = (unsigned long) devices[i].controller_data;
422 else if (devices[i].bus_num == 0)
423 cs_pin = spi0_standard_cs[devices[i].chip_select];
424 else
425 cs_pin = spi1_standard_cs[devices[i].chip_select];
426
427 if (devices[i].bus_num == 0)
428 enable_spi0 = 1;
429 else
430 enable_spi1 = 1;
431
432 /* enable chip-select pin */
433 at91_set_gpio_output(cs_pin, 1);
434
435 /* pass chip-select pin to driver */
436 devices[i].controller_data = (void *) cs_pin;
437 }
438
439 spi_register_board_info(devices, nr_devices);
440
441 /* Configure SPI bus(es) */
442 if (enable_spi0) {
443 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
444 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
445 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
446
447 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
448 platform_device_register(&at91sam9261_spi0_device);
449 }
450 if (enable_spi1) {
451 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
452 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
453 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
454
455 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
456 platform_device_register(&at91sam9261_spi1_device);
457 }
458 }
459 #else
460 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
461 #endif
462
463
464 /* --------------------------------------------------------------------
465 * LCD Controller
466 * -------------------------------------------------------------------- */
467
468 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
469 static u64 lcdc_dmamask = 0xffffffffUL;
470 static struct atmel_lcdfb_info lcdc_data;
471
472 static struct resource lcdc_resources[] = {
473 [0] = {
474 .start = AT91SAM9261_LCDC_BASE,
475 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .start = AT91SAM9261_ID_LCDC,
480 .end = AT91SAM9261_ID_LCDC,
481 .flags = IORESOURCE_IRQ,
482 },
483 #if defined(CONFIG_FB_INTSRAM)
484 [2] = {
485 .start = AT91SAM9261_SRAM_BASE,
486 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
487 .flags = IORESOURCE_MEM,
488 },
489 #endif
490 };
491
492 static struct platform_device at91_lcdc_device = {
493 .name = "atmel_lcdfb",
494 .id = 0,
495 .dev = {
496 .dma_mask = &lcdc_dmamask,
497 .coherent_dma_mask = 0xffffffff,
498 .platform_data = &lcdc_data,
499 },
500 .resource = lcdc_resources,
501 .num_resources = ARRAY_SIZE(lcdc_resources),
502 };
503
504 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
505 {
506 if (!data) {
507 return;
508 }
509
510 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
511 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
512 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
513 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
514 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
515 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
516 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
517 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
518 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
519 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
520 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
521 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
522 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
523 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
524 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
525 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
526 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
527 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
528 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
529 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
530 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
531 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
532
533 lcdc_data = *data;
534 platform_device_register(&at91_lcdc_device);
535 }
536 #else
537 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
538 #endif
539
540
541 /* --------------------------------------------------------------------
542 * LEDs
543 * -------------------------------------------------------------------- */
544
545 #if defined(CONFIG_LEDS)
546 u8 at91_leds_cpu;
547 u8 at91_leds_timer;
548
549 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
550 {
551 /* Enable GPIO to access the LEDs */
552 at91_set_gpio_output(cpu_led, 1);
553 at91_set_gpio_output(timer_led, 1);
554
555 at91_leds_cpu = cpu_led;
556 at91_leds_timer = timer_led;
557 }
558 #else
559 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
560 #endif
561
562
563 /* --------------------------------------------------------------------
564 * UART
565 * -------------------------------------------------------------------- */
566
567 #if defined(CONFIG_SERIAL_ATMEL)
568 static struct resource dbgu_resources[] = {
569 [0] = {
570 .start = AT91_VA_BASE_SYS + AT91_DBGU,
571 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
572 .flags = IORESOURCE_MEM,
573 },
574 [1] = {
575 .start = AT91_ID_SYS,
576 .end = AT91_ID_SYS,
577 .flags = IORESOURCE_IRQ,
578 },
579 };
580
581 static struct atmel_uart_data dbgu_data = {
582 .use_dma_tx = 0,
583 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
584 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
585 };
586
587 static struct platform_device at91sam9261_dbgu_device = {
588 .name = "atmel_usart",
589 .id = 0,
590 .dev = {
591 .platform_data = &dbgu_data,
592 .coherent_dma_mask = 0xffffffff,
593 },
594 .resource = dbgu_resources,
595 .num_resources = ARRAY_SIZE(dbgu_resources),
596 };
597
598 static inline void configure_dbgu_pins(void)
599 {
600 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
601 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
602 }
603
604 static struct resource uart0_resources[] = {
605 [0] = {
606 .start = AT91SAM9261_BASE_US0,
607 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
608 .flags = IORESOURCE_MEM,
609 },
610 [1] = {
611 .start = AT91SAM9261_ID_US0,
612 .end = AT91SAM9261_ID_US0,
613 .flags = IORESOURCE_IRQ,
614 },
615 };
616
617 static struct atmel_uart_data uart0_data = {
618 .use_dma_tx = 1,
619 .use_dma_rx = 1,
620 };
621
622 static struct platform_device at91sam9261_uart0_device = {
623 .name = "atmel_usart",
624 .id = 1,
625 .dev = {
626 .platform_data = &uart0_data,
627 .coherent_dma_mask = 0xffffffff,
628 },
629 .resource = uart0_resources,
630 .num_resources = ARRAY_SIZE(uart0_resources),
631 };
632
633 static inline void configure_usart0_pins(void)
634 {
635 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
636 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
637 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
638 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
639 }
640
641 static struct resource uart1_resources[] = {
642 [0] = {
643 .start = AT91SAM9261_BASE_US1,
644 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
645 .flags = IORESOURCE_MEM,
646 },
647 [1] = {
648 .start = AT91SAM9261_ID_US1,
649 .end = AT91SAM9261_ID_US1,
650 .flags = IORESOURCE_IRQ,
651 },
652 };
653
654 static struct atmel_uart_data uart1_data = {
655 .use_dma_tx = 1,
656 .use_dma_rx = 1,
657 };
658
659 static struct platform_device at91sam9261_uart1_device = {
660 .name = "atmel_usart",
661 .id = 2,
662 .dev = {
663 .platform_data = &uart1_data,
664 .coherent_dma_mask = 0xffffffff,
665 },
666 .resource = uart1_resources,
667 .num_resources = ARRAY_SIZE(uart1_resources),
668 };
669
670 static inline void configure_usart1_pins(void)
671 {
672 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
673 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
674 }
675
676 static struct resource uart2_resources[] = {
677 [0] = {
678 .start = AT91SAM9261_BASE_US2,
679 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
680 .flags = IORESOURCE_MEM,
681 },
682 [1] = {
683 .start = AT91SAM9261_ID_US2,
684 .end = AT91SAM9261_ID_US2,
685 .flags = IORESOURCE_IRQ,
686 },
687 };
688
689 static struct atmel_uart_data uart2_data = {
690 .use_dma_tx = 1,
691 .use_dma_rx = 1,
692 };
693
694 static struct platform_device at91sam9261_uart2_device = {
695 .name = "atmel_usart",
696 .id = 3,
697 .dev = {
698 .platform_data = &uart2_data,
699 .coherent_dma_mask = 0xffffffff,
700 },
701 .resource = uart2_resources,
702 .num_resources = ARRAY_SIZE(uart2_resources),
703 };
704
705 static inline void configure_usart2_pins(void)
706 {
707 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
708 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
709 }
710
711 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
712 struct platform_device *atmel_default_console_device; /* the serial console device */
713
714 void __init at91_init_serial(struct at91_uart_config *config)
715 {
716 int i;
717
718 /* Fill in list of supported UARTs */
719 for (i = 0; i < config->nr_tty; i++) {
720 switch (config->tty_map[i]) {
721 case 0:
722 configure_usart0_pins();
723 at91_uarts[i] = &at91sam9261_uart0_device;
724 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
725 break;
726 case 1:
727 configure_usart1_pins();
728 at91_uarts[i] = &at91sam9261_uart1_device;
729 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
730 break;
731 case 2:
732 configure_usart2_pins();
733 at91_uarts[i] = &at91sam9261_uart2_device;
734 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
735 break;
736 case 3:
737 configure_dbgu_pins();
738 at91_uarts[i] = &at91sam9261_dbgu_device;
739 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
740 break;
741 default:
742 continue;
743 }
744 at91_uarts[i]->id = i; /* update ID number to mapped ID */
745 }
746
747 /* Set serial console device */
748 if (config->console_tty < ATMEL_MAX_UART)
749 atmel_default_console_device = at91_uarts[config->console_tty];
750 if (!atmel_default_console_device)
751 printk(KERN_INFO "AT91: No default serial console defined.\n");
752 }
753
754 void __init at91_add_device_serial(void)
755 {
756 int i;
757
758 for (i = 0; i < ATMEL_MAX_UART; i++) {
759 if (at91_uarts[i])
760 platform_device_register(at91_uarts[i]);
761 }
762 }
763 #else
764 void __init at91_init_serial(struct at91_uart_config *config) {}
765 void __init at91_add_device_serial(void) {}
766 #endif
767
768
769 /* -------------------------------------------------------------------- */
770
771 /*
772 * These devices are always present and don't need any board-specific
773 * setup.
774 */
775 static int __init at91_add_standard_devices(void)
776 {
777 return 0;
778 }
779
780 arch_initcall(at91_add_standard_devices);
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