2 * SN Platform GRU Driver
4 * DRIVER TABLE MANAGER + GRU CONTEXT LOAD/UNLOAD
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
13 #include <linux/kernel.h>
14 #include <linux/slab.h>
16 #include <linux/spinlock.h>
17 #include <linux/sched.h>
18 #include <linux/device.h>
19 #include <linux/list.h>
20 #include <asm/uv/uv_hub.h>
22 #include "grutables.h"
23 #include "gruhandles.h"
25 unsigned long gru_options __read_mostly
;
27 static struct device_driver gru_driver
= {
31 static struct device gru_device
= {
33 .driver
= &gru_driver
,
36 struct device
*grudev
= &gru_device
;
39 * Select a gru fault map to be used by the current cpu. Note that
40 * multiple cpus may be using the same map.
41 * ZZZ should "shift" be used?? Depends on HT cpu numbering
42 * ZZZ should be inline but did not work on emulator
44 int gru_cpu_fault_map_id(void)
46 return uv_blade_processor_id() % GRU_NUM_TFM
;
49 /*--------- ASID Management -------------------------------------------
51 * Initially, assign asids sequentially from MIN_ASID .. MAX_ASID.
52 * Once MAX is reached, flush the TLB & start over. However,
53 * some asids may still be in use. There won't be many (percentage wise) still
54 * in use. Search active contexts & determine the value of the first
55 * asid in use ("x"s below). Set "limit" to this value.
56 * This defines a block of assignable asids.
58 * When "limit" is reached, search forward from limit+1 and determine the
59 * next block of assignable asids.
61 * Repeat until MAX_ASID is reached, then start over again.
63 * Each time MAX_ASID is reached, increment the asid generation. Since
64 * the search for in-use asids only checks contexts with GRUs currently
65 * assigned, asids in some contexts will be missed. Prior to loading
66 * a context, the asid generation of the GTS asid is rechecked. If it
67 * doesn't match the current generation, a new asid will be assigned.
69 * 0---------------x------------x---------------------x----|
70 * ^-next ^-limit ^-MAX_ASID
72 * All asid manipulation & context loading/unloading is protected by the
76 /* Hit the asid limit. Start over */
77 static int gru_wrap_asid(struct gru_state
*gru
)
79 gru_dbg(grudev
, "gid %d\n", gru
->gs_gid
);
85 /* Find the next chunk of unused asids */
86 static int gru_reset_asid_limit(struct gru_state
*gru
, int asid
)
88 int i
, gid
, inuse_asid
, limit
;
90 gru_dbg(grudev
, "gid %d, asid 0x%x\n", gru
->gs_gid
, asid
);
94 asid
= gru_wrap_asid(gru
);
95 gru_flush_all_tlb(gru
);
98 for (i
= 0; i
< GRU_NUM_CCH
; i
++) {
101 inuse_asid
= gru
->gs_gts
[i
]->ts_gms
->ms_asids
[gid
].mt_asid
;
102 gru_dbg(grudev
, "gid %d, gts %p, gms %p, inuse 0x%x, cxt %d\n",
103 gru
->gs_gid
, gru
->gs_gts
[i
], gru
->gs_gts
[i
]->ts_gms
,
105 if (inuse_asid
== asid
) {
109 * empty range: reset the range limit and
113 if (asid
>= MAX_ASID
)
114 asid
= gru_wrap_asid(gru
);
119 if ((inuse_asid
> asid
) && (inuse_asid
< limit
))
122 gru
->gs_asid_limit
= limit
;
124 gru_dbg(grudev
, "gid %d, new asid 0x%x, new_limit 0x%x\n", gru
->gs_gid
,
129 /* Assign a new ASID to a thread context. */
130 static int gru_assign_asid(struct gru_state
*gru
)
134 gru
->gs_asid
+= ASID_INC
;
136 if (asid
>= gru
->gs_asid_limit
)
137 asid
= gru_reset_asid_limit(gru
, asid
);
139 gru_dbg(grudev
, "gid %d, asid 0x%x\n", gru
->gs_gid
, asid
);
144 * Clear n bits in a word. Return a word indicating the bits that were cleared.
145 * Optionally, build an array of chars that contain the bit numbers allocated.
147 static unsigned long reserve_resources(unsigned long *p
, int n
, int mmax
,
150 unsigned long bits
= 0;
154 i
= find_first_bit(p
, mmax
);
165 unsigned long gru_reserve_cb_resources(struct gru_state
*gru
, int cbr_au_count
,
168 return reserve_resources(&gru
->gs_cbr_map
, cbr_au_count
, GRU_CBR_AU
,
172 unsigned long gru_reserve_ds_resources(struct gru_state
*gru
, int dsr_au_count
,
175 return reserve_resources(&gru
->gs_dsr_map
, dsr_au_count
, GRU_DSR_AU
,
179 static void reserve_gru_resources(struct gru_state
*gru
,
180 struct gru_thread_state
*gts
)
182 gru
->gs_active_contexts
++;
184 gru_reserve_cb_resources(gru
, gts
->ts_cbr_au_count
,
187 gru_reserve_ds_resources(gru
, gts
->ts_dsr_au_count
, NULL
);
190 static void free_gru_resources(struct gru_state
*gru
,
191 struct gru_thread_state
*gts
)
193 gru
->gs_active_contexts
--;
194 gru
->gs_cbr_map
|= gts
->ts_cbr_map
;
195 gru
->gs_dsr_map
|= gts
->ts_dsr_map
;
199 * Check if a GRU has sufficient free resources to satisfy an allocation
200 * request. Note: GRU locks may or may not be held when this is called. If
201 * not held, recheck after acquiring the appropriate locks.
203 * Returns 1 if sufficient resources, 0 if not
205 static int check_gru_resources(struct gru_state
*gru
, int cbr_au_count
,
206 int dsr_au_count
, int max_active_contexts
)
208 return hweight64(gru
->gs_cbr_map
) >= cbr_au_count
209 && hweight64(gru
->gs_dsr_map
) >= dsr_au_count
210 && gru
->gs_active_contexts
< max_active_contexts
;
214 * TLB manangment requires tracking all GRU chiplets that have loaded a GSEG
217 static int gru_load_mm_tracker(struct gru_state
*gru
,
218 struct gru_thread_state
*gts
)
220 struct gru_mm_struct
*gms
= gts
->ts_gms
;
221 struct gru_mm_tracker
*asids
= &gms
->ms_asids
[gru
->gs_gid
];
222 unsigned short ctxbitmap
= (1 << gts
->ts_ctxnum
);
225 spin_lock(&gms
->ms_asid_lock
);
226 asid
= asids
->mt_asid
;
228 spin_lock(&gru
->gs_asid_lock
);
229 if (asid
== 0 || (asids
->mt_ctxbitmap
== 0 && asids
->mt_asid_gen
!=
231 asid
= gru_assign_asid(gru
);
232 asids
->mt_asid
= asid
;
233 asids
->mt_asid_gen
= gru
->gs_asid_gen
;
238 spin_unlock(&gru
->gs_asid_lock
);
240 BUG_ON(asids
->mt_ctxbitmap
& ctxbitmap
);
241 asids
->mt_ctxbitmap
|= ctxbitmap
;
242 if (!test_bit(gru
->gs_gid
, gms
->ms_asidmap
))
243 __set_bit(gru
->gs_gid
, gms
->ms_asidmap
);
244 spin_unlock(&gms
->ms_asid_lock
);
247 "gid %d, gts %p, gms %p, ctxnum %d, asid 0x%x, asidmap 0x%lx\n",
248 gru
->gs_gid
, gts
, gms
, gts
->ts_ctxnum
, asid
,
253 static void gru_unload_mm_tracker(struct gru_state
*gru
,
254 struct gru_thread_state
*gts
)
256 struct gru_mm_struct
*gms
= gts
->ts_gms
;
257 struct gru_mm_tracker
*asids
;
258 unsigned short ctxbitmap
;
260 asids
= &gms
->ms_asids
[gru
->gs_gid
];
261 ctxbitmap
= (1 << gts
->ts_ctxnum
);
262 spin_lock(&gms
->ms_asid_lock
);
263 spin_lock(&gru
->gs_asid_lock
);
264 BUG_ON((asids
->mt_ctxbitmap
& ctxbitmap
) != ctxbitmap
);
265 asids
->mt_ctxbitmap
^= ctxbitmap
;
266 gru_dbg(grudev
, "gid %d, gts %p, gms %p, ctxnum 0x%d, asidmap 0x%lx\n",
267 gru
->gs_gid
, gts
, gms
, gts
->ts_ctxnum
, gms
->ms_asidmap
[0]);
268 spin_unlock(&gru
->gs_asid_lock
);
269 spin_unlock(&gms
->ms_asid_lock
);
273 * Decrement the reference count on a GTS structure. Free the structure
274 * if the reference count goes to zero.
276 void gts_drop(struct gru_thread_state
*gts
)
278 if (gts
&& atomic_dec_return(>s
->ts_refcnt
) == 0) {
279 gru_drop_mmu_notifier(gts
->ts_gms
);
286 * Locate the GTS structure for the current thread.
288 static struct gru_thread_state
*gru_find_current_gts_nolock(struct gru_vma_data
291 struct gru_thread_state
*gts
;
293 list_for_each_entry(gts
, &vdata
->vd_head
, ts_next
)
294 if (gts
->ts_tsid
== tsid
)
300 * Allocate a thread state structure.
302 static struct gru_thread_state
*gru_alloc_gts(struct vm_area_struct
*vma
,
303 struct gru_vma_data
*vdata
,
306 struct gru_thread_state
*gts
;
309 bytes
= DSR_BYTES(vdata
->vd_dsr_au_count
) +
310 CBR_BYTES(vdata
->vd_cbr_au_count
);
311 bytes
+= sizeof(struct gru_thread_state
);
312 gts
= kzalloc(bytes
, GFP_KERNEL
);
317 atomic_set(>s
->ts_refcnt
, 1);
318 mutex_init(>s
->ts_ctxlock
);
319 gts
->ts_cbr_au_count
= vdata
->vd_cbr_au_count
;
320 gts
->ts_dsr_au_count
= vdata
->vd_dsr_au_count
;
321 gts
->ts_user_options
= vdata
->vd_user_options
;
323 gts
->ts_user_options
= vdata
->vd_user_options
;
324 gts
->ts_ctxnum
= NULLCTX
;
325 gts
->ts_mm
= current
->mm
;
327 gts
->ts_tlb_int_select
= -1;
328 gts
->ts_gms
= gru_register_mmu_notifier();
329 gts
->ts_sizeavail
= GRU_SIZEAVAIL(PAGE_SHIFT
);
333 gru_dbg(grudev
, "alloc vdata %p, new gts %p\n", vdata
, gts
);
342 * Allocate a vma private data structure.
344 struct gru_vma_data
*gru_alloc_vma_data(struct vm_area_struct
*vma
, int tsid
)
346 struct gru_vma_data
*vdata
= NULL
;
348 vdata
= kmalloc(sizeof(*vdata
), GFP_KERNEL
);
352 INIT_LIST_HEAD(&vdata
->vd_head
);
353 spin_lock_init(&vdata
->vd_lock
);
354 gru_dbg(grudev
, "alloc vdata %p\n", vdata
);
359 * Find the thread state structure for the current thread.
361 struct gru_thread_state
*gru_find_thread_state(struct vm_area_struct
*vma
,
364 struct gru_vma_data
*vdata
= vma
->vm_private_data
;
365 struct gru_thread_state
*gts
;
367 spin_lock(&vdata
->vd_lock
);
368 gts
= gru_find_current_gts_nolock(vdata
, tsid
);
369 spin_unlock(&vdata
->vd_lock
);
370 gru_dbg(grudev
, "vma %p, gts %p\n", vma
, gts
);
375 * Allocate a new thread state for a GSEG. Note that races may allow
376 * another thread to race to create a gts.
378 struct gru_thread_state
*gru_alloc_thread_state(struct vm_area_struct
*vma
,
381 struct gru_vma_data
*vdata
= vma
->vm_private_data
;
382 struct gru_thread_state
*gts
, *ngts
;
384 gts
= gru_alloc_gts(vma
, vdata
, tsid
);
388 spin_lock(&vdata
->vd_lock
);
389 ngts
= gru_find_current_gts_nolock(vdata
, tsid
);
393 STAT(gts_double_allocate
);
395 list_add(>s
->ts_next
, &vdata
->vd_head
);
397 spin_unlock(&vdata
->vd_lock
);
398 gru_dbg(grudev
, "vma %p, gts %p\n", vma
, gts
);
403 * Free the GRU context assigned to the thread state.
405 static void gru_free_gru_context(struct gru_thread_state
*gts
)
407 struct gru_state
*gru
;
410 gru_dbg(grudev
, "gts %p, gid %d\n", gts
, gru
->gs_gid
);
412 spin_lock(&gru
->gs_lock
);
413 gru
->gs_gts
[gts
->ts_ctxnum
] = NULL
;
414 free_gru_resources(gru
, gts
);
415 BUG_ON(test_bit(gts
->ts_ctxnum
, &gru
->gs_context_map
) == 0);
416 __clear_bit(gts
->ts_ctxnum
, &gru
->gs_context_map
);
417 gts
->ts_ctxnum
= NULLCTX
;
420 spin_unlock(&gru
->gs_lock
);
427 * Prefetching cachelines help hardware performance.
428 * (Strictly a performance enhancement. Not functionally required).
430 static void prefetch_data(void *p
, int num
, int stride
)
438 static inline long gru_copy_handle(void *d
, void *s
)
440 memcpy(d
, s
, GRU_HANDLE_BYTES
);
441 return GRU_HANDLE_BYTES
;
444 static void gru_prefetch_context(void *gseg
, void *cb
, void *cbe
,
445 unsigned long cbrmap
, unsigned long length
)
449 prefetch_data(gseg
+ GRU_DS_BASE
, length
/ GRU_CACHE_LINE_BYTES
,
450 GRU_CACHE_LINE_BYTES
);
452 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
) {
453 prefetch_data(cb
, 1, GRU_CACHE_LINE_BYTES
);
454 prefetch_data(cbe
+ i
* GRU_HANDLE_STRIDE
, 1,
455 GRU_CACHE_LINE_BYTES
);
456 cb
+= GRU_HANDLE_STRIDE
;
460 static void gru_load_context_data(void *save
, void *grubase
, int ctxnum
,
461 unsigned long cbrmap
, unsigned long dsrmap
)
463 void *gseg
, *cb
, *cbe
;
464 unsigned long length
;
467 gseg
= grubase
+ ctxnum
* GRU_GSEG_STRIDE
;
468 cb
= gseg
+ GRU_CB_BASE
;
469 cbe
= grubase
+ GRU_CBE_BASE
;
470 length
= hweight64(dsrmap
) * GRU_DSR_AU_BYTES
;
471 gru_prefetch_context(gseg
, cb
, cbe
, cbrmap
, length
);
473 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
) {
474 save
+= gru_copy_handle(cb
, save
);
475 save
+= gru_copy_handle(cbe
+ i
* GRU_HANDLE_STRIDE
, save
);
476 cb
+= GRU_HANDLE_STRIDE
;
479 memcpy(gseg
+ GRU_DS_BASE
, save
, length
);
482 static void gru_unload_context_data(void *save
, void *grubase
, int ctxnum
,
483 unsigned long cbrmap
, unsigned long dsrmap
)
485 void *gseg
, *cb
, *cbe
;
486 unsigned long length
;
489 gseg
= grubase
+ ctxnum
* GRU_GSEG_STRIDE
;
490 cb
= gseg
+ GRU_CB_BASE
;
491 cbe
= grubase
+ GRU_CBE_BASE
;
492 length
= hweight64(dsrmap
) * GRU_DSR_AU_BYTES
;
493 gru_prefetch_context(gseg
, cb
, cbe
, cbrmap
, length
);
495 for_each_cbr_in_allocation_map(i
, &cbrmap
, scr
) {
496 save
+= gru_copy_handle(save
, cb
);
497 save
+= gru_copy_handle(save
, cbe
+ i
* GRU_HANDLE_STRIDE
);
498 cb
+= GRU_HANDLE_STRIDE
;
500 memcpy(save
, gseg
+ GRU_DS_BASE
, length
);
503 void gru_unload_context(struct gru_thread_state
*gts
, int savestate
)
505 struct gru_state
*gru
= gts
->ts_gru
;
506 struct gru_context_configuration_handle
*cch
;
507 int ctxnum
= gts
->ts_ctxnum
;
509 zap_vma_ptes(gts
->ts_vma
, UGRUADDR(gts
), GRU_GSEG_PAGESIZE
);
510 cch
= get_cch(gru
->gs_gru_base_vaddr
, ctxnum
);
512 gru_dbg(grudev
, "gts %p\n", gts
);
513 lock_cch_handle(cch
);
514 if (cch_interrupt_sync(cch
))
517 gru_unload_mm_tracker(gru
, gts
);
519 gru_unload_context_data(gts
->ts_gdata
, gru
->gs_gru_base_vaddr
,
520 ctxnum
, gts
->ts_cbr_map
,
523 if (cch_deallocate(cch
))
525 gts
->ts_force_unload
= 0; /* ts_force_unload locked by CCH lock */
526 unlock_cch_handle(cch
);
528 gru_free_gru_context(gts
);
529 STAT(unload_context
);
533 * Load a GRU context by copying it from the thread data structure in memory
536 static void gru_load_context(struct gru_thread_state
*gts
)
538 struct gru_state
*gru
= gts
->ts_gru
;
539 struct gru_context_configuration_handle
*cch
;
540 int err
, asid
, ctxnum
= gts
->ts_ctxnum
;
542 gru_dbg(grudev
, "gts %p\n", gts
);
543 cch
= get_cch(gru
->gs_gru_base_vaddr
, ctxnum
);
545 lock_cch_handle(cch
);
546 asid
= gru_load_mm_tracker(gru
, gts
);
547 cch
->tfm_fault_bit_enable
=
548 (gts
->ts_user_options
== GRU_OPT_MISS_FMM_POLL
549 || gts
->ts_user_options
== GRU_OPT_MISS_FMM_INTR
);
550 cch
->tlb_int_enable
= (gts
->ts_user_options
== GRU_OPT_MISS_FMM_INTR
);
551 if (cch
->tlb_int_enable
) {
552 gts
->ts_tlb_int_select
= gru_cpu_fault_map_id();
553 cch
->tlb_int_select
= gts
->ts_tlb_int_select
;
555 cch
->tfm_done_bit_enable
= 0;
556 err
= cch_allocate(cch
, asid
, gts
->ts_sizeavail
, gts
->ts_cbr_map
,
560 "err %d: cch %p, gts %p, cbr 0x%lx, dsr 0x%lx\n",
561 err
, cch
, gts
, gts
->ts_cbr_map
, gts
->ts_dsr_map
);
565 gru_load_context_data(gts
->ts_gdata
, gru
->gs_gru_base_vaddr
, ctxnum
,
566 gts
->ts_cbr_map
, gts
->ts_dsr_map
);
570 unlock_cch_handle(cch
);
576 * Update fields in an active CCH:
577 * - retarget interrupts on local blade
578 * - update sizeavail mask
579 * - force a delayed context unload by clearing the CCH asids. This
580 * forces TLB misses for new GRU instructions. The context is unloaded
581 * when the next TLB miss occurs.
583 int gru_update_cch(struct gru_thread_state
*gts
, int force_unload
)
585 struct gru_context_configuration_handle
*cch
;
586 struct gru_state
*gru
= gts
->ts_gru
;
587 int i
, ctxnum
= gts
->ts_ctxnum
, ret
= 0;
589 cch
= get_cch(gru
->gs_gru_base_vaddr
, ctxnum
);
591 lock_cch_handle(cch
);
592 if (cch
->state
== CCHSTATE_ACTIVE
) {
593 if (gru
->gs_gts
[gts
->ts_ctxnum
] != gts
)
595 if (cch_interrupt(cch
))
598 for (i
= 0; i
< 8; i
++)
599 cch
->sizeavail
[i
] = gts
->ts_sizeavail
;
600 gts
->ts_tlb_int_select
= gru_cpu_fault_map_id();
601 cch
->tlb_int_select
= gru_cpu_fault_map_id();
603 for (i
= 0; i
< 8; i
++)
605 cch
->tfm_fault_bit_enable
= 0;
606 cch
->tlb_int_enable
= 0;
607 gts
->ts_force_unload
= 1;
614 unlock_cch_handle(cch
);
619 * Update CCH tlb interrupt select. Required when all the following is true:
620 * - task's GRU context is loaded into a GRU
621 * - task is using interrupt notification for TLB faults
622 * - task has migrated to a different cpu on the same blade where
623 * it was previously running.
625 static int gru_retarget_intr(struct gru_thread_state
*gts
)
627 if (gts
->ts_tlb_int_select
< 0
628 || gts
->ts_tlb_int_select
== gru_cpu_fault_map_id())
631 gru_dbg(grudev
, "retarget from %d to %d\n", gts
->ts_tlb_int_select
,
632 gru_cpu_fault_map_id());
633 return gru_update_cch(gts
, 0);
638 * Insufficient GRU resources available on the local blade. Steal a context from
639 * a process. This is a hack until a _real_ resource scheduler is written....
641 #define next_ctxnum(n) ((n) < GRU_NUM_CCH - 2 ? (n) + 1 : 0)
642 #define next_gru(b, g) (((g) < &(b)->bs_grus[GRU_CHIPLETS_PER_BLADE - 1]) ? \
643 ((g)+1) : &(b)->bs_grus[0])
645 static void gru_steal_context(struct gru_thread_state
*gts
)
647 struct gru_blade_state
*blade
;
648 struct gru_state
*gru
, *gru0
;
649 struct gru_thread_state
*ngts
= NULL
;
650 int ctxnum
, ctxnum0
, flag
= 0, cbr
, dsr
;
652 cbr
= gts
->ts_cbr_au_count
;
653 dsr
= gts
->ts_dsr_au_count
;
656 blade
= gru_base
[uv_numa_blade_id()];
657 spin_lock(&blade
->bs_lock
);
659 ctxnum
= next_ctxnum(blade
->bs_lru_ctxnum
);
660 gru
= blade
->bs_lru_gru
;
662 gru
= next_gru(blade
, gru
);
666 if (check_gru_resources(gru
, cbr
, dsr
, GRU_NUM_CCH
))
668 spin_lock(&gru
->gs_lock
);
669 for (; ctxnum
< GRU_NUM_CCH
; ctxnum
++) {
670 if (flag
&& gru
== gru0
&& ctxnum
== ctxnum0
)
672 ngts
= gru
->gs_gts
[ctxnum
];
674 * We are grabbing locks out of order, so trylock is
675 * needed. GTSs are usually not locked, so the odds of
676 * success are high. If trylock fails, try to steal a
679 if (ngts
&& mutex_trylock(&ngts
->ts_ctxlock
))
684 spin_unlock(&gru
->gs_lock
);
685 if (ngts
|| (flag
&& gru
== gru0
&& ctxnum
== ctxnum0
))
688 gru
= next_gru(blade
, gru
);
690 blade
->bs_lru_gru
= gru
;
691 blade
->bs_lru_ctxnum
= ctxnum
;
692 spin_unlock(&blade
->bs_lock
);
697 ngts
->ts_steal_jiffies
= jiffies
;
698 gru_unload_context(ngts
, 1);
699 mutex_unlock(&ngts
->ts_ctxlock
);
701 STAT(steal_context_failed
);
704 "stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
705 " avail cb %ld, ds %ld\n",
706 gru
->gs_gid
, ctxnum
, ngts
, cbr
, dsr
, hweight64(gru
->gs_cbr_map
),
707 hweight64(gru
->gs_dsr_map
));
711 * Scan the GRUs on the local blade & assign a GRU context.
713 static struct gru_state
*gru_assign_gru_context(struct gru_thread_state
*gts
)
715 struct gru_state
*gru
, *grux
;
716 int i
, max_active_contexts
;
722 max_active_contexts
= GRU_NUM_CCH
;
723 for_each_gru_on_blade(grux
, uv_numa_blade_id(), i
) {
724 if (check_gru_resources(grux
, gts
->ts_cbr_au_count
,
725 gts
->ts_dsr_au_count
,
726 max_active_contexts
)) {
728 max_active_contexts
= grux
->gs_active_contexts
;
729 if (max_active_contexts
== 0)
735 spin_lock(&gru
->gs_lock
);
736 if (!check_gru_resources(gru
, gts
->ts_cbr_au_count
,
737 gts
->ts_dsr_au_count
, GRU_NUM_CCH
)) {
738 spin_unlock(&gru
->gs_lock
);
741 reserve_gru_resources(gru
, gts
);
743 gts
->ts_blade
= gru
->gs_blade_id
;
745 find_first_zero_bit(&gru
->gs_context_map
, GRU_NUM_CCH
);
746 BUG_ON(gts
->ts_ctxnum
== GRU_NUM_CCH
);
747 atomic_inc(>s
->ts_refcnt
);
748 gru
->gs_gts
[gts
->ts_ctxnum
] = gts
;
749 __set_bit(gts
->ts_ctxnum
, &gru
->gs_context_map
);
750 spin_unlock(&gru
->gs_lock
);
752 STAT(assign_context
);
754 "gseg %p, gts %p, gid %d, ctx %d, cbr %d, dsr %d\n",
755 gseg_virtual_address(gts
->ts_gru
, gts
->ts_ctxnum
), gts
,
756 gts
->ts_gru
->gs_gid
, gts
->ts_ctxnum
,
757 gts
->ts_cbr_au_count
, gts
->ts_dsr_au_count
);
759 gru_dbg(grudev
, "failed to allocate a GTS %s\n", "");
760 STAT(assign_context_failed
);
770 * Map the user's GRU segment
772 * Note: gru segments alway mmaped on GRU_GSEG_PAGESIZE boundaries.
774 int gru_fault(struct vm_area_struct
*vma
, struct vm_fault
*vmf
)
776 struct gru_thread_state
*gts
;
777 unsigned long paddr
, vaddr
;
779 vaddr
= (unsigned long)vmf
->virtual_address
;
780 gru_dbg(grudev
, "vma %p, vaddr 0x%lx (0x%lx)\n",
781 vma
, vaddr
, GSEG_BASE(vaddr
));
784 /* The following check ensures vaddr is a valid address in the VMA */
785 gts
= gru_find_thread_state(vma
, TSID(vaddr
, vma
));
787 return VM_FAULT_SIGBUS
;
790 mutex_lock(>s
->ts_ctxlock
);
793 if (gts
->ts_gru
->gs_blade_id
!= uv_numa_blade_id()) {
794 STAT(migrated_nopfn_unload
);
795 gru_unload_context(gts
, 1);
797 if (gru_retarget_intr(gts
))
798 STAT(migrated_nopfn_retarget
);
803 if (!gru_assign_gru_context(gts
)) {
804 mutex_unlock(>s
->ts_ctxlock
);
806 schedule_timeout(GRU_ASSIGN_DELAY
); /* true hack ZZZ */
807 if (gts
->ts_steal_jiffies
+ GRU_STEAL_DELAY
< jiffies
)
808 gru_steal_context(gts
);
811 gru_load_context(gts
);
812 paddr
= gseg_physical_address(gts
->ts_gru
, gts
->ts_ctxnum
);
813 remap_pfn_range(vma
, vaddr
& ~(GRU_GSEG_PAGESIZE
- 1),
814 paddr
>> PAGE_SHIFT
, GRU_GSEG_PAGESIZE
,
818 mutex_unlock(>s
->ts_ctxlock
);
821 return VM_FAULT_NOPAGE
;