arch/sh/drivers/pci/pci.c

   1 /*
   2  * New-style PCI core.
   3  *
   4  * Copyright (c) 2004 - 2009  Paul Mundt
   5  * Copyright (c) 2002  M. R. Brown
   6  *
   7  * Modelled after arch/mips/pci/pci.c:
   8  *  Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
   9  *
  10  * This file is subject to the terms and conditions of the GNU General Public
  11  * License.  See the file "COPYING" in the main directory of this archive
  12  * for more details.
  13  */
  14 #include <linux/kernel.h>
  15 #include <linux/mm.h>
  16 #include <linux/pci.h>
  17 #include <linux/init.h>
  18 #include <linux/types.h>
  19 #include <linux/dma-debug.h>
  20 #include <linux/io.h>
  21 #include <linux/mutex.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/export.h>
  24
  25 unsigned long PCIBIOS_MIN_IO = 0x0000;
  26 unsigned long PCIBIOS_MIN_MEM = 0;
  27
  28 /*
  29  * The PCI controller list.
  30  */
  31 static struct pci_channel *hose_head, **hose_tail = &hose_head;
  32
  33 static int pci_initialized;
  34
  35 static void __devinit pcibios_scanbus(struct pci_channel *hose)
  36 {
  37         static int next_busno;
  38         static int need_domain_info;
  39         LIST_HEAD(resources);
  40         int i;
  41         struct pci_bus *bus;
  42
  43         for (i = 0; i < hose->nr_resources; i++)
  44                 pci_add_resource(&resources, hose->resources + i);
  45
  46         bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
  47                                 &resources);
  48         hose->bus = bus;
  49
  50         need_domain_info = need_domain_info || hose->index;
  51         hose->need_domain_info = need_domain_info;
  52         if (bus) {
  53                 next_busno = bus->subordinate + 1;
  54                 /* Don't allow 8-bit bus number overflow inside the hose -
  55                    reserve some space for bridges. */
  56                 if (next_busno > 224) {
  57                         next_busno = 0;
  58                         need_domain_info = 1;
  59                 }
  60
  61                 pci_bus_size_bridges(bus);
  62                 pci_bus_assign_resources(bus);
  63                 pci_enable_bridges(bus);
  64         } else {
  65                 pci_free_resource_list(&resources);
  66         }
  67 }
  68
  69 /*
  70  * This interrupt-safe spinlock protects all accesses to PCI
  71  * configuration space.
  72  */
  73 DEFINE_RAW_SPINLOCK(pci_config_lock);
  74 static DEFINE_MUTEX(pci_scan_mutex);
  75
  76 int __devinit register_pci_controller(struct pci_channel *hose)
  77 {
  78         int i;
  79
  80         for (i = 0; i < hose->nr_resources; i++) {
  81                 struct resource *res = hose->resources + i;
  82
  83                 if (res->flags & IORESOURCE_IO) {
  84                         if (request_resource(&ioport_resource, res) < 0)
  85                                 goto out;
  86                 } else {
  87                         if (request_resource(&iomem_resource, res) < 0)
  88                                 goto out;
  89                 }
  90         }
  91
  92         *hose_tail = hose;
  93         hose_tail = &hose->next;
  94
  95         /*
  96          * Do not panic here but later - this might happen before console init.
  97          */
  98         if (!hose->io_map_base) {
  99                 printk(KERN_WARNING
 100                        "registering PCI controller with io_map_base unset\n");
 101         }
 102
 103         /*
 104          * Setup the ERR/PERR and SERR timers, if available.
 105          */
 106         pcibios_enable_timers(hose);
 107
 108         /*
 109          * Scan the bus if it is register after the PCI subsystem
 110          * initialization.
 111          */
 112         if (pci_initialized) {
 113                 mutex_lock(&pci_scan_mutex);
 114                 pcibios_scanbus(hose);
 115                 mutex_unlock(&pci_scan_mutex);
 116         }
 117
 118         return 0;
 119
 120 out:
 121         for (--i; i >= 0; i--)
 122                 release_resource(&hose->resources[i]);
 123
 124         printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
 125         return -1;
 126 }
 127
 128 static int __init pcibios_init(void)
 129 {
 130         struct pci_channel *hose;
 131
 132         /* Scan all of the recorded PCI controllers.  */
 133         for (hose = hose_head; hose; hose = hose->next)
 134                 pcibios_scanbus(hose);
 135
 136         pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
 137
 138         dma_debug_add_bus(&pci_bus_type);
 139
 140         pci_initialized = 1;
 141
 142         return 0;
 143 }
 144 subsys_initcall(pcibios_init);
 145
 146 static void pcibios_fixup_device_resources(struct pci_dev *dev,
 147         struct pci_bus *bus)
 148 {
 149         /* Update device resources.  */
 150         struct pci_channel *hose = bus->sysdata;
 151         unsigned long offset = 0;
 152         int i;
 153
 154         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 155                 if (!dev->resource[i].start)
 156                         continue;
 157                 if (dev->resource[i].flags & IORESOURCE_IO)
 158                         offset = hose->io_offset;
 159                 else if (dev->resource[i].flags & IORESOURCE_MEM)
 160                         offset = hose->mem_offset;
 161
 162                 dev->resource[i].start += offset;
 163                 dev->resource[i].end += offset;
 164         }
 165 }
 166
 167 /*
 168  *  Called after each bus is probed, but before its children
 169  *  are examined.
 170  */
 171 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 172 {
 173         struct pci_dev *dev;
 174         struct list_head *ln;
 175
 176         for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
 177                 dev = pci_dev_b(ln);
 178
 179                 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
 180                         pcibios_fixup_device_resources(dev, bus);
 181         }
 182 }
 183
 184 /*
 185  * We need to avoid collisions with `mirrored' VGA ports
 186  * and other strange ISA hardware, so we always want the
 187  * addresses to be allocated in the 0x000-0x0ff region
 188  * modulo 0x400.
 189  */
 190 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 191                                 resource_size_t size, resource_size_t align)
 192 {
 193         struct pci_dev *dev = data;
 194         struct pci_channel *hose = dev->sysdata;
 195         resource_size_t start = res->start;
 196
 197         if (res->flags & IORESOURCE_IO) {
 198                 if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
 199                         start = PCIBIOS_MIN_IO + hose->resources[0].start;
 200
 201                 /*
 202                  * Put everything into 0x00-0xff region modulo 0x400.
 203                  */
 204                 if (start & 0x300)
 205                         start = (start + 0x3ff) & ~0x3ff;
 206         }
 207
 208         return start;
 209 }
 210
 211 void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
 212                              struct resource *res)
 213 {
 214         struct pci_channel *hose = dev->sysdata;
 215         unsigned long offset = 0;
 216
 217         if (res->flags & IORESOURCE_IO)
 218                 offset = hose->io_offset;
 219         else if (res->flags & IORESOURCE_MEM)
 220                 offset = hose->mem_offset;
 221
 222         region->start = res->start - offset;
 223         region->end = res->end - offset;
 224 }
 225
 226 void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
 227                              struct pci_bus_region *region)
 228 {
 229         struct pci_channel *hose = dev->sysdata;
 230         unsigned long offset = 0;
 231
 232         if (res->flags & IORESOURCE_IO)
 233                 offset = hose->io_offset;
 234         else if (res->flags & IORESOURCE_MEM)
 235                 offset = hose->mem_offset;
 236
 237         res->start = region->start + offset;
 238         res->end = region->end + offset;
 239 }
 240
 241 int pcibios_enable_device(struct pci_dev *dev, int mask)
 242 {
 243         return pci_enable_resources(dev, mask);
 244 }
 245
 246 void __init pcibios_update_irq(struct pci_dev *dev, int irq)
 247 {
 248         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
 249 }
 250
 251 char * __devinit __weak pcibios_setup(char *str)
 252 {
 253         return str;
 254 }
 255
 256 static void __init
 257 pcibios_bus_report_status_early(struct pci_channel *hose,
 258                                 int top_bus, int current_bus,
 259                                 unsigned int status_mask, int warn)
 260 {
 261         unsigned int pci_devfn;
 262         u16 status;
 263         int ret;
 264
 265         for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
 266                 if (PCI_FUNC(pci_devfn))
 267                         continue;
 268                 ret = early_read_config_word(hose, top_bus, current_bus,
 269                                              pci_devfn, PCI_STATUS, &status);
 270                 if (ret != PCIBIOS_SUCCESSFUL)
 271                         continue;
 272                 if (status == 0xffff)
 273                         continue;
 274
 275                 early_write_config_word(hose, top_bus, current_bus,
 276                                         pci_devfn, PCI_STATUS,
 277                                         status & status_mask);
 278                 if (warn)
 279                         printk("(%02x:%02x: %04X) ", current_bus,
 280                                pci_devfn, status);
 281         }
 282 }
 283
 284 /*
 285  * We can't use pci_find_device() here since we are
 286  * called from interrupt context.
 287  */
 288 static void __init_refok
 289 pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
 290                           int warn)
 291 {
 292         struct pci_dev *dev;
 293
 294         list_for_each_entry(dev, &bus->devices, bus_list) {
 295                 u16 status;
 296
 297                 /*
 298                  * ignore host bridge - we handle
 299                  * that separately
 300                  */
 301                 if (dev->bus->number == 0 && dev->devfn == 0)
 302                         continue;
 303
 304                 pci_read_config_word(dev, PCI_STATUS, &status);
 305                 if (status == 0xffff)
 306                         continue;
 307
 308                 if ((status & status_mask) == 0)
 309                         continue;
 310
 311                 /* clear the status errors */
 312                 pci_write_config_word(dev, PCI_STATUS, status & status_mask);
 313
 314                 if (warn)
 315                         printk("(%s: %04X) ", pci_name(dev), status);
 316         }
 317
 318         list_for_each_entry(dev, &bus->devices, bus_list)
 319                 if (dev->subordinate)
 320                         pcibios_bus_report_status(dev->subordinate, status_mask, warn);
 321 }
 322
 323 void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
 324 {
 325         struct pci_channel *hose;
 326
 327         for (hose = hose_head; hose; hose = hose->next) {
 328                 if (unlikely(!hose->bus))
 329                         pcibios_bus_report_status_early(hose, hose_head->index,
 330                                         hose->index, status_mask, warn);
 331                 else
 332                         pcibios_bus_report_status(hose->bus, status_mask, warn);
 333         }
 334 }
 335
 336 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 337                         enum pci_mmap_state mmap_state, int write_combine)
 338 {
 339         /*
 340          * I/O space can be accessed via normal processor loads and stores on
 341          * this platform but for now we elect not to do this and portable
 342          * drivers should not do this anyway.
 343          */
 344         if (mmap_state == pci_mmap_io)
 345                 return -EINVAL;
 346
 347         /*
 348          * Ignore write-combine; for now only return uncached mappings.
 349          */
 350         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 351
 352         return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
 353                                vma->vm_end - vma->vm_start,
 354                                vma->vm_page_prot);
 355 }
 356
 357 #ifndef CONFIG_GENERIC_IOMAP
 358
 359 static void __iomem *ioport_map_pci(struct pci_dev *dev,
 360                                     unsigned long port, unsigned int nr)
 361 {
 362         struct pci_channel *chan = dev->sysdata;
 363
 364         if (unlikely(!chan->io_map_base)) {
 365                 chan->io_map_base = sh_io_port_base;
 366
 367                 if (pci_domains_supported)
 368                         panic("To avoid data corruption io_map_base MUST be "
 369                               "set with multiple PCI domains.");
 370         }
 371
 372         return (void __iomem *)(chan->io_map_base + port);
 373 }
 374
 375 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
 376 {
 377         iounmap(addr);
 378 }
 379 EXPORT_SYMBOL(pci_iounmap);
 380
 381 #endif /* CONFIG_GENERIC_IOMAP */
 382
 383 #ifdef CONFIG_HOTPLUG
 384 EXPORT_SYMBOL(pcibios_resource_to_bus);
 385 EXPORT_SYMBOL(pcibios_bus_to_resource);
 386 EXPORT_SYMBOL(PCIBIOS_MIN_IO);
 387 EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
 388 #endif