x86: apic: Do not use stacked physid_mask_t
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / include / asm / mpspec.h
blob61d90b1331c3fd6a3e221d9b838b28437aaae134
1 #ifndef _ASM_X86_MPSPEC_H
2 #define _ASM_X86_MPSPEC_H
4 #include <linux/init.h>
6 #include <asm/mpspec_def.h>
7 #include <asm/x86_init.h>
9 extern int apic_version[MAX_APICS];
10 extern int pic_mode;
12 #ifdef CONFIG_X86_32
15 * Summit or generic (i.e. installer) kernels need lots of bus entries.
16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
18 #if CONFIG_BASE_SMALL == 0
19 # define MAX_MP_BUSSES 260
20 #else
21 # define MAX_MP_BUSSES 32
22 #endif
24 #define MAX_IRQ_SOURCES 256
26 extern unsigned int def_to_bigsmp;
27 extern u8 apicid_2_node[];
29 #ifdef CONFIG_X86_NUMAQ
30 extern int mp_bus_id_to_node[MAX_MP_BUSSES];
31 extern int mp_bus_id_to_local[MAX_MP_BUSSES];
32 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
33 #endif
35 #define MAX_APICID 256
37 #else /* CONFIG_X86_64: */
39 #define MAX_MP_BUSSES 256
40 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
41 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
43 #endif /* CONFIG_X86_64 */
45 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
46 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
47 #endif
49 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
51 extern unsigned int boot_cpu_physical_apicid;
52 extern unsigned int max_physical_apicid;
53 extern int mpc_default_type;
54 extern unsigned long mp_lapic_addr;
56 #ifdef CONFIG_X86_LOCAL_APIC
57 extern int smp_found_config;
58 #else
59 # define smp_found_config 0
60 #endif
62 static inline void get_smp_config(void)
64 x86_init.mpparse.get_smp_config(0);
67 static inline void early_get_smp_config(void)
69 x86_init.mpparse.get_smp_config(1);
72 static inline void find_smp_config(void)
74 x86_init.mpparse.find_smp_config(1);
77 static inline void early_find_smp_config(void)
79 x86_init.mpparse.find_smp_config(0);
82 #ifdef CONFIG_X86_MPPARSE
83 extern void early_reserve_e820_mpc_new(void);
84 extern int enable_update_mptable;
85 extern int default_mpc_apic_id(struct mpc_cpu *m);
86 extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
87 # ifdef CONFIG_X86_IO_APIC
88 extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
89 # else
90 # define default_mpc_oem_bus_info NULL
91 # endif
92 extern void default_find_smp_config(unsigned int reserve);
93 extern void default_get_smp_config(unsigned int early);
94 #else
95 static inline void early_reserve_e820_mpc_new(void) { }
96 #define enable_update_mptable 0
97 #define default_mpc_apic_id NULL
98 #define default_smp_read_mpc_oem NULL
99 #define default_mpc_oem_bus_info NULL
100 #define default_find_smp_config x86_init_uint_noop
101 #define default_get_smp_config x86_init_uint_noop
102 #endif
104 void __cpuinit generic_processor_info(int apicid, int version);
105 #ifdef CONFIG_ACPI
106 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
107 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
108 u32 gsi);
109 extern void mp_config_acpi_legacy_irqs(void);
110 struct device;
111 extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
112 int active_high_low);
113 extern int acpi_probe_gsi(void);
114 #ifdef CONFIG_X86_IO_APIC
115 extern int mp_find_ioapic(int gsi);
116 extern int mp_find_ioapic_pin(int ioapic, int gsi);
117 #endif
118 #else /* !CONFIG_ACPI: */
119 static inline int acpi_probe_gsi(void)
121 return 0;
123 #endif /* CONFIG_ACPI */
125 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
127 struct physid_mask {
128 unsigned long mask[PHYSID_ARRAY_SIZE];
131 typedef struct physid_mask physid_mask_t;
133 #define physid_set(physid, map) set_bit(physid, (map).mask)
134 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
135 #define physid_isset(physid, map) test_bit(physid, (map).mask)
136 #define physid_test_and_set(physid, map) \
137 test_and_set_bit(physid, (map).mask)
139 #define physids_and(dst, src1, src2) \
140 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
142 #define physids_or(dst, src1, src2) \
143 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
145 #define physids_clear(map) \
146 bitmap_zero((map).mask, MAX_APICS)
148 #define physids_complement(dst, src) \
149 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
151 #define physids_empty(map) \
152 bitmap_empty((map).mask, MAX_APICS)
154 #define physids_equal(map1, map2) \
155 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
157 #define physids_weight(map) \
158 bitmap_weight((map).mask, MAX_APICS)
160 #define physids_shift_right(d, s, n) \
161 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
163 #define physids_shift_left(d, s, n) \
164 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
166 static inline unsigned long physids_coerce(physid_mask_t *map)
168 return map->mask[0];
171 static inline void physids_promote(unsigned long physids, physid_mask_t *map)
173 physids_clear(*map);
174 map->mask[0] = physids;
177 /* Note: will create very large stack frames if physid_mask_t is big */
178 #define physid_mask_of_physid(physid) \
179 ({ \
180 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
181 physid_set(physid, __physid_mask); \
182 __physid_mask; \
185 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
187 physids_clear(*map);
188 physid_set(physid, *map);
191 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
192 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
194 extern physid_mask_t phys_cpu_present_map;
196 extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
198 extern int default_acpi_madt_oem_check(char *, char *);
200 #endif /* _ASM_X86_MPSPEC_H */