2 * MPC512x PSC in SPI mode driver.
4 * Copyright (C) 2007,2008 Freescale Semiconductor Inc.
5 * Original port from 52xx driver:
6 * Hongjun Chen <hong-jun.chen@freescale.com>
8 * Fork of mpc52xx_psc_spi.c:
9 * Copyright (C) 2006 TOPTICA Photonics AG., Dragos Carp
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/interrupt.h>
22 #include <linux/of_address.h>
23 #include <linux/of_platform.h>
24 #include <linux/workqueue.h>
25 #include <linux/completion.h>
27 #include <linux/delay.h>
28 #include <linux/clk.h>
29 #include <linux/spi/spi.h>
30 #include <linux/fsl_devices.h>
31 #include <asm/mpc52xx_psc.h>
33 struct mpc512x_psc_spi
{
34 void (*cs_control
)(struct spi_device
*spi
, bool on
);
37 /* driver internal data */
38 struct mpc52xx_psc __iomem
*psc
;
39 struct mpc512x_psc_fifo __iomem
*fifo
;
46 struct workqueue_struct
*workqueue
;
47 struct work_struct work
;
49 struct list_head queue
;
50 spinlock_t lock
; /* Message queue lock */
52 struct completion done
;
55 /* controller state */
56 struct mpc512x_psc_spi_cs
{
61 /* set clock freq, clock ramp, bits per work
62 * if t is NULL then reset the values to the default values
64 static int mpc512x_psc_spi_transfer_setup(struct spi_device
*spi
,
65 struct spi_transfer
*t
)
67 struct mpc512x_psc_spi_cs
*cs
= spi
->controller_state
;
69 cs
->speed_hz
= (t
&& t
->speed_hz
)
70 ? t
->speed_hz
: spi
->max_speed_hz
;
71 cs
->bits_per_word
= (t
&& t
->bits_per_word
)
72 ? t
->bits_per_word
: spi
->bits_per_word
;
73 cs
->bits_per_word
= ((cs
->bits_per_word
+ 7) / 8) * 8;
77 static void mpc512x_psc_spi_activate_cs(struct spi_device
*spi
)
79 struct mpc512x_psc_spi_cs
*cs
= spi
->controller_state
;
80 struct mpc512x_psc_spi
*mps
= spi_master_get_devdata(spi
->master
);
81 struct mpc52xx_psc __iomem
*psc
= mps
->psc
;
86 sicr
= in_be32(&psc
->sicr
);
88 /* Set clock phase and polarity */
89 if (spi
->mode
& SPI_CPHA
)
94 if (spi
->mode
& SPI_CPOL
)
99 if (spi
->mode
& SPI_LSB_FIRST
)
103 out_be32(&psc
->sicr
, sicr
);
105 ccr
= in_be32(&psc
->ccr
);
108 bclkdiv
= (mps
->mclk
/ cs
->speed_hz
) - 1;
110 bclkdiv
= (mps
->mclk
/ 1000000) - 1; /* default 1MHz */
112 ccr
|= (((bclkdiv
& 0xff) << 16) | (((bclkdiv
>> 8) & 0xff) << 8));
113 out_be32(&psc
->ccr
, ccr
);
114 mps
->bits_per_word
= cs
->bits_per_word
;
117 mps
->cs_control(spi
, (spi
->mode
& SPI_CS_HIGH
) ? 1 : 0);
120 static void mpc512x_psc_spi_deactivate_cs(struct spi_device
*spi
)
122 struct mpc512x_psc_spi
*mps
= spi_master_get_devdata(spi
->master
);
125 mps
->cs_control(spi
, (spi
->mode
& SPI_CS_HIGH
) ? 0 : 1);
129 /* extract and scale size field in txsz or rxsz */
130 #define MPC512x_PSC_FIFO_SZ(sz) ((sz & 0x7ff) << 2);
134 static int mpc512x_psc_spi_transfer_rxtx(struct spi_device
*spi
,
135 struct spi_transfer
*t
)
137 struct mpc512x_psc_spi
*mps
= spi_master_get_devdata(spi
->master
);
138 struct mpc52xx_psc __iomem
*psc
= mps
->psc
;
139 struct mpc512x_psc_fifo __iomem
*fifo
= mps
->fifo
;
141 u8
*tx_buf
= (u8
*)t
->tx_buf
;
142 u8
*rx_buf
= (u8
*)t
->rx_buf
;
144 if (!tx_buf
&& !rx_buf
&& t
->len
)
149 out_8(&psc
->mode
, 0x0);
159 * The number of bytes that can be sent at a time
160 * depends on the fifo size.
162 fifosz
= MPC512x_PSC_FIFO_SZ(in_be32(&fifo
->txsz
));
163 count
= min(fifosz
, len
);
165 for (i
= count
; i
> 0; i
--) {
166 data
= tx_buf
? *tx_buf
++ : 0;
168 setbits32(&fifo
->txcmd
, MPC512x_PSC_FIFO_EOF
);
169 out_8(&fifo
->txdata_8
, data
);
173 INIT_COMPLETION(mps
->done
);
175 /* interrupt on tx fifo empty */
176 out_be32(&fifo
->txisr
, MPC512x_PSC_FIFO_EMPTY
);
177 out_be32(&fifo
->tximr
, MPC512x_PSC_FIFO_EMPTY
);
179 /* enable transmiter/receiver */
181 MPC52xx_PSC_TX_ENABLE
| MPC52xx_PSC_RX_ENABLE
);
183 wait_for_completion(&mps
->done
);
187 /* rx fifo should have count bytes in it */
188 rxcount
= in_be32(&fifo
->rxcnt
);
189 if (rxcount
!= count
)
192 rxcount
= in_be32(&fifo
->rxcnt
);
193 if (rxcount
!= count
) {
194 dev_warn(&spi
->dev
, "expected %d bytes in rx fifo "
195 "but got %d\n", count
, rxcount
);
198 rxcount
= min(rxcount
, count
);
199 for (i
= rxcount
; i
> 0; i
--) {
200 data
= in_8(&fifo
->rxdata_8
);
204 while (in_be32(&fifo
->rxcnt
)) {
205 in_8(&fifo
->rxdata_8
);
209 MPC52xx_PSC_TX_DISABLE
| MPC52xx_PSC_RX_DISABLE
);
211 /* disable transmiter/receiver and fifo interrupt */
212 out_8(&psc
->command
, MPC52xx_PSC_TX_DISABLE
| MPC52xx_PSC_RX_DISABLE
);
213 out_be32(&fifo
->tximr
, 0);
217 static void mpc512x_psc_spi_work(struct work_struct
*work
)
219 struct mpc512x_psc_spi
*mps
= container_of(work
,
220 struct mpc512x_psc_spi
,
223 spin_lock_irq(&mps
->lock
);
225 while (!list_empty(&mps
->queue
)) {
226 struct spi_message
*m
;
227 struct spi_device
*spi
;
228 struct spi_transfer
*t
= NULL
;
232 m
= container_of(mps
->queue
.next
, struct spi_message
, queue
);
233 list_del_init(&m
->queue
);
234 spin_unlock_irq(&mps
->lock
);
239 list_for_each_entry(t
, &m
->transfers
, transfer_list
) {
240 if (t
->bits_per_word
|| t
->speed_hz
) {
241 status
= mpc512x_psc_spi_transfer_setup(spi
, t
);
247 mpc512x_psc_spi_activate_cs(spi
);
248 cs_change
= t
->cs_change
;
250 status
= mpc512x_psc_spi_transfer_rxtx(spi
, t
);
253 m
->actual_length
+= t
->len
;
256 udelay(t
->delay_usecs
);
259 mpc512x_psc_spi_deactivate_cs(spi
);
263 m
->complete(m
->context
);
265 if (status
|| !cs_change
)
266 mpc512x_psc_spi_deactivate_cs(spi
);
268 mpc512x_psc_spi_transfer_setup(spi
, NULL
);
270 spin_lock_irq(&mps
->lock
);
273 spin_unlock_irq(&mps
->lock
);
276 static int mpc512x_psc_spi_setup(struct spi_device
*spi
)
278 struct mpc512x_psc_spi
*mps
= spi_master_get_devdata(spi
->master
);
279 struct mpc512x_psc_spi_cs
*cs
= spi
->controller_state
;
282 if (spi
->bits_per_word
% 8)
286 cs
= kzalloc(sizeof *cs
, GFP_KERNEL
);
289 spi
->controller_state
= cs
;
292 cs
->bits_per_word
= spi
->bits_per_word
;
293 cs
->speed_hz
= spi
->max_speed_hz
;
295 spin_lock_irqsave(&mps
->lock
, flags
);
297 mpc512x_psc_spi_deactivate_cs(spi
);
298 spin_unlock_irqrestore(&mps
->lock
, flags
);
303 static int mpc512x_psc_spi_transfer(struct spi_device
*spi
,
304 struct spi_message
*m
)
306 struct mpc512x_psc_spi
*mps
= spi_master_get_devdata(spi
->master
);
309 m
->actual_length
= 0;
310 m
->status
= -EINPROGRESS
;
312 spin_lock_irqsave(&mps
->lock
, flags
);
313 list_add_tail(&m
->queue
, &mps
->queue
);
314 queue_work(mps
->workqueue
, &mps
->work
);
315 spin_unlock_irqrestore(&mps
->lock
, flags
);
320 static void mpc512x_psc_spi_cleanup(struct spi_device
*spi
)
322 kfree(spi
->controller_state
);
325 static int mpc512x_psc_spi_port_config(struct spi_master
*master
,
326 struct mpc512x_psc_spi
*mps
)
328 struct mpc52xx_psc __iomem
*psc
= mps
->psc
;
329 struct mpc512x_psc_fifo __iomem
*fifo
= mps
->fifo
;
337 sprintf(name
, "psc%d_mclk", master
->bus_num
);
338 spiclk
= clk_get(&master
->dev
, name
);
340 mps
->mclk
= clk_get_rate(spiclk
);
343 /* Reset the PSC into a known state */
344 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
345 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
346 out_8(&psc
->command
, MPC52xx_PSC_TX_DISABLE
| MPC52xx_PSC_RX_DISABLE
);
348 /* Disable psc interrupts all useful interrupts are in fifo */
349 out_be16(&psc
->isr_imr
.imr
, 0);
351 /* Disable fifo interrupts, will be enabled later */
352 out_be32(&fifo
->tximr
, 0);
353 out_be32(&fifo
->rximr
, 0);
355 /* Setup fifo slice address and size */
356 /*out_be32(&fifo->txsz, 0x0fe00004);*/
357 /*out_be32(&fifo->rxsz, 0x0ff00004);*/
359 sicr
= 0x01000000 | /* SIM = 0001 -- 8 bit */
360 0x00800000 | /* GenClk = 1 -- internal clk */
361 0x00008000 | /* SPI = 1 */
362 0x00004000 | /* MSTR = 1 -- SPI master */
363 0x00000800; /* UseEOF = 1 -- SS low until EOF */
365 out_be32(&psc
->sicr
, sicr
);
367 ccr
= in_be32(&psc
->ccr
);
369 bclkdiv
= (mps
->mclk
/ 1000000) - 1; /* default 1MHz */
370 ccr
|= (((bclkdiv
& 0xff) << 16) | (((bclkdiv
>> 8) & 0xff) << 8));
371 out_be32(&psc
->ccr
, ccr
);
373 /* Set 2ms DTL delay */
374 out_8(&psc
->ctur
, 0x00);
375 out_8(&psc
->ctlr
, 0x82);
377 /* we don't use the alarms */
378 out_be32(&fifo
->rxalarm
, 0xfff);
379 out_be32(&fifo
->txalarm
, 0);
381 /* Enable FIFO slices for Rx/Tx */
382 out_be32(&fifo
->rxcmd
,
383 MPC512x_PSC_FIFO_ENABLE_SLICE
| MPC512x_PSC_FIFO_ENABLE_DMA
);
384 out_be32(&fifo
->txcmd
,
385 MPC512x_PSC_FIFO_ENABLE_SLICE
| MPC512x_PSC_FIFO_ENABLE_DMA
);
387 mps
->bits_per_word
= 8;
392 static irqreturn_t
mpc512x_psc_spi_isr(int irq
, void *dev_id
)
394 struct mpc512x_psc_spi
*mps
= (struct mpc512x_psc_spi
*)dev_id
;
395 struct mpc512x_psc_fifo __iomem
*fifo
= mps
->fifo
;
397 /* clear interrupt and wake up the work queue */
398 if (in_be32(&fifo
->txisr
) &
399 in_be32(&fifo
->tximr
) & MPC512x_PSC_FIFO_EMPTY
) {
400 out_be32(&fifo
->txisr
, MPC512x_PSC_FIFO_EMPTY
);
401 out_be32(&fifo
->tximr
, 0);
402 complete(&mps
->done
);
408 /* bus_num is used only for the case dev->platform_data == NULL */
409 static int __devinit
mpc512x_psc_spi_do_probe(struct device
*dev
, u32 regaddr
,
410 u32 size
, unsigned int irq
,
413 struct fsl_spi_platform_data
*pdata
= dev
->platform_data
;
414 struct mpc512x_psc_spi
*mps
;
415 struct spi_master
*master
;
419 master
= spi_alloc_master(dev
, sizeof *mps
);
423 dev_set_drvdata(dev
, master
);
424 mps
= spi_master_get_devdata(master
);
428 dev_err(dev
, "probe called without platform data, no "
429 "cs_control function will be called\n");
430 mps
->cs_control
= NULL
;
432 master
->bus_num
= bus_num
;
433 master
->num_chipselect
= 255;
435 mps
->cs_control
= pdata
->cs_control
;
436 mps
->sysclk
= pdata
->sysclk
;
437 master
->bus_num
= pdata
->bus_num
;
438 master
->num_chipselect
= pdata
->max_chipselect
;
441 master
->setup
= mpc512x_psc_spi_setup
;
442 master
->transfer
= mpc512x_psc_spi_transfer
;
443 master
->cleanup
= mpc512x_psc_spi_cleanup
;
444 master
->dev
.of_node
= dev
->of_node
;
446 tempp
= ioremap(regaddr
, size
);
448 dev_err(dev
, "could not ioremap I/O port range\n");
454 (struct mpc512x_psc_fifo
*)(tempp
+ sizeof(struct mpc52xx_psc
));
456 ret
= request_irq(mps
->irq
, mpc512x_psc_spi_isr
, IRQF_SHARED
,
457 "mpc512x-psc-spi", mps
);
461 ret
= mpc512x_psc_spi_port_config(master
, mps
);
465 spin_lock_init(&mps
->lock
);
466 init_completion(&mps
->done
);
467 INIT_WORK(&mps
->work
, mpc512x_psc_spi_work
);
468 INIT_LIST_HEAD(&mps
->queue
);
471 create_singlethread_workqueue(dev_name(master
->dev
.parent
));
472 if (mps
->workqueue
== NULL
) {
477 ret
= spi_register_master(master
);
484 destroy_workqueue(mps
->workqueue
);
486 free_irq(mps
->irq
, mps
);
490 spi_master_put(master
);
495 static int __devexit
mpc512x_psc_spi_do_remove(struct device
*dev
)
497 struct spi_master
*master
= dev_get_drvdata(dev
);
498 struct mpc512x_psc_spi
*mps
= spi_master_get_devdata(master
);
500 flush_workqueue(mps
->workqueue
);
501 destroy_workqueue(mps
->workqueue
);
502 spi_unregister_master(master
);
503 free_irq(mps
->irq
, mps
);
510 static int __devinit
mpc512x_psc_spi_of_probe(struct platform_device
*op
,
511 const struct of_device_id
*match
)
513 const u32
*regaddr_p
;
514 u64 regaddr64
, size64
;
517 regaddr_p
= of_get_address(op
->dev
.of_node
, 0, &size64
, NULL
);
519 dev_err(&op
->dev
, "Invalid PSC address\n");
522 regaddr64
= of_translate_address(op
->dev
.of_node
, regaddr_p
);
524 /* get PSC id (0..11, used by port_config) */
525 if (op
->dev
.platform_data
== NULL
) {
528 psc_nump
= of_get_property(op
->dev
.of_node
, "cell-index", NULL
);
529 if (!psc_nump
|| *psc_nump
> 11) {
530 dev_err(&op
->dev
, "mpc512x_psc_spi: Device node %s "
531 "has invalid cell-index property\n",
532 op
->dev
.of_node
->full_name
);
538 return mpc512x_psc_spi_do_probe(&op
->dev
, (u32
) regaddr64
, (u32
) size64
,
539 irq_of_parse_and_map(op
->dev
.of_node
, 0), id
);
542 static int __devexit
mpc512x_psc_spi_of_remove(struct platform_device
*op
)
544 return mpc512x_psc_spi_do_remove(&op
->dev
);
547 static struct of_device_id mpc512x_psc_spi_of_match
[] = {
548 { .compatible
= "fsl,mpc5121-psc-spi", },
552 MODULE_DEVICE_TABLE(of
, mpc512x_psc_spi_of_match
);
554 static struct of_platform_driver mpc512x_psc_spi_of_driver
= {
555 .probe
= mpc512x_psc_spi_of_probe
,
556 .remove
= __devexit_p(mpc512x_psc_spi_of_remove
),
558 .name
= "mpc512x-psc-spi",
559 .owner
= THIS_MODULE
,
560 .of_match_table
= mpc512x_psc_spi_of_match
,
564 static int __init
mpc512x_psc_spi_init(void)
566 return of_register_platform_driver(&mpc512x_psc_spi_of_driver
);
568 module_init(mpc512x_psc_spi_init
);
570 static void __exit
mpc512x_psc_spi_exit(void)
572 of_unregister_platform_driver(&mpc512x_psc_spi_of_driver
);
574 module_exit(mpc512x_psc_spi_exit
);
576 MODULE_AUTHOR("John Rigby");
577 MODULE_DESCRIPTION("MPC512x PSC SPI Driver");
578 MODULE_LICENSE("GPL");