3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/wireless.h>
39 #include <linux/workqueue.h>
40 #include <linux/skbuff.h>
41 #include <linux/dma-mapping.h>
43 #include <asm/unaligned.h>
45 #include "b43legacy.h"
56 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
57 MODULE_AUTHOR("Martin Langer");
58 MODULE_AUTHOR("Stefano Brivio");
59 MODULE_AUTHOR("Michael Buesch");
60 MODULE_LICENSE("GPL");
62 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID
);
64 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
65 static int modparam_pio
;
66 module_param_named(pio
, modparam_pio
, int, 0444);
67 MODULE_PARM_DESC(pio
, "enable(1) / disable(0) PIO mode");
68 #elif defined(CONFIG_B43LEGACY_DMA)
69 # define modparam_pio 0
70 #elif defined(CONFIG_B43LEGACY_PIO)
71 # define modparam_pio 1
74 static int modparam_bad_frames_preempt
;
75 module_param_named(bad_frames_preempt
, modparam_bad_frames_preempt
, int, 0444);
76 MODULE_PARM_DESC(bad_frames_preempt
, "enable(1) / disable(0) Bad Frames"
79 static char modparam_fwpostfix
[16];
80 module_param_string(fwpostfix
, modparam_fwpostfix
, 16, 0444);
81 MODULE_PARM_DESC(fwpostfix
, "Postfix for the firmware files to load.");
83 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
84 static const struct ssb_device_id b43legacy_ssb_tbl
[] = {
85 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 2),
86 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 4),
89 MODULE_DEVICE_TABLE(ssb
, b43legacy_ssb_tbl
);
92 /* Channel and ratetables are shared for all devices.
93 * They can't be const, because ieee80211 puts some precalculated
94 * data in there. This data is the same for all devices, so we don't
95 * get concurrency issues */
96 #define RATETAB_ENT(_rateid, _flags) \
98 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
99 .hw_value = (_rateid), \
103 * NOTE: When changing this, sync with xmit.c's
104 * b43legacy_plcp_get_bitrate_idx_* functions!
106 static struct ieee80211_rate __b43legacy_ratetable
[] = {
107 RATETAB_ENT(B43legacy_CCK_RATE_1MB
, 0),
108 RATETAB_ENT(B43legacy_CCK_RATE_2MB
, IEEE80211_RATE_SHORT_PREAMBLE
),
109 RATETAB_ENT(B43legacy_CCK_RATE_5MB
, IEEE80211_RATE_SHORT_PREAMBLE
),
110 RATETAB_ENT(B43legacy_CCK_RATE_11MB
, IEEE80211_RATE_SHORT_PREAMBLE
),
111 RATETAB_ENT(B43legacy_OFDM_RATE_6MB
, 0),
112 RATETAB_ENT(B43legacy_OFDM_RATE_9MB
, 0),
113 RATETAB_ENT(B43legacy_OFDM_RATE_12MB
, 0),
114 RATETAB_ENT(B43legacy_OFDM_RATE_18MB
, 0),
115 RATETAB_ENT(B43legacy_OFDM_RATE_24MB
, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_36MB
, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_48MB
, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_54MB
, 0),
120 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
121 #define b43legacy_b_ratetable_size 4
122 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
123 #define b43legacy_g_ratetable_size 12
125 #define CHANTAB_ENT(_chanid, _freq) \
127 .center_freq = (_freq), \
128 .hw_value = (_chanid), \
130 static struct ieee80211_channel b43legacy_bg_chantable
[] = {
131 CHANTAB_ENT(1, 2412),
132 CHANTAB_ENT(2, 2417),
133 CHANTAB_ENT(3, 2422),
134 CHANTAB_ENT(4, 2427),
135 CHANTAB_ENT(5, 2432),
136 CHANTAB_ENT(6, 2437),
137 CHANTAB_ENT(7, 2442),
138 CHANTAB_ENT(8, 2447),
139 CHANTAB_ENT(9, 2452),
140 CHANTAB_ENT(10, 2457),
141 CHANTAB_ENT(11, 2462),
142 CHANTAB_ENT(12, 2467),
143 CHANTAB_ENT(13, 2472),
144 CHANTAB_ENT(14, 2484),
147 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY
= {
148 .channels
= b43legacy_bg_chantable
,
149 .n_channels
= ARRAY_SIZE(b43legacy_bg_chantable
),
150 .bitrates
= b43legacy_b_ratetable
,
151 .n_bitrates
= b43legacy_b_ratetable_size
,
154 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY
= {
155 .channels
= b43legacy_bg_chantable
,
156 .n_channels
= ARRAY_SIZE(b43legacy_bg_chantable
),
157 .bitrates
= b43legacy_g_ratetable
,
158 .n_bitrates
= b43legacy_g_ratetable_size
,
161 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
);
162 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
);
163 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
);
164 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
);
167 static int b43legacy_ratelimit(struct b43legacy_wl
*wl
)
169 if (!wl
|| !wl
->current_dev
)
171 if (b43legacy_status(wl
->current_dev
) < B43legacy_STAT_STARTED
)
173 /* We are up and running.
174 * Ratelimit the messages to avoid DoS over the net. */
175 return net_ratelimit();
178 void b43legacyinfo(struct b43legacy_wl
*wl
, const char *fmt
, ...)
182 if (!b43legacy_ratelimit(wl
))
185 printk(KERN_INFO
"b43legacy-%s: ",
186 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
191 void b43legacyerr(struct b43legacy_wl
*wl
, const char *fmt
, ...)
195 if (!b43legacy_ratelimit(wl
))
198 printk(KERN_ERR
"b43legacy-%s ERROR: ",
199 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
204 void b43legacywarn(struct b43legacy_wl
*wl
, const char *fmt
, ...)
208 if (!b43legacy_ratelimit(wl
))
211 printk(KERN_WARNING
"b43legacy-%s warning: ",
212 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
218 void b43legacydbg(struct b43legacy_wl
*wl
, const char *fmt
, ...)
223 printk(KERN_DEBUG
"b43legacy-%s debug: ",
224 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
230 static void b43legacy_ram_write(struct b43legacy_wldev
*dev
, u16 offset
,
235 B43legacy_WARN_ON(offset
% 4 != 0);
237 status
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
238 if (status
& B43legacy_MACCTL_BE
)
241 b43legacy_write32(dev
, B43legacy_MMIO_RAM_CONTROL
, offset
);
243 b43legacy_write32(dev
, B43legacy_MMIO_RAM_DATA
, val
);
247 void b43legacy_shm_control_word(struct b43legacy_wldev
*dev
,
248 u16 routing
, u16 offset
)
252 /* "offset" is the WORD offset. */
257 b43legacy_write32(dev
, B43legacy_MMIO_SHM_CONTROL
, control
);
260 u32
b43legacy_shm_read32(struct b43legacy_wldev
*dev
,
261 u16 routing
, u16 offset
)
265 if (routing
== B43legacy_SHM_SHARED
) {
266 B43legacy_WARN_ON((offset
& 0x0001) != 0);
267 if (offset
& 0x0003) {
268 /* Unaligned access */
269 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
270 ret
= b43legacy_read16(dev
,
271 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
273 b43legacy_shm_control_word(dev
, routing
,
275 ret
|= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
281 b43legacy_shm_control_word(dev
, routing
, offset
);
282 ret
= b43legacy_read32(dev
, B43legacy_MMIO_SHM_DATA
);
287 u16
b43legacy_shm_read16(struct b43legacy_wldev
*dev
,
288 u16 routing
, u16 offset
)
292 if (routing
== B43legacy_SHM_SHARED
) {
293 B43legacy_WARN_ON((offset
& 0x0001) != 0);
294 if (offset
& 0x0003) {
295 /* Unaligned access */
296 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
297 ret
= b43legacy_read16(dev
,
298 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
304 b43legacy_shm_control_word(dev
, routing
, offset
);
305 ret
= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
310 void b43legacy_shm_write32(struct b43legacy_wldev
*dev
,
311 u16 routing
, u16 offset
,
314 if (routing
== B43legacy_SHM_SHARED
) {
315 B43legacy_WARN_ON((offset
& 0x0001) != 0);
316 if (offset
& 0x0003) {
317 /* Unaligned access */
318 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
320 b43legacy_write16(dev
,
321 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
322 (value
>> 16) & 0xffff);
324 b43legacy_shm_control_word(dev
, routing
,
327 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
,
333 b43legacy_shm_control_word(dev
, routing
, offset
);
335 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, value
);
338 void b43legacy_shm_write16(struct b43legacy_wldev
*dev
, u16 routing
, u16 offset
,
341 if (routing
== B43legacy_SHM_SHARED
) {
342 B43legacy_WARN_ON((offset
& 0x0001) != 0);
343 if (offset
& 0x0003) {
344 /* Unaligned access */
345 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
347 b43legacy_write16(dev
,
348 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
354 b43legacy_shm_control_word(dev
, routing
, offset
);
356 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
, value
);
360 u32
b43legacy_hf_read(struct b43legacy_wldev
*dev
)
364 ret
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
365 B43legacy_SHM_SH_HOSTFHI
);
367 ret
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
368 B43legacy_SHM_SH_HOSTFLO
);
373 /* Write HostFlags */
374 void b43legacy_hf_write(struct b43legacy_wldev
*dev
, u32 value
)
376 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
377 B43legacy_SHM_SH_HOSTFLO
,
378 (value
& 0x0000FFFF));
379 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
380 B43legacy_SHM_SH_HOSTFHI
,
381 ((value
& 0xFFFF0000) >> 16));
384 void b43legacy_tsf_read(struct b43legacy_wldev
*dev
, u64
*tsf
)
386 /* We need to be careful. As we read the TSF from multiple
387 * registers, we should take care of register overflows.
388 * In theory, the whole tsf read process should be atomic.
389 * We try to be atomic here, by restaring the read process,
390 * if any of the high registers changed (overflew).
392 if (dev
->dev
->id
.revision
>= 3) {
398 high
= b43legacy_read32(dev
,
399 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
400 low
= b43legacy_read32(dev
,
401 B43legacy_MMIO_REV3PLUS_TSF_LOW
);
402 high2
= b43legacy_read32(dev
,
403 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
404 } while (unlikely(high
!= high2
));
420 v3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
421 v2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
422 v1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
423 v0
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_0
);
425 test3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
426 test2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
427 test1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
428 } while (v3
!= test3
|| v2
!= test2
|| v1
!= test1
);
442 static void b43legacy_time_lock(struct b43legacy_wldev
*dev
)
446 status
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
447 status
|= B43legacy_MACCTL_TBTTHOLD
;
448 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, status
);
452 static void b43legacy_time_unlock(struct b43legacy_wldev
*dev
)
456 status
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
457 status
&= ~B43legacy_MACCTL_TBTTHOLD
;
458 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, status
);
461 static void b43legacy_tsf_write_locked(struct b43legacy_wldev
*dev
, u64 tsf
)
463 /* Be careful with the in-progress timer.
464 * First zero out the low register, so we have a full
465 * register-overflow duration to complete the operation.
467 if (dev
->dev
->id
.revision
>= 3) {
468 u32 lo
= (tsf
& 0x00000000FFFFFFFFULL
);
469 u32 hi
= (tsf
& 0xFFFFFFFF00000000ULL
) >> 32;
471 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
, 0);
473 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_HIGH
,
476 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
,
479 u16 v0
= (tsf
& 0x000000000000FFFFULL
);
480 u16 v1
= (tsf
& 0x00000000FFFF0000ULL
) >> 16;
481 u16 v2
= (tsf
& 0x0000FFFF00000000ULL
) >> 32;
482 u16 v3
= (tsf
& 0xFFFF000000000000ULL
) >> 48;
484 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, 0);
486 b43legacy_write16(dev
, B43legacy_MMIO_TSF_3
, v3
);
488 b43legacy_write16(dev
, B43legacy_MMIO_TSF_2
, v2
);
490 b43legacy_write16(dev
, B43legacy_MMIO_TSF_1
, v1
);
492 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, v0
);
496 void b43legacy_tsf_write(struct b43legacy_wldev
*dev
, u64 tsf
)
498 b43legacy_time_lock(dev
);
499 b43legacy_tsf_write_locked(dev
, tsf
);
500 b43legacy_time_unlock(dev
);
504 void b43legacy_macfilter_set(struct b43legacy_wldev
*dev
,
505 u16 offset
, const u8
*mac
)
507 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
514 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_CONTROL
, offset
);
518 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
521 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
524 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
527 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev
*dev
)
529 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
530 const u8
*mac
= dev
->wl
->mac_addr
;
531 const u8
*bssid
= dev
->wl
->bssid
;
532 u8 mac_bssid
[ETH_ALEN
* 2];
541 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_BSSID
, bssid
);
543 memcpy(mac_bssid
, mac
, ETH_ALEN
);
544 memcpy(mac_bssid
+ ETH_ALEN
, bssid
, ETH_ALEN
);
546 /* Write our MAC address and BSSID to template ram */
547 for (i
= 0; i
< ARRAY_SIZE(mac_bssid
); i
+= sizeof(u32
)) {
548 tmp
= (u32
)(mac_bssid
[i
+ 0]);
549 tmp
|= (u32
)(mac_bssid
[i
+ 1]) << 8;
550 tmp
|= (u32
)(mac_bssid
[i
+ 2]) << 16;
551 tmp
|= (u32
)(mac_bssid
[i
+ 3]) << 24;
552 b43legacy_ram_write(dev
, 0x20 + i
, tmp
);
553 b43legacy_ram_write(dev
, 0x78 + i
, tmp
);
554 b43legacy_ram_write(dev
, 0x478 + i
, tmp
);
558 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev
*dev
)
560 b43legacy_write_mac_bssid_templates(dev
);
561 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_SELF
,
565 static void b43legacy_set_slot_time(struct b43legacy_wldev
*dev
,
568 /* slot_time is in usec. */
569 if (dev
->phy
.type
!= B43legacy_PHYTYPE_G
)
571 b43legacy_write16(dev
, 0x684, 510 + slot_time
);
572 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0010,
576 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev
*dev
)
578 b43legacy_set_slot_time(dev
, 9);
581 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev
*dev
)
583 b43legacy_set_slot_time(dev
, 20);
586 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
587 * Returns the _previously_ enabled IRQ mask.
589 static inline u32
b43legacy_interrupt_enable(struct b43legacy_wldev
*dev
,
594 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
595 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
|
601 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
602 * Returns the _previously_ enabled IRQ mask.
604 static inline u32
b43legacy_interrupt_disable(struct b43legacy_wldev
*dev
,
609 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
610 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
& ~mask
);
615 /* Synchronize IRQ top- and bottom-half.
616 * IRQs must be masked before calling this.
617 * This must not be called with the irq_lock held.
619 static void b43legacy_synchronize_irq(struct b43legacy_wldev
*dev
)
621 synchronize_irq(dev
->dev
->irq
);
622 tasklet_kill(&dev
->isr_tasklet
);
625 /* DummyTransmission function, as documented on
626 * http://bcm-specs.sipsolutions.net/DummyTransmission
628 void b43legacy_dummy_transmission(struct b43legacy_wldev
*dev
)
630 struct b43legacy_phy
*phy
= &dev
->phy
;
632 unsigned int max_loop
;
643 case B43legacy_PHYTYPE_B
:
644 case B43legacy_PHYTYPE_G
:
646 buffer
[0] = 0x000B846E;
653 for (i
= 0; i
< 5; i
++)
654 b43legacy_ram_write(dev
, i
* 4, buffer
[i
]);
656 /* dummy read follows */
657 b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
659 b43legacy_write16(dev
, 0x0568, 0x0000);
660 b43legacy_write16(dev
, 0x07C0, 0x0000);
661 b43legacy_write16(dev
, 0x050C, 0x0000);
662 b43legacy_write16(dev
, 0x0508, 0x0000);
663 b43legacy_write16(dev
, 0x050A, 0x0000);
664 b43legacy_write16(dev
, 0x054C, 0x0000);
665 b43legacy_write16(dev
, 0x056A, 0x0014);
666 b43legacy_write16(dev
, 0x0568, 0x0826);
667 b43legacy_write16(dev
, 0x0500, 0x0000);
668 b43legacy_write16(dev
, 0x0502, 0x0030);
670 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
671 b43legacy_radio_write16(dev
, 0x0051, 0x0017);
672 for (i
= 0x00; i
< max_loop
; i
++) {
673 value
= b43legacy_read16(dev
, 0x050E);
678 for (i
= 0x00; i
< 0x0A; i
++) {
679 value
= b43legacy_read16(dev
, 0x050E);
684 for (i
= 0x00; i
< 0x0A; i
++) {
685 value
= b43legacy_read16(dev
, 0x0690);
686 if (!(value
& 0x0100))
690 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
691 b43legacy_radio_write16(dev
, 0x0051, 0x0037);
694 /* Turn the Analog ON/OFF */
695 static void b43legacy_switch_analog(struct b43legacy_wldev
*dev
, int on
)
697 b43legacy_write16(dev
, B43legacy_MMIO_PHY0
, on
? 0 : 0xF4);
700 void b43legacy_wireless_core_reset(struct b43legacy_wldev
*dev
, u32 flags
)
705 flags
|= B43legacy_TMSLOW_PHYCLKEN
;
706 flags
|= B43legacy_TMSLOW_PHYRESET
;
707 ssb_device_enable(dev
->dev
, flags
);
708 msleep(2); /* Wait for the PLL to turn on. */
710 /* Now take the PHY out of Reset again */
711 tmslow
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
712 tmslow
|= SSB_TMSLOW_FGC
;
713 tmslow
&= ~B43legacy_TMSLOW_PHYRESET
;
714 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
715 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
717 tmslow
&= ~SSB_TMSLOW_FGC
;
718 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
719 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
723 b43legacy_switch_analog(dev
, 1);
725 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
726 macctl
&= ~B43legacy_MACCTL_GMODE
;
727 if (flags
& B43legacy_TMSLOW_GMODE
) {
728 macctl
|= B43legacy_MACCTL_GMODE
;
732 macctl
|= B43legacy_MACCTL_IHR_ENABLED
;
733 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
736 static void handle_irq_transmit_status(struct b43legacy_wldev
*dev
)
741 struct b43legacy_txstatus stat
;
744 v0
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
745 if (!(v0
& 0x00000001))
747 v1
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
749 stat
.cookie
= (v0
>> 16);
750 stat
.seq
= (v1
& 0x0000FFFF);
751 stat
.phy_stat
= ((v1
& 0x00FF0000) >> 16);
752 tmp
= (v0
& 0x0000FFFF);
753 stat
.frame_count
= ((tmp
& 0xF000) >> 12);
754 stat
.rts_count
= ((tmp
& 0x0F00) >> 8);
755 stat
.supp_reason
= ((tmp
& 0x001C) >> 2);
756 stat
.pm_indicated
= !!(tmp
& 0x0080);
757 stat
.intermediate
= !!(tmp
& 0x0040);
758 stat
.for_ampdu
= !!(tmp
& 0x0020);
759 stat
.acked
= !!(tmp
& 0x0002);
761 b43legacy_handle_txstatus(dev
, &stat
);
765 static void drain_txstatus_queue(struct b43legacy_wldev
*dev
)
769 if (dev
->dev
->id
.revision
< 5)
771 /* Read all entries from the microcode TXstatus FIFO
772 * and throw them away.
775 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
776 if (!(dummy
& 0x00000001))
778 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
782 static u32
b43legacy_jssi_read(struct b43legacy_wldev
*dev
)
786 val
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x40A);
788 val
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x408);
793 static void b43legacy_jssi_write(struct b43legacy_wldev
*dev
, u32 jssi
)
795 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x408,
796 (jssi
& 0x0000FFFF));
797 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x40A,
798 (jssi
& 0xFFFF0000) >> 16);
801 static void b43legacy_generate_noise_sample(struct b43legacy_wldev
*dev
)
803 b43legacy_jssi_write(dev
, 0x7F7F7F7F);
804 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
,
805 b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
)
806 | B43legacy_MACCMD_BGNOISE
);
807 B43legacy_WARN_ON(dev
->noisecalc
.channel_at_start
!=
811 static void b43legacy_calculate_link_quality(struct b43legacy_wldev
*dev
)
813 /* Top half of Link Quality calculation. */
815 if (dev
->noisecalc
.calculation_running
)
817 dev
->noisecalc
.channel_at_start
= dev
->phy
.channel
;
818 dev
->noisecalc
.calculation_running
= 1;
819 dev
->noisecalc
.nr_samples
= 0;
821 b43legacy_generate_noise_sample(dev
);
824 static void handle_irq_noise(struct b43legacy_wldev
*dev
)
826 struct b43legacy_phy
*phy
= &dev
->phy
;
833 /* Bottom half of Link Quality calculation. */
835 B43legacy_WARN_ON(!dev
->noisecalc
.calculation_running
);
836 if (dev
->noisecalc
.channel_at_start
!= phy
->channel
)
837 goto drop_calculation
;
838 *((__le32
*)noise
) = cpu_to_le32(b43legacy_jssi_read(dev
));
839 if (noise
[0] == 0x7F || noise
[1] == 0x7F ||
840 noise
[2] == 0x7F || noise
[3] == 0x7F)
843 /* Get the noise samples. */
844 B43legacy_WARN_ON(dev
->noisecalc
.nr_samples
>= 8);
845 i
= dev
->noisecalc
.nr_samples
;
846 noise
[0] = clamp_val(noise
[0], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
847 noise
[1] = clamp_val(noise
[1], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
848 noise
[2] = clamp_val(noise
[2], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
849 noise
[3] = clamp_val(noise
[3], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
850 dev
->noisecalc
.samples
[i
][0] = phy
->nrssi_lt
[noise
[0]];
851 dev
->noisecalc
.samples
[i
][1] = phy
->nrssi_lt
[noise
[1]];
852 dev
->noisecalc
.samples
[i
][2] = phy
->nrssi_lt
[noise
[2]];
853 dev
->noisecalc
.samples
[i
][3] = phy
->nrssi_lt
[noise
[3]];
854 dev
->noisecalc
.nr_samples
++;
855 if (dev
->noisecalc
.nr_samples
== 8) {
856 /* Calculate the Link Quality by the noise samples. */
858 for (i
= 0; i
< 8; i
++) {
859 for (j
= 0; j
< 4; j
++)
860 average
+= dev
->noisecalc
.samples
[i
][j
];
866 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
868 tmp
= (tmp
/ 128) & 0x1F;
878 dev
->stats
.link_noise
= average
;
880 dev
->noisecalc
.calculation_running
= 0;
884 b43legacy_generate_noise_sample(dev
);
887 static void handle_irq_tbtt_indication(struct b43legacy_wldev
*dev
)
889 if (b43legacy_is_mode(dev
->wl
, NL80211_IFTYPE_AP
)) {
892 if (1/*FIXME: the last PSpoll frame was sent successfully */)
893 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
895 if (b43legacy_is_mode(dev
->wl
, NL80211_IFTYPE_ADHOC
))
899 static void handle_irq_atim_end(struct b43legacy_wldev
*dev
)
901 if (dev
->dfq_valid
) {
902 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
,
903 b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
)
904 | B43legacy_MACCMD_DFQ_VALID
);
909 static void handle_irq_pmq(struct b43legacy_wldev
*dev
)
916 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_PS_STATUS
);
917 if (!(tmp
& 0x00000008))
920 /* 16bit write is odd, but correct. */
921 b43legacy_write16(dev
, B43legacy_MMIO_PS_STATUS
, 0x0002);
924 static void b43legacy_write_template_common(struct b43legacy_wldev
*dev
,
925 const u8
*data
, u16 size
,
927 u16 shm_size_offset
, u8 rate
)
931 struct b43legacy_plcp_hdr4 plcp
;
934 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
935 b43legacy_ram_write(dev
, ram_offset
, le32_to_cpu(plcp
.data
));
936 ram_offset
+= sizeof(u32
);
937 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
938 * So leave the first two bytes of the next write blank.
940 tmp
= (u32
)(data
[0]) << 16;
941 tmp
|= (u32
)(data
[1]) << 24;
942 b43legacy_ram_write(dev
, ram_offset
, tmp
);
943 ram_offset
+= sizeof(u32
);
944 for (i
= 2; i
< size
; i
+= sizeof(u32
)) {
945 tmp
= (u32
)(data
[i
+ 0]);
947 tmp
|= (u32
)(data
[i
+ 1]) << 8;
949 tmp
|= (u32
)(data
[i
+ 2]) << 16;
951 tmp
|= (u32
)(data
[i
+ 3]) << 24;
952 b43legacy_ram_write(dev
, ram_offset
+ i
- 2, tmp
);
954 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_size_offset
,
955 size
+ sizeof(struct b43legacy_plcp_hdr6
));
958 static void b43legacy_write_beacon_template(struct b43legacy_wldev
*dev
,
960 u16 shm_size_offset
, u8 rate
)
963 unsigned int i
, len
, variable_len
;
964 const struct ieee80211_mgmt
*bcn
;
968 bcn
= (const struct ieee80211_mgmt
*)(dev
->wl
->current_beacon
->data
);
969 len
= min((size_t)dev
->wl
->current_beacon
->len
,
970 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
972 b43legacy_write_template_common(dev
, (const u8
*)bcn
, len
, ram_offset
,
973 shm_size_offset
, rate
);
975 /* Find the position of the TIM and the DTIM_period value
976 * and write them to SHM. */
977 ie
= bcn
->u
.beacon
.variable
;
978 variable_len
= len
- offsetof(struct ieee80211_mgmt
, u
.beacon
.variable
);
979 for (i
= 0; i
< variable_len
- 2; ) {
980 uint8_t ie_id
, ie_len
;
987 /* This is the TIM Information Element */
989 /* Check whether the ie_len is in the beacon data range. */
990 if (variable_len
< ie_len
+ 2 + i
)
992 /* A valid TIM is at least 4 bytes long. */
997 tim_position
= sizeof(struct b43legacy_plcp_hdr6
);
998 tim_position
+= offsetof(struct ieee80211_mgmt
,
1002 dtim_period
= ie
[i
+ 3];
1004 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1005 B43legacy_SHM_SH_TIMPOS
, tim_position
);
1006 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1007 B43legacy_SHM_SH_DTIMP
, dtim_period
);
1013 b43legacywarn(dev
->wl
, "Did not find a valid TIM IE in the "
1014 "beacon template packet. AP or IBSS operation "
1015 "may be broken.\n");
1017 b43legacydbg(dev
->wl
, "Updated beacon template\n");
1020 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev
*dev
,
1021 u16 shm_offset
, u16 size
,
1022 struct ieee80211_rate
*rate
)
1024 struct b43legacy_plcp_hdr4 plcp
;
1029 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
->bitrate
);
1030 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1034 /* Write PLCP in two parts and timing for packet transfer */
1035 tmp
= le32_to_cpu(plcp
.data
);
1036 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
,
1038 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 2,
1040 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 6,
1044 /* Instead of using custom probe response template, this function
1045 * just patches custom beacon template by:
1046 * 1) Changing packet type
1047 * 2) Patching duration field
1050 static const u8
*b43legacy_generate_probe_resp(struct b43legacy_wldev
*dev
,
1052 struct ieee80211_rate
*rate
)
1056 u16 src_size
, elem_size
, src_pos
, dest_pos
;
1058 struct ieee80211_hdr
*hdr
;
1061 src_size
= dev
->wl
->current_beacon
->len
;
1062 src_data
= (const u8
*)dev
->wl
->current_beacon
->data
;
1064 /* Get the start offset of the variable IEs in the packet. */
1065 ie_start
= offsetof(struct ieee80211_mgmt
, u
.probe_resp
.variable
);
1066 B43legacy_WARN_ON(ie_start
!= offsetof(struct ieee80211_mgmt
,
1067 u
.beacon
.variable
));
1069 if (B43legacy_WARN_ON(src_size
< ie_start
))
1072 dest_data
= kmalloc(src_size
, GFP_ATOMIC
);
1073 if (unlikely(!dest_data
))
1076 /* Copy the static data and all Information Elements, except the TIM. */
1077 memcpy(dest_data
, src_data
, ie_start
);
1079 dest_pos
= ie_start
;
1080 for ( ; src_pos
< src_size
- 2; src_pos
+= elem_size
) {
1081 elem_size
= src_data
[src_pos
+ 1] + 2;
1082 if (src_data
[src_pos
] == 5) {
1083 /* This is the TIM. */
1086 memcpy(dest_data
+ dest_pos
, src_data
+ src_pos
, elem_size
);
1087 dest_pos
+= elem_size
;
1089 *dest_size
= dest_pos
;
1090 hdr
= (struct ieee80211_hdr
*)dest_data
;
1092 /* Set the frame control. */
1093 hdr
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
|
1094 IEEE80211_STYPE_PROBE_RESP
);
1095 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1099 hdr
->duration_id
= dur
;
1104 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev
*dev
,
1106 u16 shm_size_offset
,
1107 struct ieee80211_rate
*rate
)
1109 const u8
*probe_resp_data
;
1112 size
= dev
->wl
->current_beacon
->len
;
1113 probe_resp_data
= b43legacy_generate_probe_resp(dev
, &size
, rate
);
1114 if (unlikely(!probe_resp_data
))
1117 /* Looks like PLCP headers plus packet timings are stored for
1118 * all possible basic rates
1120 b43legacy_write_probe_resp_plcp(dev
, 0x31A, size
,
1121 &b43legacy_b_ratetable
[0]);
1122 b43legacy_write_probe_resp_plcp(dev
, 0x32C, size
,
1123 &b43legacy_b_ratetable
[1]);
1124 b43legacy_write_probe_resp_plcp(dev
, 0x33E, size
,
1125 &b43legacy_b_ratetable
[2]);
1126 b43legacy_write_probe_resp_plcp(dev
, 0x350, size
,
1127 &b43legacy_b_ratetable
[3]);
1129 size
= min((size_t)size
,
1130 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
1131 b43legacy_write_template_common(dev
, probe_resp_data
,
1133 shm_size_offset
, rate
->bitrate
);
1134 kfree(probe_resp_data
);
1137 static void b43legacy_beacon_update_trigger_work(struct work_struct
*work
)
1139 struct b43legacy_wl
*wl
= container_of(work
, struct b43legacy_wl
,
1140 beacon_update_trigger
);
1141 struct b43legacy_wldev
*dev
;
1143 mutex_lock(&wl
->mutex
);
1144 dev
= wl
->current_dev
;
1145 if (likely(dev
&& (b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
))) {
1146 /* Force the microcode to trigger the
1147 * beacon update bottom-half IRQ. */
1148 spin_lock_irq(&wl
->irq_lock
);
1149 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
,
1150 b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
)
1151 | B43legacy_MACCMD_BEACON0_VALID
1152 | B43legacy_MACCMD_BEACON1_VALID
);
1153 spin_unlock_irq(&wl
->irq_lock
);
1155 mutex_unlock(&wl
->mutex
);
1158 /* Asynchronously update the packet templates in template RAM.
1159 * Locking: Requires wl->irq_lock to be locked. */
1160 static void b43legacy_update_templates(struct b43legacy_wl
*wl
)
1162 struct sk_buff
*beacon
;
1163 /* This is the top half of the ansynchronous beacon update. The bottom
1164 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1165 * sending an invalid beacon. This can happen for example, if the
1166 * firmware transmits a beacon while we are updating it. */
1168 /* We could modify the existing beacon and set the aid bit in the TIM
1169 * field, but that would probably require resizing and moving of data
1170 * within the beacon template. Simply request a new beacon and let
1171 * mac80211 do the hard work. */
1172 beacon
= ieee80211_beacon_get(wl
->hw
, wl
->vif
);
1173 if (unlikely(!beacon
))
1176 if (wl
->current_beacon
)
1177 dev_kfree_skb_any(wl
->current_beacon
);
1178 wl
->current_beacon
= beacon
;
1179 wl
->beacon0_uploaded
= 0;
1180 wl
->beacon1_uploaded
= 0;
1181 queue_work(wl
->hw
->workqueue
, &wl
->beacon_update_trigger
);
1184 static void b43legacy_set_beacon_int(struct b43legacy_wldev
*dev
,
1187 b43legacy_time_lock(dev
);
1188 if (dev
->dev
->id
.revision
>= 3) {
1189 b43legacy_write32(dev
, B43legacy_MMIO_TSF_CFP_REP
,
1190 (beacon_int
<< 16));
1191 b43legacy_write32(dev
, B43legacy_MMIO_TSF_CFP_START
,
1192 (beacon_int
<< 10));
1194 b43legacy_write16(dev
, 0x606, (beacon_int
>> 6));
1195 b43legacy_write16(dev
, 0x610, beacon_int
);
1197 b43legacy_time_unlock(dev
);
1198 b43legacydbg(dev
->wl
, "Set beacon interval to %u\n", beacon_int
);
1201 static void handle_irq_beacon(struct b43legacy_wldev
*dev
)
1203 struct b43legacy_wl
*wl
= dev
->wl
;
1205 u32 beacon0_valid
, beacon1_valid
;
1207 if (!b43legacy_is_mode(wl
, NL80211_IFTYPE_AP
))
1210 /* This is the bottom half of the asynchronous beacon update. */
1212 cmd
= b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
);
1213 beacon0_valid
= (cmd
& B43legacy_MACCMD_BEACON0_VALID
);
1214 beacon1_valid
= (cmd
& B43legacy_MACCMD_BEACON1_VALID
);
1215 cmd
&= ~(B43legacy_MACCMD_BEACON0_VALID
| B43legacy_MACCMD_BEACON1_VALID
);
1217 if (!beacon0_valid
) {
1218 if (!wl
->beacon0_uploaded
) {
1219 b43legacy_write_beacon_template(dev
, 0x68,
1220 B43legacy_SHM_SH_BTL0
,
1221 B43legacy_CCK_RATE_1MB
);
1222 b43legacy_write_probe_resp_template(dev
, 0x268,
1223 B43legacy_SHM_SH_PRTLEN
,
1224 &__b43legacy_ratetable
[3]);
1225 wl
->beacon0_uploaded
= 1;
1227 cmd
|= B43legacy_MACCMD_BEACON0_VALID
;
1228 } else if (!beacon1_valid
) {
1229 if (!wl
->beacon1_uploaded
) {
1230 b43legacy_write_beacon_template(dev
, 0x468,
1231 B43legacy_SHM_SH_BTL1
,
1232 B43legacy_CCK_RATE_1MB
);
1233 wl
->beacon1_uploaded
= 1;
1235 cmd
|= B43legacy_MACCMD_BEACON1_VALID
;
1237 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
, cmd
);
1240 static void handle_irq_ucode_debug(struct b43legacy_wldev
*dev
)
1244 /* Interrupt handler bottom-half */
1245 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev
*dev
)
1248 u32 dma_reason
[ARRAY_SIZE(dev
->dma_reason
)];
1249 u32 merged_dma_reason
= 0;
1251 unsigned long flags
;
1253 spin_lock_irqsave(&dev
->wl
->irq_lock
, flags
);
1255 B43legacy_WARN_ON(b43legacy_status(dev
) <
1256 B43legacy_STAT_INITIALIZED
);
1258 reason
= dev
->irq_reason
;
1259 for (i
= 0; i
< ARRAY_SIZE(dma_reason
); i
++) {
1260 dma_reason
[i
] = dev
->dma_reason
[i
];
1261 merged_dma_reason
|= dma_reason
[i
];
1264 if (unlikely(reason
& B43legacy_IRQ_MAC_TXERR
))
1265 b43legacyerr(dev
->wl
, "MAC transmission error\n");
1267 if (unlikely(reason
& B43legacy_IRQ_PHY_TXERR
)) {
1268 b43legacyerr(dev
->wl
, "PHY transmission error\n");
1270 if (unlikely(atomic_dec_and_test(&dev
->phy
.txerr_cnt
))) {
1271 b43legacyerr(dev
->wl
, "Too many PHY TX errors, "
1272 "restarting the controller\n");
1273 b43legacy_controller_restart(dev
, "PHY TX errors");
1277 if (unlikely(merged_dma_reason
& (B43legacy_DMAIRQ_FATALMASK
|
1278 B43legacy_DMAIRQ_NONFATALMASK
))) {
1279 if (merged_dma_reason
& B43legacy_DMAIRQ_FATALMASK
) {
1280 b43legacyerr(dev
->wl
, "Fatal DMA error: "
1281 "0x%08X, 0x%08X, 0x%08X, "
1282 "0x%08X, 0x%08X, 0x%08X\n",
1283 dma_reason
[0], dma_reason
[1],
1284 dma_reason
[2], dma_reason
[3],
1285 dma_reason
[4], dma_reason
[5]);
1286 b43legacy_controller_restart(dev
, "DMA error");
1288 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1291 if (merged_dma_reason
& B43legacy_DMAIRQ_NONFATALMASK
)
1292 b43legacyerr(dev
->wl
, "DMA error: "
1293 "0x%08X, 0x%08X, 0x%08X, "
1294 "0x%08X, 0x%08X, 0x%08X\n",
1295 dma_reason
[0], dma_reason
[1],
1296 dma_reason
[2], dma_reason
[3],
1297 dma_reason
[4], dma_reason
[5]);
1300 if (unlikely(reason
& B43legacy_IRQ_UCODE_DEBUG
))
1301 handle_irq_ucode_debug(dev
);
1302 if (reason
& B43legacy_IRQ_TBTT_INDI
)
1303 handle_irq_tbtt_indication(dev
);
1304 if (reason
& B43legacy_IRQ_ATIM_END
)
1305 handle_irq_atim_end(dev
);
1306 if (reason
& B43legacy_IRQ_BEACON
)
1307 handle_irq_beacon(dev
);
1308 if (reason
& B43legacy_IRQ_PMQ
)
1309 handle_irq_pmq(dev
);
1310 if (reason
& B43legacy_IRQ_TXFIFO_FLUSH_OK
)
1312 if (reason
& B43legacy_IRQ_NOISESAMPLE_OK
)
1313 handle_irq_noise(dev
);
1315 /* Check the DMA reason registers for received data. */
1316 if (dma_reason
[0] & B43legacy_DMAIRQ_RX_DONE
) {
1317 if (b43legacy_using_pio(dev
))
1318 b43legacy_pio_rx(dev
->pio
.queue0
);
1320 b43legacy_dma_rx(dev
->dma
.rx_ring0
);
1322 B43legacy_WARN_ON(dma_reason
[1] & B43legacy_DMAIRQ_RX_DONE
);
1323 B43legacy_WARN_ON(dma_reason
[2] & B43legacy_DMAIRQ_RX_DONE
);
1324 if (dma_reason
[3] & B43legacy_DMAIRQ_RX_DONE
) {
1325 if (b43legacy_using_pio(dev
))
1326 b43legacy_pio_rx(dev
->pio
.queue3
);
1328 b43legacy_dma_rx(dev
->dma
.rx_ring3
);
1330 B43legacy_WARN_ON(dma_reason
[4] & B43legacy_DMAIRQ_RX_DONE
);
1331 B43legacy_WARN_ON(dma_reason
[5] & B43legacy_DMAIRQ_RX_DONE
);
1333 if (reason
& B43legacy_IRQ_TX_OK
)
1334 handle_irq_transmit_status(dev
);
1336 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1338 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1341 static void pio_irq_workaround(struct b43legacy_wldev
*dev
,
1342 u16 base
, int queueidx
)
1346 rxctl
= b43legacy_read16(dev
, base
+ B43legacy_PIO_RXCTL
);
1347 if (rxctl
& B43legacy_PIO_RXCTL_DATAAVAILABLE
)
1348 dev
->dma_reason
[queueidx
] |= B43legacy_DMAIRQ_RX_DONE
;
1350 dev
->dma_reason
[queueidx
] &= ~B43legacy_DMAIRQ_RX_DONE
;
1353 static void b43legacy_interrupt_ack(struct b43legacy_wldev
*dev
, u32 reason
)
1355 if (b43legacy_using_pio(dev
) &&
1356 (dev
->dev
->id
.revision
< 3) &&
1357 (!(reason
& B43legacy_IRQ_PIO_WORKAROUND
))) {
1358 /* Apply a PIO specific workaround to the dma_reasons */
1359 pio_irq_workaround(dev
, B43legacy_MMIO_PIO1_BASE
, 0);
1360 pio_irq_workaround(dev
, B43legacy_MMIO_PIO2_BASE
, 1);
1361 pio_irq_workaround(dev
, B43legacy_MMIO_PIO3_BASE
, 2);
1362 pio_irq_workaround(dev
, B43legacy_MMIO_PIO4_BASE
, 3);
1365 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, reason
);
1367 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_REASON
,
1368 dev
->dma_reason
[0]);
1369 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_REASON
,
1370 dev
->dma_reason
[1]);
1371 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_REASON
,
1372 dev
->dma_reason
[2]);
1373 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_REASON
,
1374 dev
->dma_reason
[3]);
1375 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_REASON
,
1376 dev
->dma_reason
[4]);
1377 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_REASON
,
1378 dev
->dma_reason
[5]);
1381 /* Interrupt handler top-half */
1382 static irqreturn_t
b43legacy_interrupt_handler(int irq
, void *dev_id
)
1384 irqreturn_t ret
= IRQ_NONE
;
1385 struct b43legacy_wldev
*dev
= dev_id
;
1391 spin_lock(&dev
->wl
->irq_lock
);
1393 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
1395 reason
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1396 if (reason
== 0xffffffff) /* shared IRQ */
1399 reason
&= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
1403 dev
->dma_reason
[0] = b43legacy_read32(dev
,
1404 B43legacy_MMIO_DMA0_REASON
)
1406 dev
->dma_reason
[1] = b43legacy_read32(dev
,
1407 B43legacy_MMIO_DMA1_REASON
)
1409 dev
->dma_reason
[2] = b43legacy_read32(dev
,
1410 B43legacy_MMIO_DMA2_REASON
)
1412 dev
->dma_reason
[3] = b43legacy_read32(dev
,
1413 B43legacy_MMIO_DMA3_REASON
)
1415 dev
->dma_reason
[4] = b43legacy_read32(dev
,
1416 B43legacy_MMIO_DMA4_REASON
)
1418 dev
->dma_reason
[5] = b43legacy_read32(dev
,
1419 B43legacy_MMIO_DMA5_REASON
)
1422 b43legacy_interrupt_ack(dev
, reason
);
1423 /* disable all IRQs. They are enabled again in the bottom half. */
1424 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
1426 /* save the reason code and call our bottom half. */
1427 dev
->irq_reason
= reason
;
1428 tasklet_schedule(&dev
->isr_tasklet
);
1431 spin_unlock(&dev
->wl
->irq_lock
);
1436 static void b43legacy_release_firmware(struct b43legacy_wldev
*dev
)
1438 release_firmware(dev
->fw
.ucode
);
1439 dev
->fw
.ucode
= NULL
;
1440 release_firmware(dev
->fw
.pcm
);
1442 release_firmware(dev
->fw
.initvals
);
1443 dev
->fw
.initvals
= NULL
;
1444 release_firmware(dev
->fw
.initvals_band
);
1445 dev
->fw
.initvals_band
= NULL
;
1448 static void b43legacy_print_fw_helptext(struct b43legacy_wl
*wl
)
1450 b43legacyerr(wl
, "You must go to http://linuxwireless.org/en/users/"
1451 "Drivers/b43#devicefirmware "
1452 "and download the correct firmware (version 3).\n");
1455 static int do_request_fw(struct b43legacy_wldev
*dev
,
1457 const struct firmware
**fw
)
1459 char path
[sizeof(modparam_fwpostfix
) + 32];
1460 struct b43legacy_fw_header
*hdr
;
1467 snprintf(path
, ARRAY_SIZE(path
),
1468 "b43legacy%s/%s.fw",
1469 modparam_fwpostfix
, name
);
1470 err
= request_firmware(fw
, path
, dev
->dev
->dev
);
1472 b43legacyerr(dev
->wl
, "Firmware file \"%s\" not found "
1473 "or load failed.\n", path
);
1476 if ((*fw
)->size
< sizeof(struct b43legacy_fw_header
))
1478 hdr
= (struct b43legacy_fw_header
*)((*fw
)->data
);
1479 switch (hdr
->type
) {
1480 case B43legacy_FW_TYPE_UCODE
:
1481 case B43legacy_FW_TYPE_PCM
:
1482 size
= be32_to_cpu(hdr
->size
);
1483 if (size
!= (*fw
)->size
- sizeof(struct b43legacy_fw_header
))
1486 case B43legacy_FW_TYPE_IV
:
1497 b43legacyerr(dev
->wl
, "Firmware file \"%s\" format error.\n", path
);
1501 static int b43legacy_request_firmware(struct b43legacy_wldev
*dev
)
1503 struct b43legacy_firmware
*fw
= &dev
->fw
;
1504 const u8 rev
= dev
->dev
->id
.revision
;
1505 const char *filename
;
1509 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
1512 filename
= "ucode2";
1514 filename
= "ucode4";
1516 filename
= "ucode5";
1517 err
= do_request_fw(dev
, filename
, &fw
->ucode
);
1526 err
= do_request_fw(dev
, filename
, &fw
->pcm
);
1530 if (!fw
->initvals
) {
1531 switch (dev
->phy
.type
) {
1532 case B43legacy_PHYTYPE_B
:
1533 case B43legacy_PHYTYPE_G
:
1534 if ((rev
>= 5) && (rev
<= 10))
1535 filename
= "b0g0initvals5";
1536 else if (rev
== 2 || rev
== 4)
1537 filename
= "b0g0initvals2";
1539 goto err_no_initvals
;
1542 goto err_no_initvals
;
1544 err
= do_request_fw(dev
, filename
, &fw
->initvals
);
1548 if (!fw
->initvals_band
) {
1549 switch (dev
->phy
.type
) {
1550 case B43legacy_PHYTYPE_B
:
1551 case B43legacy_PHYTYPE_G
:
1552 if ((rev
>= 5) && (rev
<= 10))
1553 filename
= "b0g0bsinitvals5";
1556 else if (rev
== 2 || rev
== 4)
1559 goto err_no_initvals
;
1562 goto err_no_initvals
;
1564 err
= do_request_fw(dev
, filename
, &fw
->initvals_band
);
1572 b43legacy_print_fw_helptext(dev
->wl
);
1577 b43legacyerr(dev
->wl
, "No Initial Values firmware file for PHY %u, "
1578 "core rev %u\n", dev
->phy
.type
, rev
);
1582 b43legacy_release_firmware(dev
);
1586 static int b43legacy_upload_microcode(struct b43legacy_wldev
*dev
)
1588 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1599 /* Jump the microcode PSM to offset 0 */
1600 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1601 B43legacy_WARN_ON(macctl
& B43legacy_MACCTL_PSM_RUN
);
1602 macctl
|= B43legacy_MACCTL_PSM_JMP0
;
1603 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
1604 /* Zero out all microcode PSM registers and shared memory. */
1605 for (i
= 0; i
< 64; i
++)
1606 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, i
, 0);
1607 for (i
= 0; i
< 4096; i
+= 2)
1608 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, i
, 0);
1610 /* Upload Microcode. */
1611 data
= (__be32
*) (dev
->fw
.ucode
->data
+ hdr_len
);
1612 len
= (dev
->fw
.ucode
->size
- hdr_len
) / sizeof(__be32
);
1613 b43legacy_shm_control_word(dev
,
1614 B43legacy_SHM_UCODE
|
1615 B43legacy_SHM_AUTOINC_W
,
1617 for (i
= 0; i
< len
; i
++) {
1618 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1619 be32_to_cpu(data
[i
]));
1624 /* Upload PCM data. */
1625 data
= (__be32
*) (dev
->fw
.pcm
->data
+ hdr_len
);
1626 len
= (dev
->fw
.pcm
->size
- hdr_len
) / sizeof(__be32
);
1627 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EA);
1628 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, 0x00004000);
1629 /* No need for autoinc bit in SHM_HW */
1630 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EB);
1631 for (i
= 0; i
< len
; i
++) {
1632 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1633 be32_to_cpu(data
[i
]));
1638 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1641 /* Start the microcode PSM */
1642 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1643 macctl
&= ~B43legacy_MACCTL_PSM_JMP0
;
1644 macctl
|= B43legacy_MACCTL_PSM_RUN
;
1645 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
1647 /* Wait for the microcode to load and respond */
1650 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1651 if (tmp
== B43legacy_IRQ_MAC_SUSPENDED
)
1654 if (i
>= B43legacy_IRQWAIT_MAX_RETRIES
) {
1655 b43legacyerr(dev
->wl
, "Microcode not responding\n");
1656 b43legacy_print_fw_helptext(dev
->wl
);
1660 msleep_interruptible(50);
1661 if (signal_pending(current
)) {
1666 /* dummy read follows */
1667 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1669 /* Get and check the revisions. */
1670 fwrev
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1671 B43legacy_SHM_SH_UCODEREV
);
1672 fwpatch
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1673 B43legacy_SHM_SH_UCODEPATCH
);
1674 fwdate
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1675 B43legacy_SHM_SH_UCODEDATE
);
1676 fwtime
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1677 B43legacy_SHM_SH_UCODETIME
);
1679 if (fwrev
> 0x128) {
1680 b43legacyerr(dev
->wl
, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1681 " Only firmware from binary drivers version 3.x"
1682 " is supported. You must change your firmware"
1684 b43legacy_print_fw_helptext(dev
->wl
);
1688 b43legacyinfo(dev
->wl
, "Loading firmware version 0x%X, patch level %u "
1689 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev
, fwpatch
,
1690 (fwdate
>> 12) & 0xF, (fwdate
>> 8) & 0xF, fwdate
& 0xFF,
1691 (fwtime
>> 11) & 0x1F, (fwtime
>> 5) & 0x3F,
1694 dev
->fw
.rev
= fwrev
;
1695 dev
->fw
.patch
= fwpatch
;
1700 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1701 macctl
&= ~B43legacy_MACCTL_PSM_RUN
;
1702 macctl
|= B43legacy_MACCTL_PSM_JMP0
;
1703 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
1708 static int b43legacy_write_initvals(struct b43legacy_wldev
*dev
,
1709 const struct b43legacy_iv
*ivals
,
1713 const struct b43legacy_iv
*iv
;
1718 BUILD_BUG_ON(sizeof(struct b43legacy_iv
) != 6);
1720 for (i
= 0; i
< count
; i
++) {
1721 if (array_size
< sizeof(iv
->offset_size
))
1723 array_size
-= sizeof(iv
->offset_size
);
1724 offset
= be16_to_cpu(iv
->offset_size
);
1725 bit32
= !!(offset
& B43legacy_IV_32BIT
);
1726 offset
&= B43legacy_IV_OFFSET_MASK
;
1727 if (offset
>= 0x1000)
1732 if (array_size
< sizeof(iv
->data
.d32
))
1734 array_size
-= sizeof(iv
->data
.d32
);
1736 value
= get_unaligned_be32(&iv
->data
.d32
);
1737 b43legacy_write32(dev
, offset
, value
);
1739 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1745 if (array_size
< sizeof(iv
->data
.d16
))
1747 array_size
-= sizeof(iv
->data
.d16
);
1749 value
= be16_to_cpu(iv
->data
.d16
);
1750 b43legacy_write16(dev
, offset
, value
);
1752 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1763 b43legacyerr(dev
->wl
, "Initial Values Firmware file-format error.\n");
1764 b43legacy_print_fw_helptext(dev
->wl
);
1769 static int b43legacy_upload_initvals(struct b43legacy_wldev
*dev
)
1771 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1772 const struct b43legacy_fw_header
*hdr
;
1773 struct b43legacy_firmware
*fw
= &dev
->fw
;
1774 const struct b43legacy_iv
*ivals
;
1778 hdr
= (const struct b43legacy_fw_header
*)(fw
->initvals
->data
);
1779 ivals
= (const struct b43legacy_iv
*)(fw
->initvals
->data
+ hdr_len
);
1780 count
= be32_to_cpu(hdr
->size
);
1781 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1782 fw
->initvals
->size
- hdr_len
);
1785 if (fw
->initvals_band
) {
1786 hdr
= (const struct b43legacy_fw_header
*)
1787 (fw
->initvals_band
->data
);
1788 ivals
= (const struct b43legacy_iv
*)(fw
->initvals_band
->data
1790 count
= be32_to_cpu(hdr
->size
);
1791 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1792 fw
->initvals_band
->size
- hdr_len
);
1801 /* Initialize the GPIOs
1802 * http://bcm-specs.sipsolutions.net/GPIO
1804 static int b43legacy_gpio_init(struct b43legacy_wldev
*dev
)
1806 struct ssb_bus
*bus
= dev
->dev
->bus
;
1807 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1811 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
,
1812 b43legacy_read32(dev
,
1813 B43legacy_MMIO_MACCTL
)
1816 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1817 b43legacy_read16(dev
,
1818 B43legacy_MMIO_GPIO_MASK
)
1823 if (dev
->dev
->bus
->chip_id
== 0x4301) {
1827 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43legacy_BFL_PACTRL
) {
1828 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1829 b43legacy_read16(dev
,
1830 B43legacy_MMIO_GPIO_MASK
)
1835 if (dev
->dev
->id
.revision
>= 2)
1836 mask
|= 0x0010; /* FIXME: This is redundant. */
1838 #ifdef CONFIG_SSB_DRIVER_PCICORE
1839 pcidev
= bus
->pcicore
.dev
;
1841 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1844 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
,
1845 (ssb_read32(gpiodev
, B43legacy_GPIO_CONTROL
)
1851 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1852 static void b43legacy_gpio_cleanup(struct b43legacy_wldev
*dev
)
1854 struct ssb_bus
*bus
= dev
->dev
->bus
;
1855 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1857 #ifdef CONFIG_SSB_DRIVER_PCICORE
1858 pcidev
= bus
->pcicore
.dev
;
1860 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1863 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
, 0);
1866 /* http://bcm-specs.sipsolutions.net/EnableMac */
1867 void b43legacy_mac_enable(struct b43legacy_wldev
*dev
)
1869 dev
->mac_suspended
--;
1870 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1871 B43legacy_WARN_ON(irqs_disabled());
1872 if (dev
->mac_suspended
== 0) {
1873 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
,
1874 b43legacy_read32(dev
,
1875 B43legacy_MMIO_MACCTL
)
1876 | B43legacy_MACCTL_ENABLED
);
1877 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1878 B43legacy_IRQ_MAC_SUSPENDED
);
1879 /* the next two are dummy reads */
1880 b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1881 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1882 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
1884 /* Re-enable IRQs. */
1885 spin_lock_irq(&dev
->wl
->irq_lock
);
1886 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1887 spin_unlock_irq(&dev
->wl
->irq_lock
);
1891 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1892 void b43legacy_mac_suspend(struct b43legacy_wldev
*dev
)
1898 B43legacy_WARN_ON(irqs_disabled());
1899 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1901 if (dev
->mac_suspended
== 0) {
1902 /* Mask IRQs before suspending MAC. Otherwise
1903 * the MAC stays busy and won't suspend. */
1904 spin_lock_irq(&dev
->wl
->irq_lock
);
1905 tmp
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
1906 spin_unlock_irq(&dev
->wl
->irq_lock
);
1907 b43legacy_synchronize_irq(dev
);
1908 dev
->irq_savedstate
= tmp
;
1910 b43legacy_power_saving_ctl_bits(dev
, -1, 1);
1911 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
,
1912 b43legacy_read32(dev
,
1913 B43legacy_MMIO_MACCTL
)
1914 & ~B43legacy_MACCTL_ENABLED
);
1915 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1916 for (i
= 40; i
; i
--) {
1917 tmp
= b43legacy_read32(dev
,
1918 B43legacy_MMIO_GEN_IRQ_REASON
);
1919 if (tmp
& B43legacy_IRQ_MAC_SUSPENDED
)
1923 b43legacyerr(dev
->wl
, "MAC suspend failed\n");
1926 dev
->mac_suspended
++;
1929 static void b43legacy_adjust_opmode(struct b43legacy_wldev
*dev
)
1931 struct b43legacy_wl
*wl
= dev
->wl
;
1935 ctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1936 /* Reset status to STA infrastructure mode. */
1937 ctl
&= ~B43legacy_MACCTL_AP
;
1938 ctl
&= ~B43legacy_MACCTL_KEEP_CTL
;
1939 ctl
&= ~B43legacy_MACCTL_KEEP_BADPLCP
;
1940 ctl
&= ~B43legacy_MACCTL_KEEP_BAD
;
1941 ctl
&= ~B43legacy_MACCTL_PROMISC
;
1942 ctl
&= ~B43legacy_MACCTL_BEACPROMISC
;
1943 ctl
|= B43legacy_MACCTL_INFRA
;
1945 if (b43legacy_is_mode(wl
, NL80211_IFTYPE_AP
))
1946 ctl
|= B43legacy_MACCTL_AP
;
1947 else if (b43legacy_is_mode(wl
, NL80211_IFTYPE_ADHOC
))
1948 ctl
&= ~B43legacy_MACCTL_INFRA
;
1950 if (wl
->filter_flags
& FIF_CONTROL
)
1951 ctl
|= B43legacy_MACCTL_KEEP_CTL
;
1952 if (wl
->filter_flags
& FIF_FCSFAIL
)
1953 ctl
|= B43legacy_MACCTL_KEEP_BAD
;
1954 if (wl
->filter_flags
& FIF_PLCPFAIL
)
1955 ctl
|= B43legacy_MACCTL_KEEP_BADPLCP
;
1956 if (wl
->filter_flags
& FIF_PROMISC_IN_BSS
)
1957 ctl
|= B43legacy_MACCTL_PROMISC
;
1958 if (wl
->filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
1959 ctl
|= B43legacy_MACCTL_BEACPROMISC
;
1961 /* Workaround: On old hardware the HW-MAC-address-filter
1962 * doesn't work properly, so always run promisc in filter
1963 * it in software. */
1964 if (dev
->dev
->id
.revision
<= 4)
1965 ctl
|= B43legacy_MACCTL_PROMISC
;
1967 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, ctl
);
1970 if ((ctl
& B43legacy_MACCTL_INFRA
) &&
1971 !(ctl
& B43legacy_MACCTL_AP
)) {
1972 if (dev
->dev
->bus
->chip_id
== 0x4306 &&
1973 dev
->dev
->bus
->chip_rev
== 3)
1978 b43legacy_write16(dev
, 0x612, cfp_pretbtt
);
1981 static void b43legacy_rate_memory_write(struct b43legacy_wldev
*dev
,
1989 offset
+= (b43legacy_plcp_get_ratecode_ofdm(rate
) & 0x000F) * 2;
1992 offset
+= (b43legacy_plcp_get_ratecode_cck(rate
) & 0x000F) * 2;
1994 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, offset
+ 0x20,
1995 b43legacy_shm_read16(dev
,
1996 B43legacy_SHM_SHARED
, offset
));
1999 static void b43legacy_rate_memory_init(struct b43legacy_wldev
*dev
)
2001 switch (dev
->phy
.type
) {
2002 case B43legacy_PHYTYPE_G
:
2003 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_6MB
, 1);
2004 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_12MB
, 1);
2005 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_18MB
, 1);
2006 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_24MB
, 1);
2007 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_36MB
, 1);
2008 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_48MB
, 1);
2009 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_54MB
, 1);
2011 case B43legacy_PHYTYPE_B
:
2012 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_1MB
, 0);
2013 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_2MB
, 0);
2014 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_5MB
, 0);
2015 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_11MB
, 0);
2018 B43legacy_BUG_ON(1);
2022 /* Set the TX-Antenna for management frames sent by firmware. */
2023 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev
*dev
,
2030 case B43legacy_ANTENNA0
:
2031 ant
|= B43legacy_TX4_PHY_ANT0
;
2033 case B43legacy_ANTENNA1
:
2034 ant
|= B43legacy_TX4_PHY_ANT1
;
2036 case B43legacy_ANTENNA_AUTO
:
2037 ant
|= B43legacy_TX4_PHY_ANTLAST
;
2040 B43legacy_BUG_ON(1);
2043 /* FIXME We also need to set the other flags of the PHY control
2044 * field somewhere. */
2047 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2048 B43legacy_SHM_SH_BEACPHYCTL
);
2049 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
2050 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2051 B43legacy_SHM_SH_BEACPHYCTL
, tmp
);
2053 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2054 B43legacy_SHM_SH_ACKCTSPHYCTL
);
2055 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
2056 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2057 B43legacy_SHM_SH_ACKCTSPHYCTL
, tmp
);
2058 /* For Probe Resposes */
2059 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2060 B43legacy_SHM_SH_PRPHYCTL
);
2061 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
2062 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2063 B43legacy_SHM_SH_PRPHYCTL
, tmp
);
2066 /* This is the opposite of b43legacy_chip_init() */
2067 static void b43legacy_chip_exit(struct b43legacy_wldev
*dev
)
2069 b43legacy_radio_turn_off(dev
, 1);
2070 b43legacy_gpio_cleanup(dev
);
2071 /* firmware is released later */
2074 /* Initialize the chip
2075 * http://bcm-specs.sipsolutions.net/ChipInit
2077 static int b43legacy_chip_init(struct b43legacy_wldev
*dev
)
2079 struct b43legacy_phy
*phy
= &dev
->phy
;
2082 u32 value32
, macctl
;
2085 /* Initialize the MAC control */
2086 macctl
= B43legacy_MACCTL_IHR_ENABLED
| B43legacy_MACCTL_SHM_ENABLED
;
2088 macctl
|= B43legacy_MACCTL_GMODE
;
2089 macctl
|= B43legacy_MACCTL_INFRA
;
2090 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
2092 err
= b43legacy_request_firmware(dev
);
2095 err
= b43legacy_upload_microcode(dev
);
2097 goto out
; /* firmware is released later */
2099 err
= b43legacy_gpio_init(dev
);
2101 goto out
; /* firmware is released later */
2103 err
= b43legacy_upload_initvals(dev
);
2105 goto err_gpio_clean
;
2106 b43legacy_radio_turn_on(dev
);
2108 b43legacy_write16(dev
, 0x03E6, 0x0000);
2109 err
= b43legacy_phy_init(dev
);
2113 /* Select initial Interference Mitigation. */
2114 tmp
= phy
->interfmode
;
2115 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2116 b43legacy_radio_set_interference_mitigation(dev
, tmp
);
2118 b43legacy_phy_set_antenna_diversity(dev
);
2119 b43legacy_mgmtframe_txantenna(dev
, B43legacy_ANTENNA_DEFAULT
);
2121 if (phy
->type
== B43legacy_PHYTYPE_B
) {
2122 value16
= b43legacy_read16(dev
, 0x005E);
2124 b43legacy_write16(dev
, 0x005E, value16
);
2126 b43legacy_write32(dev
, 0x0100, 0x01000000);
2127 if (dev
->dev
->id
.revision
< 5)
2128 b43legacy_write32(dev
, 0x010C, 0x01000000);
2130 value32
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2131 value32
&= ~B43legacy_MACCTL_INFRA
;
2132 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, value32
);
2133 value32
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2134 value32
|= B43legacy_MACCTL_INFRA
;
2135 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, value32
);
2137 if (b43legacy_using_pio(dev
)) {
2138 b43legacy_write32(dev
, 0x0210, 0x00000100);
2139 b43legacy_write32(dev
, 0x0230, 0x00000100);
2140 b43legacy_write32(dev
, 0x0250, 0x00000100);
2141 b43legacy_write32(dev
, 0x0270, 0x00000100);
2142 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0034,
2146 /* Probe Response Timeout value */
2147 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2148 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0074, 0x0000);
2150 /* Initially set the wireless operation mode. */
2151 b43legacy_adjust_opmode(dev
);
2153 if (dev
->dev
->id
.revision
< 3) {
2154 b43legacy_write16(dev
, 0x060E, 0x0000);
2155 b43legacy_write16(dev
, 0x0610, 0x8000);
2156 b43legacy_write16(dev
, 0x0604, 0x0000);
2157 b43legacy_write16(dev
, 0x0606, 0x0200);
2159 b43legacy_write32(dev
, 0x0188, 0x80000000);
2160 b43legacy_write32(dev
, 0x018C, 0x02000000);
2162 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, 0x00004000);
2163 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_IRQ_MASK
, 0x0001DC00);
2164 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_IRQ_MASK
, 0x0000DC00);
2165 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_IRQ_MASK
, 0x0000DC00);
2166 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_IRQ_MASK
, 0x0001DC00);
2167 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_IRQ_MASK
, 0x0000DC00);
2168 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_IRQ_MASK
, 0x0000DC00);
2170 value32
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
2171 value32
|= 0x00100000;
2172 ssb_write32(dev
->dev
, SSB_TMSLOW
, value32
);
2174 b43legacy_write16(dev
, B43legacy_MMIO_POWERUP_DELAY
,
2175 dev
->dev
->bus
->chipco
.fast_pwrup_delay
);
2177 /* PHY TX errors counter. */
2178 atomic_set(&phy
->txerr_cnt
, B43legacy_PHY_TX_BADNESS_LIMIT
);
2180 B43legacy_WARN_ON(err
!= 0);
2181 b43legacydbg(dev
->wl
, "Chip initialized\n");
2186 b43legacy_radio_turn_off(dev
, 1);
2188 b43legacy_gpio_cleanup(dev
);
2192 static void b43legacy_periodic_every120sec(struct b43legacy_wldev
*dev
)
2194 struct b43legacy_phy
*phy
= &dev
->phy
;
2196 if (phy
->type
!= B43legacy_PHYTYPE_G
|| phy
->rev
< 2)
2199 b43legacy_mac_suspend(dev
);
2200 b43legacy_phy_lo_g_measure(dev
);
2201 b43legacy_mac_enable(dev
);
2204 static void b43legacy_periodic_every60sec(struct b43legacy_wldev
*dev
)
2206 b43legacy_phy_lo_mark_all_unused(dev
);
2207 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43legacy_BFL_RSSI
) {
2208 b43legacy_mac_suspend(dev
);
2209 b43legacy_calc_nrssi_slope(dev
);
2210 b43legacy_mac_enable(dev
);
2214 static void b43legacy_periodic_every30sec(struct b43legacy_wldev
*dev
)
2216 /* Update device statistics. */
2217 b43legacy_calculate_link_quality(dev
);
2220 static void b43legacy_periodic_every15sec(struct b43legacy_wldev
*dev
)
2222 b43legacy_phy_xmitpower(dev
); /* FIXME: unless scanning? */
2224 atomic_set(&dev
->phy
.txerr_cnt
, B43legacy_PHY_TX_BADNESS_LIMIT
);
2228 static void do_periodic_work(struct b43legacy_wldev
*dev
)
2232 state
= dev
->periodic_state
;
2234 b43legacy_periodic_every120sec(dev
);
2236 b43legacy_periodic_every60sec(dev
);
2238 b43legacy_periodic_every30sec(dev
);
2239 b43legacy_periodic_every15sec(dev
);
2242 /* Periodic work locking policy:
2243 * The whole periodic work handler is protected by
2244 * wl->mutex. If another lock is needed somewhere in the
2245 * pwork callchain, it's aquired in-place, where it's needed.
2247 static void b43legacy_periodic_work_handler(struct work_struct
*work
)
2249 struct b43legacy_wldev
*dev
= container_of(work
, struct b43legacy_wldev
,
2250 periodic_work
.work
);
2251 struct b43legacy_wl
*wl
= dev
->wl
;
2252 unsigned long delay
;
2254 mutex_lock(&wl
->mutex
);
2256 if (unlikely(b43legacy_status(dev
) != B43legacy_STAT_STARTED
))
2258 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_STOP
))
2261 do_periodic_work(dev
);
2263 dev
->periodic_state
++;
2265 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_FAST
))
2266 delay
= msecs_to_jiffies(50);
2268 delay
= round_jiffies_relative(HZ
* 15);
2269 queue_delayed_work(wl
->hw
->workqueue
, &dev
->periodic_work
, delay
);
2271 mutex_unlock(&wl
->mutex
);
2274 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev
*dev
)
2276 struct delayed_work
*work
= &dev
->periodic_work
;
2278 dev
->periodic_state
= 0;
2279 INIT_DELAYED_WORK(work
, b43legacy_periodic_work_handler
);
2280 queue_delayed_work(dev
->wl
->hw
->workqueue
, work
, 0);
2283 /* Validate access to the chip (SHM) */
2284 static int b43legacy_validate_chipaccess(struct b43legacy_wldev
*dev
)
2289 shm_backup
= b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0);
2290 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0xAA5555AA);
2291 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2294 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0x55AAAA55);
2295 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2298 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, shm_backup
);
2300 value
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2301 if ((value
| B43legacy_MACCTL_GMODE
) !=
2302 (B43legacy_MACCTL_GMODE
| B43legacy_MACCTL_IHR_ENABLED
))
2305 value
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
2311 b43legacyerr(dev
->wl
, "Failed to validate the chipaccess\n");
2315 static void b43legacy_security_init(struct b43legacy_wldev
*dev
)
2317 dev
->max_nr_keys
= (dev
->dev
->id
.revision
>= 5) ? 58 : 20;
2318 B43legacy_WARN_ON(dev
->max_nr_keys
> ARRAY_SIZE(dev
->key
));
2319 dev
->ktp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2321 /* KTP is a word address, but we address SHM bytewise.
2322 * So multiply by two.
2325 if (dev
->dev
->id
.revision
>= 5)
2326 /* Number of RCMTA address slots */
2327 b43legacy_write16(dev
, B43legacy_MMIO_RCMTA_COUNT
,
2328 dev
->max_nr_keys
- 8);
2331 #ifdef CONFIG_B43LEGACY_HWRNG
2332 static int b43legacy_rng_read(struct hwrng
*rng
, u32
*data
)
2334 struct b43legacy_wl
*wl
= (struct b43legacy_wl
*)rng
->priv
;
2335 unsigned long flags
;
2337 /* Don't take wl->mutex here, as it could deadlock with
2338 * hwrng internal locking. It's not needed to take
2339 * wl->mutex here, anyway. */
2341 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2342 *data
= b43legacy_read16(wl
->current_dev
, B43legacy_MMIO_RNG
);
2343 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2345 return (sizeof(u16
));
2349 static void b43legacy_rng_exit(struct b43legacy_wl
*wl
)
2351 #ifdef CONFIG_B43LEGACY_HWRNG
2352 if (wl
->rng_initialized
)
2353 hwrng_unregister(&wl
->rng
);
2357 static int b43legacy_rng_init(struct b43legacy_wl
*wl
)
2361 #ifdef CONFIG_B43LEGACY_HWRNG
2362 snprintf(wl
->rng_name
, ARRAY_SIZE(wl
->rng_name
),
2363 "%s_%s", KBUILD_MODNAME
, wiphy_name(wl
->hw
->wiphy
));
2364 wl
->rng
.name
= wl
->rng_name
;
2365 wl
->rng
.data_read
= b43legacy_rng_read
;
2366 wl
->rng
.priv
= (unsigned long)wl
;
2367 wl
->rng_initialized
= 1;
2368 err
= hwrng_register(&wl
->rng
);
2370 wl
->rng_initialized
= 0;
2371 b43legacyerr(wl
, "Failed to register the random "
2372 "number generator (%d)\n", err
);
2379 static int b43legacy_op_tx(struct ieee80211_hw
*hw
,
2380 struct sk_buff
*skb
)
2382 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2383 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2385 unsigned long flags
;
2389 if (unlikely(b43legacy_status(dev
) < B43legacy_STAT_STARTED
))
2391 /* DMA-TX is done without a global lock. */
2392 if (b43legacy_using_pio(dev
)) {
2393 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2394 err
= b43legacy_pio_tx(dev
, skb
);
2395 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2397 err
= b43legacy_dma_tx(dev
, skb
);
2399 if (unlikely(err
)) {
2400 /* Drop the packet. */
2401 dev_kfree_skb_any(skb
);
2403 return NETDEV_TX_OK
;
2406 static int b43legacy_op_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2407 const struct ieee80211_tx_queue_params
*params
)
2412 static int b43legacy_op_get_tx_stats(struct ieee80211_hw
*hw
,
2413 struct ieee80211_tx_queue_stats
*stats
)
2415 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2416 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2417 unsigned long flags
;
2422 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2423 if (likely(b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)) {
2424 if (b43legacy_using_pio(dev
))
2425 b43legacy_pio_get_tx_stats(dev
, stats
);
2427 b43legacy_dma_get_tx_stats(dev
, stats
);
2430 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2435 static int b43legacy_op_get_stats(struct ieee80211_hw
*hw
,
2436 struct ieee80211_low_level_stats
*stats
)
2438 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2439 unsigned long flags
;
2441 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2442 memcpy(stats
, &wl
->ieee_stats
, sizeof(*stats
));
2443 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2448 static const char *phymode_to_string(unsigned int phymode
)
2451 case B43legacy_PHYMODE_B
:
2453 case B43legacy_PHYMODE_G
:
2456 B43legacy_BUG_ON(1);
2461 static int find_wldev_for_phymode(struct b43legacy_wl
*wl
,
2462 unsigned int phymode
,
2463 struct b43legacy_wldev
**dev
,
2466 struct b43legacy_wldev
*d
;
2468 list_for_each_entry(d
, &wl
->devlist
, list
) {
2469 if (d
->phy
.possible_phymodes
& phymode
) {
2470 /* Ok, this device supports the PHY-mode.
2471 * Set the gmode bit. */
2482 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev
*dev
)
2484 struct ssb_device
*sdev
= dev
->dev
;
2487 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2488 tmslow
&= ~B43legacy_TMSLOW_GMODE
;
2489 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2490 tmslow
|= SSB_TMSLOW_FGC
;
2491 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2494 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2495 tmslow
&= ~SSB_TMSLOW_FGC
;
2496 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2497 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2501 /* Expects wl->mutex locked */
2502 static int b43legacy_switch_phymode(struct b43legacy_wl
*wl
,
2503 unsigned int new_mode
)
2505 struct b43legacy_wldev
*uninitialized_var(up_dev
);
2506 struct b43legacy_wldev
*down_dev
;
2511 err
= find_wldev_for_phymode(wl
, new_mode
, &up_dev
, &gmode
);
2513 b43legacyerr(wl
, "Could not find a device for %s-PHY mode\n",
2514 phymode_to_string(new_mode
));
2517 if ((up_dev
== wl
->current_dev
) &&
2518 (!!wl
->current_dev
->phy
.gmode
== !!gmode
))
2519 /* This device is already running. */
2521 b43legacydbg(wl
, "Reconfiguring PHYmode to %s-PHY\n",
2522 phymode_to_string(new_mode
));
2523 down_dev
= wl
->current_dev
;
2525 prev_status
= b43legacy_status(down_dev
);
2526 /* Shutdown the currently running core. */
2527 if (prev_status
>= B43legacy_STAT_STARTED
)
2528 b43legacy_wireless_core_stop(down_dev
);
2529 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
2530 b43legacy_wireless_core_exit(down_dev
);
2532 if (down_dev
!= up_dev
)
2533 /* We switch to a different core, so we put PHY into
2534 * RESET on the old core. */
2535 b43legacy_put_phy_into_reset(down_dev
);
2537 /* Now start the new core. */
2538 up_dev
->phy
.gmode
= gmode
;
2539 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
2540 err
= b43legacy_wireless_core_init(up_dev
);
2542 b43legacyerr(wl
, "Fatal: Could not initialize device"
2543 " for newly selected %s-PHY mode\n",
2544 phymode_to_string(new_mode
));
2548 if (prev_status
>= B43legacy_STAT_STARTED
) {
2549 err
= b43legacy_wireless_core_start(up_dev
);
2551 b43legacyerr(wl
, "Fatal: Coult not start device for "
2552 "newly selected %s-PHY mode\n",
2553 phymode_to_string(new_mode
));
2554 b43legacy_wireless_core_exit(up_dev
);
2558 B43legacy_WARN_ON(b43legacy_status(up_dev
) != prev_status
);
2560 b43legacy_shm_write32(up_dev
, B43legacy_SHM_SHARED
, 0x003E, 0);
2562 wl
->current_dev
= up_dev
;
2566 /* Whoops, failed to init the new core. No core is operating now. */
2567 wl
->current_dev
= NULL
;
2571 /* Write the short and long frame retry limit values. */
2572 static void b43legacy_set_retry_limits(struct b43legacy_wldev
*dev
,
2573 unsigned int short_retry
,
2574 unsigned int long_retry
)
2576 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2577 * the chip-internal counter. */
2578 short_retry
= min(short_retry
, (unsigned int)0xF);
2579 long_retry
= min(long_retry
, (unsigned int)0xF);
2581 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, 0x0006, short_retry
);
2582 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, 0x0007, long_retry
);
2585 static int b43legacy_op_dev_config(struct ieee80211_hw
*hw
,
2588 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2589 struct b43legacy_wldev
*dev
;
2590 struct b43legacy_phy
*phy
;
2591 struct ieee80211_conf
*conf
= &hw
->conf
;
2592 unsigned long flags
;
2593 unsigned int new_phymode
= 0xFFFF;
2599 antenna_tx
= B43legacy_ANTENNA_DEFAULT
;
2600 antenna_rx
= B43legacy_ANTENNA_DEFAULT
;
2602 mutex_lock(&wl
->mutex
);
2603 dev
= wl
->current_dev
;
2606 if (changed
& IEEE80211_CONF_CHANGE_RETRY_LIMITS
)
2607 b43legacy_set_retry_limits(dev
,
2608 conf
->short_frame_max_tx_count
,
2609 conf
->long_frame_max_tx_count
);
2610 changed
&= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS
;
2612 goto out_unlock_mutex
;
2614 /* Switch the PHY mode (if necessary). */
2615 switch (conf
->channel
->band
) {
2616 case IEEE80211_BAND_2GHZ
:
2617 if (phy
->type
== B43legacy_PHYTYPE_B
)
2618 new_phymode
= B43legacy_PHYMODE_B
;
2620 new_phymode
= B43legacy_PHYMODE_G
;
2623 B43legacy_WARN_ON(1);
2625 err
= b43legacy_switch_phymode(wl
, new_phymode
);
2627 goto out_unlock_mutex
;
2629 /* Disable IRQs while reconfiguring the device.
2630 * This makes it possible to drop the spinlock throughout
2631 * the reconfiguration process. */
2632 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2633 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
2634 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2635 goto out_unlock_mutex
;
2637 savedirqs
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
2638 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2639 b43legacy_synchronize_irq(dev
);
2641 /* Switch to the requested channel.
2642 * The firmware takes care of races with the TX handler. */
2643 if (conf
->channel
->hw_value
!= phy
->channel
)
2644 b43legacy_radio_selectchannel(dev
, conf
->channel
->hw_value
, 0);
2646 dev
->wl
->radiotap_enabled
= !!(conf
->flags
& IEEE80211_CONF_RADIOTAP
);
2648 /* Adjust the desired TX power level. */
2649 if (conf
->power_level
!= 0) {
2650 if (conf
->power_level
!= phy
->power_level
) {
2651 phy
->power_level
= conf
->power_level
;
2652 b43legacy_phy_xmitpower(dev
);
2656 /* Antennas for RX and management frame TX. */
2657 b43legacy_mgmtframe_txantenna(dev
, antenna_tx
);
2659 /* Update templates for AP mode. */
2660 if (b43legacy_is_mode(wl
, NL80211_IFTYPE_AP
))
2661 b43legacy_set_beacon_int(dev
, conf
->beacon_int
);
2664 if (!!conf
->radio_enabled
!= phy
->radio_on
) {
2665 if (conf
->radio_enabled
) {
2666 b43legacy_radio_turn_on(dev
);
2667 b43legacyinfo(dev
->wl
, "Radio turned on by software\n");
2668 if (!dev
->radio_hw_enable
)
2669 b43legacyinfo(dev
->wl
, "The hardware RF-kill"
2670 " button still turns the radio"
2671 " physically off. Press the"
2672 " button to turn it on.\n");
2674 b43legacy_radio_turn_off(dev
, 0);
2675 b43legacyinfo(dev
->wl
, "Radio turned off by"
2680 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2681 b43legacy_interrupt_enable(dev
, savedirqs
);
2683 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2685 mutex_unlock(&wl
->mutex
);
2690 static void b43legacy_update_basic_rates(struct b43legacy_wldev
*dev
, u32 brates
)
2692 struct ieee80211_supported_band
*sband
=
2693 dev
->wl
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
];
2694 struct ieee80211_rate
*rate
;
2696 u16 basic
, direct
, offset
, basic_offset
, rateptr
;
2698 for (i
= 0; i
< sband
->n_bitrates
; i
++) {
2699 rate
= &sband
->bitrates
[i
];
2701 if (b43legacy_is_cck_rate(rate
->hw_value
)) {
2702 direct
= B43legacy_SHM_SH_CCKDIRECT
;
2703 basic
= B43legacy_SHM_SH_CCKBASIC
;
2704 offset
= b43legacy_plcp_get_ratecode_cck(rate
->hw_value
);
2707 direct
= B43legacy_SHM_SH_OFDMDIRECT
;
2708 basic
= B43legacy_SHM_SH_OFDMBASIC
;
2709 offset
= b43legacy_plcp_get_ratecode_ofdm(rate
->hw_value
);
2713 rate
= ieee80211_get_response_rate(sband
, brates
, rate
->bitrate
);
2715 if (b43legacy_is_cck_rate(rate
->hw_value
)) {
2716 basic_offset
= b43legacy_plcp_get_ratecode_cck(rate
->hw_value
);
2717 basic_offset
&= 0xF;
2719 basic_offset
= b43legacy_plcp_get_ratecode_ofdm(rate
->hw_value
);
2720 basic_offset
&= 0xF;
2724 * Get the pointer that we need to point to
2725 * from the direct map
2727 rateptr
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2728 direct
+ 2 * basic_offset
);
2729 /* and write it to the basic map */
2730 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2731 basic
+ 2 * offset
, rateptr
);
2735 static void b43legacy_op_bss_info_changed(struct ieee80211_hw
*hw
,
2736 struct ieee80211_vif
*vif
,
2737 struct ieee80211_bss_conf
*conf
,
2740 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2741 struct b43legacy_wldev
*dev
;
2742 struct b43legacy_phy
*phy
;
2743 unsigned long flags
;
2746 mutex_lock(&wl
->mutex
);
2748 dev
= wl
->current_dev
;
2751 /* Disable IRQs while reconfiguring the device.
2752 * This makes it possible to drop the spinlock throughout
2753 * the reconfiguration process. */
2754 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2755 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
2756 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2757 goto out_unlock_mutex
;
2759 savedirqs
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
2760 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2761 b43legacy_synchronize_irq(dev
);
2763 b43legacy_mac_suspend(dev
);
2765 if (changed
& BSS_CHANGED_BASIC_RATES
)
2766 b43legacy_update_basic_rates(dev
, conf
->basic_rates
);
2768 if (changed
& BSS_CHANGED_ERP_SLOT
) {
2769 if (conf
->use_short_slot
)
2770 b43legacy_short_slot_timing_enable(dev
);
2772 b43legacy_short_slot_timing_disable(dev
);
2775 b43legacy_mac_enable(dev
);
2777 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2778 b43legacy_interrupt_enable(dev
, savedirqs
);
2781 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2783 mutex_unlock(&wl
->mutex
);
2788 static void b43legacy_op_configure_filter(struct ieee80211_hw
*hw
,
2789 unsigned int changed
,
2790 unsigned int *fflags
,
2792 struct dev_addr_list
*mc_list
)
2794 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2795 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2796 unsigned long flags
;
2803 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2804 *fflags
&= FIF_PROMISC_IN_BSS
|
2810 FIF_BCN_PRBRESP_PROMISC
;
2812 changed
&= FIF_PROMISC_IN_BSS
|
2818 FIF_BCN_PRBRESP_PROMISC
;
2820 wl
->filter_flags
= *fflags
;
2822 if (changed
&& b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
)
2823 b43legacy_adjust_opmode(dev
);
2824 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2827 static int b43legacy_op_config_interface(struct ieee80211_hw
*hw
,
2828 struct ieee80211_vif
*vif
,
2829 struct ieee80211_if_conf
*conf
)
2831 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2832 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2833 unsigned long flags
;
2837 mutex_lock(&wl
->mutex
);
2838 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2839 B43legacy_WARN_ON(wl
->vif
!= vif
);
2841 memcpy(wl
->bssid
, conf
->bssid
, ETH_ALEN
);
2843 memset(wl
->bssid
, 0, ETH_ALEN
);
2844 if (b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
) {
2845 if (b43legacy_is_mode(wl
, NL80211_IFTYPE_AP
)) {
2846 B43legacy_WARN_ON(vif
->type
!= NL80211_IFTYPE_AP
);
2847 if (conf
->changed
& IEEE80211_IFCC_BEACON
)
2848 b43legacy_update_templates(wl
);
2849 } else if (b43legacy_is_mode(wl
, NL80211_IFTYPE_ADHOC
)) {
2850 if (conf
->changed
& IEEE80211_IFCC_BEACON
)
2851 b43legacy_update_templates(wl
);
2853 b43legacy_write_mac_bssid_templates(dev
);
2855 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2856 mutex_unlock(&wl
->mutex
);
2861 /* Locking: wl->mutex */
2862 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
)
2864 struct b43legacy_wl
*wl
= dev
->wl
;
2865 unsigned long flags
;
2867 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
2870 /* Disable and sync interrupts. We must do this before than
2871 * setting the status to INITIALIZED, as the interrupt handler
2872 * won't care about IRQs then. */
2873 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2874 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
2876 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
); /* flush */
2877 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2878 b43legacy_synchronize_irq(dev
);
2880 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
2882 mutex_unlock(&wl
->mutex
);
2883 /* Must unlock as it would otherwise deadlock. No races here.
2884 * Cancel the possibly running self-rearming periodic work. */
2885 cancel_delayed_work_sync(&dev
->periodic_work
);
2886 mutex_lock(&wl
->mutex
);
2888 ieee80211_stop_queues(wl
->hw
); /* FIXME this could cause a deadlock */
2890 b43legacy_mac_suspend(dev
);
2891 free_irq(dev
->dev
->irq
, dev
);
2892 b43legacydbg(wl
, "Wireless interface stopped\n");
2895 /* Locking: wl->mutex */
2896 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
)
2900 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
);
2902 drain_txstatus_queue(dev
);
2903 err
= request_irq(dev
->dev
->irq
, b43legacy_interrupt_handler
,
2904 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
2906 b43legacyerr(dev
->wl
, "Cannot request IRQ-%d\n",
2910 /* We are ready to run. */
2911 b43legacy_set_status(dev
, B43legacy_STAT_STARTED
);
2913 /* Start data flow (TX/RX) */
2914 b43legacy_mac_enable(dev
);
2915 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
2917 /* Start maintenance work */
2918 b43legacy_periodic_tasks_setup(dev
);
2920 b43legacydbg(dev
->wl
, "Wireless interface started\n");
2925 /* Get PHY and RADIO versioning numbers */
2926 static int b43legacy_phy_versioning(struct b43legacy_wldev
*dev
)
2928 struct b43legacy_phy
*phy
= &dev
->phy
;
2936 int unsupported
= 0;
2938 /* Get PHY versioning */
2939 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_PHY_VER
);
2940 analog_type
= (tmp
& B43legacy_PHYVER_ANALOG
)
2941 >> B43legacy_PHYVER_ANALOG_SHIFT
;
2942 phy_type
= (tmp
& B43legacy_PHYVER_TYPE
) >> B43legacy_PHYVER_TYPE_SHIFT
;
2943 phy_rev
= (tmp
& B43legacy_PHYVER_VERSION
);
2945 case B43legacy_PHYTYPE_B
:
2946 if (phy_rev
!= 2 && phy_rev
!= 4
2947 && phy_rev
!= 6 && phy_rev
!= 7)
2950 case B43legacy_PHYTYPE_G
:
2958 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED PHY "
2959 "(Analog %u, Type %u, Revision %u)\n",
2960 analog_type
, phy_type
, phy_rev
);
2963 b43legacydbg(dev
->wl
, "Found PHY: Analog %u, Type %u, Revision %u\n",
2964 analog_type
, phy_type
, phy_rev
);
2967 /* Get RADIO versioning */
2968 if (dev
->dev
->bus
->chip_id
== 0x4317) {
2969 if (dev
->dev
->bus
->chip_rev
== 0)
2971 else if (dev
->dev
->bus
->chip_rev
== 1)
2976 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2977 B43legacy_RADIOCTL_ID
);
2978 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_HIGH
);
2980 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2981 B43legacy_RADIOCTL_ID
);
2982 tmp
|= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_LOW
);
2984 radio_manuf
= (tmp
& 0x00000FFF);
2985 radio_ver
= (tmp
& 0x0FFFF000) >> 12;
2986 radio_rev
= (tmp
& 0xF0000000) >> 28;
2988 case B43legacy_PHYTYPE_B
:
2989 if ((radio_ver
& 0xFFF0) != 0x2050)
2992 case B43legacy_PHYTYPE_G
:
2993 if (radio_ver
!= 0x2050)
2997 B43legacy_BUG_ON(1);
3000 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED RADIO "
3001 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3002 radio_manuf
, radio_ver
, radio_rev
);
3005 b43legacydbg(dev
->wl
, "Found Radio: Manuf 0x%X, Version 0x%X,"
3006 " Revision %u\n", radio_manuf
, radio_ver
, radio_rev
);
3009 phy
->radio_manuf
= radio_manuf
;
3010 phy
->radio_ver
= radio_ver
;
3011 phy
->radio_rev
= radio_rev
;
3013 phy
->analog
= analog_type
;
3014 phy
->type
= phy_type
;
3020 static void setup_struct_phy_for_init(struct b43legacy_wldev
*dev
,
3021 struct b43legacy_phy
*phy
)
3023 struct b43legacy_lopair
*lo
;
3026 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
3027 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
3029 /* Assume the radio is enabled. If it's not enabled, the state will
3030 * immediately get fixed on the first periodic work run. */
3031 dev
->radio_hw_enable
= 1;
3033 phy
->savedpctlreg
= 0xFFFF;
3034 phy
->aci_enable
= 0;
3035 phy
->aci_wlan_automatic
= 0;
3036 phy
->aci_hw_rssi
= 0;
3038 lo
= phy
->_lo_pairs
;
3040 memset(lo
, 0, sizeof(struct b43legacy_lopair
) *
3041 B43legacy_LO_COUNT
);
3042 phy
->max_lb_gain
= 0;
3043 phy
->trsw_rx_gain
= 0;
3045 /* Set default attenuation values. */
3046 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
3047 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
3048 phy
->txctl1
= b43legacy_default_txctl1(dev
);
3049 phy
->txpwr_offset
= 0;
3052 phy
->nrssislope
= 0;
3053 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
3054 phy
->nrssi
[i
] = -1000;
3055 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
3056 phy
->nrssi_lt
[i
] = i
;
3058 phy
->lofcal
= 0xFFFF;
3059 phy
->initval
= 0xFFFF;
3061 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
3062 phy
->channel
= 0xFF;
3065 static void setup_struct_wldev_for_init(struct b43legacy_wldev
*dev
)
3071 memset(&dev
->stats
, 0, sizeof(dev
->stats
));
3073 setup_struct_phy_for_init(dev
, &dev
->phy
);
3075 /* IRQ related flags */
3076 dev
->irq_reason
= 0;
3077 memset(dev
->dma_reason
, 0, sizeof(dev
->dma_reason
));
3078 dev
->irq_savedstate
= B43legacy_IRQ_MASKTEMPLATE
;
3080 dev
->mac_suspended
= 1;
3082 /* Noise calculation context */
3083 memset(&dev
->noisecalc
, 0, sizeof(dev
->noisecalc
));
3086 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev
*dev
)
3088 #ifdef CONFIG_SSB_DRIVER_PCICORE
3089 struct ssb_bus
*bus
= dev
->dev
->bus
;
3092 if (bus
->pcicore
.dev
&&
3093 bus
->pcicore
.dev
->id
.coreid
== SSB_DEV_PCI
&&
3094 bus
->pcicore
.dev
->id
.revision
<= 5) {
3095 /* IMCFGLO timeouts workaround. */
3096 tmp
= ssb_read32(dev
->dev
, SSB_IMCFGLO
);
3097 tmp
&= ~SSB_IMCFGLO_REQTO
;
3098 tmp
&= ~SSB_IMCFGLO_SERTO
;
3099 switch (bus
->bustype
) {
3100 case SSB_BUSTYPE_PCI
:
3101 case SSB_BUSTYPE_PCMCIA
:
3104 case SSB_BUSTYPE_SSB
:
3108 ssb_write32(dev
->dev
, SSB_IMCFGLO
, tmp
);
3110 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3113 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev
*dev
,
3115 u16 pu_delay
= 1050;
3117 if (b43legacy_is_mode(dev
->wl
, NL80211_IFTYPE_ADHOC
) || idle
)
3119 if ((dev
->phy
.radio_ver
== 0x2050) && (dev
->phy
.radio_rev
== 8))
3120 pu_delay
= max(pu_delay
, (u16
)2400);
3122 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3123 B43legacy_SHM_SH_SPUWKUP
, pu_delay
);
3126 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3127 static void b43legacy_set_pretbtt(struct b43legacy_wldev
*dev
)
3131 /* The time value is in microseconds. */
3132 if (b43legacy_is_mode(dev
->wl
, NL80211_IFTYPE_ADHOC
))
3136 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3137 B43legacy_SHM_SH_PRETBTT
, pretbtt
);
3138 b43legacy_write16(dev
, B43legacy_MMIO_TSF_CFP_PRETBTT
, pretbtt
);
3141 /* Shutdown a wireless core */
3142 /* Locking: wl->mutex */
3143 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
)
3145 struct b43legacy_phy
*phy
= &dev
->phy
;
3148 B43legacy_WARN_ON(b43legacy_status(dev
) > B43legacy_STAT_INITIALIZED
);
3149 if (b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
)
3151 b43legacy_set_status(dev
, B43legacy_STAT_UNINIT
);
3153 /* Stop the microcode PSM. */
3154 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
3155 macctl
&= ~B43legacy_MACCTL_PSM_RUN
;
3156 macctl
|= B43legacy_MACCTL_PSM_JMP0
;
3157 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
3159 b43legacy_leds_exit(dev
);
3160 b43legacy_rng_exit(dev
->wl
);
3161 b43legacy_pio_free(dev
);
3162 b43legacy_dma_free(dev
);
3163 b43legacy_chip_exit(dev
);
3164 b43legacy_radio_turn_off(dev
, 1);
3165 b43legacy_switch_analog(dev
, 0);
3166 if (phy
->dyn_tssi_tbl
)
3167 kfree(phy
->tssi2dbm
);
3168 kfree(phy
->lo_control
);
3169 phy
->lo_control
= NULL
;
3170 if (dev
->wl
->current_beacon
) {
3171 dev_kfree_skb_any(dev
->wl
->current_beacon
);
3172 dev
->wl
->current_beacon
= NULL
;
3175 ssb_device_disable(dev
->dev
, 0);
3176 ssb_bus_may_powerdown(dev
->dev
->bus
);
3179 static void prepare_phy_data_for_init(struct b43legacy_wldev
*dev
)
3181 struct b43legacy_phy
*phy
= &dev
->phy
;
3184 /* Set default attenuation values. */
3185 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
3186 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
3187 phy
->txctl1
= b43legacy_default_txctl1(dev
);
3188 phy
->txctl2
= 0xFFFF;
3189 phy
->txpwr_offset
= 0;
3192 phy
->nrssislope
= 0;
3193 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
3194 phy
->nrssi
[i
] = -1000;
3195 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
3196 phy
->nrssi_lt
[i
] = i
;
3198 phy
->lofcal
= 0xFFFF;
3199 phy
->initval
= 0xFFFF;
3201 phy
->aci_enable
= 0;
3202 phy
->aci_wlan_automatic
= 0;
3203 phy
->aci_hw_rssi
= 0;
3205 phy
->antenna_diversity
= 0xFFFF;
3206 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
3207 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
3210 phy
->calibrated
= 0;
3213 memset(phy
->_lo_pairs
, 0,
3214 sizeof(struct b43legacy_lopair
) * B43legacy_LO_COUNT
);
3215 memset(phy
->loopback_gain
, 0, sizeof(phy
->loopback_gain
));
3218 /* Initialize a wireless core */
3219 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
)
3221 struct b43legacy_wl
*wl
= dev
->wl
;
3222 struct ssb_bus
*bus
= dev
->dev
->bus
;
3223 struct b43legacy_phy
*phy
= &dev
->phy
;
3224 struct ssb_sprom
*sprom
= &dev
->dev
->bus
->sprom
;
3229 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3231 err
= ssb_bus_powerup(bus
, 0);
3234 if (!ssb_device_is_enabled(dev
->dev
)) {
3235 tmp
= phy
->gmode
? B43legacy_TMSLOW_GMODE
: 0;
3236 b43legacy_wireless_core_reset(dev
, tmp
);
3239 if ((phy
->type
== B43legacy_PHYTYPE_B
) ||
3240 (phy
->type
== B43legacy_PHYTYPE_G
)) {
3241 phy
->_lo_pairs
= kzalloc(sizeof(struct b43legacy_lopair
)
3242 * B43legacy_LO_COUNT
,
3244 if (!phy
->_lo_pairs
)
3247 setup_struct_wldev_for_init(dev
);
3249 err
= b43legacy_phy_init_tssi2dbm_table(dev
);
3251 goto err_kfree_lo_control
;
3253 /* Enable IRQ routing to this device. */
3254 ssb_pcicore_dev_irqvecs_enable(&bus
->pcicore
, dev
->dev
);
3256 b43legacy_imcfglo_timeouts_workaround(dev
);
3257 prepare_phy_data_for_init(dev
);
3258 b43legacy_phy_calibrate(dev
);
3259 err
= b43legacy_chip_init(dev
);
3261 goto err_kfree_tssitbl
;
3262 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3263 B43legacy_SHM_SH_WLCOREREV
,
3264 dev
->dev
->id
.revision
);
3265 hf
= b43legacy_hf_read(dev
);
3266 if (phy
->type
== B43legacy_PHYTYPE_G
) {
3267 hf
|= B43legacy_HF_SYMW
;
3269 hf
|= B43legacy_HF_GDCW
;
3270 if (sprom
->boardflags_lo
& B43legacy_BFL_PACTRL
)
3271 hf
|= B43legacy_HF_OFDMPABOOST
;
3272 } else if (phy
->type
== B43legacy_PHYTYPE_B
) {
3273 hf
|= B43legacy_HF_SYMW
;
3274 if (phy
->rev
>= 2 && phy
->radio_ver
== 0x2050)
3275 hf
&= ~B43legacy_HF_GDCW
;
3277 b43legacy_hf_write(dev
, hf
);
3279 b43legacy_set_retry_limits(dev
,
3280 B43legacy_DEFAULT_SHORT_RETRY_LIMIT
,
3281 B43legacy_DEFAULT_LONG_RETRY_LIMIT
);
3283 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3285 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3288 /* Disable sending probe responses from firmware.
3289 * Setting the MaxTime to one usec will always trigger
3290 * a timeout, so we never send any probe resp.
3291 * A timeout of zero is infinite. */
3292 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3293 B43legacy_SHM_SH_PRMAXTIME
, 1);
3295 b43legacy_rate_memory_init(dev
);
3297 /* Minimum Contention Window */
3298 if (phy
->type
== B43legacy_PHYTYPE_B
)
3299 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3302 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3304 /* Maximum Contention Window */
3305 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3309 if (b43legacy_using_pio(dev
))
3310 err
= b43legacy_pio_init(dev
);
3312 err
= b43legacy_dma_init(dev
);
3314 b43legacy_qos_init(dev
);
3316 } while (err
== -EAGAIN
);
3320 b43legacy_set_synth_pu_delay(dev
, 1);
3322 ssb_bus_powerup(bus
, 1); /* Enable dynamic PCTL */
3323 b43legacy_upload_card_macaddress(dev
);
3324 b43legacy_security_init(dev
);
3325 b43legacy_rng_init(wl
);
3327 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
3329 b43legacy_leds_init(dev
);
3334 b43legacy_chip_exit(dev
);
3336 if (phy
->dyn_tssi_tbl
)
3337 kfree(phy
->tssi2dbm
);
3338 err_kfree_lo_control
:
3339 kfree(phy
->lo_control
);
3340 phy
->lo_control
= NULL
;
3341 ssb_bus_may_powerdown(bus
);
3342 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3346 static int b43legacy_op_add_interface(struct ieee80211_hw
*hw
,
3347 struct ieee80211_if_init_conf
*conf
)
3349 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3350 struct b43legacy_wldev
*dev
;
3351 unsigned long flags
;
3352 int err
= -EOPNOTSUPP
;
3354 /* TODO: allow WDS/AP devices to coexist */
3356 if (conf
->type
!= NL80211_IFTYPE_AP
&&
3357 conf
->type
!= NL80211_IFTYPE_STATION
&&
3358 conf
->type
!= NL80211_IFTYPE_WDS
&&
3359 conf
->type
!= NL80211_IFTYPE_ADHOC
)
3362 mutex_lock(&wl
->mutex
);
3364 goto out_mutex_unlock
;
3366 b43legacydbg(wl
, "Adding Interface type %d\n", conf
->type
);
3368 dev
= wl
->current_dev
;
3370 wl
->vif
= conf
->vif
;
3371 wl
->if_type
= conf
->type
;
3372 memcpy(wl
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
3374 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3375 b43legacy_adjust_opmode(dev
);
3376 b43legacy_set_pretbtt(dev
);
3377 b43legacy_set_synth_pu_delay(dev
, 0);
3378 b43legacy_upload_card_macaddress(dev
);
3379 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3383 mutex_unlock(&wl
->mutex
);
3388 static void b43legacy_op_remove_interface(struct ieee80211_hw
*hw
,
3389 struct ieee80211_if_init_conf
*conf
)
3391 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3392 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3393 unsigned long flags
;
3395 b43legacydbg(wl
, "Removing Interface type %d\n", conf
->type
);
3397 mutex_lock(&wl
->mutex
);
3399 B43legacy_WARN_ON(!wl
->operating
);
3400 B43legacy_WARN_ON(wl
->vif
!= conf
->vif
);
3405 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3406 b43legacy_adjust_opmode(dev
);
3407 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3408 b43legacy_upload_card_macaddress(dev
);
3409 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3411 mutex_unlock(&wl
->mutex
);
3414 static int b43legacy_op_start(struct ieee80211_hw
*hw
)
3416 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3417 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3420 bool do_rfkill_exit
= 0;
3422 /* First register RFkill.
3423 * LEDs that are registered later depend on it. */
3424 b43legacy_rfkill_init(dev
);
3426 /* Kill all old instance specific information to make sure
3427 * the card won't use it in the short timeframe between start
3428 * and mac80211 reconfiguring it. */
3429 memset(wl
->bssid
, 0, ETH_ALEN
);
3430 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3431 wl
->filter_flags
= 0;
3433 mutex_lock(&wl
->mutex
);
3435 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
) {
3436 err
= b43legacy_wireless_core_init(dev
);
3439 goto out_mutex_unlock
;
3444 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
3445 err
= b43legacy_wireless_core_start(dev
);
3448 b43legacy_wireless_core_exit(dev
);
3450 goto out_mutex_unlock
;
3455 mutex_unlock(&wl
->mutex
);
3458 b43legacy_rfkill_exit(dev
);
3463 static void b43legacy_op_stop(struct ieee80211_hw
*hw
)
3465 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3466 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3468 b43legacy_rfkill_exit(dev
);
3469 cancel_work_sync(&(wl
->beacon_update_trigger
));
3471 mutex_lock(&wl
->mutex
);
3472 if (b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)
3473 b43legacy_wireless_core_stop(dev
);
3474 b43legacy_wireless_core_exit(dev
);
3475 mutex_unlock(&wl
->mutex
);
3478 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw
*hw
,
3479 struct ieee80211_sta
*sta
, bool set
)
3481 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3482 unsigned long flags
;
3484 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3485 b43legacy_update_templates(wl
);
3486 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3491 static const struct ieee80211_ops b43legacy_hw_ops
= {
3492 .tx
= b43legacy_op_tx
,
3493 .conf_tx
= b43legacy_op_conf_tx
,
3494 .add_interface
= b43legacy_op_add_interface
,
3495 .remove_interface
= b43legacy_op_remove_interface
,
3496 .config
= b43legacy_op_dev_config
,
3497 .bss_info_changed
= b43legacy_op_bss_info_changed
,
3498 .config_interface
= b43legacy_op_config_interface
,
3499 .configure_filter
= b43legacy_op_configure_filter
,
3500 .get_stats
= b43legacy_op_get_stats
,
3501 .get_tx_stats
= b43legacy_op_get_tx_stats
,
3502 .start
= b43legacy_op_start
,
3503 .stop
= b43legacy_op_stop
,
3504 .set_tim
= b43legacy_op_beacon_set_tim
,
3507 /* Hard-reset the chip. Do not call this directly.
3508 * Use b43legacy_controller_restart()
3510 static void b43legacy_chip_reset(struct work_struct
*work
)
3512 struct b43legacy_wldev
*dev
=
3513 container_of(work
, struct b43legacy_wldev
, restart_work
);
3514 struct b43legacy_wl
*wl
= dev
->wl
;
3518 mutex_lock(&wl
->mutex
);
3520 prev_status
= b43legacy_status(dev
);
3521 /* Bring the device down... */
3522 if (prev_status
>= B43legacy_STAT_STARTED
)
3523 b43legacy_wireless_core_stop(dev
);
3524 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
3525 b43legacy_wireless_core_exit(dev
);
3527 /* ...and up again. */
3528 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
3529 err
= b43legacy_wireless_core_init(dev
);
3533 if (prev_status
>= B43legacy_STAT_STARTED
) {
3534 err
= b43legacy_wireless_core_start(dev
);
3536 b43legacy_wireless_core_exit(dev
);
3542 wl
->current_dev
= NULL
; /* Failed to init the dev. */
3543 mutex_unlock(&wl
->mutex
);
3545 b43legacyerr(wl
, "Controller restart FAILED\n");
3547 b43legacyinfo(wl
, "Controller restarted\n");
3550 static int b43legacy_setup_modes(struct b43legacy_wldev
*dev
,
3554 struct ieee80211_hw
*hw
= dev
->wl
->hw
;
3555 struct b43legacy_phy
*phy
= &dev
->phy
;
3557 phy
->possible_phymodes
= 0;
3559 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
3560 &b43legacy_band_2GHz_BPHY
;
3561 phy
->possible_phymodes
|= B43legacy_PHYMODE_B
;
3565 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
3566 &b43legacy_band_2GHz_GPHY
;
3567 phy
->possible_phymodes
|= B43legacy_PHYMODE_G
;
3573 static void b43legacy_wireless_core_detach(struct b43legacy_wldev
*dev
)
3575 /* We release firmware that late to not be required to re-request
3576 * is all the time when we reinit the core. */
3577 b43legacy_release_firmware(dev
);
3580 static int b43legacy_wireless_core_attach(struct b43legacy_wldev
*dev
)
3582 struct b43legacy_wl
*wl
= dev
->wl
;
3583 struct ssb_bus
*bus
= dev
->dev
->bus
;
3584 struct pci_dev
*pdev
= bus
->host_pci
;
3590 /* Do NOT do any device initialization here.
3591 * Do it in wireless_core_init() instead.
3592 * This function is for gathering basic information about the HW, only.
3593 * Also some structs may be set up here. But most likely you want to
3594 * have that in core_init(), too.
3597 err
= ssb_bus_powerup(bus
, 0);
3599 b43legacyerr(wl
, "Bus powerup failed\n");
3602 /* Get the PHY type. */
3603 if (dev
->dev
->id
.revision
>= 5) {
3606 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
3607 have_gphy
= !!(tmshigh
& B43legacy_TMSHIGH_GPHY
);
3610 } else if (dev
->dev
->id
.revision
== 4)
3615 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3616 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3617 b43legacy_wireless_core_reset(dev
, tmp
);
3619 err
= b43legacy_phy_versioning(dev
);
3622 /* Check if this device supports multiband. */
3624 (pdev
->device
!= 0x4312 &&
3625 pdev
->device
!= 0x4319 &&
3626 pdev
->device
!= 0x4324)) {
3627 /* No multiband support. */
3630 switch (dev
->phy
.type
) {
3631 case B43legacy_PHYTYPE_B
:
3634 case B43legacy_PHYTYPE_G
:
3638 B43legacy_BUG_ON(1);
3641 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3642 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3643 b43legacy_wireless_core_reset(dev
, tmp
);
3645 err
= b43legacy_validate_chipaccess(dev
);
3648 err
= b43legacy_setup_modes(dev
, have_bphy
, have_gphy
);
3652 /* Now set some default "current_dev" */
3653 if (!wl
->current_dev
)
3654 wl
->current_dev
= dev
;
3655 INIT_WORK(&dev
->restart_work
, b43legacy_chip_reset
);
3657 b43legacy_radio_turn_off(dev
, 1);
3658 b43legacy_switch_analog(dev
, 0);
3659 ssb_device_disable(dev
->dev
, 0);
3660 ssb_bus_may_powerdown(bus
);
3666 ssb_bus_may_powerdown(bus
);
3670 static void b43legacy_one_core_detach(struct ssb_device
*dev
)
3672 struct b43legacy_wldev
*wldev
;
3673 struct b43legacy_wl
*wl
;
3675 /* Do not cancel ieee80211-workqueue based work here.
3676 * See comment in b43legacy_remove(). */
3678 wldev
= ssb_get_drvdata(dev
);
3680 b43legacy_debugfs_remove_device(wldev
);
3681 b43legacy_wireless_core_detach(wldev
);
3682 list_del(&wldev
->list
);
3684 ssb_set_drvdata(dev
, NULL
);
3688 static int b43legacy_one_core_attach(struct ssb_device
*dev
,
3689 struct b43legacy_wl
*wl
)
3691 struct b43legacy_wldev
*wldev
;
3692 struct pci_dev
*pdev
;
3695 if (!list_empty(&wl
->devlist
)) {
3696 /* We are not the first core on this chip. */
3697 pdev
= dev
->bus
->host_pci
;
3698 /* Only special chips support more than one wireless
3699 * core, although some of the other chips have more than
3700 * one wireless core as well. Check for this and
3704 ((pdev
->device
!= 0x4321) &&
3705 (pdev
->device
!= 0x4313) &&
3706 (pdev
->device
!= 0x431A))) {
3707 b43legacydbg(wl
, "Ignoring unconnected 802.11 core\n");
3712 wldev
= kzalloc(sizeof(*wldev
), GFP_KERNEL
);
3718 b43legacy_set_status(wldev
, B43legacy_STAT_UNINIT
);
3719 wldev
->bad_frames_preempt
= modparam_bad_frames_preempt
;
3720 tasklet_init(&wldev
->isr_tasklet
,
3721 (void (*)(unsigned long))b43legacy_interrupt_tasklet
,
3722 (unsigned long)wldev
);
3724 wldev
->__using_pio
= 1;
3725 INIT_LIST_HEAD(&wldev
->list
);
3727 err
= b43legacy_wireless_core_attach(wldev
);
3729 goto err_kfree_wldev
;
3731 list_add(&wldev
->list
, &wl
->devlist
);
3733 ssb_set_drvdata(dev
, wldev
);
3734 b43legacy_debugfs_add_device(wldev
);
3743 static void b43legacy_sprom_fixup(struct ssb_bus
*bus
)
3745 /* boardflags workarounds */
3746 if (bus
->boardinfo
.vendor
== PCI_VENDOR_ID_APPLE
&&
3747 bus
->boardinfo
.type
== 0x4E &&
3748 bus
->boardinfo
.rev
> 0x40)
3749 bus
->sprom
.boardflags_lo
|= B43legacy_BFL_PACTRL
;
3752 static void b43legacy_wireless_exit(struct ssb_device
*dev
,
3753 struct b43legacy_wl
*wl
)
3755 struct ieee80211_hw
*hw
= wl
->hw
;
3757 ssb_set_devtypedata(dev
, NULL
);
3758 ieee80211_free_hw(hw
);
3761 static int b43legacy_wireless_init(struct ssb_device
*dev
)
3763 struct ssb_sprom
*sprom
= &dev
->bus
->sprom
;
3764 struct ieee80211_hw
*hw
;
3765 struct b43legacy_wl
*wl
;
3768 b43legacy_sprom_fixup(dev
->bus
);
3770 hw
= ieee80211_alloc_hw(sizeof(*wl
), &b43legacy_hw_ops
);
3772 b43legacyerr(NULL
, "Could not allocate ieee80211 device\n");
3777 hw
->flags
= IEEE80211_HW_RX_INCLUDES_FCS
|
3778 IEEE80211_HW_SIGNAL_DBM
|
3779 IEEE80211_HW_NOISE_DBM
;
3780 hw
->wiphy
->interface_modes
=
3781 BIT(NL80211_IFTYPE_AP
) |
3782 BIT(NL80211_IFTYPE_STATION
) |
3783 BIT(NL80211_IFTYPE_WDS
) |
3784 BIT(NL80211_IFTYPE_ADHOC
);
3785 hw
->queues
= 1; /* FIXME: hardware has more queues */
3787 SET_IEEE80211_DEV(hw
, dev
->dev
);
3788 if (is_valid_ether_addr(sprom
->et1mac
))
3789 SET_IEEE80211_PERM_ADDR(hw
, sprom
->et1mac
);
3791 SET_IEEE80211_PERM_ADDR(hw
, sprom
->il0mac
);
3793 /* Get and initialize struct b43legacy_wl */
3794 wl
= hw_to_b43legacy_wl(hw
);
3795 memset(wl
, 0, sizeof(*wl
));
3797 spin_lock_init(&wl
->irq_lock
);
3798 spin_lock_init(&wl
->leds_lock
);
3799 mutex_init(&wl
->mutex
);
3800 INIT_LIST_HEAD(&wl
->devlist
);
3801 INIT_WORK(&wl
->beacon_update_trigger
, b43legacy_beacon_update_trigger_work
);
3803 ssb_set_devtypedata(dev
, wl
);
3804 b43legacyinfo(wl
, "Broadcom %04X WLAN found\n", dev
->bus
->chip_id
);
3810 static int b43legacy_probe(struct ssb_device
*dev
,
3811 const struct ssb_device_id
*id
)
3813 struct b43legacy_wl
*wl
;
3817 wl
= ssb_get_devtypedata(dev
);
3819 /* Probing the first core - setup common struct b43legacy_wl */
3821 err
= b43legacy_wireless_init(dev
);
3824 wl
= ssb_get_devtypedata(dev
);
3825 B43legacy_WARN_ON(!wl
);
3827 err
= b43legacy_one_core_attach(dev
, wl
);
3829 goto err_wireless_exit
;
3832 err
= ieee80211_register_hw(wl
->hw
);
3834 goto err_one_core_detach
;
3840 err_one_core_detach
:
3841 b43legacy_one_core_detach(dev
);
3844 b43legacy_wireless_exit(dev
, wl
);
3848 static void b43legacy_remove(struct ssb_device
*dev
)
3850 struct b43legacy_wl
*wl
= ssb_get_devtypedata(dev
);
3851 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3853 /* We must cancel any work here before unregistering from ieee80211,
3854 * as the ieee80211 unreg will destroy the workqueue. */
3855 cancel_work_sync(&wldev
->restart_work
);
3857 B43legacy_WARN_ON(!wl
);
3858 if (wl
->current_dev
== wldev
)
3859 ieee80211_unregister_hw(wl
->hw
);
3861 b43legacy_one_core_detach(dev
);
3863 if (list_empty(&wl
->devlist
))
3864 /* Last core on the chip unregistered.
3865 * We can destroy common struct b43legacy_wl.
3867 b43legacy_wireless_exit(dev
, wl
);
3870 /* Perform a hardware reset. This can be called from any context. */
3871 void b43legacy_controller_restart(struct b43legacy_wldev
*dev
,
3874 /* Must avoid requeueing, if we are in shutdown. */
3875 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
)
3877 b43legacyinfo(dev
->wl
, "Controller RESET (%s) ...\n", reason
);
3878 queue_work(dev
->wl
->hw
->workqueue
, &dev
->restart_work
);
3883 static int b43legacy_suspend(struct ssb_device
*dev
, pm_message_t state
)
3885 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3886 struct b43legacy_wl
*wl
= wldev
->wl
;
3888 b43legacydbg(wl
, "Suspending...\n");
3890 mutex_lock(&wl
->mutex
);
3891 wldev
->suspend_init_status
= b43legacy_status(wldev
);
3892 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
)
3893 b43legacy_wireless_core_stop(wldev
);
3894 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
)
3895 b43legacy_wireless_core_exit(wldev
);
3896 mutex_unlock(&wl
->mutex
);
3898 b43legacydbg(wl
, "Device suspended.\n");
3903 static int b43legacy_resume(struct ssb_device
*dev
)
3905 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3906 struct b43legacy_wl
*wl
= wldev
->wl
;
3909 b43legacydbg(wl
, "Resuming...\n");
3911 mutex_lock(&wl
->mutex
);
3912 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
) {
3913 err
= b43legacy_wireless_core_init(wldev
);
3915 b43legacyerr(wl
, "Resume failed at core init\n");
3919 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
) {
3920 err
= b43legacy_wireless_core_start(wldev
);
3922 b43legacy_wireless_core_exit(wldev
);
3923 b43legacyerr(wl
, "Resume failed at core start\n");
3928 b43legacydbg(wl
, "Device resumed.\n");
3930 mutex_unlock(&wl
->mutex
);
3934 #else /* CONFIG_PM */
3935 # define b43legacy_suspend NULL
3936 # define b43legacy_resume NULL
3937 #endif /* CONFIG_PM */
3939 static struct ssb_driver b43legacy_ssb_driver
= {
3940 .name
= KBUILD_MODNAME
,
3941 .id_table
= b43legacy_ssb_tbl
,
3942 .probe
= b43legacy_probe
,
3943 .remove
= b43legacy_remove
,
3944 .suspend
= b43legacy_suspend
,
3945 .resume
= b43legacy_resume
,
3948 static void b43legacy_print_driverinfo(void)
3950 const char *feat_pci
= "", *feat_leds
= "", *feat_rfkill
= "",
3951 *feat_pio
= "", *feat_dma
= "";
3953 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3956 #ifdef CONFIG_B43LEGACY_LEDS
3959 #ifdef CONFIG_B43LEGACY_RFKILL
3962 #ifdef CONFIG_B43LEGACY_PIO
3965 #ifdef CONFIG_B43LEGACY_DMA
3968 printk(KERN_INFO
"Broadcom 43xx-legacy driver loaded "
3969 "[ Features: %s%s%s%s%s, Firmware-ID: "
3970 B43legacy_SUPPORTED_FIRMWARE_ID
" ]\n",
3971 feat_pci
, feat_leds
, feat_rfkill
, feat_pio
, feat_dma
);
3974 static int __init
b43legacy_init(void)
3978 b43legacy_debugfs_init();
3980 err
= ssb_driver_register(&b43legacy_ssb_driver
);
3984 b43legacy_print_driverinfo();
3989 b43legacy_debugfs_exit();
3993 static void __exit
b43legacy_exit(void)
3995 ssb_driver_unregister(&b43legacy_ssb_driver
);
3996 b43legacy_debugfs_exit();
3999 module_init(b43legacy_init
)
4000 module_exit(b43legacy_exit
)