drm/i915/ringbuffer: Drop the redundant dev from the vfunc interface
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / i915 / intel_lvds.c
blobf1a649990ea9e61d5f7ff6f8b15e127d6fcc2f17
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45 struct intel_encoder base;
47 struct edid *edid;
49 int fitting_mode;
50 u32 pfit_control;
51 u32 pfit_pgm_ratios;
52 bool pfit_dirty;
54 struct drm_display_mode *fixed_mode;
57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
59 return container_of(encoder, struct intel_lvds, base.base);
62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
64 return container_of(intel_attached_encoder(connector),
65 struct intel_lvds, base);
68 /**
69 * Sets the power state for the panel.
71 static void intel_lvds_set_power(struct intel_lvds *intel_lvds, bool on)
73 struct drm_device *dev = intel_lvds->base.base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 u32 ctl_reg, lvds_reg;
77 if (HAS_PCH_SPLIT(dev)) {
78 ctl_reg = PCH_PP_CONTROL;
79 lvds_reg = PCH_LVDS;
80 } else {
81 ctl_reg = PP_CONTROL;
82 lvds_reg = LVDS;
85 if (on) {
86 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
87 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
88 intel_panel_set_backlight(dev, dev_priv->backlight_level);
89 } else {
90 dev_priv->backlight_level = intel_panel_get_backlight(dev);
92 intel_panel_set_backlight(dev, 0);
93 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
95 if (intel_lvds->pfit_control) {
96 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
97 DRM_ERROR("timed out waiting for panel to power off\n");
98 I915_WRITE(PFIT_CONTROL, 0);
99 intel_lvds->pfit_control = 0;
100 intel_lvds->pfit_dirty = false;
103 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
105 POSTING_READ(lvds_reg);
108 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
110 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
112 if (mode == DRM_MODE_DPMS_ON)
113 intel_lvds_set_power(intel_lvds, true);
114 else
115 intel_lvds_set_power(intel_lvds, false);
117 /* XXX: We never power down the LVDS pairs. */
120 static int intel_lvds_mode_valid(struct drm_connector *connector,
121 struct drm_display_mode *mode)
123 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
124 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
126 if (mode->hdisplay > fixed_mode->hdisplay)
127 return MODE_PANEL;
128 if (mode->vdisplay > fixed_mode->vdisplay)
129 return MODE_PANEL;
131 return MODE_OK;
134 static void
135 centre_horizontally(struct drm_display_mode *mode,
136 int width)
138 u32 border, sync_pos, blank_width, sync_width;
140 /* keep the hsync and hblank widths constant */
141 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
142 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
143 sync_pos = (blank_width - sync_width + 1) / 2;
145 border = (mode->hdisplay - width + 1) / 2;
146 border += border & 1; /* make the border even */
148 mode->crtc_hdisplay = width;
149 mode->crtc_hblank_start = width + border;
150 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
152 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
153 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
156 static void
157 centre_vertically(struct drm_display_mode *mode,
158 int height)
160 u32 border, sync_pos, blank_width, sync_width;
162 /* keep the vsync and vblank widths constant */
163 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
164 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
165 sync_pos = (blank_width - sync_width + 1) / 2;
167 border = (mode->vdisplay - height + 1) / 2;
169 mode->crtc_vdisplay = height;
170 mode->crtc_vblank_start = height + border;
171 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
173 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
174 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
177 static inline u32 panel_fitter_scaling(u32 source, u32 target)
180 * Floating point operation is not supported. So the FACTOR
181 * is defined, which can avoid the floating point computation
182 * when calculating the panel ratio.
184 #define ACCURACY 12
185 #define FACTOR (1 << ACCURACY)
186 u32 ratio = source * FACTOR / target;
187 return (FACTOR * ratio + FACTOR/2) / FACTOR;
190 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
191 struct drm_display_mode *mode,
192 struct drm_display_mode *adjusted_mode)
194 struct drm_device *dev = encoder->dev;
195 struct drm_i915_private *dev_priv = dev->dev_private;
196 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
197 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
198 struct drm_encoder *tmp_encoder;
199 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
201 /* Should never happen!! */
202 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
203 DRM_ERROR("Can't support LVDS on pipe A\n");
204 return false;
207 /* Should never happen!! */
208 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
209 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
210 DRM_ERROR("Can't enable LVDS and another "
211 "encoder on the same pipe\n");
212 return false;
217 * We have timings from the BIOS for the panel, put them in
218 * to the adjusted mode. The CRTC will be set up for this mode,
219 * with the panel scaling set up to source from the H/VDisplay
220 * of the original mode.
222 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
224 if (HAS_PCH_SPLIT(dev)) {
225 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
226 mode, adjusted_mode);
227 return true;
230 /* Make sure pre-965s set dither correctly */
231 if (INTEL_INFO(dev)->gen < 4) {
232 if (dev_priv->lvds_dither)
233 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
236 /* Native modes don't need fitting */
237 if (adjusted_mode->hdisplay == mode->hdisplay &&
238 adjusted_mode->vdisplay == mode->vdisplay)
239 goto out;
241 /* 965+ wants fuzzy fitting */
242 if (INTEL_INFO(dev)->gen >= 4)
243 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
244 PFIT_FILTER_FUZZY);
247 * Enable automatic panel scaling for non-native modes so that they fill
248 * the screen. Should be enabled before the pipe is enabled, according
249 * to register description and PRM.
250 * Change the value here to see the borders for debugging
252 I915_WRITE(BCLRPAT_A, 0);
253 I915_WRITE(BCLRPAT_B, 0);
255 switch (intel_lvds->fitting_mode) {
256 case DRM_MODE_SCALE_CENTER:
258 * For centered modes, we have to calculate border widths &
259 * heights and modify the values programmed into the CRTC.
261 centre_horizontally(adjusted_mode, mode->hdisplay);
262 centre_vertically(adjusted_mode, mode->vdisplay);
263 border = LVDS_BORDER_ENABLE;
264 break;
266 case DRM_MODE_SCALE_ASPECT:
267 /* Scale but preserve the aspect ratio */
268 if (INTEL_INFO(dev)->gen >= 4) {
269 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
270 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
272 pfit_control |= PFIT_ENABLE;
273 /* 965+ is easy, it does everything in hw */
274 if (scaled_width > scaled_height)
275 pfit_control |= PFIT_SCALING_PILLAR;
276 else if (scaled_width < scaled_height)
277 pfit_control |= PFIT_SCALING_LETTER;
278 else
279 pfit_control |= PFIT_SCALING_AUTO;
280 } else {
281 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
282 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
284 * For earlier chips we have to calculate the scaling
285 * ratio by hand and program it into the
286 * PFIT_PGM_RATIO register
288 if (scaled_width > scaled_height) { /* pillar */
289 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
291 border = LVDS_BORDER_ENABLE;
292 if (mode->vdisplay != adjusted_mode->vdisplay) {
293 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
294 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
295 bits << PFIT_VERT_SCALE_SHIFT);
296 pfit_control |= (PFIT_ENABLE |
297 VERT_INTERP_BILINEAR |
298 HORIZ_INTERP_BILINEAR);
300 } else if (scaled_width < scaled_height) { /* letter */
301 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
303 border = LVDS_BORDER_ENABLE;
304 if (mode->hdisplay != adjusted_mode->hdisplay) {
305 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
306 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
307 bits << PFIT_VERT_SCALE_SHIFT);
308 pfit_control |= (PFIT_ENABLE |
309 VERT_INTERP_BILINEAR |
310 HORIZ_INTERP_BILINEAR);
312 } else
313 /* Aspects match, Let hw scale both directions */
314 pfit_control |= (PFIT_ENABLE |
315 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
316 VERT_INTERP_BILINEAR |
317 HORIZ_INTERP_BILINEAR);
319 break;
321 case DRM_MODE_SCALE_FULLSCREEN:
323 * Full scaling, even if it changes the aspect ratio.
324 * Fortunately this is all done for us in hw.
326 pfit_control |= PFIT_ENABLE;
327 if (INTEL_INFO(dev)->gen >= 4)
328 pfit_control |= PFIT_SCALING_AUTO;
329 else
330 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
331 VERT_INTERP_BILINEAR |
332 HORIZ_INTERP_BILINEAR);
333 break;
335 default:
336 break;
339 out:
340 if (pfit_control != intel_lvds->pfit_control ||
341 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
342 intel_lvds->pfit_control = pfit_control;
343 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
344 intel_lvds->pfit_dirty = true;
346 dev_priv->lvds_border_bits = border;
349 * XXX: It would be nice to support lower refresh rates on the
350 * panels to reduce power consumption, and perhaps match the
351 * user's requested refresh rate.
354 return true;
357 static void intel_lvds_prepare(struct drm_encoder *encoder)
359 struct drm_device *dev = encoder->dev;
360 struct drm_i915_private *dev_priv = dev->dev_private;
361 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
363 dev_priv->backlight_level = intel_panel_get_backlight(dev);
365 /* We try to do the minimum that is necessary in order to unlock
366 * the registers for mode setting.
368 * On Ironlake, this is quite simple as we just set the unlock key
369 * and ignore all subtleties. (This may cause some issues...)
371 * Prior to Ironlake, we must disable the pipe if we want to adjust
372 * the panel fitter. However at all other times we can just reset
373 * the registers regardless.
376 if (HAS_PCH_SPLIT(dev)) {
377 I915_WRITE(PCH_PP_CONTROL,
378 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
379 } else if (intel_lvds->pfit_dirty) {
380 I915_WRITE(PP_CONTROL,
381 (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
382 & ~POWER_TARGET_ON);
383 } else {
384 I915_WRITE(PP_CONTROL,
385 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
389 static void intel_lvds_commit(struct drm_encoder *encoder)
391 struct drm_device *dev = encoder->dev;
392 struct drm_i915_private *dev_priv = dev->dev_private;
393 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
395 if (dev_priv->backlight_level == 0)
396 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
398 /* Undo any unlocking done in prepare to prevent accidental
399 * adjustment of the registers.
401 if (HAS_PCH_SPLIT(dev)) {
402 u32 val = I915_READ(PCH_PP_CONTROL);
403 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
404 I915_WRITE(PCH_PP_CONTROL, val & 0x3);
405 } else {
406 u32 val = I915_READ(PP_CONTROL);
407 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
408 I915_WRITE(PP_CONTROL, val & 0x3);
411 /* Always do a full power on as we do not know what state
412 * we were left in.
414 intel_lvds_set_power(intel_lvds, true);
417 static void intel_lvds_mode_set(struct drm_encoder *encoder,
418 struct drm_display_mode *mode,
419 struct drm_display_mode *adjusted_mode)
421 struct drm_device *dev = encoder->dev;
422 struct drm_i915_private *dev_priv = dev->dev_private;
423 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
426 * The LVDS pin pair will already have been turned on in the
427 * intel_crtc_mode_set since it has a large impact on the DPLL
428 * settings.
431 if (HAS_PCH_SPLIT(dev))
432 return;
434 if (!intel_lvds->pfit_dirty)
435 return;
438 * Enable automatic panel scaling so that non-native modes fill the
439 * screen. Should be enabled before the pipe is enabled, according to
440 * register description and PRM.
442 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
443 intel_lvds->pfit_control,
444 intel_lvds->pfit_pgm_ratios);
445 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
446 DRM_ERROR("timed out waiting for panel to power off\n");
448 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
449 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
450 intel_lvds->pfit_dirty = false;
454 * Detect the LVDS connection.
456 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
457 * connected and closed means disconnected. We also send hotplug events as
458 * needed, using lid status notification from the input layer.
460 static enum drm_connector_status
461 intel_lvds_detect(struct drm_connector *connector, bool force)
463 struct drm_device *dev = connector->dev;
464 enum drm_connector_status status = connector_status_connected;
466 /* ACPI lid methods were generally unreliable in this generation, so
467 * don't even bother.
469 if (IS_GEN2(dev) || IS_GEN3(dev))
470 return connector_status_connected;
472 return status;
476 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
478 static int intel_lvds_get_modes(struct drm_connector *connector)
480 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
481 struct drm_device *dev = connector->dev;
482 struct drm_display_mode *mode;
484 if (intel_lvds->edid) {
485 drm_mode_connector_update_edid_property(connector,
486 intel_lvds->edid);
487 return drm_add_edid_modes(connector, intel_lvds->edid);
490 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
491 if (mode == 0)
492 return 0;
494 drm_mode_probed_add(connector, mode);
495 return 1;
498 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
500 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
501 return 1;
504 /* The GPU hangs up on these systems if modeset is performed on LID open */
505 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
507 .callback = intel_no_modeset_on_lid_dmi_callback,
508 .ident = "Toshiba Tecra A11",
509 .matches = {
510 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
511 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
515 { } /* terminating entry */
519 * Lid events. Note the use of 'modeset_on_lid':
520 * - we set it on lid close, and reset it on open
521 * - we use it as a "only once" bit (ie we ignore
522 * duplicate events where it was already properly
523 * set/reset)
524 * - the suspend/resume paths will also set it to
525 * zero, since they restore the mode ("lid open").
527 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
528 void *unused)
530 struct drm_i915_private *dev_priv =
531 container_of(nb, struct drm_i915_private, lid_notifier);
532 struct drm_device *dev = dev_priv->dev;
533 struct drm_connector *connector = dev_priv->int_lvds_connector;
536 * check and update the status of LVDS connector after receiving
537 * the LID nofication event.
539 if (connector)
540 connector->status = connector->funcs->detect(connector,
541 false);
543 /* Don't force modeset on machines where it causes a GPU lockup */
544 if (dmi_check_system(intel_no_modeset_on_lid))
545 return NOTIFY_OK;
546 if (!acpi_lid_open()) {
547 dev_priv->modeset_on_lid = 1;
548 return NOTIFY_OK;
551 if (!dev_priv->modeset_on_lid)
552 return NOTIFY_OK;
554 dev_priv->modeset_on_lid = 0;
556 mutex_lock(&dev->mode_config.mutex);
557 drm_helper_resume_force_mode(dev);
558 mutex_unlock(&dev->mode_config.mutex);
560 return NOTIFY_OK;
564 * intel_lvds_destroy - unregister and free LVDS structures
565 * @connector: connector to free
567 * Unregister the DDC bus for this connector then free the driver private
568 * structure.
570 static void intel_lvds_destroy(struct drm_connector *connector)
572 struct drm_device *dev = connector->dev;
573 struct drm_i915_private *dev_priv = dev->dev_private;
575 if (dev_priv->lid_notifier.notifier_call)
576 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
577 drm_sysfs_connector_remove(connector);
578 drm_connector_cleanup(connector);
579 kfree(connector);
582 static int intel_lvds_set_property(struct drm_connector *connector,
583 struct drm_property *property,
584 uint64_t value)
586 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
587 struct drm_device *dev = connector->dev;
589 if (property == dev->mode_config.scaling_mode_property) {
590 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
592 if (value == DRM_MODE_SCALE_NONE) {
593 DRM_DEBUG_KMS("no scaling not supported\n");
594 return -EINVAL;
597 if (intel_lvds->fitting_mode == value) {
598 /* the LVDS scaling property is not changed */
599 return 0;
601 intel_lvds->fitting_mode = value;
602 if (crtc && crtc->enabled) {
604 * If the CRTC is enabled, the display will be changed
605 * according to the new panel fitting mode.
607 drm_crtc_helper_set_mode(crtc, &crtc->mode,
608 crtc->x, crtc->y, crtc->fb);
612 return 0;
615 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
616 .dpms = intel_lvds_dpms,
617 .mode_fixup = intel_lvds_mode_fixup,
618 .prepare = intel_lvds_prepare,
619 .mode_set = intel_lvds_mode_set,
620 .commit = intel_lvds_commit,
623 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
624 .get_modes = intel_lvds_get_modes,
625 .mode_valid = intel_lvds_mode_valid,
626 .best_encoder = intel_best_encoder,
629 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
630 .dpms = drm_helper_connector_dpms,
631 .detect = intel_lvds_detect,
632 .fill_modes = drm_helper_probe_single_connector_modes,
633 .set_property = intel_lvds_set_property,
634 .destroy = intel_lvds_destroy,
637 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
638 .destroy = intel_encoder_destroy,
641 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
643 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
644 return 1;
647 /* These systems claim to have LVDS, but really don't */
648 static const struct dmi_system_id intel_no_lvds[] = {
650 .callback = intel_no_lvds_dmi_callback,
651 .ident = "Apple Mac Mini (Core series)",
652 .matches = {
653 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
654 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
658 .callback = intel_no_lvds_dmi_callback,
659 .ident = "Apple Mac Mini (Core 2 series)",
660 .matches = {
661 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
662 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
666 .callback = intel_no_lvds_dmi_callback,
667 .ident = "MSI IM-945GSE-A",
668 .matches = {
669 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
670 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
674 .callback = intel_no_lvds_dmi_callback,
675 .ident = "Dell Studio Hybrid",
676 .matches = {
677 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
678 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
682 .callback = intel_no_lvds_dmi_callback,
683 .ident = "AOpen Mini PC",
684 .matches = {
685 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
686 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
690 .callback = intel_no_lvds_dmi_callback,
691 .ident = "AOpen Mini PC MP915",
692 .matches = {
693 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
694 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
698 .callback = intel_no_lvds_dmi_callback,
699 .ident = "Aopen i945GTt-VFA",
700 .matches = {
701 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
705 .callback = intel_no_lvds_dmi_callback,
706 .ident = "Clientron U800",
707 .matches = {
708 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
709 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
713 { } /* terminating entry */
717 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
718 * @dev: drm device
719 * @connector: LVDS connector
721 * Find the reduced downclock for LVDS in EDID.
723 static void intel_find_lvds_downclock(struct drm_device *dev,
724 struct drm_display_mode *fixed_mode,
725 struct drm_connector *connector)
727 struct drm_i915_private *dev_priv = dev->dev_private;
728 struct drm_display_mode *scan;
729 int temp_downclock;
731 temp_downclock = fixed_mode->clock;
732 list_for_each_entry(scan, &connector->probed_modes, head) {
734 * If one mode has the same resolution with the fixed_panel
735 * mode while they have the different refresh rate, it means
736 * that the reduced downclock is found for the LVDS. In such
737 * case we can set the different FPx0/1 to dynamically select
738 * between low and high frequency.
740 if (scan->hdisplay == fixed_mode->hdisplay &&
741 scan->hsync_start == fixed_mode->hsync_start &&
742 scan->hsync_end == fixed_mode->hsync_end &&
743 scan->htotal == fixed_mode->htotal &&
744 scan->vdisplay == fixed_mode->vdisplay &&
745 scan->vsync_start == fixed_mode->vsync_start &&
746 scan->vsync_end == fixed_mode->vsync_end &&
747 scan->vtotal == fixed_mode->vtotal) {
748 if (scan->clock < temp_downclock) {
750 * The downclock is already found. But we
751 * expect to find the lower downclock.
753 temp_downclock = scan->clock;
757 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
758 /* We found the downclock for LVDS. */
759 dev_priv->lvds_downclock_avail = 1;
760 dev_priv->lvds_downclock = temp_downclock;
761 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
762 "Normal clock %dKhz, downclock %dKhz\n",
763 fixed_mode->clock, temp_downclock);
768 * Enumerate the child dev array parsed from VBT to check whether
769 * the LVDS is present.
770 * If it is present, return 1.
771 * If it is not present, return false.
772 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
774 static bool lvds_is_present_in_vbt(struct drm_device *dev,
775 u8 *i2c_pin)
777 struct drm_i915_private *dev_priv = dev->dev_private;
778 int i;
780 if (!dev_priv->child_dev_num)
781 return true;
783 for (i = 0; i < dev_priv->child_dev_num; i++) {
784 struct child_device_config *child = dev_priv->child_dev + i;
786 /* If the device type is not LFP, continue.
787 * We have to check both the new identifiers as well as the
788 * old for compatibility with some BIOSes.
790 if (child->device_type != DEVICE_TYPE_INT_LFP &&
791 child->device_type != DEVICE_TYPE_LFP)
792 continue;
794 if (child->i2c_pin)
795 *i2c_pin = child->i2c_pin;
797 /* However, we cannot trust the BIOS writers to populate
798 * the VBT correctly. Since LVDS requires additional
799 * information from AIM blocks, a non-zero addin offset is
800 * a good indicator that the LVDS is actually present.
802 if (child->addin_offset)
803 return true;
805 /* But even then some BIOS writers perform some black magic
806 * and instantiate the device without reference to any
807 * additional data. Trust that if the VBT was written into
808 * the OpRegion then they have validated the LVDS's existence.
810 if (dev_priv->opregion.vbt)
811 return true;
814 return false;
817 static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
819 struct drm_i915_private *dev_priv = dev->dev_private;
820 u8 buf = 0;
821 struct i2c_msg msgs[] = {
823 .addr = 0xA0,
824 .flags = 0,
825 .len = 1,
826 .buf = &buf,
829 struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
830 /* XXX this only appears to work when using GMBUS */
831 if (intel_gmbus_is_forced_bit(i2c))
832 return true;
833 return i2c_transfer(i2c, msgs, 1) == 1;
837 * intel_lvds_init - setup LVDS connectors on this device
838 * @dev: drm device
840 * Create the connector, register the LVDS DDC bus, and try to figure out what
841 * modes we can display on the LVDS panel (if present).
843 void intel_lvds_init(struct drm_device *dev)
845 struct drm_i915_private *dev_priv = dev->dev_private;
846 struct intel_lvds *intel_lvds;
847 struct intel_encoder *intel_encoder;
848 struct intel_connector *intel_connector;
849 struct drm_connector *connector;
850 struct drm_encoder *encoder;
851 struct drm_display_mode *scan; /* *modes, *bios_mode; */
852 struct drm_crtc *crtc;
853 u32 lvds;
854 int pipe;
855 u8 pin;
857 /* Skip init on machines we know falsely report LVDS */
858 if (dmi_check_system(intel_no_lvds))
859 return;
861 pin = GMBUS_PORT_PANEL;
862 if (!lvds_is_present_in_vbt(dev, &pin)) {
863 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
864 return;
867 if (HAS_PCH_SPLIT(dev)) {
868 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
869 return;
870 if (dev_priv->edp.support) {
871 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
872 return;
876 if (!intel_lvds_ddc_probe(dev, pin)) {
877 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
878 return;
881 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
882 if (!intel_lvds) {
883 return;
886 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
887 if (!intel_connector) {
888 kfree(intel_lvds);
889 return;
892 if (!HAS_PCH_SPLIT(dev)) {
893 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
896 intel_encoder = &intel_lvds->base;
897 encoder = &intel_encoder->base;
898 connector = &intel_connector->base;
899 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
900 DRM_MODE_CONNECTOR_LVDS);
902 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
903 DRM_MODE_ENCODER_LVDS);
905 intel_connector_attach_encoder(intel_connector, intel_encoder);
906 intel_encoder->type = INTEL_OUTPUT_LVDS;
908 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
909 intel_encoder->crtc_mask = (1 << 1);
910 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
911 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
912 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
913 connector->interlace_allowed = false;
914 connector->doublescan_allowed = false;
916 /* create the scaling mode property */
917 drm_mode_create_scaling_mode_property(dev);
919 * the initial panel fitting mode will be FULL_SCREEN.
922 drm_connector_attach_property(&intel_connector->base,
923 dev->mode_config.scaling_mode_property,
924 DRM_MODE_SCALE_ASPECT);
925 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
927 * LVDS discovery:
928 * 1) check for EDID on DDC
929 * 2) check for VBT data
930 * 3) check to see if LVDS is already on
931 * if none of the above, no panel
932 * 4) make sure lid is open
933 * if closed, act like it's not there for now
937 * Attempt to get the fixed panel mode from DDC. Assume that the
938 * preferred mode is the right one.
940 intel_lvds->edid = drm_get_edid(connector,
941 &dev_priv->gmbus[pin].adapter);
943 if (!intel_lvds->edid) {
944 /* Didn't get an EDID, so
945 * Set wide sync ranges so we get all modes
946 * handed to valid_mode for checking
948 connector->display_info.min_vfreq = 0;
949 connector->display_info.max_vfreq = 200;
950 connector->display_info.min_hfreq = 0;
951 connector->display_info.max_hfreq = 200;
954 list_for_each_entry(scan, &connector->probed_modes, head) {
955 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
956 intel_lvds->fixed_mode =
957 drm_mode_duplicate(dev, scan);
958 intel_find_lvds_downclock(dev,
959 intel_lvds->fixed_mode,
960 connector);
961 goto out;
965 /* Failed to get EDID, what about VBT? */
966 if (dev_priv->lfp_lvds_vbt_mode) {
967 intel_lvds->fixed_mode =
968 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
969 if (intel_lvds->fixed_mode) {
970 intel_lvds->fixed_mode->type |=
971 DRM_MODE_TYPE_PREFERRED;
972 goto out;
977 * If we didn't get EDID, try checking if the panel is already turned
978 * on. If so, assume that whatever is currently programmed is the
979 * correct mode.
982 /* Ironlake: FIXME if still fail, not try pipe mode now */
983 if (HAS_PCH_SPLIT(dev))
984 goto failed;
986 lvds = I915_READ(LVDS);
987 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
988 crtc = intel_get_crtc_for_pipe(dev, pipe);
990 if (crtc && (lvds & LVDS_PORT_EN)) {
991 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
992 if (intel_lvds->fixed_mode) {
993 intel_lvds->fixed_mode->type |=
994 DRM_MODE_TYPE_PREFERRED;
995 goto out;
999 /* If we still don't have a mode after all that, give up. */
1000 if (!intel_lvds->fixed_mode)
1001 goto failed;
1003 out:
1004 if (HAS_PCH_SPLIT(dev)) {
1005 u32 pwm;
1006 /* make sure PWM is enabled */
1007 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1008 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1009 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1011 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1012 pwm |= PWM_PCH_ENABLE;
1013 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1015 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1016 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1017 DRM_DEBUG_KMS("lid notifier registration failed\n");
1018 dev_priv->lid_notifier.notifier_call = NULL;
1020 /* keep the LVDS connector */
1021 dev_priv->int_lvds_connector = connector;
1022 drm_sysfs_connector_add(connector);
1023 return;
1025 failed:
1026 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1027 drm_connector_cleanup(connector);
1028 drm_encoder_cleanup(encoder);
1029 kfree(intel_lvds);
1030 kfree(intel_connector);