drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "intel_drv.h"
  34 #include "i915_drm.h"
  35 #include "i915_drv.h"
  36
  37 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  38 {
  39         struct drm_device *dev = encoder->dev;
  40         struct drm_i915_private *dev_priv = dev->dev_private;
  41         u32 temp, reg;
  42
  43         if (HAS_PCH_SPLIT(dev))
  44                 reg = PCH_ADPA;
  45         else
  46                 reg = ADPA;
  47
  48         temp = I915_READ(reg);
  49         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  50         temp &= ~ADPA_DAC_ENABLE;
  51
  52         switch(mode) {
  53         case DRM_MODE_DPMS_ON:
  54                 temp |= ADPA_DAC_ENABLE;
  55                 break;
  56         case DRM_MODE_DPMS_STANDBY:
  57                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  58                 break;
  59         case DRM_MODE_DPMS_SUSPEND:
  60                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  61                 break;
  62         case DRM_MODE_DPMS_OFF:
  63                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  64                 break;
  65         }
  66
  67         I915_WRITE(reg, temp);
  68 }
  69
  70 static int intel_crt_mode_valid(struct drm_connector *connector,
  71                                 struct drm_display_mode *mode)
  72 {
  73         struct drm_device *dev = connector->dev;
  74
  75         int max_clock = 0;
  76         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  77                 return MODE_NO_DBLESCAN;
  78
  79         if (mode->clock < 25000)
  80                 return MODE_CLOCK_LOW;
  81
  82         if (IS_GEN2(dev))
  83                 max_clock = 350000;
  84         else
  85                 max_clock = 400000;
  86         if (mode->clock > max_clock)
  87                 return MODE_CLOCK_HIGH;
  88
  89         return MODE_OK;
  90 }
  91
  92 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  93                                  struct drm_display_mode *mode,
  94                                  struct drm_display_mode *adjusted_mode)
  95 {
  96         return true;
  97 }
  98
  99 static void intel_crt_mode_set(struct drm_encoder *encoder,
 100                                struct drm_display_mode *mode,
 101                                struct drm_display_mode *adjusted_mode)
 102 {
 103
 104         struct drm_device *dev = encoder->dev;
 105         struct drm_crtc *crtc = encoder->crtc;
 106         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 107         struct drm_i915_private *dev_priv = dev->dev_private;
 108         int dpll_md_reg;
 109         u32 adpa, dpll_md;
 110         u32 adpa_reg;
 111
 112         if (intel_crtc->pipe == 0)
 113                 dpll_md_reg = DPLL_A_MD;
 114         else
 115                 dpll_md_reg = DPLL_B_MD;
 116
 117         if (HAS_PCH_SPLIT(dev))
 118                 adpa_reg = PCH_ADPA;
 119         else
 120                 adpa_reg = ADPA;
 121
 122         /*
 123          * Disable separate mode multiplier used when cloning SDVO to CRT
 124          * XXX this needs to be adjusted when we really are cloning
 125          */
 126         if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
 127                 dpll_md = I915_READ(dpll_md_reg);
 128                 I915_WRITE(dpll_md_reg,
 129                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 130         }
 131
 132         adpa = 0;
 133         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 134                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 135         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 136                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 137
 138         if (intel_crtc->pipe == 0) {
 139                 if (HAS_PCH_CPT(dev))
 140                         adpa |= PORT_TRANS_A_SEL_CPT;
 141                 else
 142                         adpa |= ADPA_PIPE_A_SELECT;
 143                 if (!HAS_PCH_SPLIT(dev))
 144                         I915_WRITE(BCLRPAT_A, 0);
 145         } else {
 146                 if (HAS_PCH_CPT(dev))
 147                         adpa |= PORT_TRANS_B_SEL_CPT;
 148                 else
 149                         adpa |= ADPA_PIPE_B_SELECT;
 150                 if (!HAS_PCH_SPLIT(dev))
 151                         I915_WRITE(BCLRPAT_B, 0);
 152         }
 153
 154         I915_WRITE(adpa_reg, adpa);
 155 }
 156
 157 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 158 {
 159         struct drm_device *dev = connector->dev;
 160         struct drm_i915_private *dev_priv = dev->dev_private;
 161         u32 adpa, temp;
 162         bool ret;
 163         bool turn_off_dac = false;
 164
 165         temp = adpa = I915_READ(PCH_ADPA);
 166
 167         if (HAS_PCH_SPLIT(dev))
 168                 turn_off_dac = true;
 169
 170         adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 171         if (turn_off_dac)
 172                 adpa &= ~ADPA_DAC_ENABLE;
 173
 174         /* disable HPD first */
 175         I915_WRITE(PCH_ADPA, adpa);
 176         (void)I915_READ(PCH_ADPA);
 177
 178         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
 179                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
 180                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
 181                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
 182                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
 183                         ADPA_CRT_HOTPLUG_ENABLE |
 184                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
 185
 186         DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
 187         I915_WRITE(PCH_ADPA, adpa);
 188
 189         if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 190                      1000))
 191                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 192
 193         if (turn_off_dac) {
 194                 /* Make sure hotplug is enabled */
 195                 I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE);
 196                 (void)I915_READ(PCH_ADPA);
 197         }
 198
 199         /* Check the status to see if both blue and green are on now */
 200         adpa = I915_READ(PCH_ADPA);
 201         adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
 202         if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
 203                 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
 204                 ret = true;
 205         else
 206                 ret = false;
 207
 208         return ret;
 209 }
 210
 211 /**
 212  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 213  *
 214  * Not for i915G/i915GM
 215  *
 216  * \return true if CRT is connected.
 217  * \return false if CRT is disconnected.
 218  */
 219 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 220 {
 221         struct drm_device *dev = connector->dev;
 222         struct drm_i915_private *dev_priv = dev->dev_private;
 223         u32 hotplug_en, orig, stat;
 224         bool ret = false;
 225         int i, tries = 0;
 226
 227         if (HAS_PCH_SPLIT(dev))
 228                 return intel_ironlake_crt_detect_hotplug(connector);
 229
 230         /*
 231          * On 4 series desktop, CRT detect sequence need to be done twice
 232          * to get a reliable result.
 233          */
 234
 235         if (IS_G4X(dev) && !IS_GM45(dev))
 236                 tries = 2;
 237         else
 238                 tries = 1;
 239         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 240         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 241
 242         for (i = 0; i < tries ; i++) {
 243                 /* turn on the FORCE_DETECT */
 244                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 245                 /* wait for FORCE_DETECT to go off */
 246                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 247                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 248                              1000))
 249                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 250         }
 251
 252         stat = I915_READ(PORT_HOTPLUG_STAT);
 253         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 254                 ret = true;
 255
 256         /* clear the interrupt we just generated, if any */
 257         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 258
 259         /* and put the bits back */
 260         I915_WRITE(PORT_HOTPLUG_EN, orig);
 261
 262         return ret;
 263 }
 264
 265 static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus)
 266 {
 267         u8 buf;
 268         struct i2c_msg msgs[] = {
 269                 {
 270                         .addr = 0xA0,
 271                         .flags = 0,
 272                         .len = 1,
 273                         .buf = &buf,
 274                 },
 275         };
 276         /* DDC monitor detect: Does it ACK a write to 0xA0? */
 277         return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1;
 278 }
 279
 280 static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
 281 {
 282         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
 283         struct drm_i915_private *dev_priv = encoder->dev->dev_private;
 284
 285         /* CRT should always be at 0, but check anyway */
 286         if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
 287                 return false;
 288
 289         if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) {
 290                 DRM_DEBUG_KMS("CRT detected via DDC:0xa0\n");
 291                 return true;
 292         }
 293
 294         if (intel_ddc_probe(intel_encoder, dev_priv->crt_ddc_pin)) {
 295                 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 296                 return true;
 297         }
 298
 299         return false;
 300 }
 301
 302 static enum drm_connector_status
 303 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
 304 {
 305         struct drm_encoder *encoder = &intel_encoder->base;
 306         struct drm_device *dev = encoder->dev;
 307         struct drm_i915_private *dev_priv = dev->dev_private;
 308         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 309         uint32_t pipe = intel_crtc->pipe;
 310         uint32_t save_bclrpat;
 311         uint32_t save_vtotal;
 312         uint32_t vtotal, vactive;
 313         uint32_t vsample;
 314         uint32_t vblank, vblank_start, vblank_end;
 315         uint32_t dsl;
 316         uint32_t bclrpat_reg;
 317         uint32_t vtotal_reg;
 318         uint32_t vblank_reg;
 319         uint32_t vsync_reg;
 320         uint32_t pipeconf_reg;
 321         uint32_t pipe_dsl_reg;
 322         uint8_t st00;
 323         enum drm_connector_status status;
 324
 325         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 326
 327         if (pipe == 0) {
 328                 bclrpat_reg = BCLRPAT_A;
 329                 vtotal_reg = VTOTAL_A;
 330                 vblank_reg = VBLANK_A;
 331                 vsync_reg = VSYNC_A;
 332                 pipeconf_reg = PIPEACONF;
 333                 pipe_dsl_reg = PIPEADSL;
 334         } else {
 335                 bclrpat_reg = BCLRPAT_B;
 336                 vtotal_reg = VTOTAL_B;
 337                 vblank_reg = VBLANK_B;
 338                 vsync_reg = VSYNC_B;
 339                 pipeconf_reg = PIPEBCONF;
 340                 pipe_dsl_reg = PIPEBDSL;
 341         }
 342
 343         save_bclrpat = I915_READ(bclrpat_reg);
 344         save_vtotal = I915_READ(vtotal_reg);
 345         vblank = I915_READ(vblank_reg);
 346
 347         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 348         vactive = (save_vtotal & 0x7ff) + 1;
 349
 350         vblank_start = (vblank & 0xfff) + 1;
 351         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 352
 353         /* Set the border color to purple. */
 354         I915_WRITE(bclrpat_reg, 0x500050);
 355
 356         if (!IS_GEN2(dev)) {
 357                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 358                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 359                 POSTING_READ(pipeconf_reg);
 360                 /* Wait for next Vblank to substitue
 361                  * border color for Color info */
 362                 intel_wait_for_vblank(dev, pipe);
 363                 st00 = I915_READ8(VGA_MSR_WRITE);
 364                 status = ((st00 & (1 << 4)) != 0) ?
 365                         connector_status_connected :
 366                         connector_status_disconnected;
 367
 368                 I915_WRITE(pipeconf_reg, pipeconf);
 369         } else {
 370                 bool restore_vblank = false;
 371                 int count, detect;
 372
 373                 /*
 374                 * If there isn't any border, add some.
 375                 * Yes, this will flicker
 376                 */
 377                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 378                         uint32_t vsync = I915_READ(vsync_reg);
 379                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 380
 381                         vblank_start = vsync_start;
 382                         I915_WRITE(vblank_reg,
 383                                    (vblank_start - 1) |
 384                                    ((vblank_end - 1) << 16));
 385                         restore_vblank = true;
 386                 }
 387                 /* sample in the vertical border, selecting the larger one */
 388                 if (vblank_start - vactive >= vtotal - vblank_end)
 389                         vsample = (vblank_start + vactive) >> 1;
 390                 else
 391                         vsample = (vtotal + vblank_end) >> 1;
 392
 393                 /*
 394                  * Wait for the border to be displayed
 395                  */
 396                 while (I915_READ(pipe_dsl_reg) >= vactive)
 397                         ;
 398                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 399                         ;
 400                 /*
 401                  * Watch ST00 for an entire scanline
 402                  */
 403                 detect = 0;
 404                 count = 0;
 405                 do {
 406                         count++;
 407                         /* Read the ST00 VGA status register */
 408                         st00 = I915_READ8(VGA_MSR_WRITE);
 409                         if (st00 & (1 << 4))
 410                                 detect++;
 411                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 412
 413                 /* restore vblank if necessary */
 414                 if (restore_vblank)
 415                         I915_WRITE(vblank_reg, vblank);
 416                 /*
 417                  * If more than 3/4 of the scanline detected a monitor,
 418                  * then it is assumed to be present. This works even on i830,
 419                  * where there isn't any way to force the border color across
 420                  * the screen
 421                  */
 422                 status = detect * 4 > count * 3 ?
 423                          connector_status_connected :
 424                          connector_status_disconnected;
 425         }
 426
 427         /* Restore previous settings */
 428         I915_WRITE(bclrpat_reg, save_bclrpat);
 429
 430         return status;
 431 }
 432
 433 static enum drm_connector_status
 434 intel_crt_detect(struct drm_connector *connector, bool force)
 435 {
 436         struct drm_device *dev = connector->dev;
 437         struct intel_encoder *encoder = intel_attached_encoder(connector);
 438         struct drm_crtc *crtc;
 439         int dpms_mode;
 440         enum drm_connector_status status;
 441
 442         if (I915_HAS_HOTPLUG(dev)) {
 443                 if (intel_crt_detect_hotplug(connector)) {
 444                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 445                         return connector_status_connected;
 446                 } else
 447                         return connector_status_disconnected;
 448         }
 449
 450         if (intel_crt_detect_ddc(&encoder->base))
 451                 return connector_status_connected;
 452
 453         if (!force)
 454                 return connector->status;
 455
 456         /* for pre-945g platforms use load detect */
 457         if (encoder->base.crtc && encoder->base.crtc->enabled) {
 458                 status = intel_crt_load_detect(encoder->base.crtc, encoder);
 459         } else {
 460                 crtc = intel_get_load_detect_pipe(encoder, connector,
 461                                                   NULL, &dpms_mode);
 462                 if (crtc) {
 463                         if (intel_crt_detect_ddc(&encoder->base))
 464                                 status = connector_status_connected;
 465                         else
 466                                 status = intel_crt_load_detect(crtc, encoder);
 467                         intel_release_load_detect_pipe(encoder,
 468                                                        connector, dpms_mode);
 469                 } else
 470                         status = connector_status_unknown;
 471         }
 472
 473         return status;
 474 }
 475
 476 static void intel_crt_destroy(struct drm_connector *connector)
 477 {
 478         drm_sysfs_connector_remove(connector);
 479         drm_connector_cleanup(connector);
 480         kfree(connector);
 481 }
 482
 483 static int intel_crt_get_modes(struct drm_connector *connector)
 484 {
 485         struct drm_device *dev = connector->dev;
 486         struct drm_i915_private *dev_priv = dev->dev_private;
 487         int ret;
 488
 489         ret = intel_ddc_get_modes(connector,
 490                                  &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 491         if (ret || !IS_G4X(dev))
 492                 return ret;
 493
 494         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 495         return intel_ddc_get_modes(connector,
 496                                    &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
 497 }
 498
 499 static int intel_crt_set_property(struct drm_connector *connector,
 500                                   struct drm_property *property,
 501                                   uint64_t value)
 502 {
 503         return 0;
 504 }
 505
 506 /*
 507  * Routines for controlling stuff on the analog port
 508  */
 509
 510 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 511         .dpms = intel_crt_dpms,
 512         .mode_fixup = intel_crt_mode_fixup,
 513         .prepare = intel_encoder_prepare,
 514         .commit = intel_encoder_commit,
 515         .mode_set = intel_crt_mode_set,
 516 };
 517
 518 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 519         .dpms = drm_helper_connector_dpms,
 520         .detect = intel_crt_detect,
 521         .fill_modes = drm_helper_probe_single_connector_modes,
 522         .destroy = intel_crt_destroy,
 523         .set_property = intel_crt_set_property,
 524 };
 525
 526 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 527         .mode_valid = intel_crt_mode_valid,
 528         .get_modes = intel_crt_get_modes,
 529         .best_encoder = intel_best_encoder,
 530 };
 531
 532 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 533         .destroy = intel_encoder_destroy,
 534 };
 535
 536 void intel_crt_init(struct drm_device *dev)
 537 {
 538         struct drm_connector *connector;
 539         struct intel_encoder *intel_encoder;
 540         struct intel_connector *intel_connector;
 541         struct drm_i915_private *dev_priv = dev->dev_private;
 542
 543         intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
 544         if (!intel_encoder)
 545                 return;
 546
 547         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 548         if (!intel_connector) {
 549                 kfree(intel_encoder);
 550                 return;
 551         }
 552
 553         connector = &intel_connector->base;
 554         drm_connector_init(dev, &intel_connector->base,
 555                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 556
 557         drm_encoder_init(dev, &intel_encoder->base, &intel_crt_enc_funcs,
 558                          DRM_MODE_ENCODER_DAC);
 559
 560         intel_connector_attach_encoder(intel_connector, intel_encoder);
 561
 562         intel_encoder->type = INTEL_OUTPUT_ANALOG;
 563         intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 564                                    (1 << INTEL_ANALOG_CLONE_BIT) |
 565                                    (1 << INTEL_SDVO_LVDS_CLONE_BIT);
 566         intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 567         connector->interlace_allowed = 1;
 568         connector->doublescan_allowed = 0;
 569
 570         drm_encoder_helper_add(&intel_encoder->base, &intel_crt_helper_funcs);
 571         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 572
 573         drm_sysfs_connector_add(connector);
 574
 575         if (I915_HAS_HOTPLUG(dev))
 576                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 577         else
 578                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 579
 580         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 581 }