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arm: ep93xx: Add basic interrupt info
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / mn10300 / kernel / mn10300-serial.c
blob93c53739cfc94c58ba7d694af171dcfaf0f284df
1 /* MN10300 On-chip serial port UART driver
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12 static const char serial_name[] = "MN10300 Serial driver";
13 static const char serial_version[] = "mn10300_serial-1.0";
14 static const char serial_revdate[] = "2007-11-06";
15
16 #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
17 #define SUPPORT_SYSRQ
18 #endif
19
20 #include <linux/module.h>
21 #include <linux/serial.h>
22 #include <linux/circ_buf.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/major.h>
31 #include <linux/string.h>
32 #include <linux/ioport.h>
33 #include <linux/mm.h>
34 #include <linux/slab.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38
39 #include <asm/system.h>
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/bitops.h>
43 #include <asm/serial-regs.h>
44 #include <unit/timex.h>
45 #include "mn10300-serial.h"
46
47 #ifdef CONFIG_SMP
48 #undef GxICR
49 #define GxICR(X) CROSS_GxICR(X, 0)
50 #endif /* CONFIG_SMP */
51
52 #define kenter(FMT, ...) \
53 printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
54 #define _enter(FMT, ...) \
55 no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
56 #define kdebug(FMT, ...) \
57 printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
58 #define _debug(FMT, ...) \
59 no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
60 #define kproto(FMT, ...) \
61 printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
62 #define _proto(FMT, ...) \
63 no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
64
65 #ifndef CODMSB
66 /* c_cflag bit meaning */
67 #define CODMSB 004000000000 /* change Transfer bit-order */
68 #endif
69
70 #define NR_UARTS 3
71
72 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
73 static void mn10300_serial_console_write(struct console *co,
74 const char *s, unsigned count);
75 static int __init mn10300_serial_console_setup(struct console *co,
76 char *options);
77
78 static struct uart_driver mn10300_serial_driver;
79 static struct console mn10300_serial_console = {
80 .name = "ttySM",
81 .write = mn10300_serial_console_write,
82 .device = uart_console_device,
83 .setup = mn10300_serial_console_setup,
84 .flags = CON_PRINTBUFFER,
85 .index = -1,
86 .data = &mn10300_serial_driver,
87 };
88 #endif
89
90 static struct uart_driver mn10300_serial_driver = {
91 .owner = NULL,
92 .driver_name = "mn10300-serial",
93 .dev_name = "ttySM",
94 .major = TTY_MAJOR,
95 .minor = 128,
96 .nr = NR_UARTS,
97 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
98 .cons = &mn10300_serial_console,
99 #endif
100 };
101
102 static unsigned int mn10300_serial_tx_empty(struct uart_port *);
103 static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
104 static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
105 static void mn10300_serial_stop_tx(struct uart_port *);
106 static void mn10300_serial_start_tx(struct uart_port *);
107 static void mn10300_serial_send_xchar(struct uart_port *, char ch);
108 static void mn10300_serial_stop_rx(struct uart_port *);
109 static void mn10300_serial_enable_ms(struct uart_port *);
110 static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
111 static int mn10300_serial_startup(struct uart_port *);
112 static void mn10300_serial_shutdown(struct uart_port *);
113 static void mn10300_serial_set_termios(struct uart_port *,
114 struct ktermios *new,
115 struct ktermios *old);
116 static const char *mn10300_serial_type(struct uart_port *);
117 static void mn10300_serial_release_port(struct uart_port *);
118 static int mn10300_serial_request_port(struct uart_port *);
119 static void mn10300_serial_config_port(struct uart_port *, int);
120 static int mn10300_serial_verify_port(struct uart_port *,
121 struct serial_struct *);
122
123 static const struct uart_ops mn10300_serial_ops = {
124 .tx_empty = mn10300_serial_tx_empty,
125 .set_mctrl = mn10300_serial_set_mctrl,
126 .get_mctrl = mn10300_serial_get_mctrl,
127 .stop_tx = mn10300_serial_stop_tx,
128 .start_tx = mn10300_serial_start_tx,
129 .send_xchar = mn10300_serial_send_xchar,
130 .stop_rx = mn10300_serial_stop_rx,
131 .enable_ms = mn10300_serial_enable_ms,
132 .break_ctl = mn10300_serial_break_ctl,
133 .startup = mn10300_serial_startup,
134 .shutdown = mn10300_serial_shutdown,
135 .set_termios = mn10300_serial_set_termios,
136 .type = mn10300_serial_type,
137 .release_port = mn10300_serial_release_port,
138 .request_port = mn10300_serial_request_port,
139 .config_port = mn10300_serial_config_port,
140 .verify_port = mn10300_serial_verify_port,
141 };
142
143 static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
144
145 /*
146 * the first on-chip serial port: ttySM0 (aka SIF0)
147 */
148 #ifdef CONFIG_MN10300_TTYSM0
149 struct mn10300_serial_port mn10300_serial_port_sif0 = {
150 .uart.ops = &mn10300_serial_ops,
151 .uart.membase = (void __iomem *) &SC0CTR,
152 .uart.mapbase = (unsigned long) &SC0CTR,
153 .uart.iotype = UPIO_MEM,
154 .uart.irq = 0,
155 .uart.uartclk = 0, /* MN10300_IOCLK, */
156 .uart.fifosize = 1,
157 .uart.flags = UPF_BOOT_AUTOCONF,
158 .uart.line = 0,
159 .uart.type = PORT_MN10300,
160 .uart.lock =
161 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
162 .name = "ttySM0",
163 ._iobase = &SC0CTR,
164 ._control = &SC0CTR,
165 ._status = (volatile u8 *)&SC0STR,
166 ._intr = &SC0ICR,
167 ._rxb = &SC0RXB,
168 ._txb = &SC0TXB,
169 .rx_name = "ttySM0:Rx",
170 .tx_name = "ttySM0:Tx",
171 #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
172 .tm_name = "ttySM0:Timer8",
173 ._tmxmd = &TM8MD,
174 ._tmxbr = &TM8BR,
175 ._tmicr = &TM8ICR,
176 .tm_irq = TM8IRQ,
177 .div_timer = MNSCx_DIV_TIMER_16BIT,
178 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
179 .tm_name = "ttySM0:Timer0",
180 ._tmxmd = &TM0MD,
181 ._tmxbr = (volatile u16 *)&TM0BR,
182 ._tmicr = &TM0ICR,
183 .tm_irq = TM0IRQ,
184 .div_timer = MNSCx_DIV_TIMER_8BIT,
185 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
186 .tm_name = "ttySM0:Timer2",
187 ._tmxmd = &TM2MD,
188 ._tmxbr = (volatile u16 *)&TM2BR,
189 ._tmicr = &TM2ICR,
190 .tm_irq = TM2IRQ,
191 .div_timer = MNSCx_DIV_TIMER_8BIT,
192 #else
193 #error "Unknown config for ttySM0"
194 #endif
195 .rx_irq = SC0RXIRQ,
196 .tx_irq = SC0TXIRQ,
197 .rx_icr = &GxICR(SC0RXIRQ),
198 .tx_icr = &GxICR(SC0TXIRQ),
199 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
200 .options = 0,
201 #ifdef CONFIG_GDBSTUB_ON_TTYSM0
202 .gdbstub = 1,
203 #endif
204 };
205 #endif /* CONFIG_MN10300_TTYSM0 */
206
207 /*
208 * the second on-chip serial port: ttySM1 (aka SIF1)
209 */
210 #ifdef CONFIG_MN10300_TTYSM1
211 struct mn10300_serial_port mn10300_serial_port_sif1 = {
212 .uart.ops = &mn10300_serial_ops,
213 .uart.membase = (void __iomem *) &SC1CTR,
214 .uart.mapbase = (unsigned long) &SC1CTR,
215 .uart.iotype = UPIO_MEM,
216 .uart.irq = 0,
217 .uart.uartclk = 0, /* MN10300_IOCLK, */
218 .uart.fifosize = 1,
219 .uart.flags = UPF_BOOT_AUTOCONF,
220 .uart.line = 1,
221 .uart.type = PORT_MN10300,
222 .uart.lock =
223 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
224 .name = "ttySM1",
225 ._iobase = &SC1CTR,
226 ._control = &SC1CTR,
227 ._status = (volatile u8 *)&SC1STR,
228 ._intr = &SC1ICR,
229 ._rxb = &SC1RXB,
230 ._txb = &SC1TXB,
231 .rx_name = "ttySM1:Rx",
232 .tx_name = "ttySM1:Tx",
233 #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
234 .tm_name = "ttySM1:Timer9",
235 ._tmxmd = &TM9MD,
236 ._tmxbr = &TM9BR,
237 ._tmicr = &TM9ICR,
238 .tm_irq = TM9IRQ,
239 .div_timer = MNSCx_DIV_TIMER_16BIT,
240 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
241 .tm_name = "ttySM1:Timer3",
242 ._tmxmd = &TM3MD,
243 ._tmxbr = (volatile u16 *)&TM3BR,
244 ._tmicr = &TM3ICR,
245 .tm_irq = TM3IRQ,
246 .div_timer = MNSCx_DIV_TIMER_8BIT,
247 #elif defined(CONFIG_MN10300_TTYSM1_TIMER12)
248 .tm_name = "ttySM1/Timer12",
249 ._tmxmd = &TM12MD,
250 ._tmxbr = &TM12BR,
251 ._tmicr = &TM12ICR,
252 .tm_irq = TM12IRQ,
253 .div_timer = MNSCx_DIV_TIMER_16BIT,
254 #else
255 #error "Unknown config for ttySM1"
256 #endif
257 .rx_irq = SC1RXIRQ,
258 .tx_irq = SC1TXIRQ,
259 .rx_icr = &GxICR(SC1RXIRQ),
260 .tx_icr = &GxICR(SC1TXIRQ),
261 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
262 .options = 0,
263 #ifdef CONFIG_GDBSTUB_ON_TTYSM1
264 .gdbstub = 1,
265 #endif
266 };
267 #endif /* CONFIG_MN10300_TTYSM1 */
268
269 /*
270 * the third on-chip serial port: ttySM2 (aka SIF2)
271 */
272 #ifdef CONFIG_MN10300_TTYSM2
273 struct mn10300_serial_port mn10300_serial_port_sif2 = {
274 .uart.ops = &mn10300_serial_ops,
275 .uart.membase = (void __iomem *) &SC2CTR,
276 .uart.mapbase = (unsigned long) &SC2CTR,
277 .uart.iotype = UPIO_MEM,
278 .uart.irq = 0,
279 .uart.uartclk = 0, /* MN10300_IOCLK, */
280 .uart.fifosize = 1,
281 .uart.flags = UPF_BOOT_AUTOCONF,
282 .uart.line = 2,
283 #ifdef CONFIG_MN10300_TTYSM2_CTS
284 .uart.type = PORT_MN10300_CTS,
285 #else
286 .uart.type = PORT_MN10300,
287 #endif
288 .uart.lock =
289 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
290 .name = "ttySM2",
291 ._iobase = &SC2CTR,
292 ._control = &SC2CTR,
293 ._status = (volatile u8 *)&SC2STR,
294 ._intr = &SC2ICR,
295 ._rxb = &SC2RXB,
296 ._txb = &SC2TXB,
297 .rx_name = "ttySM2:Rx",
298 .tx_name = "ttySM2:Tx",
299 #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
300 .tm_name = "ttySM2/Timer10",
301 ._tmxmd = &TM10MD,
302 ._tmxbr = &TM10BR,
303 ._tmicr = &TM10ICR,
304 .tm_irq = TM10IRQ,
305 .div_timer = MNSCx_DIV_TIMER_16BIT,
306 #elif defined(CONFIG_MN10300_TTYSM2_TIMER9)
307 .tm_name = "ttySM2/Timer9",
308 ._tmxmd = &TM9MD,
309 ._tmxbr = &TM9BR,
310 ._tmicr = &TM9ICR,
311 .tm_irq = TM9IRQ,
312 .div_timer = MNSCx_DIV_TIMER_16BIT,
313 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
314 .tm_name = "ttySM2/Timer1",
315 ._tmxmd = &TM1MD,
316 ._tmxbr = (volatile u16 *)&TM1BR,
317 ._tmicr = &TM1ICR,
318 .tm_irq = TM1IRQ,
319 .div_timer = MNSCx_DIV_TIMER_8BIT,
320 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
321 .tm_name = "ttySM2/Timer3",
322 ._tmxmd = &TM3MD,
323 ._tmxbr = (volatile u16 *)&TM3BR,
324 ._tmicr = &TM3ICR,
325 .tm_irq = TM3IRQ,
326 .div_timer = MNSCx_DIV_TIMER_8BIT,
327 #else
328 #error "Unknown config for ttySM2"
329 #endif
330 .rx_irq = SC2RXIRQ,
331 .tx_irq = SC2TXIRQ,
332 .rx_icr = &GxICR(SC2RXIRQ),
333 .tx_icr = &GxICR(SC2TXIRQ),
334 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
335 #ifdef CONFIG_MN10300_TTYSM2_CTS
336 .options = MNSCx_OPT_CTS,
337 #else
338 .options = 0,
339 #endif
340 #ifdef CONFIG_GDBSTUB_ON_TTYSM2
341 .gdbstub = 1,
342 #endif
343 };
344 #endif /* CONFIG_MN10300_TTYSM2 */
345
346
347 /*
348 * list of available serial ports
349 */
350 struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
351 #ifdef CONFIG_MN10300_TTYSM0
352 [0] = &mn10300_serial_port_sif0,
353 #endif
354 #ifdef CONFIG_MN10300_TTYSM1
355 [1] = &mn10300_serial_port_sif1,
356 #endif
357 #ifdef CONFIG_MN10300_TTYSM2
358 [2] = &mn10300_serial_port_sif2,
359 #endif
360 [NR_UARTS] = NULL,
361 };
362
363
364 /*
365 * we abuse the serial ports' baud timers' interrupt lines to get the ability
366 * to deliver interrupts to userspace as we use the ports' interrupt lines to
367 * do virtual DMA on account of the ports having no hardware FIFOs
368 *
369 * we can generate an interrupt manually in the assembly stubs by writing to
370 * the enable and detect bits in the interrupt control register, so all we need
371 * to do here is disable the interrupt line
372 *
373 * note that we can't just leave the line enabled as the baud rate timer *also*
374 * generates interrupts
375 */
376 static void mn10300_serial_mask_ack(unsigned int irq)
377 {
378 unsigned long flags;
379 u16 tmp;
380
381 flags = arch_local_cli_save();
382 GxICR(irq) = GxICR_LEVEL_6;
383 tmp = GxICR(irq); /* flush write buffer */
384 arch_local_irq_restore(flags);
385 }
386
387 static void mn10300_serial_chip_mask_ack(struct irq_data *d)
388 {
389 mn10300_serial_mask_ack(d->irq);
390 }
391
392 static void mn10300_serial_nop(struct irq_data *d)
393 {
394 }
395
396 static struct irq_chip mn10300_serial_pic = {
397 .name = "mnserial",
398 .irq_ack = mn10300_serial_chip_mask_ack,
399 .irq_mask = mn10300_serial_chip_mask_ack,
400 .irq_mask_ack = mn10300_serial_chip_mask_ack,
401 .irq_unmask = mn10300_serial_nop,
402 };
403
404
405 /*
406 * serial virtual DMA interrupt jump table
407 */
408 struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
409
410 static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
411 {
412 unsigned long flags;
413 u16 x;
414
415 flags = arch_local_cli_save();
416 *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
417 x = *port->tx_icr;
418 arch_local_irq_restore(flags);
419 }
420
421 static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
422 {
423 unsigned long flags;
424 u16 x;
425
426 flags = arch_local_cli_save();
427 *port->tx_icr =
428 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE;
429 x = *port->tx_icr;
430 arch_local_irq_restore(flags);
431 }
432
433 static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
434 {
435 unsigned long flags;
436 u16 x;
437
438 flags = arch_local_cli_save();
439 *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
440 x = *port->rx_icr;
441 arch_local_irq_restore(flags);
442 }
443
444 /*
445 * multi-bit equivalent of test_and_clear_bit()
446 */
447 static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
448 {
449 u32 epsw;
450 asm volatile(" bclr %1,(%2) \n"
451 " mov epsw,%0 \n"
452 : "=d"(epsw) : "d"(mask), "a"(ptr)
453 : "cc", "memory");
454 return !(epsw & EPSW_FLAG_Z);
455 }
456
457 /*
458 * receive chars from the ring buffer for this serial port
459 * - must do break detection here (not done in the UART)
460 */
461 static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
462 {
463 struct uart_icount *icount = &port->uart.icount;
464 struct tty_struct *tty = port->uart.state->port.tty;
465 unsigned ix;
466 int count;
467 u8 st, ch, push, status, overrun;
468
469 _enter("%s", port->name);
470
471 push = 0;
472
473 count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
474 count = tty_buffer_request_room(tty, count);
475 if (count == 0) {
476 if (!tty->low_latency)
477 tty_flip_buffer_push(tty);
478 return;
479 }
480
481 try_again:
482 /* pull chars out of the hat */
483 ix = port->rx_outp;
484 if (ix == port->rx_inp) {
485 if (push && !tty->low_latency)
486 tty_flip_buffer_push(tty);
487 return;
488 }
489
490 ch = port->rx_buffer[ix++];
491 st = port->rx_buffer[ix++];
492 smp_rmb();
493 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
494 port->uart.icount.rx++;
495
496 st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
497 status = 0;
498 overrun = 0;
499
500 /* the UART doesn't detect BREAK, so we have to do that ourselves
501 * - it starts as a framing error on a NUL character
502 * - then we count another two NUL characters before issuing TTY_BREAK
503 * - then we end on a normal char or one that has all the bottom bits
504 * zero and the top bits set
505 */
506 switch (port->rx_brk) {
507 case 0:
508 /* not breaking at the moment */
509 break;
510
511 case 1:
512 if (st & SC01STR_FEF && ch == 0) {
513 port->rx_brk = 2;
514 goto try_again;
515 }
516 goto not_break;
517
518 case 2:
519 if (st & SC01STR_FEF && ch == 0) {
520 port->rx_brk = 3;
521 _proto("Rx Break Detected");
522 icount->brk++;
523 if (uart_handle_break(&port->uart))
524 goto ignore_char;
525 status |= 1 << TTY_BREAK;
526 goto insert;
527 }
528 goto not_break;
529
530 default:
531 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
532 goto try_again; /* still breaking */
533
534 port->rx_brk = 0; /* end of the break */
535
536 switch (ch) {
537 case 0xFF:
538 case 0xFE:
539 case 0xFC:
540 case 0xF8:
541 case 0xF0:
542 case 0xE0:
543 case 0xC0:
544 case 0x80:
545 case 0x00:
546 /* discard char at probable break end */
547 goto try_again;
548 }
549 break;
550 }
551
552 process_errors:
553 /* handle framing error */
554 if (st & SC01STR_FEF) {
555 if (ch == 0) {
556 /* framing error with NUL char is probably a BREAK */
557 port->rx_brk = 1;
558 goto try_again;
559 }
560
561 _proto("Rx Framing Error");
562 icount->frame++;
563 status |= 1 << TTY_FRAME;
564 }
565
566 /* handle parity error */
567 if (st & SC01STR_PEF) {
568 _proto("Rx Parity Error");
569 icount->parity++;
570 status = TTY_PARITY;
571 }
572
573 /* handle normal char */
574 if (status == 0) {
575 if (uart_handle_sysrq_char(&port->uart, ch))
576 goto ignore_char;
577 status = (1 << TTY_NORMAL);
578 }
579
580 /* handle overrun error */
581 if (st & SC01STR_OEF) {
582 if (port->rx_brk)
583 goto try_again;
584
585 _proto("Rx Overrun Error");
586 icount->overrun++;
587 overrun = 1;
588 }
589
590 insert:
591 status &= port->uart.read_status_mask;
592
593 if (!overrun && !(status & port->uart.ignore_status_mask)) {
594 int flag;
595
596 if (status & (1 << TTY_BREAK))
597 flag = TTY_BREAK;
598 else if (status & (1 << TTY_PARITY))
599 flag = TTY_PARITY;
600 else if (status & (1 << TTY_FRAME))
601 flag = TTY_FRAME;
602 else
603 flag = TTY_NORMAL;
604
605 tty_insert_flip_char(tty, ch, flag);
606 }
607
608 /* overrun is special, since it's reported immediately, and doesn't
609 * affect the current character
610 */
611 if (overrun)
612 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
613
614 count--;
615 if (count <= 0) {
616 if (!tty->low_latency)
617 tty_flip_buffer_push(tty);
618 return;
619 }
620
621 ignore_char:
622 push = 1;
623 goto try_again;
624
625 not_break:
626 port->rx_brk = 0;
627 goto process_errors;
628 }
629
630 /*
631 * handle an interrupt from the serial transmission "virtual DMA" driver
632 * - note: the interrupt routine will disable its own interrupts when the Tx
633 * buffer is empty
634 */
635 static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
636 {
637 _enter("%s", port->name);
638
639 if (!port->uart.state || !port->uart.state->port.tty) {
640 mn10300_serial_dis_tx_intr(port);
641 return;
642 }
643
644 if (uart_tx_stopped(&port->uart) ||
645 uart_circ_empty(&port->uart.state->xmit))
646 mn10300_serial_dis_tx_intr(port);
647
648 if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
649 uart_write_wakeup(&port->uart);
650 }
651
652 /*
653 * deal with a change in the status of the CTS line
654 */
655 static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
656 {
657 u16 ctr;
658
659 port->tx_cts = st;
660 port->uart.icount.cts++;
661
662 /* flip the CTS state selector flag to interrupt when it changes
663 * back */
664 ctr = *port->_control;
665 ctr ^= SC2CTR_TWS;
666 *port->_control = ctr;
667
668 uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
669 wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
670 }
671
672 /*
673 * handle a virtual interrupt generated by the lower level "virtual DMA"
674 * routines (irq is the baud timer interrupt)
675 */
676 static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
677 {
678 struct mn10300_serial_port *port = dev_id;
679 u8 st;
680
681 spin_lock(&port->uart.lock);
682
683 if (port->intr_flags) {
684 _debug("INT %s: %x", port->name, port->intr_flags);
685
686 if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
687 mn10300_serial_receive_interrupt(port);
688
689 if (mask_test_and_clear(&port->intr_flags,
690 MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
691 mn10300_serial_transmit_interrupt(port);
692 }
693
694 /* the only modem control line amongst the whole lot is CTS on
695 * serial port 2 */
696 if (port->type == PORT_MN10300_CTS) {
697 st = *port->_status;
698 if ((port->tx_cts ^ st) & SC2STR_CTS)
699 mn10300_serial_cts_changed(port, st);
700 }
701
702 spin_unlock(&port->uart.lock);
703
704 return IRQ_HANDLED;
705 }
706
707 /*
708 * return indication of whether the hardware transmit buffer is empty
709 */
710 static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
711 {
712 struct mn10300_serial_port *port =
713 container_of(_port, struct mn10300_serial_port, uart);
714
715 _enter("%s", port->name);
716
717 return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
718 0 : TIOCSER_TEMT;
719 }
720
721 /*
722 * set the modem control lines (we don't have any)
723 */
724 static void mn10300_serial_set_mctrl(struct uart_port *_port,
725 unsigned int mctrl)
726 {
727 struct mn10300_serial_port *port __attribute__ ((unused)) =
728 container_of(_port, struct mn10300_serial_port, uart);
729
730 _enter("%s,%x", port->name, mctrl);
731 }
732
733 /*
734 * get the modem control line statuses
735 */
736 static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
737 {
738 struct mn10300_serial_port *port =
739 container_of(_port, struct mn10300_serial_port, uart);
740
741 _enter("%s", port->name);
742
743 if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
744 return TIOCM_CAR | TIOCM_DSR;
745
746 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
747 }
748
749 /*
750 * stop transmitting characters
751 */
752 static void mn10300_serial_stop_tx(struct uart_port *_port)
753 {
754 struct mn10300_serial_port *port =
755 container_of(_port, struct mn10300_serial_port, uart);
756
757 _enter("%s", port->name);
758
759 /* disable the virtual DMA */
760 mn10300_serial_dis_tx_intr(port);
761 }
762
763 /*
764 * start transmitting characters
765 * - jump-start transmission if it has stalled
766 * - enable the serial Tx interrupt (used by the virtual DMA controller)
767 * - force an interrupt to happen if necessary
768 */
769 static void mn10300_serial_start_tx(struct uart_port *_port)
770 {
771 struct mn10300_serial_port *port =
772 container_of(_port, struct mn10300_serial_port, uart);
773
774 u16 x;
775
776 _enter("%s{%lu}",
777 port->name,
778 CIRC_CNT(&port->uart.state->xmit.head,
779 &port->uart.state->xmit.tail,
780 UART_XMIT_SIZE));
781
782 /* kick the virtual DMA controller */
783 arch_local_cli();
784 x = *port->tx_icr;
785 x |= GxICR_ENABLE;
786
787 if (*port->_status & SC01STR_TBF)
788 x &= ~(GxICR_REQUEST | GxICR_DETECT);
789 else
790 x |= GxICR_REQUEST | GxICR_DETECT;
791
792 _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
793 *port->_control, *port->_intr, *port->_status,
794 *port->_tmxmd,
795 (port->div_timer == MNSCx_DIV_TIMER_8BIT) ?
796 *(volatile u8 *)port->_tmxbr : *port->_tmxbr,
797 *port->tx_icr);
798
799 *port->tx_icr = x;
800 x = *port->tx_icr;
801 arch_local_sti();
802 }
803
804 /*
805 * transmit a high-priority XON/XOFF character
806 */
807 static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
808 {
809 struct mn10300_serial_port *port =
810 container_of(_port, struct mn10300_serial_port, uart);
811
812 _enter("%s,%02x", port->name, ch);
813
814 if (likely(port->gdbstub)) {
815 port->tx_xchar = ch;
816 if (ch)
817 mn10300_serial_en_tx_intr(port);
818 }
819 }
820
821 /*
822 * stop receiving characters
823 * - called whilst the port is being closed
824 */
825 static void mn10300_serial_stop_rx(struct uart_port *_port)
826 {
827 struct mn10300_serial_port *port =
828 container_of(_port, struct mn10300_serial_port, uart);
829
830 u16 ctr;
831
832 _enter("%s", port->name);
833
834 ctr = *port->_control;
835 ctr &= ~SC01CTR_RXE;
836 *port->_control = ctr;
837
838 mn10300_serial_dis_rx_intr(port);
839 }
840
841 /*
842 * enable modem status interrupts
843 */
844 static void mn10300_serial_enable_ms(struct uart_port *_port)
845 {
846 struct mn10300_serial_port *port =
847 container_of(_port, struct mn10300_serial_port, uart);
848
849 u16 ctr, cts;
850
851 _enter("%s", port->name);
852
853 if (port->type == PORT_MN10300_CTS) {
854 /* want to interrupt when CTS goes low if CTS is now high and
855 * vice versa
856 */
857 port->tx_cts = *port->_status;
858
859 cts = (port->tx_cts & SC2STR_CTS) ?
860 SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
861
862 ctr = *port->_control;
863 ctr &= ~SC2CTR_TWS;
864 ctr |= cts;
865 *port->_control = ctr;
866
867 mn10300_serial_en_tx_intr(port);
868 }
869 }
870
871 /*
872 * transmit or cease transmitting a break signal
873 */
874 static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
875 {
876 struct mn10300_serial_port *port =
877 container_of(_port, struct mn10300_serial_port, uart);
878
879 _enter("%s,%d", port->name, ctl);
880
881 if (ctl) {
882 /* tell the virtual DMA handler to assert BREAK */
883 port->tx_break = 1;
884 mn10300_serial_en_tx_intr(port);
885 } else {
886 port->tx_break = 0;
887 *port->_control &= ~SC01CTR_BKE;
888 mn10300_serial_en_tx_intr(port);
889 }
890 }
891
892 /*
893 * grab the interrupts and enable the port for reception
894 */
895 static int mn10300_serial_startup(struct uart_port *_port)
896 {
897 struct mn10300_serial_port *port =
898 container_of(_port, struct mn10300_serial_port, uart);
899 struct mn10300_serial_int *pint;
900
901 _enter("%s{%d}", port->name, port->gdbstub);
902
903 if (unlikely(port->gdbstub))
904 return -EBUSY;
905
906 /* allocate an Rx buffer for the virtual DMA handler */
907 port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
908 if (!port->rx_buffer)
909 return -ENOMEM;
910
911 port->rx_inp = port->rx_outp = 0;
912
913 /* finally, enable the device */
914 *port->_intr = SC01ICR_TI;
915 *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
916
917 pint = &mn10300_serial_int_tbl[port->rx_irq];
918 pint->port = port;
919 pint->vdma = mn10300_serial_vdma_rx_handler;
920 pint = &mn10300_serial_int_tbl[port->tx_irq];
921 pint->port = port;
922 pint->vdma = mn10300_serial_vdma_tx_handler;
923
924 set_intr_level(port->rx_irq,
925 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
926 set_intr_level(port->tx_irq,
927 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
928 set_irq_chip(port->tm_irq, &mn10300_serial_pic);
929
930 if (request_irq(port->rx_irq, mn10300_serial_interrupt,
931 IRQF_DISABLED, port->rx_name, port) < 0)
932 goto error;
933
934 if (request_irq(port->tx_irq, mn10300_serial_interrupt,
935 IRQF_DISABLED, port->tx_name, port) < 0)
936 goto error2;
937
938 if (request_irq(port->tm_irq, mn10300_serial_interrupt,
939 IRQF_DISABLED, port->tm_name, port) < 0)
940 goto error3;
941 mn10300_serial_mask_ack(port->tm_irq);
942
943 return 0;
944
945 error3:
946 free_irq(port->tx_irq, port);
947 error2:
948 free_irq(port->rx_irq, port);
949 error:
950 kfree(port->rx_buffer);
951 port->rx_buffer = NULL;
952 return -EBUSY;
953 }
954
955 /*
956 * shutdown the port and release interrupts
957 */
958 static void mn10300_serial_shutdown(struct uart_port *_port)
959 {
960 u16 x;
961 struct mn10300_serial_port *port =
962 container_of(_port, struct mn10300_serial_port, uart);
963
964 _enter("%s", port->name);
965
966 /* disable the serial port and its baud rate timer */
967 port->tx_break = 0;
968 *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
969 *port->_tmxmd = 0;
970
971 if (port->rx_buffer) {
972 void *buf = port->rx_buffer;
973 port->rx_buffer = NULL;
974 kfree(buf);
975 }
976
977 /* disable all intrs */
978 free_irq(port->tm_irq, port);
979 free_irq(port->rx_irq, port);
980 free_irq(port->tx_irq, port);
981
982 arch_local_cli();
983 *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
984 x = *port->rx_icr;
985 *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
986 x = *port->tx_icr;
987 arch_local_sti();
988 }
989
990 /*
991 * this routine is called to set the UART divisor registers to match the
992 * specified baud rate for a serial port.
993 */
994 static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
995 struct ktermios *new,
996 struct ktermios *old)
997 {
998 unsigned long flags;
999 unsigned long ioclk = port->ioclk;
1000 unsigned cflag;
1001 int baud, bits, xdiv, tmp;
1002 u16 tmxbr, scxctr;
1003 u8 tmxmd, battempt;
1004 u8 div_timer = port->div_timer;
1005
1006 _enter("%s{%lu}", port->name, ioclk);
1007
1008 /* byte size and parity */
1009 cflag = new->c_cflag;
1010 switch (cflag & CSIZE) {
1011 case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
1012 case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1013 default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1014 }
1015
1016 if (cflag & CSTOPB) {
1017 scxctr |= SC01CTR_STB_2BIT;
1018 bits++;
1019 }
1020
1021 if (cflag & PARENB) {
1022 bits++;
1023 if (cflag & PARODD)
1024 scxctr |= SC01CTR_PB_ODD;
1025 #ifdef CMSPAR
1026 else if (cflag & CMSPAR)
1027 scxctr |= SC01CTR_PB_FIXED0;
1028 #endif
1029 else
1030 scxctr |= SC01CTR_PB_EVEN;
1031 }
1032
1033 /* Determine divisor based on baud rate */
1034 battempt = 0;
1035
1036 switch (port->uart.line) {
1037 #ifdef CONFIG_MN10300_TTYSM0
1038 case 0: /* ttySM0 */
1039 #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
1040 scxctr |= SC0CTR_CK_TM8UFLOW_8;
1041 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
1042 scxctr |= SC0CTR_CK_TM0UFLOW_8;
1043 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
1044 scxctr |= SC0CTR_CK_TM2UFLOW_8;
1045 #else
1046 #error "Unknown config for ttySM0"
1047 #endif
1048 break;
1049 #endif /* CONFIG_MN10300_TTYSM0 */
1050
1051 #ifdef CONFIG_MN10300_TTYSM1
1052 case 1: /* ttySM1 */
1053 #if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
1054 #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
1055 scxctr |= SC1CTR_CK_TM9UFLOW_8;
1056 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
1057 scxctr |= SC1CTR_CK_TM3UFLOW_8;
1058 #else
1059 #error "Unknown config for ttySM1"
1060 #endif
1061 #else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1062 #if defined(CONFIG_MN10300_TTYSM1_TIMER12)
1063 scxctr |= SC1CTR_CK_TM12UFLOW_8;
1064 #else
1065 #error "Unknown config for ttySM1"
1066 #endif
1067 #endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1068 break;
1069 #endif /* CONFIG_MN10300_TTYSM1 */
1070
1071 #ifdef CONFIG_MN10300_TTYSM2
1072 case 2: /* ttySM2 */
1073 #if defined(CONFIG_AM33_2)
1074 #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
1075 scxctr |= SC2CTR_CK_TM10UFLOW;
1076 #else
1077 #error "Unknown config for ttySM2"
1078 #endif
1079 #else /* CONFIG_AM33_2 */
1080 #if defined(CONFIG_MN10300_TTYSM2_TIMER9)
1081 scxctr |= SC2CTR_CK_TM9UFLOW_8;
1082 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
1083 scxctr |= SC2CTR_CK_TM1UFLOW_8;
1084 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
1085 scxctr |= SC2CTR_CK_TM3UFLOW_8;
1086 #else
1087 #error "Unknown config for ttySM2"
1088 #endif
1089 #endif /* CONFIG_AM33_2 */
1090 break;
1091 #endif /* CONFIG_MN10300_TTYSM2 */
1092
1093 default:
1094 break;
1095 }
1096
1097 try_alternative:
1098 baud = uart_get_baud_rate(&port->uart, new, old, 0,
1099 port->ioclk / 8);
1100
1101 _debug("ALT %d [baud %d]", battempt, baud);
1102
1103 if (!baud)
1104 baud = 9600; /* B0 transition handled in rs_set_termios */
1105 xdiv = 1;
1106 if (baud == 134) {
1107 baud = 269; /* 134 is really 134.5 */
1108 xdiv = 2;
1109 }
1110
1111 if (baud == 38400 &&
1112 (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
1113 ) {
1114 _debug("CUSTOM %u", port->uart.custom_divisor);
1115
1116 if (div_timer == MNSCx_DIV_TIMER_16BIT) {
1117 if (port->uart.custom_divisor <= 65535) {
1118 tmxmd = TM8MD_SRC_IOCLK;
1119 tmxbr = port->uart.custom_divisor;
1120 port->uart.uartclk = ioclk;
1121 goto timer_okay;
1122 }
1123 if (port->uart.custom_divisor / 8 <= 65535) {
1124 tmxmd = TM8MD_SRC_IOCLK_8;
1125 tmxbr = port->uart.custom_divisor / 8;
1126 port->uart.custom_divisor = tmxbr * 8;
1127 port->uart.uartclk = ioclk / 8;
1128 goto timer_okay;
1129 }
1130 if (port->uart.custom_divisor / 32 <= 65535) {
1131 tmxmd = TM8MD_SRC_IOCLK_32;
1132 tmxbr = port->uart.custom_divisor / 32;
1133 port->uart.custom_divisor = tmxbr * 32;
1134 port->uart.uartclk = ioclk / 32;
1135 goto timer_okay;
1136 }
1137
1138 } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
1139 if (port->uart.custom_divisor <= 255) {
1140 tmxmd = TM2MD_SRC_IOCLK;
1141 tmxbr = port->uart.custom_divisor;
1142 port->uart.uartclk = ioclk;
1143 goto timer_okay;
1144 }
1145 if (port->uart.custom_divisor / 8 <= 255) {
1146 tmxmd = TM2MD_SRC_IOCLK_8;
1147 tmxbr = port->uart.custom_divisor / 8;
1148 port->uart.custom_divisor = tmxbr * 8;
1149 port->uart.uartclk = ioclk / 8;
1150 goto timer_okay;
1151 }
1152 if (port->uart.custom_divisor / 32 <= 255) {
1153 tmxmd = TM2MD_SRC_IOCLK_32;
1154 tmxbr = port->uart.custom_divisor / 32;
1155 port->uart.custom_divisor = tmxbr * 32;
1156 port->uart.uartclk = ioclk / 32;
1157 goto timer_okay;
1158 }
1159 }
1160 }
1161
1162 switch (div_timer) {
1163 case MNSCx_DIV_TIMER_16BIT:
1164 port->uart.uartclk = ioclk;
1165 tmxmd = TM8MD_SRC_IOCLK;
1166 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1167 if (tmp > 0 && tmp <= 65535)
1168 goto timer_okay;
1169
1170 port->uart.uartclk = ioclk / 8;
1171 tmxmd = TM8MD_SRC_IOCLK_8;
1172 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1173 if (tmp > 0 && tmp <= 65535)
1174 goto timer_okay;
1175
1176 port->uart.uartclk = ioclk / 32;
1177 tmxmd = TM8MD_SRC_IOCLK_32;
1178 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1179 if (tmp > 0 && tmp <= 65535)
1180 goto timer_okay;
1181 break;
1182
1183 case MNSCx_DIV_TIMER_8BIT:
1184 port->uart.uartclk = ioclk;
1185 tmxmd = TM2MD_SRC_IOCLK;
1186 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1187 if (tmp > 0 && tmp <= 255)
1188 goto timer_okay;
1189
1190 port->uart.uartclk = ioclk / 8;
1191 tmxmd = TM2MD_SRC_IOCLK_8;
1192 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1193 if (tmp > 0 && tmp <= 255)
1194 goto timer_okay;
1195
1196 port->uart.uartclk = ioclk / 32;
1197 tmxmd = TM2MD_SRC_IOCLK_32;
1198 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1199 if (tmp > 0 && tmp <= 255)
1200 goto timer_okay;
1201 break;
1202
1203 default:
1204 BUG();
1205 return;
1206 }
1207
1208 /* refuse to change to a baud rate we can't support */
1209 _debug("CAN'T SUPPORT");
1210
1211 switch (battempt) {
1212 case 0:
1213 if (old) {
1214 new->c_cflag &= ~CBAUD;
1215 new->c_cflag |= (old->c_cflag & CBAUD);
1216 battempt = 1;
1217 goto try_alternative;
1218 }
1219
1220 case 1:
1221 /* as a last resort, if the quotient is zero, default to 9600
1222 * bps */
1223 new->c_cflag &= ~CBAUD;
1224 new->c_cflag |= B9600;
1225 battempt = 2;
1226 goto try_alternative;
1227
1228 default:
1229 /* hmmm... can't seem to support 9600 either
1230 * - we could try iterating through the speeds we know about to
1231 * find the lowest
1232 */
1233 new->c_cflag &= ~CBAUD;
1234 new->c_cflag |= B0;
1235
1236 if (div_timer == MNSCx_DIV_TIMER_16BIT)
1237 tmxmd = TM8MD_SRC_IOCLK_32;
1238 else if (div_timer == MNSCx_DIV_TIMER_8BIT)
1239 tmxmd = TM2MD_SRC_IOCLK_32;
1240 tmxbr = 1;
1241
1242 port->uart.uartclk = ioclk / 32;
1243 break;
1244 }
1245 timer_okay:
1246
1247 _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
1248
1249 /* make the changes */
1250 spin_lock_irqsave(&port->uart.lock, flags);
1251
1252 uart_update_timeout(&port->uart, new->c_cflag, baud);
1253
1254 /* set the timer to produce the required baud rate */
1255 switch (div_timer) {
1256 case MNSCx_DIV_TIMER_16BIT:
1257 *port->_tmxmd = 0;
1258 *port->_tmxbr = tmxbr;
1259 *port->_tmxmd = TM8MD_INIT_COUNTER;
1260 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1261 break;
1262
1263 case MNSCx_DIV_TIMER_8BIT:
1264 *port->_tmxmd = 0;
1265 *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
1266 *port->_tmxmd = TM2MD_INIT_COUNTER;
1267 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1268 break;
1269 }
1270
1271 /* CTS flow control flag and modem status interrupts */
1272 scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
1273
1274 if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
1275 /* want to interrupt when CTS goes low if CTS is now
1276 * high and vice versa
1277 */
1278 port->tx_cts = *port->_status;
1279
1280 if (port->tx_cts & SC2STR_CTS)
1281 scxctr |= SC2CTR_TWE;
1282 else
1283 scxctr |= SC2CTR_TWE | SC2CTR_TWS;
1284 }
1285
1286 /* set up parity check flag */
1287 port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
1288 if (new->c_iflag & INPCK)
1289 port->uart.read_status_mask |=
1290 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1291 if (new->c_iflag & (BRKINT | PARMRK))
1292 port->uart.read_status_mask |= (1 << TTY_BREAK);
1293
1294 /* characters to ignore */
1295 port->uart.ignore_status_mask = 0;
1296 if (new->c_iflag & IGNPAR)
1297 port->uart.ignore_status_mask |=
1298 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1299 if (new->c_iflag & IGNBRK) {
1300 port->uart.ignore_status_mask |= (1 << TTY_BREAK);
1301 /*
1302 * If we're ignoring parity and break indicators,
1303 * ignore overruns to (for real raw support).
1304 */
1305 if (new->c_iflag & IGNPAR)
1306 port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
1307 }
1308
1309 /* Ignore all characters if CREAD is not set */
1310 if ((new->c_cflag & CREAD) == 0)
1311 port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
1312
1313 scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
1314 *port->_control = scxctr;
1315
1316 spin_unlock_irqrestore(&port->uart.lock, flags);
1317 }
1318
1319 /*
1320 * set the terminal I/O parameters
1321 */
1322 static void mn10300_serial_set_termios(struct uart_port *_port,
1323 struct ktermios *new,
1324 struct ktermios *old)
1325 {
1326 struct mn10300_serial_port *port =
1327 container_of(_port, struct mn10300_serial_port, uart);
1328
1329 _enter("%s,%p,%p", port->name, new, old);
1330
1331 mn10300_serial_change_speed(port, new, old);
1332
1333 /* handle turning off CRTSCTS */
1334 if (!(new->c_cflag & CRTSCTS)) {
1335 u16 ctr = *port->_control;
1336 ctr &= ~SC2CTR_TWE;
1337 *port->_control = ctr;
1338 }
1339
1340 /* change Transfer bit-order (LSB/MSB) */
1341 if (new->c_cflag & CODMSB)
1342 *port->_control |= SC01CTR_OD_MSBFIRST; /* MSB MODE */
1343 else
1344 *port->_control &= ~SC01CTR_OD_MSBFIRST; /* LSB MODE */
1345 }
1346
1347 /*
1348 * return description of port type
1349 */
1350 static const char *mn10300_serial_type(struct uart_port *_port)
1351 {
1352 struct mn10300_serial_port *port =
1353 container_of(_port, struct mn10300_serial_port, uart);
1354
1355 if (port->uart.type == PORT_MN10300_CTS)
1356 return "MN10300 SIF_CTS";
1357
1358 return "MN10300 SIF";
1359 }
1360
1361 /*
1362 * release I/O and memory regions in use by port
1363 */
1364 static void mn10300_serial_release_port(struct uart_port *_port)
1365 {
1366 struct mn10300_serial_port *port =
1367 container_of(_port, struct mn10300_serial_port, uart);
1368
1369 _enter("%s", port->name);
1370
1371 release_mem_region((unsigned long) port->_iobase, 16);
1372 }
1373
1374 /*
1375 * request I/O and memory regions for port
1376 */
1377 static int mn10300_serial_request_port(struct uart_port *_port)
1378 {
1379 struct mn10300_serial_port *port =
1380 container_of(_port, struct mn10300_serial_port, uart);
1381
1382 _enter("%s", port->name);
1383
1384 request_mem_region((unsigned long) port->_iobase, 16, port->name);
1385 return 0;
1386 }
1387
1388 /*
1389 * configure the type and reserve the ports
1390 */
1391 static void mn10300_serial_config_port(struct uart_port *_port, int type)
1392 {
1393 struct mn10300_serial_port *port =
1394 container_of(_port, struct mn10300_serial_port, uart);
1395
1396 _enter("%s", port->name);
1397
1398 port->uart.type = PORT_MN10300;
1399
1400 if (port->options & MNSCx_OPT_CTS)
1401 port->uart.type = PORT_MN10300_CTS;
1402
1403 mn10300_serial_request_port(_port);
1404 }
1405
1406 /*
1407 * verify serial parameters are suitable for this port type
1408 */
1409 static int mn10300_serial_verify_port(struct uart_port *_port,
1410 struct serial_struct *ss)
1411 {
1412 struct mn10300_serial_port *port =
1413 container_of(_port, struct mn10300_serial_port, uart);
1414 void *mapbase = (void *) (unsigned long) port->uart.mapbase;
1415
1416 _enter("%s", port->name);
1417
1418 /* these things may not be changed */
1419 if (ss->irq != port->uart.irq ||
1420 ss->port != port->uart.iobase ||
1421 ss->io_type != port->uart.iotype ||
1422 ss->iomem_base != mapbase ||
1423 ss->iomem_reg_shift != port->uart.regshift ||
1424 ss->hub6 != port->uart.hub6 ||
1425 ss->xmit_fifo_size != port->uart.fifosize)
1426 return -EINVAL;
1427
1428 /* type may be changed on a port that supports CTS */
1429 if (ss->type != port->uart.type) {
1430 if (!(port->options & MNSCx_OPT_CTS))
1431 return -EINVAL;
1432
1433 if (ss->type != PORT_MN10300 &&
1434 ss->type != PORT_MN10300_CTS)
1435 return -EINVAL;
1436 }
1437
1438 return 0;
1439 }
1440
1441 /*
1442 * initialise the MN10300 on-chip UARTs
1443 */
1444 static int __init mn10300_serial_init(void)
1445 {
1446 struct mn10300_serial_port *port;
1447 int ret, i;
1448
1449 printk(KERN_INFO "%s version %s (%s)\n",
1450 serial_name, serial_version, serial_revdate);
1451
1452 #if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2)
1453 {
1454 int tmp;
1455 SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
1456 tmp = SC2TIM;
1457 }
1458 #endif
1459
1460 set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL),
1461 mn10300_serial_vdma_interrupt);
1462
1463 ret = uart_register_driver(&mn10300_serial_driver);
1464 if (!ret) {
1465 for (i = 0 ; i < NR_PORTS ; i++) {
1466 port = mn10300_serial_ports[i];
1467 if (!port || port->gdbstub)
1468 continue;
1469
1470 switch (port->clock_src) {
1471 case MNSCx_CLOCK_SRC_IOCLK:
1472 port->ioclk = MN10300_IOCLK;
1473 break;
1474
1475 #ifdef MN10300_IOBCLK
1476 case MNSCx_CLOCK_SRC_IOBCLK:
1477 port->ioclk = MN10300_IOBCLK;
1478 break;
1479 #endif
1480 default:
1481 BUG();
1482 }
1483
1484 ret = uart_add_one_port(&mn10300_serial_driver,
1485 &port->uart);
1486
1487 if (ret < 0) {
1488 _debug("ERROR %d", -ret);
1489 break;
1490 }
1491 }
1492
1493 if (ret)
1494 uart_unregister_driver(&mn10300_serial_driver);
1495 }
1496
1497 return ret;
1498 }
1499
1500 __initcall(mn10300_serial_init);
1501
1502
1503 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
1504
1505 /*
1506 * print a string to the serial port without disturbing the real user of the
1507 * port too much
1508 * - the console must be locked by the caller
1509 */
1510 static void mn10300_serial_console_write(struct console *co,
1511 const char *s, unsigned count)
1512 {
1513 struct mn10300_serial_port *port;
1514 unsigned i;
1515 u16 scxctr, txicr, tmp;
1516 u8 tmxmd;
1517
1518 port = mn10300_serial_ports[co->index];
1519
1520 /* firstly hijack the serial port from the "virtual DMA" controller */
1521 arch_local_cli();
1522 txicr = *port->tx_icr;
1523 *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
1524 tmp = *port->tx_icr;
1525 arch_local_sti();
1526
1527 /* the transmitter may be disabled */
1528 scxctr = *port->_control;
1529 if (!(scxctr & SC01CTR_TXE)) {
1530 /* restart the UART clock */
1531 tmxmd = *port->_tmxmd;
1532
1533 switch (port->div_timer) {
1534 case MNSCx_DIV_TIMER_16BIT:
1535 *port->_tmxmd = 0;
1536 *port->_tmxmd = TM8MD_INIT_COUNTER;
1537 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1538 break;
1539
1540 case MNSCx_DIV_TIMER_8BIT:
1541 *port->_tmxmd = 0;
1542 *port->_tmxmd = TM2MD_INIT_COUNTER;
1543 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1544 break;
1545 }
1546
1547 /* enable the transmitter */
1548 *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
1549
1550 } else if (scxctr & SC01CTR_BKE) {
1551 /* stop transmitting BREAK */
1552 *port->_control = (scxctr & ~SC01CTR_BKE);
1553 }
1554
1555 /* send the chars into the serial port (with LF -> LFCR conversion) */
1556 for (i = 0; i < count; i++) {
1557 char ch = *s++;
1558
1559 while (*port->_status & SC01STR_TBF)
1560 continue;
1561 *(u8 *) port->_txb = ch;
1562
1563 if (ch == 0x0a) {
1564 while (*port->_status & SC01STR_TBF)
1565 continue;
1566 *(u8 *) port->_txb = 0xd;
1567 }
1568 }
1569
1570 /* can't let the transmitter be turned off if it's actually
1571 * transmitting */
1572 while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
1573 continue;
1574
1575 /* disable the transmitter if we re-enabled it */
1576 if (!(scxctr & SC01CTR_TXE))
1577 *port->_control = scxctr;
1578
1579 arch_local_cli();
1580 *port->tx_icr = txicr;
1581 tmp = *port->tx_icr;
1582 arch_local_sti();
1583 }
1584
1585 /*
1586 * set up a serial port as a console
1587 * - construct a cflag setting for the first rs_open()
1588 * - initialize the serial port
1589 * - return non-zero if we didn't find a serial port.
1590 */
1591 static int __init mn10300_serial_console_setup(struct console *co,
1592 char *options)
1593 {
1594 struct mn10300_serial_port *port;
1595 int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
1596
1597 for (i = 0 ; i < NR_PORTS ; i++) {
1598 port = mn10300_serial_ports[i];
1599 if (port && !port->gdbstub && port->uart.line == co->index)
1600 goto found_device;
1601 }
1602
1603 return -ENODEV;
1604
1605 found_device:
1606 switch (port->clock_src) {
1607 case MNSCx_CLOCK_SRC_IOCLK:
1608 port->ioclk = MN10300_IOCLK;
1609 break;
1610
1611 #ifdef MN10300_IOBCLK
1612 case MNSCx_CLOCK_SRC_IOBCLK:
1613 port->ioclk = MN10300_IOBCLK;
1614 break;
1615 #endif
1616 default:
1617 BUG();
1618 }
1619
1620 if (options)
1621 uart_parse_options(options, &baud, &parity, &bits, &flow);
1622
1623 return uart_set_options(&port->uart, co, baud, parity, bits, flow);
1624 }
1625
1626 /*
1627 * register console
1628 */
1629 static int __init mn10300_serial_console_init(void)
1630 {
1631 register_console(&mn10300_serial_console);
1632 return 0;
1633 }
1634
1635 console_initcall(mn10300_serial_console_init);
1636 #endif
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