arch/arm/mach-mx5/board-mx53_loco.c

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/clk.h>
  23 #include <linux/fec.h>
  24 #include <linux/delay.h>
  25 #include <linux/gpio.h>
  26
  27 #include <mach/common.h>
  28 #include <mach/hardware.h>
  29 #include <mach/imx-uart.h>
  30 #include <mach/iomux-mx53.h>
  31
  32 #include <asm/mach-types.h>
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/time.h>
  35
  36 #include "crm_regs.h"
  37 #include "devices-imx53.h"
  38
  39 #define LOCO_FEC_PHY_RST                IMX_GPIO_NR(7, 6)
  40
  41 static iomux_v3_cfg_t mx53_loco_pads[] = {
  42         /* FEC */
  43         MX53_PAD_FEC_MDC__FEC_MDC,
  44         MX53_PAD_FEC_MDIO__FEC_MDIO,
  45         MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
  46         MX53_PAD_FEC_RX_ER__FEC_RX_ER,
  47         MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
  48         MX53_PAD_FEC_RXD1__FEC_RDATA_1,
  49         MX53_PAD_FEC_RXD0__FEC_RDATA_0,
  50         MX53_PAD_FEC_TX_EN__FEC_TX_EN,
  51         MX53_PAD_FEC_TXD1__FEC_TDATA_1,
  52         MX53_PAD_FEC_TXD0__FEC_TDATA_0,
  53         /* FEC_nRST */
  54         MX53_PAD_PATA_DA_0__GPIO7_6,
  55         /* FEC_nINT */
  56         MX53_PAD_PATA_DATA4__GPIO2_4,
  57         /* AUDMUX5 */
  58         MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC,
  59         MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD,
  60         MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS,
  61         MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD,
  62         /* I2C2 */
  63         MX53_PAD_KEY_COL3__I2C2_SCL,
  64         MX53_PAD_KEY_ROW3__I2C2_SDA,
  65         /* SD1 */
  66         MX53_PAD_SD1_CMD__ESDHC1_CMD,
  67         MX53_PAD_SD1_CLK__ESDHC1_CLK,
  68         MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
  69         MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
  70         MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
  71         MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
  72         /* SD3 */
  73         MX53_PAD_PATA_DATA8__ESDHC3_DAT0,
  74         MX53_PAD_PATA_DATA9__ESDHC3_DAT1,
  75         MX53_PAD_PATA_DATA10__ESDHC3_DAT2,
  76         MX53_PAD_PATA_DATA11__ESDHC3_DAT3,
  77         MX53_PAD_PATA_DATA0__ESDHC3_DAT4,
  78         MX53_PAD_PATA_DATA1__ESDHC3_DAT5,
  79         MX53_PAD_PATA_DATA2__ESDHC3_DAT6,
  80         MX53_PAD_PATA_DATA3__ESDHC3_DAT7,
  81         MX53_PAD_PATA_IORDY__ESDHC3_CLK,
  82         MX53_PAD_PATA_RESET_B__ESDHC3_CMD,
  83         /* SD3_CD */
  84         MX53_PAD_EIM_DA11__GPIO3_11,
  85         /* SD3_WP */
  86         MX53_PAD_EIM_DA12__GPIO3_12,
  87         /* VGA */
  88         MX53_PAD_EIM_OE__IPU_DI1_PIN7,
  89         MX53_PAD_EIM_RW__IPU_DI1_PIN8,
  90         /* DISPLB */
  91         MX53_PAD_EIM_D20__IPU_SER_DISP0_CS,
  92         MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK,
  93         MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN,
  94         MX53_PAD_EIM_D23__IPU_DI0_D0_CS,
  95         /* DISP0_POWER_EN */
  96         MX53_PAD_EIM_D24__GPIO3_24,
  97         /* DISP0 DET INT */
  98         MX53_PAD_EIM_D31__GPIO3_31,
  99         /* LVDS */
 100         MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3,
 101         MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK,
 102         MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2,
 103         MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1,
 104         MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0,
 105         MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3,
 106         MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2,
 107         MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK,
 108         MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1,
 109         MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0,
 110         /* I2C1 */
 111         MX53_PAD_CSI0_DAT8__I2C1_SDA,
 112         MX53_PAD_CSI0_DAT9__I2C1_SCL,
 113         /* UART1 */
 114         MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
 115         MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,
 116         /* CSI0 */
 117         MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12,
 118         MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13,
 119         MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14,
 120         MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15,
 121         MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16,
 122         MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17,
 123         MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18,
 124         MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19,
 125         MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC,
 126         MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC,
 127         MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK,
 128         /* DISPLAY */
 129         MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK,
 130         MX53_PAD_DI0_PIN15__IPU_DI0_PIN15,
 131         MX53_PAD_DI0_PIN2__IPU_DI0_PIN2,
 132         MX53_PAD_DI0_PIN3__IPU_DI0_PIN3,
 133         MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0,
 134         MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1,
 135         MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2,
 136         MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3,
 137         MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4,
 138         MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5,
 139         MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6,
 140         MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7,
 141         MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8,
 142         MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9,
 143         MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10,
 144         MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11,
 145         MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12,
 146         MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13,
 147         MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14,
 148         MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15,
 149         MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16,
 150         MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17,
 151         MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18,
 152         MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19,
 153         MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20,
 154         MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21,
 155         MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22,
 156         MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23,
 157         /* Audio CLK*/
 158         MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK,
 159         /* PWM */
 160         MX53_PAD_GPIO_1__PWM2_PWMO,
 161         /* SPDIF */
 162         MX53_PAD_GPIO_7__SPDIF_PLOCK,
 163         MX53_PAD_GPIO_17__SPDIF_OUT1,
 164         /* GPIO */
 165         MX53_PAD_PATA_DA_1__GPIO7_7,
 166         MX53_PAD_PATA_DA_2__GPIO7_8,
 167         MX53_PAD_PATA_DATA5__GPIO2_5,
 168         MX53_PAD_PATA_DATA6__GPIO2_6,
 169         MX53_PAD_PATA_DATA14__GPIO2_14,
 170         MX53_PAD_PATA_DATA15__GPIO2_15,
 171         MX53_PAD_PATA_INTRQ__GPIO7_2,
 172         MX53_PAD_EIM_WAIT__GPIO5_0,
 173         MX53_PAD_NANDF_WP_B__GPIO6_9,
 174         MX53_PAD_NANDF_RB0__GPIO6_10,
 175         MX53_PAD_NANDF_CS1__GPIO6_14,
 176         MX53_PAD_NANDF_CS2__GPIO6_15,
 177         MX53_PAD_NANDF_CS3__GPIO6_16,
 178         MX53_PAD_GPIO_5__GPIO1_5,
 179         MX53_PAD_GPIO_16__GPIO7_11,
 180         MX53_PAD_GPIO_8__GPIO1_8,
 181 };
 182
 183 static inline void mx53_loco_fec_reset(void)
 184 {
 185         int ret;
 186
 187         /* reset FEC PHY */
 188         ret = gpio_request(LOCO_FEC_PHY_RST, "fec-phy-reset");
 189         if (ret) {
 190                 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
 191                 return;
 192         }
 193         gpio_direction_output(LOCO_FEC_PHY_RST, 0);
 194         msleep(1);
 195         gpio_set_value(LOCO_FEC_PHY_RST, 1);
 196 }
 197
 198 static struct fec_platform_data mx53_loco_fec_data = {
 199         .phy = PHY_INTERFACE_MODE_RMII,
 200 };
 201
 202 static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = {
 203         .bitrate = 100000,
 204 };
 205
 206 static void __init mx53_loco_board_init(void)
 207 {
 208         mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
 209                                         ARRAY_SIZE(mx53_loco_pads));
 210         imx53_add_imx_uart(0, NULL);
 211         mx53_loco_fec_reset();
 212         imx53_add_fec(&mx53_loco_fec_data);
 213         imx53_add_imx2_wdt(0, NULL);
 214         imx53_add_imx_i2c(0, &mx53_loco_i2c_data);
 215         imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
 216         imx53_add_sdhci_esdhc_imx(0, NULL);
 217         imx53_add_sdhci_esdhc_imx(2, NULL);
 218 }
 219
 220 static void __init mx53_loco_timer_init(void)
 221 {
 222         mx53_clocks_init(32768, 24000000, 0, 0);
 223 }
 224
 225 static struct sys_timer mx53_loco_timer = {
 226         .init   = mx53_loco_timer_init,
 227 };
 228
 229 MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
 230         .map_io = mx53_map_io,
 231         .init_early = imx53_init_early,
 232         .init_irq = mx53_init_irq,
 233         .timer = &mx53_loco_timer,
 234         .init_machine = mx53_loco_board_init,
 235 MACHINE_END