2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
26 #define BFA_IOC_TOV 3000 /* msecs */
27 #define BFA_IOC_HWSEM_TOV 500 /* msecs */
28 #define BFA_IOC_HB_TOV 500 /* msecs */
29 #define BFA_IOC_POLL_TOV 200 /* msecs */
32 * PCI device information required by IOC
38 void __iomem
*pci_bar_kva
;
42 * Structure used to remember the DMA-able memory block's KVA and Physical
46 void *kva
; /* ! Kernel virtual address */
47 u64 pa
; /* ! Physical address */
50 #define BFA_DMA_ALIGN_SZ 256
53 * smem size for Crossbow and Catapult
55 #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
56 #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
59 * @brief BFA dma address assignment macro. (big endian format)
61 #define bfa_dma_be_addr_set(dma_addr, pa) \
62 __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
64 __bfa_dma_be_addr_set(union bfi_addr_u
*dma_addr
, u64 pa
)
66 dma_addr
->a32
.addr_lo
= (u32
) htonl(pa
);
67 dma_addr
->a32
.addr_hi
= (u32
) htonl(upper_32_bits(pa
));
71 void __iomem
*hfn_mbox_cmd
;
72 void __iomem
*hfn_mbox
;
73 void __iomem
*lpu_mbox_cmd
;
74 void __iomem
*lpu_mbox
;
75 void __iomem
*pss_ctl_reg
;
76 void __iomem
*pss_err_status_reg
;
77 void __iomem
*app_pll_fast_ctl_reg
;
78 void __iomem
*app_pll_slow_ctl_reg
;
79 void __iomem
*ioc_sem_reg
;
80 void __iomem
*ioc_usage_sem_reg
;
81 void __iomem
*ioc_init_sem_reg
;
82 void __iomem
*ioc_usage_reg
;
83 void __iomem
*host_page_num_fn
;
84 void __iomem
*heartbeat
;
85 void __iomem
*ioc_fwstate
;
86 void __iomem
*alt_ioc_fwstate
;
87 void __iomem
*ll_halt
;
88 void __iomem
*alt_ll_halt
;
89 void __iomem
*err_set
;
90 void __iomem
*ioc_fail_sync
;
91 void __iomem
*shirq_isr_next
;
92 void __iomem
*shirq_msk_next
;
93 void __iomem
*smem_page_start
;
98 * IOC Mailbox structures
100 typedef void (*bfa_mbox_cmd_cbfn_t
)(void *cbarg
);
101 struct bfa_mbox_cmd
{
103 bfa_mbox_cmd_cbfn_t cbfn
;
105 u32 msg
[BFI_IOC_MSGSZ
];
111 typedef void (*bfa_ioc_mbox_mcfunc_t
)(void *cbarg
, struct bfi_mbmsg
*m
);
112 struct bfa_ioc_mbox_mod
{
113 struct list_head cmd_q
; /*!< pending mbox queue */
114 int nmclass
; /*!< number of handlers */
116 bfa_ioc_mbox_mcfunc_t cbfn
; /*!< message handlers */
118 } mbhdlr
[BFI_MC_MAX
];
122 * IOC callback function interfaces
124 typedef void (*bfa_ioc_enable_cbfn_t
)(void *bfa
, enum bfa_status status
);
125 typedef void (*bfa_ioc_disable_cbfn_t
)(void *bfa
);
126 typedef void (*bfa_ioc_hbfail_cbfn_t
)(void *bfa
);
127 typedef void (*bfa_ioc_reset_cbfn_t
)(void *bfa
);
128 struct bfa_ioc_cbfn
{
129 bfa_ioc_enable_cbfn_t enable_cbfn
;
130 bfa_ioc_disable_cbfn_t disable_cbfn
;
131 bfa_ioc_hbfail_cbfn_t hbfail_cbfn
;
132 bfa_ioc_reset_cbfn_t reset_cbfn
;
136 * IOC event notification mechanism.
139 BFA_IOC_E_ENABLED
= 1,
140 BFA_IOC_E_DISABLED
= 2,
141 BFA_IOC_E_FAILED
= 3,
144 typedef void (*bfa_ioc_notify_cbfn_t
)(void *, enum bfa_ioc_event
);
146 struct bfa_ioc_notify
{
148 bfa_ioc_notify_cbfn_t cbfn
;
153 * Heartbeat failure notification queue element.
155 struct bfa_ioc_hbfail_notify
{
157 bfa_ioc_hbfail_cbfn_t cbfn
;
162 * Initialize a heartbeat failure notification structure
164 #define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
165 (__notify)->cbfn = (__cbfn); \
166 (__notify)->cbarg = (__cbarg); \
172 bool fw_mismatch_notified
;
180 struct bfa_pcidev pcidev
;
181 struct timer_list ioc_timer
;
182 struct timer_list iocpf_timer
;
183 struct timer_list sem_timer
;
184 struct timer_list hb_timer
;
186 struct list_head notify_q
;
189 bool dbg_fwsave_once
;
190 enum bfi_pcifn_class clscode
;
191 struct bfa_ioc_regs ioc_regs
;
192 struct bfa_ioc_drv_stats stats
;
195 bool stats_busy
; /*!< outstanding stats */
198 struct bfa_dma attr_dma
;
199 struct bfi_ioc_attr
*attr
;
200 struct bfa_ioc_cbfn
*cbfn
;
201 struct bfa_ioc_mbox_mod mbox_mod
;
202 struct bfa_ioc_hwif
*ioc_hwif
;
203 struct bfa_iocpf iocpf
;
204 enum bfi_asic_gen asic_gen
;
205 enum bfi_asic_mode asic_mode
;
206 enum bfi_port_mode port0_mode
;
207 enum bfi_port_mode port1_mode
;
208 enum bfa_mode port_mode
;
209 u8 ad_cap_bm
; /*!< adapter cap bit mask */
210 u8 port_mode_cfg
; /*!< config port mode */
213 struct bfa_ioc_hwif
{
214 enum bfa_status (*ioc_pll_init
) (void __iomem
*rb
,
215 enum bfi_asic_mode m
);
216 bool (*ioc_firmware_lock
) (struct bfa_ioc
*ioc
);
217 void (*ioc_firmware_unlock
) (struct bfa_ioc
*ioc
);
218 void (*ioc_reg_init
) (struct bfa_ioc
*ioc
);
219 void (*ioc_map_port
) (struct bfa_ioc
*ioc
);
220 void (*ioc_isr_mode_set
) (struct bfa_ioc
*ioc
,
222 void (*ioc_notify_fail
) (struct bfa_ioc
*ioc
);
223 void (*ioc_ownership_reset
) (struct bfa_ioc
*ioc
);
224 bool (*ioc_sync_start
) (struct bfa_ioc
*ioc
);
225 void (*ioc_sync_join
) (struct bfa_ioc
*ioc
);
226 void (*ioc_sync_leave
) (struct bfa_ioc
*ioc
);
227 void (*ioc_sync_ack
) (struct bfa_ioc
*ioc
);
228 bool (*ioc_sync_complete
) (struct bfa_ioc
*ioc
);
229 bool (*ioc_lpu_read_stat
) (struct bfa_ioc
*ioc
);
232 #define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
233 #define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
234 #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
235 #define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
236 #define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen)
237 #define bfa_ioc_fetch_stats(__ioc, __stats) \
238 (((__stats)->drv_stats) = (__ioc)->stats)
239 #define bfa_ioc_clr_stats(__ioc) \
240 memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
241 #define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
242 #define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
243 #define bfa_ioc_speed_sup(__ioc) \
244 BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
245 #define bfa_ioc_get_nports(__ioc) \
246 BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
248 #define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
249 #define bfa_ioc_stats_hb_count(_ioc, _hb_count) \
250 ((_ioc)->stats.hb_count = (_hb_count))
251 #define BFA_IOC_FWIMG_MINSZ (16 * 1024)
252 #define BFA_IOC_FW_SMEM_SIZE(__ioc) \
253 ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
254 ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
255 #define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
256 #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
257 #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
260 * IOC mailbox interface
262 bool bfa_nw_ioc_mbox_queue(struct bfa_ioc
*ioc
,
263 struct bfa_mbox_cmd
*cmd
,
264 bfa_mbox_cmd_cbfn_t cbfn
, void *cbarg
);
265 void bfa_nw_ioc_mbox_isr(struct bfa_ioc
*ioc
);
266 void bfa_nw_ioc_mbox_regisr(struct bfa_ioc
*ioc
, enum bfi_mclass mc
,
267 bfa_ioc_mbox_mcfunc_t cbfn
, void *cbarg
);
273 #define bfa_ioc_pll_init_asic(__ioc) \
274 ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
277 #define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
278 if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
279 ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
281 #define bfa_ioc_ownership_reset(__ioc) \
282 ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
284 #define bfa_ioc_lpu_read_stat(__ioc) do { \
285 if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
286 ((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
289 void bfa_nw_ioc_set_ct_hwif(struct bfa_ioc
*ioc
);
291 void bfa_nw_ioc_attach(struct bfa_ioc
*ioc
, void *bfa
,
292 struct bfa_ioc_cbfn
*cbfn
);
293 void bfa_nw_ioc_auto_recover(bool auto_recover
);
294 void bfa_nw_ioc_detach(struct bfa_ioc
*ioc
);
295 void bfa_nw_ioc_pci_init(struct bfa_ioc
*ioc
, struct bfa_pcidev
*pcidev
,
296 enum bfi_pcifn_class clscode
);
297 u32
bfa_nw_ioc_meminfo(void);
298 void bfa_nw_ioc_mem_claim(struct bfa_ioc
*ioc
, u8
*dm_kva
, u64 dm_pa
);
299 void bfa_nw_ioc_enable(struct bfa_ioc
*ioc
);
300 void bfa_nw_ioc_disable(struct bfa_ioc
*ioc
);
302 void bfa_nw_ioc_error_isr(struct bfa_ioc
*ioc
);
303 bool bfa_nw_ioc_is_disabled(struct bfa_ioc
*ioc
);
304 void bfa_nw_ioc_get_attr(struct bfa_ioc
*ioc
, struct bfa_ioc_attr
*ioc_attr
);
305 void bfa_nw_ioc_notify_register(struct bfa_ioc
*ioc
,
306 struct bfa_ioc_notify
*notify
);
307 bool bfa_nw_ioc_sem_get(void __iomem
*sem_reg
);
308 void bfa_nw_ioc_sem_release(void __iomem
*sem_reg
);
309 void bfa_nw_ioc_hw_sem_release(struct bfa_ioc
*ioc
);
310 void bfa_nw_ioc_fwver_get(struct bfa_ioc
*ioc
,
311 struct bfi_ioc_image_hdr
*fwhdr
);
312 bool bfa_nw_ioc_fwver_cmp(struct bfa_ioc
*ioc
,
313 struct bfi_ioc_image_hdr
*fwhdr
);
314 mac_t
bfa_nw_ioc_get_mac(struct bfa_ioc
*ioc
);
319 void bfa_nw_ioc_timeout(void *ioc
);
320 void bfa_nw_ioc_hb_check(void *ioc
);
321 void bfa_nw_iocpf_timeout(void *ioc
);
322 void bfa_nw_iocpf_sem_timeout(void *ioc
);
325 * F/W Image Size & Chunk
327 u32
*bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen
, u32 off
);
328 u32
bfa_cb_image_get_size(enum bfi_asic_gen asic_gen
);
330 #endif /* __BFA_IOC_H__ */