usb: fix number of mapped SG DMA entries
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / xhci.c
blob221f14e1fddbfcc29542f5bbd853aaecf63965ae
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
30 #include "xhci.h"
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
57 u32 result;
59 do {
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
62 return -ENODEV;
63 result &= mask;
64 if (result == done)
65 return 0;
66 udelay(1);
67 usec--;
68 } while (usec > 0);
69 return -ETIMEDOUT;
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
77 u32 halted;
78 u32 cmd;
79 u32 mask;
81 mask = ~(XHCI_IRQS);
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83 if (!halted)
84 mask &= ~CMD_RUN;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
87 cmd &= mask;
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 ms of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
99 int xhci_halt(struct xhci_hcd *xhci)
101 int ret;
102 xhci_dbg(xhci, "// Halt the HC\n");
103 xhci_quiesce(xhci);
105 ret = handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107 if (!ret)
108 xhci->xhc_state |= XHCI_STATE_HALTED;
109 return ret;
113 * Set the run bit and wait for the host to be running.
115 static int xhci_start(struct xhci_hcd *xhci)
117 u32 temp;
118 int ret;
120 temp = xhci_readl(xhci, &xhci->op_regs->command);
121 temp |= (CMD_RUN);
122 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123 temp);
124 xhci_writel(xhci, temp, &xhci->op_regs->command);
127 * Wait for the HCHalted Status bit to be 0 to indicate the host is
128 * running.
130 ret = handshake(xhci, &xhci->op_regs->status,
131 STS_HALT, 0, XHCI_MAX_HALT_USEC);
132 if (ret == -ETIMEDOUT)
133 xhci_err(xhci, "Host took too long to start, "
134 "waited %u microseconds.\n",
135 XHCI_MAX_HALT_USEC);
136 if (!ret)
137 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138 return ret;
142 * Reset a halted HC.
144 * This resets pipelines, timers, counters, state machines, etc.
145 * Transactions will be terminated immediately, and operational registers
146 * will be set to their defaults.
148 int xhci_reset(struct xhci_hcd *xhci)
150 u32 command;
151 u32 state;
152 int ret;
154 state = xhci_readl(xhci, &xhci->op_regs->status);
155 if ((state & STS_HALT) == 0) {
156 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157 return 0;
160 xhci_dbg(xhci, "// Reset the HC\n");
161 command = xhci_readl(xhci, &xhci->op_regs->command);
162 command |= CMD_RESET;
163 xhci_writel(xhci, command, &xhci->op_regs->command);
165 ret = handshake(xhci, &xhci->op_regs->command,
166 CMD_RESET, 0, 250 * 1000);
167 if (ret)
168 return ret;
170 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
172 * xHCI cannot write to any doorbells or operational registers other
173 * than status until the "Controller Not Ready" flag is cleared.
175 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
179 * Free IRQs
180 * free all IRQs request
182 static void xhci_free_irq(struct xhci_hcd *xhci)
184 int i;
185 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
187 /* return if using legacy interrupt */
188 if (xhci_to_hcd(xhci)->irq >= 0)
189 return;
191 if (xhci->msix_entries) {
192 for (i = 0; i < xhci->msix_count; i++)
193 if (xhci->msix_entries[i].vector)
194 free_irq(xhci->msix_entries[i].vector,
195 xhci_to_hcd(xhci));
196 } else if (pdev->irq >= 0)
197 free_irq(pdev->irq, xhci_to_hcd(xhci));
199 return;
203 * Set up MSI
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
207 int ret;
208 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
210 ret = pci_enable_msi(pdev);
211 if (ret) {
212 xhci_err(xhci, "failed to allocate MSI entry\n");
213 return ret;
216 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217 0, "xhci_hcd", xhci_to_hcd(xhci));
218 if (ret) {
219 xhci_err(xhci, "disable MSI interrupt\n");
220 pci_disable_msi(pdev);
223 return ret;
227 * Set up MSI-X
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
231 int i, ret = 0;
232 struct usb_hcd *hcd = xhci_to_hcd(xhci);
233 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
236 * calculate number of msi-x vectors supported.
237 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238 * with max number of interrupters based on the xhci HCSPARAMS1.
239 * - num_online_cpus: maximum msi-x vectors per CPUs core.
240 * Add additional 1 vector to ensure always available interrupt.
242 xhci->msix_count = min(num_online_cpus() + 1,
243 HCS_MAX_INTRS(xhci->hcs_params1));
245 xhci->msix_entries =
246 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247 GFP_KERNEL);
248 if (!xhci->msix_entries) {
249 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250 return -ENOMEM;
253 for (i = 0; i < xhci->msix_count; i++) {
254 xhci->msix_entries[i].entry = i;
255 xhci->msix_entries[i].vector = 0;
258 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259 if (ret) {
260 xhci_err(xhci, "Failed to enable MSI-X\n");
261 goto free_entries;
264 for (i = 0; i < xhci->msix_count; i++) {
265 ret = request_irq(xhci->msix_entries[i].vector,
266 (irq_handler_t)xhci_msi_irq,
267 0, "xhci_hcd", xhci_to_hcd(xhci));
268 if (ret)
269 goto disable_msix;
272 hcd->msix_enabled = 1;
273 return ret;
275 disable_msix:
276 xhci_err(xhci, "disable MSI-X interrupt\n");
277 xhci_free_irq(xhci);
278 pci_disable_msix(pdev);
279 free_entries:
280 kfree(xhci->msix_entries);
281 xhci->msix_entries = NULL;
282 return ret;
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
288 struct usb_hcd *hcd = xhci_to_hcd(xhci);
289 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
291 xhci_free_irq(xhci);
293 if (xhci->msix_entries) {
294 pci_disable_msix(pdev);
295 kfree(xhci->msix_entries);
296 xhci->msix_entries = NULL;
297 } else {
298 pci_disable_msi(pdev);
301 hcd->msix_enabled = 0;
302 return;
306 * Initialize memory for HCD and xHC (one-time init).
308 * Program the PAGESIZE register, initialize the device context array, create
309 * device contexts (?), set up a command ring segment (or two?), create event
310 * ring (one for now).
312 int xhci_init(struct usb_hcd *hcd)
314 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315 int retval = 0;
317 xhci_dbg(xhci, "xhci_init\n");
318 spin_lock_init(&xhci->lock);
319 if (link_quirk) {
320 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322 } else {
323 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
325 retval = xhci_mem_init(xhci, GFP_KERNEL);
326 xhci_dbg(xhci, "Finished xhci_init\n");
328 return retval;
331 /*-------------------------------------------------------------------------*/
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
337 unsigned long flags;
338 int temp;
339 u64 temp_64;
340 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341 int i, j;
343 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
345 spin_lock_irqsave(&xhci->lock, flags);
346 temp = xhci_readl(xhci, &xhci->op_regs->status);
347 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
349 (xhci->xhc_state & XHCI_STATE_HALTED)) {
350 xhci_dbg(xhci, "HW died, polling stopped.\n");
351 spin_unlock_irqrestore(&xhci->lock, flags);
352 return;
355 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
356 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
357 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
358 xhci->error_bitmask = 0;
359 xhci_dbg(xhci, "Event ring:\n");
360 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
361 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
362 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
363 temp_64 &= ~ERST_PTR_MASK;
364 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
365 xhci_dbg(xhci, "Command ring:\n");
366 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
367 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
368 xhci_dbg_cmd_ptrs(xhci);
369 for (i = 0; i < MAX_HC_SLOTS; ++i) {
370 if (!xhci->devs[i])
371 continue;
372 for (j = 0; j < 31; ++j) {
373 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
376 spin_unlock_irqrestore(&xhci->lock, flags);
378 if (!xhci->zombie)
379 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
380 else
381 xhci_dbg(xhci, "Quit polling the event ring.\n");
383 #endif
385 static int xhci_run_finished(struct xhci_hcd *xhci)
387 if (xhci_start(xhci)) {
388 xhci_halt(xhci);
389 return -ENODEV;
391 xhci->shared_hcd->state = HC_STATE_RUNNING;
393 if (xhci->quirks & XHCI_NEC_HOST)
394 xhci_ring_cmd_db(xhci);
396 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
397 return 0;
401 * Start the HC after it was halted.
403 * This function is called by the USB core when the HC driver is added.
404 * Its opposite is xhci_stop().
406 * xhci_init() must be called once before this function can be called.
407 * Reset the HC, enable device slot contexts, program DCBAAP, and
408 * set command ring pointer and event ring pointer.
410 * Setup MSI-X vectors and enable interrupts.
412 int xhci_run(struct usb_hcd *hcd)
414 u32 temp;
415 u64 temp_64;
416 u32 ret;
417 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
418 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
420 /* Start the xHCI host controller running only after the USB 2.0 roothub
421 * is setup.
424 hcd->uses_new_polling = 1;
425 if (!usb_hcd_is_primary_hcd(hcd))
426 return xhci_run_finished(xhci);
428 xhci_dbg(xhci, "xhci_run\n");
429 /* unregister the legacy interrupt */
430 if (hcd->irq)
431 free_irq(hcd->irq, hcd);
432 hcd->irq = -1;
434 /* Some Fresco Logic host controllers advertise MSI, but fail to
435 * generate interrupts. Don't even try to enable MSI.
437 if (xhci->quirks & XHCI_BROKEN_MSI)
438 goto legacy_irq;
440 ret = xhci_setup_msix(xhci);
441 if (ret)
442 /* fall back to msi*/
443 ret = xhci_setup_msi(xhci);
445 if (ret) {
446 legacy_irq:
447 /* fall back to legacy interrupt*/
448 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
449 hcd->irq_descr, hcd);
450 if (ret) {
451 xhci_err(xhci, "request interrupt %d failed\n",
452 pdev->irq);
453 return ret;
455 hcd->irq = pdev->irq;
458 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
459 init_timer(&xhci->event_ring_timer);
460 xhci->event_ring_timer.data = (unsigned long) xhci;
461 xhci->event_ring_timer.function = xhci_event_ring_work;
462 /* Poll the event ring */
463 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
464 xhci->zombie = 0;
465 xhci_dbg(xhci, "Setting event ring polling timer\n");
466 add_timer(&xhci->event_ring_timer);
467 #endif
469 xhci_dbg(xhci, "Command ring memory map follows:\n");
470 xhci_debug_ring(xhci, xhci->cmd_ring);
471 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
472 xhci_dbg_cmd_ptrs(xhci);
474 xhci_dbg(xhci, "ERST memory map follows:\n");
475 xhci_dbg_erst(xhci, &xhci->erst);
476 xhci_dbg(xhci, "Event ring:\n");
477 xhci_debug_ring(xhci, xhci->event_ring);
478 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
479 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
480 temp_64 &= ~ERST_PTR_MASK;
481 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
483 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
484 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
485 temp &= ~ER_IRQ_INTERVAL_MASK;
486 temp |= (u32) 160;
487 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
489 /* Set the HCD state before we enable the irqs */
490 temp = xhci_readl(xhci, &xhci->op_regs->command);
491 temp |= (CMD_EIE);
492 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
493 temp);
494 xhci_writel(xhci, temp, &xhci->op_regs->command);
496 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
497 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
498 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
499 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
500 &xhci->ir_set->irq_pending);
501 xhci_print_ir_set(xhci, 0);
503 if (xhci->quirks & XHCI_NEC_HOST)
504 xhci_queue_vendor_command(xhci, 0, 0, 0,
505 TRB_TYPE(TRB_NEC_GET_FW));
507 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
508 return 0;
511 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
513 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
515 spin_lock_irq(&xhci->lock);
516 xhci_halt(xhci);
518 /* The shared_hcd is going to be deallocated shortly (the USB core only
519 * calls this function when allocation fails in usb_add_hcd(), or
520 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
522 xhci->shared_hcd = NULL;
523 spin_unlock_irq(&xhci->lock);
527 * Stop xHCI driver.
529 * This function is called by the USB core when the HC driver is removed.
530 * Its opposite is xhci_run().
532 * Disable device contexts, disable IRQs, and quiesce the HC.
533 * Reset the HC, finish any completed transactions, and cleanup memory.
535 void xhci_stop(struct usb_hcd *hcd)
537 u32 temp;
538 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
540 if (!usb_hcd_is_primary_hcd(hcd)) {
541 xhci_only_stop_hcd(xhci->shared_hcd);
542 return;
545 spin_lock_irq(&xhci->lock);
546 /* Make sure the xHC is halted for a USB3 roothub
547 * (xhci_stop() could be called as part of failed init).
549 xhci_halt(xhci);
550 xhci_reset(xhci);
551 spin_unlock_irq(&xhci->lock);
553 xhci_cleanup_msix(xhci);
555 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
556 /* Tell the event ring poll function not to reschedule */
557 xhci->zombie = 1;
558 del_timer_sync(&xhci->event_ring_timer);
559 #endif
561 if (xhci->quirks & XHCI_AMD_PLL_FIX)
562 usb_amd_dev_put();
564 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
565 temp = xhci_readl(xhci, &xhci->op_regs->status);
566 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
567 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
568 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
569 &xhci->ir_set->irq_pending);
570 xhci_print_ir_set(xhci, 0);
572 xhci_dbg(xhci, "cleaning up memory\n");
573 xhci_mem_cleanup(xhci);
574 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
575 xhci_readl(xhci, &xhci->op_regs->status));
579 * Shutdown HC (not bus-specific)
581 * This is called when the machine is rebooting or halting. We assume that the
582 * machine will be powered off, and the HC's internal state will be reset.
583 * Don't bother to free memory.
585 * This will only ever be called with the main usb_hcd (the USB3 roothub).
587 void xhci_shutdown(struct usb_hcd *hcd)
589 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
591 spin_lock_irq(&xhci->lock);
592 xhci_halt(xhci);
593 spin_unlock_irq(&xhci->lock);
595 xhci_cleanup_msix(xhci);
597 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
598 xhci_readl(xhci, &xhci->op_regs->status));
601 #ifdef CONFIG_PM
602 static void xhci_save_registers(struct xhci_hcd *xhci)
604 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
605 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
606 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
607 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
608 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
609 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
610 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
611 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
612 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
615 static void xhci_restore_registers(struct xhci_hcd *xhci)
617 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
618 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
619 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
620 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
621 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
622 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
623 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
624 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
627 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
629 u64 val_64;
631 /* step 2: initialize command ring buffer */
632 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
633 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
634 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
635 xhci->cmd_ring->dequeue) &
636 (u64) ~CMD_RING_RSVD_BITS) |
637 xhci->cmd_ring->cycle_state;
638 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
639 (long unsigned long) val_64);
640 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
644 * The whole command ring must be cleared to zero when we suspend the host.
646 * The host doesn't save the command ring pointer in the suspend well, so we
647 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
648 * aligned, because of the reserved bits in the command ring dequeue pointer
649 * register. Therefore, we can't just set the dequeue pointer back in the
650 * middle of the ring (TRBs are 16-byte aligned).
652 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
654 struct xhci_ring *ring;
655 struct xhci_segment *seg;
657 ring = xhci->cmd_ring;
658 seg = ring->deq_seg;
659 do {
660 memset(seg->trbs, 0,
661 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
662 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
663 cpu_to_le32(~TRB_CYCLE);
664 seg = seg->next;
665 } while (seg != ring->deq_seg);
667 /* Reset the software enqueue and dequeue pointers */
668 ring->deq_seg = ring->first_seg;
669 ring->dequeue = ring->first_seg->trbs;
670 ring->enq_seg = ring->deq_seg;
671 ring->enqueue = ring->dequeue;
674 * Ring is now zeroed, so the HW should look for change of ownership
675 * when the cycle bit is set to 1.
677 ring->cycle_state = 1;
680 * Reset the hardware dequeue pointer.
681 * Yes, this will need to be re-written after resume, but we're paranoid
682 * and want to make sure the hardware doesn't access bogus memory
683 * because, say, the BIOS or an SMI started the host without changing
684 * the command ring pointers.
686 xhci_set_cmd_ring_deq(xhci);
690 * Stop HC (not bus-specific)
692 * This is called when the machine transition into S3/S4 mode.
695 int xhci_suspend(struct xhci_hcd *xhci)
697 int rc = 0;
698 struct usb_hcd *hcd = xhci_to_hcd(xhci);
699 u32 command;
700 int i;
702 spin_lock_irq(&xhci->lock);
703 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
704 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
705 /* step 1: stop endpoint */
706 /* skipped assuming that port suspend has done */
708 /* step 2: clear Run/Stop bit */
709 command = xhci_readl(xhci, &xhci->op_regs->command);
710 command &= ~CMD_RUN;
711 xhci_writel(xhci, command, &xhci->op_regs->command);
712 if (handshake(xhci, &xhci->op_regs->status,
713 STS_HALT, STS_HALT, 100*100)) {
714 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
715 spin_unlock_irq(&xhci->lock);
716 return -ETIMEDOUT;
718 xhci_clear_command_ring(xhci);
720 /* step 3: save registers */
721 xhci_save_registers(xhci);
723 /* step 4: set CSS flag */
724 command = xhci_readl(xhci, &xhci->op_regs->command);
725 command |= CMD_CSS;
726 xhci_writel(xhci, command, &xhci->op_regs->command);
727 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
728 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
729 spin_unlock_irq(&xhci->lock);
730 return -ETIMEDOUT;
732 spin_unlock_irq(&xhci->lock);
734 /* step 5: remove core well power */
735 /* synchronize irq when using MSI-X */
736 if (xhci->msix_entries) {
737 for (i = 0; i < xhci->msix_count; i++)
738 synchronize_irq(xhci->msix_entries[i].vector);
741 return rc;
745 * start xHC (not bus-specific)
747 * This is called when the machine transition from S3/S4 mode.
750 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
752 u32 command, temp = 0;
753 struct usb_hcd *hcd = xhci_to_hcd(xhci);
754 struct usb_hcd *secondary_hcd;
755 int retval = 0;
757 /* Wait a bit if either of the roothubs need to settle from the
758 * transition into bus suspend.
760 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
761 time_before(jiffies,
762 xhci->bus_state[1].next_statechange))
763 msleep(100);
765 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
766 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
768 spin_lock_irq(&xhci->lock);
769 if (xhci->quirks & XHCI_RESET_ON_RESUME)
770 hibernated = true;
772 if (!hibernated) {
773 /* step 1: restore register */
774 xhci_restore_registers(xhci);
775 /* step 2: initialize command ring buffer */
776 xhci_set_cmd_ring_deq(xhci);
777 /* step 3: restore state and start state*/
778 /* step 3: set CRS flag */
779 command = xhci_readl(xhci, &xhci->op_regs->command);
780 command |= CMD_CRS;
781 xhci_writel(xhci, command, &xhci->op_regs->command);
782 if (handshake(xhci, &xhci->op_regs->status,
783 STS_RESTORE, 0, 10*100)) {
784 xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
785 spin_unlock_irq(&xhci->lock);
786 return -ETIMEDOUT;
788 temp = xhci_readl(xhci, &xhci->op_regs->status);
791 /* If restore operation fails, re-initialize the HC during resume */
792 if ((temp & STS_SRE) || hibernated) {
793 /* Let the USB core know _both_ roothubs lost power. */
794 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
795 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
797 xhci_dbg(xhci, "Stop HCD\n");
798 xhci_halt(xhci);
799 xhci_reset(xhci);
800 spin_unlock_irq(&xhci->lock);
801 xhci_cleanup_msix(xhci);
803 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
804 /* Tell the event ring poll function not to reschedule */
805 xhci->zombie = 1;
806 del_timer_sync(&xhci->event_ring_timer);
807 #endif
809 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
810 temp = xhci_readl(xhci, &xhci->op_regs->status);
811 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
812 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
813 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
814 &xhci->ir_set->irq_pending);
815 xhci_print_ir_set(xhci, 0);
817 xhci_dbg(xhci, "cleaning up memory\n");
818 xhci_mem_cleanup(xhci);
819 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
820 xhci_readl(xhci, &xhci->op_regs->status));
822 /* USB core calls the PCI reinit and start functions twice:
823 * first with the primary HCD, and then with the secondary HCD.
824 * If we don't do the same, the host will never be started.
826 if (!usb_hcd_is_primary_hcd(hcd))
827 secondary_hcd = hcd;
828 else
829 secondary_hcd = xhci->shared_hcd;
831 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
832 retval = xhci_init(hcd->primary_hcd);
833 if (retval)
834 return retval;
835 xhci_dbg(xhci, "Start the primary HCD\n");
836 retval = xhci_run(hcd->primary_hcd);
837 if (!retval) {
838 xhci_dbg(xhci, "Start the secondary HCD\n");
839 retval = xhci_run(secondary_hcd);
841 hcd->state = HC_STATE_SUSPENDED;
842 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
843 goto done;
846 /* step 4: set Run/Stop bit */
847 command = xhci_readl(xhci, &xhci->op_regs->command);
848 command |= CMD_RUN;
849 xhci_writel(xhci, command, &xhci->op_regs->command);
850 handshake(xhci, &xhci->op_regs->status, STS_HALT,
851 0, 250 * 1000);
853 /* step 5: walk topology and initialize portsc,
854 * portpmsc and portli
856 /* this is done in bus_resume */
858 /* step 6: restart each of the previously
859 * Running endpoints by ringing their doorbells
862 spin_unlock_irq(&xhci->lock);
864 done:
865 if (retval == 0) {
866 usb_hcd_resume_root_hub(hcd);
867 usb_hcd_resume_root_hub(xhci->shared_hcd);
869 return retval;
871 #endif /* CONFIG_PM */
873 /*-------------------------------------------------------------------------*/
876 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
877 * HCDs. Find the index for an endpoint given its descriptor. Use the return
878 * value to right shift 1 for the bitmask.
880 * Index = (epnum * 2) + direction - 1,
881 * where direction = 0 for OUT, 1 for IN.
882 * For control endpoints, the IN index is used (OUT index is unused), so
883 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
885 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
887 unsigned int index;
888 if (usb_endpoint_xfer_control(desc))
889 index = (unsigned int) (usb_endpoint_num(desc)*2);
890 else
891 index = (unsigned int) (usb_endpoint_num(desc)*2) +
892 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
893 return index;
896 /* Find the flag for this endpoint (for use in the control context). Use the
897 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
898 * bit 1, etc.
900 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
902 return 1 << (xhci_get_endpoint_index(desc) + 1);
905 /* Find the flag for this endpoint (for use in the control context). Use the
906 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
907 * bit 1, etc.
909 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
911 return 1 << (ep_index + 1);
914 /* Compute the last valid endpoint context index. Basically, this is the
915 * endpoint index plus one. For slot contexts with more than valid endpoint,
916 * we find the most significant bit set in the added contexts flags.
917 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
918 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
920 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
922 return fls(added_ctxs) - 1;
925 /* Returns 1 if the arguments are OK;
926 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
928 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
929 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
930 const char *func) {
931 struct xhci_hcd *xhci;
932 struct xhci_virt_device *virt_dev;
934 if (!hcd || (check_ep && !ep) || !udev) {
935 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
936 func);
937 return -EINVAL;
939 if (!udev->parent) {
940 printk(KERN_DEBUG "xHCI %s called for root hub\n",
941 func);
942 return 0;
945 xhci = hcd_to_xhci(hcd);
946 if (xhci->xhc_state & XHCI_STATE_HALTED)
947 return -ENODEV;
949 if (check_virt_dev) {
950 if (!udev->slot_id || !xhci->devs
951 || !xhci->devs[udev->slot_id]) {
952 printk(KERN_DEBUG "xHCI %s called with unaddressed "
953 "device\n", func);
954 return -EINVAL;
957 virt_dev = xhci->devs[udev->slot_id];
958 if (virt_dev->udev != udev) {
959 printk(KERN_DEBUG "xHCI %s called with udev and "
960 "virt_dev does not match\n", func);
961 return -EINVAL;
965 return 1;
968 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
969 struct usb_device *udev, struct xhci_command *command,
970 bool ctx_change, bool must_succeed);
973 * Full speed devices may have a max packet size greater than 8 bytes, but the
974 * USB core doesn't know that until it reads the first 8 bytes of the
975 * descriptor. If the usb_device's max packet size changes after that point,
976 * we need to issue an evaluate context command and wait on it.
978 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
979 unsigned int ep_index, struct urb *urb)
981 struct xhci_container_ctx *in_ctx;
982 struct xhci_container_ctx *out_ctx;
983 struct xhci_input_control_ctx *ctrl_ctx;
984 struct xhci_ep_ctx *ep_ctx;
985 int max_packet_size;
986 int hw_max_packet_size;
987 int ret = 0;
989 out_ctx = xhci->devs[slot_id]->out_ctx;
990 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
991 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
992 max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
993 if (hw_max_packet_size != max_packet_size) {
994 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
995 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
996 max_packet_size);
997 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
998 hw_max_packet_size);
999 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1001 /* Set up the modified control endpoint 0 */
1002 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1003 xhci->devs[slot_id]->out_ctx, ep_index);
1004 in_ctx = xhci->devs[slot_id]->in_ctx;
1005 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1006 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1007 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1009 /* Set up the input context flags for the command */
1010 /* FIXME: This won't work if a non-default control endpoint
1011 * changes max packet sizes.
1013 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1014 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1015 ctrl_ctx->drop_flags = 0;
1017 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1018 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1019 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1020 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1022 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1023 true, false);
1025 /* Clean up the input context for later use by bandwidth
1026 * functions.
1028 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1030 return ret;
1034 * non-error returns are a promise to giveback() the urb later
1035 * we drop ownership so next owner (or urb unlink) can get it
1037 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1039 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1040 unsigned long flags;
1041 int ret = 0;
1042 unsigned int slot_id, ep_index;
1043 struct urb_priv *urb_priv;
1044 int size, i;
1046 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1047 true, true, __func__) <= 0)
1048 return -EINVAL;
1050 slot_id = urb->dev->slot_id;
1051 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1053 if (!HCD_HW_ACCESSIBLE(hcd)) {
1054 if (!in_interrupt())
1055 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1056 ret = -ESHUTDOWN;
1057 goto exit;
1060 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1061 size = urb->number_of_packets;
1062 else
1063 size = 1;
1065 urb_priv = kzalloc(sizeof(struct urb_priv) +
1066 size * sizeof(struct xhci_td *), mem_flags);
1067 if (!urb_priv)
1068 return -ENOMEM;
1070 for (i = 0; i < size; i++) {
1071 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1072 if (!urb_priv->td[i]) {
1073 urb_priv->length = i;
1074 xhci_urb_free_priv(xhci, urb_priv);
1075 return -ENOMEM;
1079 urb_priv->length = size;
1080 urb_priv->td_cnt = 0;
1081 urb->hcpriv = urb_priv;
1083 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1084 /* Check to see if the max packet size for the default control
1085 * endpoint changed during FS device enumeration
1087 if (urb->dev->speed == USB_SPEED_FULL) {
1088 ret = xhci_check_maxpacket(xhci, slot_id,
1089 ep_index, urb);
1090 if (ret < 0) {
1091 xhci_urb_free_priv(xhci, urb_priv);
1092 urb->hcpriv = NULL;
1093 return ret;
1097 /* We have a spinlock and interrupts disabled, so we must pass
1098 * atomic context to this function, which may allocate memory.
1100 spin_lock_irqsave(&xhci->lock, flags);
1101 if (xhci->xhc_state & XHCI_STATE_DYING)
1102 goto dying;
1103 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1104 slot_id, ep_index);
1105 if (ret)
1106 goto free_priv;
1107 spin_unlock_irqrestore(&xhci->lock, flags);
1108 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1109 spin_lock_irqsave(&xhci->lock, flags);
1110 if (xhci->xhc_state & XHCI_STATE_DYING)
1111 goto dying;
1112 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1113 EP_GETTING_STREAMS) {
1114 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1115 "is transitioning to using streams.\n");
1116 ret = -EINVAL;
1117 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1118 EP_GETTING_NO_STREAMS) {
1119 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1120 "is transitioning to "
1121 "not having streams.\n");
1122 ret = -EINVAL;
1123 } else {
1124 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1125 slot_id, ep_index);
1127 if (ret)
1128 goto free_priv;
1129 spin_unlock_irqrestore(&xhci->lock, flags);
1130 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1131 spin_lock_irqsave(&xhci->lock, flags);
1132 if (xhci->xhc_state & XHCI_STATE_DYING)
1133 goto dying;
1134 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1135 slot_id, ep_index);
1136 if (ret)
1137 goto free_priv;
1138 spin_unlock_irqrestore(&xhci->lock, flags);
1139 } else {
1140 spin_lock_irqsave(&xhci->lock, flags);
1141 if (xhci->xhc_state & XHCI_STATE_DYING)
1142 goto dying;
1143 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1144 slot_id, ep_index);
1145 if (ret)
1146 goto free_priv;
1147 spin_unlock_irqrestore(&xhci->lock, flags);
1149 exit:
1150 return ret;
1151 dying:
1152 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1153 "non-responsive xHCI host.\n",
1154 urb->ep->desc.bEndpointAddress, urb);
1155 ret = -ESHUTDOWN;
1156 free_priv:
1157 xhci_urb_free_priv(xhci, urb_priv);
1158 urb->hcpriv = NULL;
1159 spin_unlock_irqrestore(&xhci->lock, flags);
1160 return ret;
1163 /* Get the right ring for the given URB.
1164 * If the endpoint supports streams, boundary check the URB's stream ID.
1165 * If the endpoint doesn't support streams, return the singular endpoint ring.
1167 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1168 struct urb *urb)
1170 unsigned int slot_id;
1171 unsigned int ep_index;
1172 unsigned int stream_id;
1173 struct xhci_virt_ep *ep;
1175 slot_id = urb->dev->slot_id;
1176 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1177 stream_id = urb->stream_id;
1178 ep = &xhci->devs[slot_id]->eps[ep_index];
1179 /* Common case: no streams */
1180 if (!(ep->ep_state & EP_HAS_STREAMS))
1181 return ep->ring;
1183 if (stream_id == 0) {
1184 xhci_warn(xhci,
1185 "WARN: Slot ID %u, ep index %u has streams, "
1186 "but URB has no stream ID.\n",
1187 slot_id, ep_index);
1188 return NULL;
1191 if (stream_id < ep->stream_info->num_streams)
1192 return ep->stream_info->stream_rings[stream_id];
1194 xhci_warn(xhci,
1195 "WARN: Slot ID %u, ep index %u has "
1196 "stream IDs 1 to %u allocated, "
1197 "but stream ID %u is requested.\n",
1198 slot_id, ep_index,
1199 ep->stream_info->num_streams - 1,
1200 stream_id);
1201 return NULL;
1205 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1206 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1207 * should pick up where it left off in the TD, unless a Set Transfer Ring
1208 * Dequeue Pointer is issued.
1210 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1211 * the ring. Since the ring is a contiguous structure, they can't be physically
1212 * removed. Instead, there are two options:
1214 * 1) If the HC is in the middle of processing the URB to be canceled, we
1215 * simply move the ring's dequeue pointer past those TRBs using the Set
1216 * Transfer Ring Dequeue Pointer command. This will be the common case,
1217 * when drivers timeout on the last submitted URB and attempt to cancel.
1219 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1220 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1221 * HC will need to invalidate the any TRBs it has cached after the stop
1222 * endpoint command, as noted in the xHCI 0.95 errata.
1224 * 3) The TD may have completed by the time the Stop Endpoint Command
1225 * completes, so software needs to handle that case too.
1227 * This function should protect against the TD enqueueing code ringing the
1228 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1229 * It also needs to account for multiple cancellations on happening at the same
1230 * time for the same endpoint.
1232 * Note that this function can be called in any context, or so says
1233 * usb_hcd_unlink_urb()
1235 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1237 unsigned long flags;
1238 int ret, i;
1239 u32 temp;
1240 struct xhci_hcd *xhci;
1241 struct urb_priv *urb_priv;
1242 struct xhci_td *td;
1243 unsigned int ep_index;
1244 struct xhci_ring *ep_ring;
1245 struct xhci_virt_ep *ep;
1247 xhci = hcd_to_xhci(hcd);
1248 spin_lock_irqsave(&xhci->lock, flags);
1249 /* Make sure the URB hasn't completed or been unlinked already */
1250 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1251 if (ret || !urb->hcpriv)
1252 goto done;
1253 temp = xhci_readl(xhci, &xhci->op_regs->status);
1254 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1255 xhci_dbg(xhci, "HW died, freeing TD.\n");
1256 urb_priv = urb->hcpriv;
1257 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1258 td = urb_priv->td[i];
1259 if (!list_empty(&td->td_list))
1260 list_del_init(&td->td_list);
1261 if (!list_empty(&td->cancelled_td_list))
1262 list_del_init(&td->cancelled_td_list);
1265 usb_hcd_unlink_urb_from_ep(hcd, urb);
1266 spin_unlock_irqrestore(&xhci->lock, flags);
1267 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1268 xhci_urb_free_priv(xhci, urb_priv);
1269 return ret;
1271 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1272 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1273 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1274 "non-responsive xHCI host.\n",
1275 urb->ep->desc.bEndpointAddress, urb);
1276 /* Let the stop endpoint command watchdog timer (which set this
1277 * state) finish cleaning up the endpoint TD lists. We must
1278 * have caught it in the middle of dropping a lock and giving
1279 * back an URB.
1281 goto done;
1284 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1285 xhci_dbg(xhci, "Event ring:\n");
1286 xhci_debug_ring(xhci, xhci->event_ring);
1287 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1288 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1289 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1290 if (!ep_ring) {
1291 ret = -EINVAL;
1292 goto done;
1295 xhci_dbg(xhci, "Endpoint ring:\n");
1296 xhci_debug_ring(xhci, ep_ring);
1298 urb_priv = urb->hcpriv;
1300 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1301 td = urb_priv->td[i];
1302 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1305 /* Queue a stop endpoint command, but only if this is
1306 * the first cancellation to be handled.
1308 if (!(ep->ep_state & EP_HALT_PENDING)) {
1309 ep->ep_state |= EP_HALT_PENDING;
1310 ep->stop_cmds_pending++;
1311 ep->stop_cmd_timer.expires = jiffies +
1312 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1313 add_timer(&ep->stop_cmd_timer);
1314 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1315 xhci_ring_cmd_db(xhci);
1317 done:
1318 spin_unlock_irqrestore(&xhci->lock, flags);
1319 return ret;
1322 /* Drop an endpoint from a new bandwidth configuration for this device.
1323 * Only one call to this function is allowed per endpoint before
1324 * check_bandwidth() or reset_bandwidth() must be called.
1325 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1326 * add the endpoint to the schedule with possibly new parameters denoted by a
1327 * different endpoint descriptor in usb_host_endpoint.
1328 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1329 * not allowed.
1331 * The USB core will not allow URBs to be queued to an endpoint that is being
1332 * disabled, so there's no need for mutual exclusion to protect
1333 * the xhci->devs[slot_id] structure.
1335 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1336 struct usb_host_endpoint *ep)
1338 struct xhci_hcd *xhci;
1339 struct xhci_container_ctx *in_ctx, *out_ctx;
1340 struct xhci_input_control_ctx *ctrl_ctx;
1341 struct xhci_slot_ctx *slot_ctx;
1342 unsigned int last_ctx;
1343 unsigned int ep_index;
1344 struct xhci_ep_ctx *ep_ctx;
1345 u32 drop_flag;
1346 u32 new_add_flags, new_drop_flags, new_slot_info;
1347 int ret;
1349 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1350 if (ret <= 0)
1351 return ret;
1352 xhci = hcd_to_xhci(hcd);
1353 if (xhci->xhc_state & XHCI_STATE_DYING)
1354 return -ENODEV;
1356 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1357 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1358 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1359 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1360 __func__, drop_flag);
1361 return 0;
1364 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1365 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1366 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1367 ep_index = xhci_get_endpoint_index(&ep->desc);
1368 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1369 /* If the HC already knows the endpoint is disabled,
1370 * or the HCD has noted it is disabled, ignore this request
1372 if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
1373 EP_STATE_DISABLED ||
1374 le32_to_cpu(ctrl_ctx->drop_flags) &
1375 xhci_get_endpoint_flag(&ep->desc)) {
1376 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1377 __func__, ep);
1378 return 0;
1381 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1382 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1384 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1385 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1387 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1388 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1389 /* Update the last valid endpoint context, if we deleted the last one */
1390 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1391 LAST_CTX(last_ctx)) {
1392 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1393 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1395 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1397 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1399 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1400 (unsigned int) ep->desc.bEndpointAddress,
1401 udev->slot_id,
1402 (unsigned int) new_drop_flags,
1403 (unsigned int) new_add_flags,
1404 (unsigned int) new_slot_info);
1405 return 0;
1408 /* Add an endpoint to a new possible bandwidth configuration for this device.
1409 * Only one call to this function is allowed per endpoint before
1410 * check_bandwidth() or reset_bandwidth() must be called.
1411 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1412 * add the endpoint to the schedule with possibly new parameters denoted by a
1413 * different endpoint descriptor in usb_host_endpoint.
1414 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1415 * not allowed.
1417 * The USB core will not allow URBs to be queued to an endpoint until the
1418 * configuration or alt setting is installed in the device, so there's no need
1419 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1421 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1422 struct usb_host_endpoint *ep)
1424 struct xhci_hcd *xhci;
1425 struct xhci_container_ctx *in_ctx, *out_ctx;
1426 unsigned int ep_index;
1427 struct xhci_ep_ctx *ep_ctx;
1428 struct xhci_slot_ctx *slot_ctx;
1429 struct xhci_input_control_ctx *ctrl_ctx;
1430 u32 added_ctxs;
1431 unsigned int last_ctx;
1432 u32 new_add_flags, new_drop_flags, new_slot_info;
1433 struct xhci_virt_device *virt_dev;
1434 int ret = 0;
1436 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1437 if (ret <= 0) {
1438 /* So we won't queue a reset ep command for a root hub */
1439 ep->hcpriv = NULL;
1440 return ret;
1442 xhci = hcd_to_xhci(hcd);
1443 if (xhci->xhc_state & XHCI_STATE_DYING)
1444 return -ENODEV;
1446 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1447 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1448 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1449 /* FIXME when we have to issue an evaluate endpoint command to
1450 * deal with ep0 max packet size changing once we get the
1451 * descriptors
1453 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1454 __func__, added_ctxs);
1455 return 0;
1458 virt_dev = xhci->devs[udev->slot_id];
1459 in_ctx = virt_dev->in_ctx;
1460 out_ctx = virt_dev->out_ctx;
1461 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1462 ep_index = xhci_get_endpoint_index(&ep->desc);
1463 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1465 /* If this endpoint is already in use, and the upper layers are trying
1466 * to add it again without dropping it, reject the addition.
1468 if (virt_dev->eps[ep_index].ring &&
1469 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1470 xhci_get_endpoint_flag(&ep->desc))) {
1471 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1472 "without dropping it.\n",
1473 (unsigned int) ep->desc.bEndpointAddress);
1474 return -EINVAL;
1477 /* If the HCD has already noted the endpoint is enabled,
1478 * ignore this request.
1480 if (le32_to_cpu(ctrl_ctx->add_flags) &
1481 xhci_get_endpoint_flag(&ep->desc)) {
1482 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1483 __func__, ep);
1484 return 0;
1488 * Configuration and alternate setting changes must be done in
1489 * process context, not interrupt context (or so documenation
1490 * for usb_set_interface() and usb_set_configuration() claim).
1492 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1493 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1494 __func__, ep->desc.bEndpointAddress);
1495 return -ENOMEM;
1498 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1499 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1501 /* If xhci_endpoint_disable() was called for this endpoint, but the
1502 * xHC hasn't been notified yet through the check_bandwidth() call,
1503 * this re-adds a new state for the endpoint from the new endpoint
1504 * descriptors. We must drop and re-add this endpoint, so we leave the
1505 * drop flags alone.
1507 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1509 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1510 /* Update the last valid endpoint context, if we just added one past */
1511 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1512 LAST_CTX(last_ctx)) {
1513 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1514 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1516 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1518 /* Store the usb_device pointer for later use */
1519 ep->hcpriv = udev;
1521 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1522 (unsigned int) ep->desc.bEndpointAddress,
1523 udev->slot_id,
1524 (unsigned int) new_drop_flags,
1525 (unsigned int) new_add_flags,
1526 (unsigned int) new_slot_info);
1527 return 0;
1530 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1532 struct xhci_input_control_ctx *ctrl_ctx;
1533 struct xhci_ep_ctx *ep_ctx;
1534 struct xhci_slot_ctx *slot_ctx;
1535 int i;
1537 /* When a device's add flag and drop flag are zero, any subsequent
1538 * configure endpoint command will leave that endpoint's state
1539 * untouched. Make sure we don't leave any old state in the input
1540 * endpoint contexts.
1542 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1543 ctrl_ctx->drop_flags = 0;
1544 ctrl_ctx->add_flags = 0;
1545 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1546 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1547 /* Endpoint 0 is always valid */
1548 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1549 for (i = 1; i < 31; ++i) {
1550 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1551 ep_ctx->ep_info = 0;
1552 ep_ctx->ep_info2 = 0;
1553 ep_ctx->deq = 0;
1554 ep_ctx->tx_info = 0;
1558 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1559 struct usb_device *udev, u32 *cmd_status)
1561 int ret;
1563 switch (*cmd_status) {
1564 case COMP_ENOMEM:
1565 dev_warn(&udev->dev, "Not enough host controller resources "
1566 "for new device state.\n");
1567 ret = -ENOMEM;
1568 /* FIXME: can we allocate more resources for the HC? */
1569 break;
1570 case COMP_BW_ERR:
1571 dev_warn(&udev->dev, "Not enough bandwidth "
1572 "for new device state.\n");
1573 ret = -ENOSPC;
1574 /* FIXME: can we go back to the old state? */
1575 break;
1576 case COMP_TRB_ERR:
1577 /* the HCD set up something wrong */
1578 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1579 "add flag = 1, "
1580 "and endpoint is not disabled.\n");
1581 ret = -EINVAL;
1582 break;
1583 case COMP_DEV_ERR:
1584 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1585 "configure command.\n");
1586 ret = -ENODEV;
1587 break;
1588 case COMP_SUCCESS:
1589 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1590 ret = 0;
1591 break;
1592 default:
1593 xhci_err(xhci, "ERROR: unexpected command completion "
1594 "code 0x%x.\n", *cmd_status);
1595 ret = -EINVAL;
1596 break;
1598 return ret;
1601 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1602 struct usb_device *udev, u32 *cmd_status)
1604 int ret;
1605 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1607 switch (*cmd_status) {
1608 case COMP_EINVAL:
1609 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1610 "context command.\n");
1611 ret = -EINVAL;
1612 break;
1613 case COMP_EBADSLT:
1614 dev_warn(&udev->dev, "WARN: slot not enabled for"
1615 "evaluate context command.\n");
1616 case COMP_CTX_STATE:
1617 dev_warn(&udev->dev, "WARN: invalid context state for "
1618 "evaluate context command.\n");
1619 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1620 ret = -EINVAL;
1621 break;
1622 case COMP_DEV_ERR:
1623 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1624 "context command.\n");
1625 ret = -ENODEV;
1626 break;
1627 case COMP_MEL_ERR:
1628 /* Max Exit Latency too large error */
1629 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1630 ret = -EINVAL;
1631 break;
1632 case COMP_SUCCESS:
1633 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1634 ret = 0;
1635 break;
1636 default:
1637 xhci_err(xhci, "ERROR: unexpected command completion "
1638 "code 0x%x.\n", *cmd_status);
1639 ret = -EINVAL;
1640 break;
1642 return ret;
1645 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1646 struct xhci_container_ctx *in_ctx)
1648 struct xhci_input_control_ctx *ctrl_ctx;
1649 u32 valid_add_flags;
1650 u32 valid_drop_flags;
1652 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1653 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1654 * (bit 1). The default control endpoint is added during the Address
1655 * Device command and is never removed until the slot is disabled.
1657 valid_add_flags = ctrl_ctx->add_flags >> 2;
1658 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1660 /* Use hweight32 to count the number of ones in the add flags, or
1661 * number of endpoints added. Don't count endpoints that are changed
1662 * (both added and dropped).
1664 return hweight32(valid_add_flags) -
1665 hweight32(valid_add_flags & valid_drop_flags);
1668 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1669 struct xhci_container_ctx *in_ctx)
1671 struct xhci_input_control_ctx *ctrl_ctx;
1672 u32 valid_add_flags;
1673 u32 valid_drop_flags;
1675 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1676 valid_add_flags = ctrl_ctx->add_flags >> 2;
1677 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1679 return hweight32(valid_drop_flags) -
1680 hweight32(valid_add_flags & valid_drop_flags);
1684 * We need to reserve the new number of endpoints before the configure endpoint
1685 * command completes. We can't subtract the dropped endpoints from the number
1686 * of active endpoints until the command completes because we can oversubscribe
1687 * the host in this case:
1689 * - the first configure endpoint command drops more endpoints than it adds
1690 * - a second configure endpoint command that adds more endpoints is queued
1691 * - the first configure endpoint command fails, so the config is unchanged
1692 * - the second command may succeed, even though there isn't enough resources
1694 * Must be called with xhci->lock held.
1696 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1697 struct xhci_container_ctx *in_ctx)
1699 u32 added_eps;
1701 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1702 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1703 xhci_dbg(xhci, "Not enough ep ctxs: "
1704 "%u active, need to add %u, limit is %u.\n",
1705 xhci->num_active_eps, added_eps,
1706 xhci->limit_active_eps);
1707 return -ENOMEM;
1709 xhci->num_active_eps += added_eps;
1710 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1711 xhci->num_active_eps);
1712 return 0;
1716 * The configure endpoint was failed by the xHC for some other reason, so we
1717 * need to revert the resources that failed configuration would have used.
1719 * Must be called with xhci->lock held.
1721 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1722 struct xhci_container_ctx *in_ctx)
1724 u32 num_failed_eps;
1726 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1727 xhci->num_active_eps -= num_failed_eps;
1728 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1729 num_failed_eps,
1730 xhci->num_active_eps);
1734 * Now that the command has completed, clean up the active endpoint count by
1735 * subtracting out the endpoints that were dropped (but not changed).
1737 * Must be called with xhci->lock held.
1739 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1740 struct xhci_container_ctx *in_ctx)
1742 u32 num_dropped_eps;
1744 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1745 xhci->num_active_eps -= num_dropped_eps;
1746 if (num_dropped_eps)
1747 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1748 num_dropped_eps,
1749 xhci->num_active_eps);
1752 /* Issue a configure endpoint command or evaluate context command
1753 * and wait for it to finish.
1755 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1756 struct usb_device *udev,
1757 struct xhci_command *command,
1758 bool ctx_change, bool must_succeed)
1760 int ret;
1761 int timeleft;
1762 unsigned long flags;
1763 struct xhci_container_ctx *in_ctx;
1764 struct completion *cmd_completion;
1765 u32 *cmd_status;
1766 struct xhci_virt_device *virt_dev;
1768 spin_lock_irqsave(&xhci->lock, flags);
1769 virt_dev = xhci->devs[udev->slot_id];
1770 if (command) {
1771 in_ctx = command->in_ctx;
1772 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1773 xhci_reserve_host_resources(xhci, in_ctx)) {
1774 spin_unlock_irqrestore(&xhci->lock, flags);
1775 xhci_warn(xhci, "Not enough host resources, "
1776 "active endpoint contexts = %u\n",
1777 xhci->num_active_eps);
1778 return -ENOMEM;
1781 cmd_completion = command->completion;
1782 cmd_status = &command->status;
1783 command->command_trb = xhci->cmd_ring->enqueue;
1785 /* Enqueue pointer can be left pointing to the link TRB,
1786 * we must handle that
1788 if ((le32_to_cpu(command->command_trb->link.control)
1789 & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
1790 command->command_trb =
1791 xhci->cmd_ring->enq_seg->next->trbs;
1793 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1794 } else {
1795 in_ctx = virt_dev->in_ctx;
1796 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1797 xhci_reserve_host_resources(xhci, in_ctx)) {
1798 spin_unlock_irqrestore(&xhci->lock, flags);
1799 xhci_warn(xhci, "Not enough host resources, "
1800 "active endpoint contexts = %u\n",
1801 xhci->num_active_eps);
1802 return -ENOMEM;
1804 cmd_completion = &virt_dev->cmd_completion;
1805 cmd_status = &virt_dev->cmd_status;
1807 init_completion(cmd_completion);
1809 if (!ctx_change)
1810 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1811 udev->slot_id, must_succeed);
1812 else
1813 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1814 udev->slot_id);
1815 if (ret < 0) {
1816 if (command)
1817 list_del(&command->cmd_list);
1818 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
1819 xhci_free_host_resources(xhci, in_ctx);
1820 spin_unlock_irqrestore(&xhci->lock, flags);
1821 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1822 return -ENOMEM;
1824 xhci_ring_cmd_db(xhci);
1825 spin_unlock_irqrestore(&xhci->lock, flags);
1827 /* Wait for the configure endpoint command to complete */
1828 timeleft = wait_for_completion_interruptible_timeout(
1829 cmd_completion,
1830 USB_CTRL_SET_TIMEOUT);
1831 if (timeleft <= 0) {
1832 xhci_warn(xhci, "%s while waiting for %s command\n",
1833 timeleft == 0 ? "Timeout" : "Signal",
1834 ctx_change == 0 ?
1835 "configure endpoint" :
1836 "evaluate context");
1837 /* FIXME cancel the configure endpoint command */
1838 return -ETIME;
1841 if (!ctx_change)
1842 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
1843 else
1844 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
1846 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
1847 spin_lock_irqsave(&xhci->lock, flags);
1848 /* If the command failed, remove the reserved resources.
1849 * Otherwise, clean up the estimate to include dropped eps.
1851 if (ret)
1852 xhci_free_host_resources(xhci, in_ctx);
1853 else
1854 xhci_finish_resource_reservation(xhci, in_ctx);
1855 spin_unlock_irqrestore(&xhci->lock, flags);
1857 return ret;
1860 /* Called after one or more calls to xhci_add_endpoint() or
1861 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1862 * to call xhci_reset_bandwidth().
1864 * Since we are in the middle of changing either configuration or
1865 * installing a new alt setting, the USB core won't allow URBs to be
1866 * enqueued for any endpoint on the old config or interface. Nothing
1867 * else should be touching the xhci->devs[slot_id] structure, so we
1868 * don't need to take the xhci->lock for manipulating that.
1870 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1872 int i;
1873 int ret = 0;
1874 struct xhci_hcd *xhci;
1875 struct xhci_virt_device *virt_dev;
1876 struct xhci_input_control_ctx *ctrl_ctx;
1877 struct xhci_slot_ctx *slot_ctx;
1879 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1880 if (ret <= 0)
1881 return ret;
1882 xhci = hcd_to_xhci(hcd);
1883 if (xhci->xhc_state & XHCI_STATE_DYING)
1884 return -ENODEV;
1886 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1887 virt_dev = xhci->devs[udev->slot_id];
1889 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1890 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1891 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1892 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1893 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1895 /* Don't issue the command if there's no endpoints to update. */
1896 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
1897 ctrl_ctx->drop_flags == 0)
1898 return 0;
1900 xhci_dbg(xhci, "New Input Control Context:\n");
1901 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1902 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1903 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1905 ret = xhci_configure_endpoint(xhci, udev, NULL,
1906 false, false);
1907 if (ret) {
1908 /* Callee should call reset_bandwidth() */
1909 return ret;
1912 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1913 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1914 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1916 /* Free any rings that were dropped, but not changed. */
1917 for (i = 1; i < 31; ++i) {
1918 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
1919 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
1920 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1922 xhci_zero_in_ctx(xhci, virt_dev);
1924 * Install any rings for completely new endpoints or changed endpoints,
1925 * and free or cache any old rings from changed endpoints.
1927 for (i = 1; i < 31; ++i) {
1928 if (!virt_dev->eps[i].new_ring)
1929 continue;
1930 /* Only cache or free the old ring if it exists.
1931 * It may not if this is the first add of an endpoint.
1933 if (virt_dev->eps[i].ring) {
1934 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1936 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1937 virt_dev->eps[i].new_ring = NULL;
1940 return ret;
1943 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1945 struct xhci_hcd *xhci;
1946 struct xhci_virt_device *virt_dev;
1947 int i, ret;
1949 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1950 if (ret <= 0)
1951 return;
1952 xhci = hcd_to_xhci(hcd);
1954 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1955 virt_dev = xhci->devs[udev->slot_id];
1956 /* Free any rings allocated for added endpoints */
1957 for (i = 0; i < 31; ++i) {
1958 if (virt_dev->eps[i].new_ring) {
1959 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1960 virt_dev->eps[i].new_ring = NULL;
1963 xhci_zero_in_ctx(xhci, virt_dev);
1966 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1967 struct xhci_container_ctx *in_ctx,
1968 struct xhci_container_ctx *out_ctx,
1969 u32 add_flags, u32 drop_flags)
1971 struct xhci_input_control_ctx *ctrl_ctx;
1972 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1973 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1974 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1975 xhci_slot_copy(xhci, in_ctx, out_ctx);
1976 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1978 xhci_dbg(xhci, "Input Context:\n");
1979 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1982 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1983 unsigned int slot_id, unsigned int ep_index,
1984 struct xhci_dequeue_state *deq_state)
1986 struct xhci_container_ctx *in_ctx;
1987 struct xhci_ep_ctx *ep_ctx;
1988 u32 added_ctxs;
1989 dma_addr_t addr;
1991 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1992 xhci->devs[slot_id]->out_ctx, ep_index);
1993 in_ctx = xhci->devs[slot_id]->in_ctx;
1994 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1995 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1996 deq_state->new_deq_ptr);
1997 if (addr == 0) {
1998 xhci_warn(xhci, "WARN Cannot submit config ep after "
1999 "reset ep command\n");
2000 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2001 deq_state->new_deq_seg,
2002 deq_state->new_deq_ptr);
2003 return;
2005 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2007 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2008 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2009 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2012 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2013 struct usb_device *udev, unsigned int ep_index)
2015 struct xhci_dequeue_state deq_state;
2016 struct xhci_virt_ep *ep;
2018 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2019 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2020 /* We need to move the HW's dequeue pointer past this TD,
2021 * or it will attempt to resend it on the next doorbell ring.
2023 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2024 ep_index, ep->stopped_stream, ep->stopped_td,
2025 &deq_state);
2027 /* HW with the reset endpoint quirk will use the saved dequeue state to
2028 * issue a configure endpoint command later.
2030 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2031 xhci_dbg(xhci, "Queueing new dequeue state\n");
2032 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2033 ep_index, ep->stopped_stream, &deq_state);
2034 } else {
2035 /* Better hope no one uses the input context between now and the
2036 * reset endpoint completion!
2037 * XXX: No idea how this hardware will react when stream rings
2038 * are enabled.
2040 xhci_dbg(xhci, "Setting up input context for "
2041 "configure endpoint command\n");
2042 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2043 ep_index, &deq_state);
2047 /* Deal with stalled endpoints. The core should have sent the control message
2048 * to clear the halt condition. However, we need to make the xHCI hardware
2049 * reset its sequence number, since a device will expect a sequence number of
2050 * zero after the halt condition is cleared.
2051 * Context: in_interrupt
2053 void xhci_endpoint_reset(struct usb_hcd *hcd,
2054 struct usb_host_endpoint *ep)
2056 struct xhci_hcd *xhci;
2057 struct usb_device *udev;
2058 unsigned int ep_index;
2059 unsigned long flags;
2060 int ret;
2061 struct xhci_virt_ep *virt_ep;
2063 xhci = hcd_to_xhci(hcd);
2064 udev = (struct usb_device *) ep->hcpriv;
2065 /* Called with a root hub endpoint (or an endpoint that wasn't added
2066 * with xhci_add_endpoint()
2068 if (!ep->hcpriv)
2069 return;
2070 ep_index = xhci_get_endpoint_index(&ep->desc);
2071 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2072 if (!virt_ep->stopped_td) {
2073 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2074 ep->desc.bEndpointAddress);
2075 return;
2077 if (usb_endpoint_xfer_control(&ep->desc)) {
2078 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2079 return;
2082 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2083 spin_lock_irqsave(&xhci->lock, flags);
2084 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2086 * Can't change the ring dequeue pointer until it's transitioned to the
2087 * stopped state, which is only upon a successful reset endpoint
2088 * command. Better hope that last command worked!
2090 if (!ret) {
2091 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2092 kfree(virt_ep->stopped_td);
2093 xhci_ring_cmd_db(xhci);
2095 virt_ep->stopped_td = NULL;
2096 virt_ep->stopped_trb = NULL;
2097 virt_ep->stopped_stream = 0;
2098 spin_unlock_irqrestore(&xhci->lock, flags);
2100 if (ret)
2101 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2104 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2105 struct usb_device *udev, struct usb_host_endpoint *ep,
2106 unsigned int slot_id)
2108 int ret;
2109 unsigned int ep_index;
2110 unsigned int ep_state;
2112 if (!ep)
2113 return -EINVAL;
2114 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2115 if (ret <= 0)
2116 return -EINVAL;
2117 if (ep->ss_ep_comp.bmAttributes == 0) {
2118 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2119 " descriptor for ep 0x%x does not support streams\n",
2120 ep->desc.bEndpointAddress);
2121 return -EINVAL;
2124 ep_index = xhci_get_endpoint_index(&ep->desc);
2125 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2126 if (ep_state & EP_HAS_STREAMS ||
2127 ep_state & EP_GETTING_STREAMS) {
2128 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2129 "already has streams set up.\n",
2130 ep->desc.bEndpointAddress);
2131 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2132 "dynamic stream context array reallocation.\n");
2133 return -EINVAL;
2135 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2136 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2137 "endpoint 0x%x; URBs are pending.\n",
2138 ep->desc.bEndpointAddress);
2139 return -EINVAL;
2141 return 0;
2144 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2145 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2147 unsigned int max_streams;
2149 /* The stream context array size must be a power of two */
2150 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2152 * Find out how many primary stream array entries the host controller
2153 * supports. Later we may use secondary stream arrays (similar to 2nd
2154 * level page entries), but that's an optional feature for xHCI host
2155 * controllers. xHCs must support at least 4 stream IDs.
2157 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2158 if (*num_stream_ctxs > max_streams) {
2159 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2160 max_streams);
2161 *num_stream_ctxs = max_streams;
2162 *num_streams = max_streams;
2166 /* Returns an error code if one of the endpoint already has streams.
2167 * This does not change any data structures, it only checks and gathers
2168 * information.
2170 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2171 struct usb_device *udev,
2172 struct usb_host_endpoint **eps, unsigned int num_eps,
2173 unsigned int *num_streams, u32 *changed_ep_bitmask)
2175 unsigned int max_streams;
2176 unsigned int endpoint_flag;
2177 int i;
2178 int ret;
2180 for (i = 0; i < num_eps; i++) {
2181 ret = xhci_check_streams_endpoint(xhci, udev,
2182 eps[i], udev->slot_id);
2183 if (ret < 0)
2184 return ret;
2186 max_streams = USB_SS_MAX_STREAMS(
2187 eps[i]->ss_ep_comp.bmAttributes);
2188 if (max_streams < (*num_streams - 1)) {
2189 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2190 eps[i]->desc.bEndpointAddress,
2191 max_streams);
2192 *num_streams = max_streams+1;
2195 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2196 if (*changed_ep_bitmask & endpoint_flag)
2197 return -EINVAL;
2198 *changed_ep_bitmask |= endpoint_flag;
2200 return 0;
2203 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2204 struct usb_device *udev,
2205 struct usb_host_endpoint **eps, unsigned int num_eps)
2207 u32 changed_ep_bitmask = 0;
2208 unsigned int slot_id;
2209 unsigned int ep_index;
2210 unsigned int ep_state;
2211 int i;
2213 slot_id = udev->slot_id;
2214 if (!xhci->devs[slot_id])
2215 return 0;
2217 for (i = 0; i < num_eps; i++) {
2218 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2219 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2220 /* Are streams already being freed for the endpoint? */
2221 if (ep_state & EP_GETTING_NO_STREAMS) {
2222 xhci_warn(xhci, "WARN Can't disable streams for "
2223 "endpoint 0x%x\n, "
2224 "streams are being disabled already.",
2225 eps[i]->desc.bEndpointAddress);
2226 return 0;
2228 /* Are there actually any streams to free? */
2229 if (!(ep_state & EP_HAS_STREAMS) &&
2230 !(ep_state & EP_GETTING_STREAMS)) {
2231 xhci_warn(xhci, "WARN Can't disable streams for "
2232 "endpoint 0x%x\n, "
2233 "streams are already disabled!",
2234 eps[i]->desc.bEndpointAddress);
2235 xhci_warn(xhci, "WARN xhci_free_streams() called "
2236 "with non-streams endpoint\n");
2237 return 0;
2239 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2241 return changed_ep_bitmask;
2245 * The USB device drivers use this function (though the HCD interface in USB
2246 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2247 * coordinate mass storage command queueing across multiple endpoints (basically
2248 * a stream ID == a task ID).
2250 * Setting up streams involves allocating the same size stream context array
2251 * for each endpoint and issuing a configure endpoint command for all endpoints.
2253 * Don't allow the call to succeed if one endpoint only supports one stream
2254 * (which means it doesn't support streams at all).
2256 * Drivers may get less stream IDs than they asked for, if the host controller
2257 * hardware or endpoints claim they can't support the number of requested
2258 * stream IDs.
2260 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2261 struct usb_host_endpoint **eps, unsigned int num_eps,
2262 unsigned int num_streams, gfp_t mem_flags)
2264 int i, ret;
2265 struct xhci_hcd *xhci;
2266 struct xhci_virt_device *vdev;
2267 struct xhci_command *config_cmd;
2268 unsigned int ep_index;
2269 unsigned int num_stream_ctxs;
2270 unsigned long flags;
2271 u32 changed_ep_bitmask = 0;
2273 if (!eps)
2274 return -EINVAL;
2276 /* Add one to the number of streams requested to account for
2277 * stream 0 that is reserved for xHCI usage.
2279 num_streams += 1;
2280 xhci = hcd_to_xhci(hcd);
2281 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2282 num_streams);
2284 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2285 if (!config_cmd) {
2286 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2287 return -ENOMEM;
2290 /* Check to make sure all endpoints are not already configured for
2291 * streams. While we're at it, find the maximum number of streams that
2292 * all the endpoints will support and check for duplicate endpoints.
2294 spin_lock_irqsave(&xhci->lock, flags);
2295 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2296 num_eps, &num_streams, &changed_ep_bitmask);
2297 if (ret < 0) {
2298 xhci_free_command(xhci, config_cmd);
2299 spin_unlock_irqrestore(&xhci->lock, flags);
2300 return ret;
2302 if (num_streams <= 1) {
2303 xhci_warn(xhci, "WARN: endpoints can't handle "
2304 "more than one stream.\n");
2305 xhci_free_command(xhci, config_cmd);
2306 spin_unlock_irqrestore(&xhci->lock, flags);
2307 return -EINVAL;
2309 vdev = xhci->devs[udev->slot_id];
2310 /* Mark each endpoint as being in transition, so
2311 * xhci_urb_enqueue() will reject all URBs.
2313 for (i = 0; i < num_eps; i++) {
2314 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2315 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2317 spin_unlock_irqrestore(&xhci->lock, flags);
2319 /* Setup internal data structures and allocate HW data structures for
2320 * streams (but don't install the HW structures in the input context
2321 * until we're sure all memory allocation succeeded).
2323 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2324 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2325 num_stream_ctxs, num_streams);
2327 for (i = 0; i < num_eps; i++) {
2328 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2329 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2330 num_stream_ctxs,
2331 num_streams, mem_flags);
2332 if (!vdev->eps[ep_index].stream_info)
2333 goto cleanup;
2334 /* Set maxPstreams in endpoint context and update deq ptr to
2335 * point to stream context array. FIXME
2339 /* Set up the input context for a configure endpoint command. */
2340 for (i = 0; i < num_eps; i++) {
2341 struct xhci_ep_ctx *ep_ctx;
2343 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2344 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2346 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2347 vdev->out_ctx, ep_index);
2348 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2349 vdev->eps[ep_index].stream_info);
2351 /* Tell the HW to drop its old copy of the endpoint context info
2352 * and add the updated copy from the input context.
2354 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2355 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2357 /* Issue and wait for the configure endpoint command */
2358 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2359 false, false);
2361 /* xHC rejected the configure endpoint command for some reason, so we
2362 * leave the old ring intact and free our internal streams data
2363 * structure.
2365 if (ret < 0)
2366 goto cleanup;
2368 spin_lock_irqsave(&xhci->lock, flags);
2369 for (i = 0; i < num_eps; i++) {
2370 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2371 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2372 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2373 udev->slot_id, ep_index);
2374 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2376 xhci_free_command(xhci, config_cmd);
2377 spin_unlock_irqrestore(&xhci->lock, flags);
2379 /* Subtract 1 for stream 0, which drivers can't use */
2380 return num_streams - 1;
2382 cleanup:
2383 /* If it didn't work, free the streams! */
2384 for (i = 0; i < num_eps; i++) {
2385 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2386 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2387 vdev->eps[ep_index].stream_info = NULL;
2388 /* FIXME Unset maxPstreams in endpoint context and
2389 * update deq ptr to point to normal string ring.
2391 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2392 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2393 xhci_endpoint_zero(xhci, vdev, eps[i]);
2395 xhci_free_command(xhci, config_cmd);
2396 return -ENOMEM;
2399 /* Transition the endpoint from using streams to being a "normal" endpoint
2400 * without streams.
2402 * Modify the endpoint context state, submit a configure endpoint command,
2403 * and free all endpoint rings for streams if that completes successfully.
2405 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2406 struct usb_host_endpoint **eps, unsigned int num_eps,
2407 gfp_t mem_flags)
2409 int i, ret;
2410 struct xhci_hcd *xhci;
2411 struct xhci_virt_device *vdev;
2412 struct xhci_command *command;
2413 unsigned int ep_index;
2414 unsigned long flags;
2415 u32 changed_ep_bitmask;
2417 xhci = hcd_to_xhci(hcd);
2418 vdev = xhci->devs[udev->slot_id];
2420 /* Set up a configure endpoint command to remove the streams rings */
2421 spin_lock_irqsave(&xhci->lock, flags);
2422 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2423 udev, eps, num_eps);
2424 if (changed_ep_bitmask == 0) {
2425 spin_unlock_irqrestore(&xhci->lock, flags);
2426 return -EINVAL;
2429 /* Use the xhci_command structure from the first endpoint. We may have
2430 * allocated too many, but the driver may call xhci_free_streams() for
2431 * each endpoint it grouped into one call to xhci_alloc_streams().
2433 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2434 command = vdev->eps[ep_index].stream_info->free_streams_command;
2435 for (i = 0; i < num_eps; i++) {
2436 struct xhci_ep_ctx *ep_ctx;
2438 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2439 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2440 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2441 EP_GETTING_NO_STREAMS;
2443 xhci_endpoint_copy(xhci, command->in_ctx,
2444 vdev->out_ctx, ep_index);
2445 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2446 &vdev->eps[ep_index]);
2448 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2449 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2450 spin_unlock_irqrestore(&xhci->lock, flags);
2452 /* Issue and wait for the configure endpoint command,
2453 * which must succeed.
2455 ret = xhci_configure_endpoint(xhci, udev, command,
2456 false, true);
2458 /* xHC rejected the configure endpoint command for some reason, so we
2459 * leave the streams rings intact.
2461 if (ret < 0)
2462 return ret;
2464 spin_lock_irqsave(&xhci->lock, flags);
2465 for (i = 0; i < num_eps; i++) {
2466 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2467 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2468 vdev->eps[ep_index].stream_info = NULL;
2469 /* FIXME Unset maxPstreams in endpoint context and
2470 * update deq ptr to point to normal string ring.
2472 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2473 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2475 spin_unlock_irqrestore(&xhci->lock, flags);
2477 return 0;
2481 * Deletes endpoint resources for endpoints that were active before a Reset
2482 * Device command, or a Disable Slot command. The Reset Device command leaves
2483 * the control endpoint intact, whereas the Disable Slot command deletes it.
2485 * Must be called with xhci->lock held.
2487 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2488 struct xhci_virt_device *virt_dev, bool drop_control_ep)
2490 int i;
2491 unsigned int num_dropped_eps = 0;
2492 unsigned int drop_flags = 0;
2494 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2495 if (virt_dev->eps[i].ring) {
2496 drop_flags |= 1 << i;
2497 num_dropped_eps++;
2500 xhci->num_active_eps -= num_dropped_eps;
2501 if (num_dropped_eps)
2502 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
2503 "%u now active.\n",
2504 num_dropped_eps, drop_flags,
2505 xhci->num_active_eps);
2509 * This submits a Reset Device Command, which will set the device state to 0,
2510 * set the device address to 0, and disable all the endpoints except the default
2511 * control endpoint. The USB core should come back and call
2512 * xhci_address_device(), and then re-set up the configuration. If this is
2513 * called because of a usb_reset_and_verify_device(), then the old alternate
2514 * settings will be re-installed through the normal bandwidth allocation
2515 * functions.
2517 * Wait for the Reset Device command to finish. Remove all structures
2518 * associated with the endpoints that were disabled. Clear the input device
2519 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
2521 * If the virt_dev to be reset does not exist or does not match the udev,
2522 * it means the device is lost, possibly due to the xHC restore error and
2523 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2524 * re-allocate the device.
2526 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2528 int ret, i;
2529 unsigned long flags;
2530 struct xhci_hcd *xhci;
2531 unsigned int slot_id;
2532 struct xhci_virt_device *virt_dev;
2533 struct xhci_command *reset_device_cmd;
2534 int timeleft;
2535 int last_freed_endpoint;
2536 struct xhci_slot_ctx *slot_ctx;
2538 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2539 if (ret <= 0)
2540 return ret;
2541 xhci = hcd_to_xhci(hcd);
2542 slot_id = udev->slot_id;
2543 virt_dev = xhci->devs[slot_id];
2544 if (!virt_dev) {
2545 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2546 "not exist. Re-allocate the device\n", slot_id);
2547 ret = xhci_alloc_dev(hcd, udev);
2548 if (ret == 1)
2549 return 0;
2550 else
2551 return -EINVAL;
2554 if (virt_dev->udev != udev) {
2555 /* If the virt_dev and the udev does not match, this virt_dev
2556 * may belong to another udev.
2557 * Re-allocate the device.
2559 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2560 "not match the udev. Re-allocate the device\n",
2561 slot_id);
2562 ret = xhci_alloc_dev(hcd, udev);
2563 if (ret == 1)
2564 return 0;
2565 else
2566 return -EINVAL;
2569 /* If device is not setup, there is no point in resetting it */
2570 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2571 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
2572 SLOT_STATE_DISABLED)
2573 return 0;
2575 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2576 /* Allocate the command structure that holds the struct completion.
2577 * Assume we're in process context, since the normal device reset
2578 * process has to wait for the device anyway. Storage devices are
2579 * reset as part of error handling, so use GFP_NOIO instead of
2580 * GFP_KERNEL.
2582 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2583 if (!reset_device_cmd) {
2584 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2585 return -ENOMEM;
2588 /* Attempt to submit the Reset Device command to the command ring */
2589 spin_lock_irqsave(&xhci->lock, flags);
2590 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2592 /* Enqueue pointer can be left pointing to the link TRB,
2593 * we must handle that
2595 if ((le32_to_cpu(reset_device_cmd->command_trb->link.control)
2596 & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
2597 reset_device_cmd->command_trb =
2598 xhci->cmd_ring->enq_seg->next->trbs;
2600 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2601 ret = xhci_queue_reset_device(xhci, slot_id);
2602 if (ret) {
2603 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2604 list_del(&reset_device_cmd->cmd_list);
2605 spin_unlock_irqrestore(&xhci->lock, flags);
2606 goto command_cleanup;
2608 xhci_ring_cmd_db(xhci);
2609 spin_unlock_irqrestore(&xhci->lock, flags);
2611 /* Wait for the Reset Device command to finish */
2612 timeleft = wait_for_completion_interruptible_timeout(
2613 reset_device_cmd->completion,
2614 USB_CTRL_SET_TIMEOUT);
2615 if (timeleft <= 0) {
2616 xhci_warn(xhci, "%s while waiting for reset device command\n",
2617 timeleft == 0 ? "Timeout" : "Signal");
2618 spin_lock_irqsave(&xhci->lock, flags);
2619 /* The timeout might have raced with the event ring handler, so
2620 * only delete from the list if the item isn't poisoned.
2622 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2623 list_del(&reset_device_cmd->cmd_list);
2624 spin_unlock_irqrestore(&xhci->lock, flags);
2625 ret = -ETIME;
2626 goto command_cleanup;
2629 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2630 * unless we tried to reset a slot ID that wasn't enabled,
2631 * or the device wasn't in the addressed or configured state.
2633 ret = reset_device_cmd->status;
2634 switch (ret) {
2635 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2636 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2637 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2638 slot_id,
2639 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2640 xhci_info(xhci, "Not freeing device rings.\n");
2641 /* Don't treat this as an error. May change my mind later. */
2642 ret = 0;
2643 goto command_cleanup;
2644 case COMP_SUCCESS:
2645 xhci_dbg(xhci, "Successful reset device command.\n");
2646 break;
2647 default:
2648 if (xhci_is_vendor_info_code(xhci, ret))
2649 break;
2650 xhci_warn(xhci, "Unknown completion code %u for "
2651 "reset device command.\n", ret);
2652 ret = -EINVAL;
2653 goto command_cleanup;
2656 /* Free up host controller endpoint resources */
2657 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2658 spin_lock_irqsave(&xhci->lock, flags);
2659 /* Don't delete the default control endpoint resources */
2660 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
2661 spin_unlock_irqrestore(&xhci->lock, flags);
2664 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2665 last_freed_endpoint = 1;
2666 for (i = 1; i < 31; ++i) {
2667 struct xhci_virt_ep *ep = &virt_dev->eps[i];
2669 if (ep->ep_state & EP_HAS_STREAMS) {
2670 xhci_free_stream_info(xhci, ep->stream_info);
2671 ep->stream_info = NULL;
2672 ep->ep_state &= ~EP_HAS_STREAMS;
2675 if (ep->ring) {
2676 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2677 last_freed_endpoint = i;
2680 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2681 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2682 ret = 0;
2684 command_cleanup:
2685 xhci_free_command(xhci, reset_device_cmd);
2686 return ret;
2690 * At this point, the struct usb_device is about to go away, the device has
2691 * disconnected, and all traffic has been stopped and the endpoints have been
2692 * disabled. Free any HC data structures associated with that device.
2694 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2696 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2697 struct xhci_virt_device *virt_dev;
2698 unsigned long flags;
2699 u32 state;
2700 int i, ret;
2702 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2703 /* If the host is halted due to driver unload, we still need to free the
2704 * device.
2706 if (ret <= 0 && ret != -ENODEV)
2707 return;
2709 virt_dev = xhci->devs[udev->slot_id];
2711 /* Stop any wayward timer functions (which may grab the lock) */
2712 for (i = 0; i < 31; ++i) {
2713 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2714 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2717 spin_lock_irqsave(&xhci->lock, flags);
2718 /* Don't disable the slot if the host controller is dead. */
2719 state = xhci_readl(xhci, &xhci->op_regs->status);
2720 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
2721 (xhci->xhc_state & XHCI_STATE_HALTED)) {
2722 xhci_free_virt_device(xhci, udev->slot_id);
2723 spin_unlock_irqrestore(&xhci->lock, flags);
2724 return;
2727 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2728 spin_unlock_irqrestore(&xhci->lock, flags);
2729 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2730 return;
2732 xhci_ring_cmd_db(xhci);
2733 spin_unlock_irqrestore(&xhci->lock, flags);
2735 * Event command completion handler will free any data structures
2736 * associated with the slot. XXX Can free sleep?
2741 * Checks if we have enough host controller resources for the default control
2742 * endpoint.
2744 * Must be called with xhci->lock held.
2746 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
2748 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
2749 xhci_dbg(xhci, "Not enough ep ctxs: "
2750 "%u active, need to add 1, limit is %u.\n",
2751 xhci->num_active_eps, xhci->limit_active_eps);
2752 return -ENOMEM;
2754 xhci->num_active_eps += 1;
2755 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
2756 xhci->num_active_eps);
2757 return 0;
2762 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2763 * timed out, or allocating memory failed. Returns 1 on success.
2765 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2767 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2768 unsigned long flags;
2769 int timeleft;
2770 int ret;
2772 spin_lock_irqsave(&xhci->lock, flags);
2773 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2774 if (ret) {
2775 spin_unlock_irqrestore(&xhci->lock, flags);
2776 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2777 return 0;
2779 xhci_ring_cmd_db(xhci);
2780 spin_unlock_irqrestore(&xhci->lock, flags);
2782 /* XXX: how much time for xHC slot assignment? */
2783 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2784 USB_CTRL_SET_TIMEOUT);
2785 if (timeleft <= 0) {
2786 xhci_warn(xhci, "%s while waiting for a slot\n",
2787 timeleft == 0 ? "Timeout" : "Signal");
2788 /* FIXME cancel the enable slot request */
2789 return 0;
2792 if (!xhci->slot_id) {
2793 xhci_err(xhci, "Error while assigning device slot ID\n");
2794 return 0;
2797 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2798 spin_lock_irqsave(&xhci->lock, flags);
2799 ret = xhci_reserve_host_control_ep_resources(xhci);
2800 if (ret) {
2801 spin_unlock_irqrestore(&xhci->lock, flags);
2802 xhci_warn(xhci, "Not enough host resources, "
2803 "active endpoint contexts = %u\n",
2804 xhci->num_active_eps);
2805 goto disable_slot;
2807 spin_unlock_irqrestore(&xhci->lock, flags);
2809 /* Use GFP_NOIO, since this function can be called from
2810 * xhci_discover_or_reset_device(), which may be called as part of
2811 * mass storage driver error handling.
2813 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2814 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2815 goto disable_slot;
2817 udev->slot_id = xhci->slot_id;
2818 /* Is this a LS or FS device under a HS hub? */
2819 /* Hub or peripherial? */
2820 return 1;
2822 disable_slot:
2823 /* Disable slot, if we can do it without mem alloc */
2824 spin_lock_irqsave(&xhci->lock, flags);
2825 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2826 xhci_ring_cmd_db(xhci);
2827 spin_unlock_irqrestore(&xhci->lock, flags);
2828 return 0;
2832 * Issue an Address Device command (which will issue a SetAddress request to
2833 * the device).
2834 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2835 * we should only issue and wait on one address command at the same time.
2837 * We add one to the device address issued by the hardware because the USB core
2838 * uses address 1 for the root hubs (even though they're not really devices).
2840 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2842 unsigned long flags;
2843 int timeleft;
2844 struct xhci_virt_device *virt_dev;
2845 int ret = 0;
2846 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2847 struct xhci_slot_ctx *slot_ctx;
2848 struct xhci_input_control_ctx *ctrl_ctx;
2849 u64 temp_64;
2851 if (!udev->slot_id) {
2852 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2853 return -EINVAL;
2856 virt_dev = xhci->devs[udev->slot_id];
2858 if (WARN_ON(!virt_dev)) {
2860 * In plug/unplug torture test with an NEC controller,
2861 * a zero-dereference was observed once due to virt_dev = 0.
2862 * Print useful debug rather than crash if it is observed again!
2864 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2865 udev->slot_id);
2866 return -EINVAL;
2869 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2871 * If this is the first Set Address since device plug-in or
2872 * virt_device realloaction after a resume with an xHCI power loss,
2873 * then set up the slot context.
2875 if (!slot_ctx->dev_info)
2876 xhci_setup_addressable_virt_dev(xhci, udev);
2877 /* Otherwise, update the control endpoint ring enqueue pointer. */
2878 else
2879 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2880 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2881 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
2882 ctrl_ctx->drop_flags = 0;
2884 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2885 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2887 spin_lock_irqsave(&xhci->lock, flags);
2888 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2889 udev->slot_id);
2890 if (ret) {
2891 spin_unlock_irqrestore(&xhci->lock, flags);
2892 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2893 return ret;
2895 xhci_ring_cmd_db(xhci);
2896 spin_unlock_irqrestore(&xhci->lock, flags);
2898 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2899 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2900 USB_CTRL_SET_TIMEOUT);
2901 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2902 * the SetAddress() "recovery interval" required by USB and aborting the
2903 * command on a timeout.
2905 if (timeleft <= 0) {
2906 xhci_warn(xhci, "%s while waiting for a slot\n",
2907 timeleft == 0 ? "Timeout" : "Signal");
2908 /* FIXME cancel the address device command */
2909 return -ETIME;
2912 switch (virt_dev->cmd_status) {
2913 case COMP_CTX_STATE:
2914 case COMP_EBADSLT:
2915 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2916 udev->slot_id);
2917 ret = -EINVAL;
2918 break;
2919 case COMP_TX_ERR:
2920 dev_warn(&udev->dev, "Device not responding to set address.\n");
2921 ret = -EPROTO;
2922 break;
2923 case COMP_DEV_ERR:
2924 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
2925 "device command.\n");
2926 ret = -ENODEV;
2927 break;
2928 case COMP_SUCCESS:
2929 xhci_dbg(xhci, "Successful Address Device command\n");
2930 break;
2931 default:
2932 xhci_err(xhci, "ERROR: unexpected command completion "
2933 "code 0x%x.\n", virt_dev->cmd_status);
2934 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2935 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2936 ret = -EINVAL;
2937 break;
2939 if (ret) {
2940 return ret;
2942 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2943 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2944 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2945 udev->slot_id,
2946 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2947 (unsigned long long)
2948 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2949 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2950 (unsigned long long)virt_dev->out_ctx->dma);
2951 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2952 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2953 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2954 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2956 * USB core uses address 1 for the roothubs, so we add one to the
2957 * address given back to us by the HC.
2959 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2960 /* Use kernel assigned address for devices; store xHC assigned
2961 * address locally. */
2962 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2963 + 1;
2964 /* Zero the input context control for later use */
2965 ctrl_ctx->add_flags = 0;
2966 ctrl_ctx->drop_flags = 0;
2968 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2970 return 0;
2973 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2974 * internal data structures for the device.
2976 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2977 struct usb_tt *tt, gfp_t mem_flags)
2979 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2980 struct xhci_virt_device *vdev;
2981 struct xhci_command *config_cmd;
2982 struct xhci_input_control_ctx *ctrl_ctx;
2983 struct xhci_slot_ctx *slot_ctx;
2984 unsigned long flags;
2985 unsigned think_time;
2986 int ret;
2988 /* Ignore root hubs */
2989 if (!hdev->parent)
2990 return 0;
2992 vdev = xhci->devs[hdev->slot_id];
2993 if (!vdev) {
2994 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2995 return -EINVAL;
2997 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2998 if (!config_cmd) {
2999 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3000 return -ENOMEM;
3003 spin_lock_irqsave(&xhci->lock, flags);
3004 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
3005 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3006 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3007 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
3008 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
3009 if (tt->multi)
3010 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
3011 if (xhci->hci_version > 0x95) {
3012 xhci_dbg(xhci, "xHCI version %x needs hub "
3013 "TT think time and number of ports\n",
3014 (unsigned int) xhci->hci_version);
3015 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
3016 /* Set TT think time - convert from ns to FS bit times.
3017 * 0 = 8 FS bit times, 1 = 16 FS bit times,
3018 * 2 = 24 FS bit times, 3 = 32 FS bit times.
3020 * xHCI 1.0: this field shall be 0 if the device is not a
3021 * High-spped hub.
3023 think_time = tt->think_time;
3024 if (think_time != 0)
3025 think_time = (think_time / 666) - 1;
3026 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3027 slot_ctx->tt_info |=
3028 cpu_to_le32(TT_THINK_TIME(think_time));
3029 } else {
3030 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3031 "TT think time or number of ports\n",
3032 (unsigned int) xhci->hci_version);
3034 slot_ctx->dev_state = 0;
3035 spin_unlock_irqrestore(&xhci->lock, flags);
3037 xhci_dbg(xhci, "Set up %s for hub device.\n",
3038 (xhci->hci_version > 0x95) ?
3039 "configure endpoint" : "evaluate context");
3040 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3041 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3043 /* Issue and wait for the configure endpoint or
3044 * evaluate context command.
3046 if (xhci->hci_version > 0x95)
3047 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3048 false, false);
3049 else
3050 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3051 true, false);
3053 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3054 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3056 xhci_free_command(xhci, config_cmd);
3057 return ret;
3060 int xhci_get_frame(struct usb_hcd *hcd)
3062 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3063 /* EHCI mods by the periodic size. Why? */
3064 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3067 MODULE_DESCRIPTION(DRIVER_DESC);
3068 MODULE_AUTHOR(DRIVER_AUTHOR);
3069 MODULE_LICENSE("GPL");
3071 static int __init xhci_hcd_init(void)
3073 #ifdef CONFIG_PCI
3074 int retval = 0;
3076 retval = xhci_register_pci();
3078 if (retval < 0) {
3079 printk(KERN_DEBUG "Problem registering PCI driver.");
3080 return retval;
3082 #endif
3084 * Check the compiler generated sizes of structures that must be laid
3085 * out in specific ways for hardware access.
3087 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3088 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3089 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3090 /* xhci_device_control has eight fields, and also
3091 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3093 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3094 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3095 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3096 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3097 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3098 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3099 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3100 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3101 return 0;
3103 module_init(xhci_hcd_init);
3105 static void __exit xhci_hcd_cleanup(void)
3107 #ifdef CONFIG_PCI
3108 xhci_unregister_pci();
3109 #endif
3111 module_exit(xhci_hcd_cleanup);