drivers/usb/host/xhci-hub.c

   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <asm/unaligned.h>
  24
  25 #include "xhci.h"
  26
  27 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
  28 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
  29                          PORT_RC | PORT_PLC | PORT_PE)
  30
  31 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
  32                 struct usb_hub_descriptor *desc, int ports)
  33 {
  34         u16 temp;
  35
  36         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
  37         desc->bHubContrCurrent = 0;
  38
  39         desc->bNbrPorts = ports;
  40         /* Ugh, these should be #defines, FIXME */
  41         /* Using table 11-13 in USB 2.0 spec. */
  42         temp = 0;
  43         /* Bits 1:0 - support port power switching, or power always on */
  44         if (HCC_PPC(xhci->hcc_params))
  45                 temp |= 0x0001;
  46         else
  47                 temp |= 0x0002;
  48         /* Bit  2 - root hubs are not part of a compound device */
  49         /* Bits 4:3 - individual port over current protection */
  50         temp |= 0x0008;
  51         /* Bits 6:5 - no TTs in root ports */
  52         /* Bit  7 - no port indicators */
  53         desc->wHubCharacteristics = cpu_to_le16(temp);
  54 }
  55
  56 /* Fill in the USB 2.0 roothub descriptor */
  57 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
  58                 struct usb_hub_descriptor *desc)
  59 {
  60         int ports;
  61         u16 temp;
  62         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
  63         u32 portsc;
  64         unsigned int i;
  65
  66         ports = xhci->num_usb2_ports;
  67
  68         xhci_common_hub_descriptor(xhci, desc, ports);
  69         desc->bDescriptorType = 0x29;
  70         temp = 1 + (ports / 8);
  71         desc->bDescLength = 7 + 2 * temp;
  72
  73         /* The Device Removable bits are reported on a byte granularity.
  74          * If the port doesn't exist within that byte, the bit is set to 0.
  75          */
  76         memset(port_removable, 0, sizeof(port_removable));
  77         for (i = 0; i < ports; i++) {
  78                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
  79                 /* If a device is removable, PORTSC reports a 0, same as in the
  80                  * hub descriptor DeviceRemovable bits.
  81                  */
  82                 if (portsc & PORT_DEV_REMOVE)
  83                         /* This math is hairy because bit 0 of DeviceRemovable
  84                          * is reserved, and bit 1 is for port 1, etc.
  85                          */
  86                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
  87         }
  88
  89         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
  90          * ports on it.  The USB 2.0 specification says that there are two
  91          * variable length fields at the end of the hub descriptor:
  92          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
  93          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
  94          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
  95          * 0xFF, so we initialize the both arrays (DeviceRemovable and
  96          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
  97          * set of ports that actually exist.
  98          */
  99         memset(desc->u.hs.DeviceRemovable, 0xff,
 100                         sizeof(desc->u.hs.DeviceRemovable));
 101         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
 102                         sizeof(desc->u.hs.PortPwrCtrlMask));
 103
 104         for (i = 0; i < (ports + 1 + 7) / 8; i++)
 105                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
 106                                 sizeof(__u8));
 107 }
 108
 109 /* Fill in the USB 3.0 roothub descriptor */
 110 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 111                 struct usb_hub_descriptor *desc)
 112 {
 113         int ports;
 114         u16 port_removable;
 115         u32 portsc;
 116         unsigned int i;
 117
 118         ports = xhci->num_usb3_ports;
 119         xhci_common_hub_descriptor(xhci, desc, ports);
 120         desc->bDescriptorType = 0x2a;
 121         desc->bDescLength = 12;
 122
 123         /* header decode latency should be zero for roothubs,
 124          * see section 4.23.5.2.
 125          */
 126         desc->u.ss.bHubHdrDecLat = 0;
 127         desc->u.ss.wHubDelay = 0;
 128
 129         port_removable = 0;
 130         /* bit 0 is reserved, bit 1 is for port 1, etc. */
 131         for (i = 0; i < ports; i++) {
 132                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
 133                 if (portsc & PORT_DEV_REMOVE)
 134                         port_removable |= 1 << (i + 1);
 135         }
 136         memset(&desc->u.ss.DeviceRemovable,
 137                         (__force __u16) cpu_to_le16(port_removable),
 138                         sizeof(__u16));
 139 }
 140
 141 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 142                 struct usb_hub_descriptor *desc)
 143 {
 144
 145         if (hcd->speed == HCD_USB3)
 146                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
 147         else
 148                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
 149
 150 }
 151
 152 static unsigned int xhci_port_speed(unsigned int port_status)
 153 {
 154         if (DEV_LOWSPEED(port_status))
 155                 return USB_PORT_STAT_LOW_SPEED;
 156         if (DEV_HIGHSPEED(port_status))
 157                 return USB_PORT_STAT_HIGH_SPEED;
 158         /*
 159          * FIXME: Yes, we should check for full speed, but the core uses that as
 160          * a default in portspeed() in usb/core/hub.c (which is the only place
 161          * USB_PORT_STAT_*_SPEED is used).
 162          */
 163         return 0;
 164 }
 165
 166 /*
 167  * These bits are Read Only (RO) and should be saved and written to the
 168  * registers: 0, 3, 10:13, 30
 169  * connect status, over-current status, port speed, and device removable.
 170  * connect status and port speed are also sticky - meaning they're in
 171  * the AUX well and they aren't changed by a hot, warm, or cold reset.
 172  */
 173 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
 174 /*
 175  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
 176  * bits 5:8, 9, 14:15, 25:27
 177  * link state, port power, port indicator state, "wake on" enable state
 178  */
 179 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
 180 /*
 181  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
 182  * bit 4 (port reset)
 183  */
 184 #define XHCI_PORT_RW1S  ((1<<4))
 185 /*
 186  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
 187  * bits 1, 17, 18, 19, 20, 21, 22, 23
 188  * port enable/disable, and
 189  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
 190  * over-current, reset, link state, and L1 change
 191  */
 192 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
 193 /*
 194  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
 195  * latched in
 196  */
 197 #define XHCI_PORT_RW    ((1<<16))
 198 /*
 199  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
 200  * bits 2, 24, 28:31
 201  */
 202 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
 203
 204 /*
 205  * Given a port state, this function returns a value that would result in the
 206  * port being in the same state, if the value was written to the port status
 207  * control register.
 208  * Save Read Only (RO) bits and save read/write bits where
 209  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
 210  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
 211  */
 212 u32 xhci_port_state_to_neutral(u32 state)
 213 {
 214         /* Save read-only status and port state */
 215         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
 216 }
 217
 218 /*
 219  * find slot id based on port number.
 220  * @port: The one-based port number from one of the two split roothubs.
 221  */
 222 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 223                 u16 port)
 224 {
 225         int slot_id;
 226         int i;
 227         enum usb_device_speed speed;
 228
 229         slot_id = 0;
 230         for (i = 0; i < MAX_HC_SLOTS; i++) {
 231                 if (!xhci->devs[i])
 232                         continue;
 233                 speed = xhci->devs[i]->udev->speed;
 234                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
 235                                 && xhci->devs[i]->port == port) {
 236                         slot_id = i;
 237                         break;
 238                 }
 239         }
 240
 241         return slot_id;
 242 }
 243
 244 /*
 245  * Stop device
 246  * It issues stop endpoint command for EP 0 to 30. And wait the last command
 247  * to complete.
 248  * suspend will set to 1, if suspend bit need to set in command.
 249  */
 250 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
 251 {
 252         struct xhci_virt_device *virt_dev;
 253         struct xhci_command *cmd;
 254         unsigned long flags;
 255         int timeleft;
 256         int ret;
 257         int i;
 258
 259         ret = 0;
 260         virt_dev = xhci->devs[slot_id];
 261         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
 262         if (!cmd) {
 263                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
 264                 return -ENOMEM;
 265         }
 266
 267         spin_lock_irqsave(&xhci->lock, flags);
 268         for (i = LAST_EP_INDEX; i > 0; i--) {
 269                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
 270                         xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
 271         }
 272         cmd->command_trb = xhci->cmd_ring->enqueue;
 273         list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
 274         xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
 275         xhci_ring_cmd_db(xhci);
 276         spin_unlock_irqrestore(&xhci->lock, flags);
 277
 278         /* Wait for last stop endpoint command to finish */
 279         timeleft = wait_for_completion_interruptible_timeout(
 280                         cmd->completion,
 281                         USB_CTRL_SET_TIMEOUT);
 282         if (timeleft <= 0) {
 283                 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
 284                                 timeleft == 0 ? "Timeout" : "Signal");
 285                 spin_lock_irqsave(&xhci->lock, flags);
 286                 /* The timeout might have raced with the event ring handler, so
 287                  * only delete from the list if the item isn't poisoned.
 288                  */
 289                 if (cmd->cmd_list.next != LIST_POISON1)
 290                         list_del(&cmd->cmd_list);
 291                 spin_unlock_irqrestore(&xhci->lock, flags);
 292                 ret = -ETIME;
 293                 goto command_cleanup;
 294         }
 295
 296 command_cleanup:
 297         xhci_free_command(xhci, cmd);
 298         return ret;
 299 }
 300
 301 /*
 302  * Ring device, it rings the all doorbells unconditionally.
 303  */
 304 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
 305 {
 306         int i;
 307
 308         for (i = 0; i < LAST_EP_INDEX + 1; i++)
 309                 if (xhci->devs[slot_id]->eps[i].ring &&
 310                     xhci->devs[slot_id]->eps[i].ring->dequeue)
 311                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
 312
 313         return;
 314 }
 315
 316 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 317                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 318 {
 319         /* Don't allow the USB core to disable SuperSpeed ports. */
 320         if (hcd->speed == HCD_USB3) {
 321                 xhci_dbg(xhci, "Ignoring request to disable "
 322                                 "SuperSpeed port.\n");
 323                 return;
 324         }
 325
 326         /* Write 1 to disable the port */
 327         xhci_writel(xhci, port_status | PORT_PE, addr);
 328         port_status = xhci_readl(xhci, addr);
 329         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
 330                         wIndex, port_status);
 331 }
 332
 333 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
 334                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 335 {
 336         char *port_change_bit;
 337         u32 status;
 338
 339         switch (wValue) {
 340         case USB_PORT_FEAT_C_RESET:
 341                 status = PORT_RC;
 342                 port_change_bit = "reset";
 343                 break;
 344         case USB_PORT_FEAT_C_BH_PORT_RESET:
 345                 status = PORT_WRC;
 346                 port_change_bit = "warm(BH) reset";
 347                 break;
 348         case USB_PORT_FEAT_C_CONNECTION:
 349                 status = PORT_CSC;
 350                 port_change_bit = "connect";
 351                 break;
 352         case USB_PORT_FEAT_C_OVER_CURRENT:
 353                 status = PORT_OCC;
 354                 port_change_bit = "over-current";
 355                 break;
 356         case USB_PORT_FEAT_C_ENABLE:
 357                 status = PORT_PEC;
 358                 port_change_bit = "enable/disable";
 359                 break;
 360         case USB_PORT_FEAT_C_SUSPEND:
 361                 status = PORT_PLC;
 362                 port_change_bit = "suspend/resume";
 363                 break;
 364         case USB_PORT_FEAT_C_PORT_LINK_STATE:
 365                 status = PORT_PLC;
 366                 port_change_bit = "link state";
 367                 break;
 368         default:
 369                 /* Should never happen */
 370                 return;
 371         }
 372         /* Change bits are all write 1 to clear */
 373         xhci_writel(xhci, port_status | status, addr);
 374         port_status = xhci_readl(xhci, addr);
 375         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
 376                         port_change_bit, wIndex, port_status);
 377 }
 378
 379 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
 380 {
 381         int max_ports;
 382         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 383
 384         if (hcd->speed == HCD_USB3) {
 385                 max_ports = xhci->num_usb3_ports;
 386                 *port_array = xhci->usb3_ports;
 387         } else {
 388                 max_ports = xhci->num_usb2_ports;
 389                 *port_array = xhci->usb2_ports;
 390         }
 391
 392         return max_ports;
 393 }
 394
 395 /* Test and clear port RWC bit */
 396 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 397                                 int port_id, u32 port_bit)
 398 {
 399         u32 temp;
 400
 401         temp = xhci_readl(xhci, port_array[port_id]);
 402         if (temp & port_bit) {
 403                 temp = xhci_port_state_to_neutral(temp);
 404                 temp |= port_bit;
 405                 xhci_writel(xhci, temp, port_array[port_id]);
 406         }
 407 }
 408
 409 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 410                 u16 wIndex, char *buf, u16 wLength)
 411 {
 412         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 413         int max_ports;
 414         unsigned long flags;
 415         u32 temp, temp1, status;
 416         int retval = 0;
 417         __le32 __iomem **port_array;
 418         int slot_id;
 419         struct xhci_bus_state *bus_state;
 420         u16 link_state = 0;
 421
 422         max_ports = xhci_get_ports(hcd, &port_array);
 423         bus_state = &xhci->bus_state[hcd_index(hcd)];
 424
 425         spin_lock_irqsave(&xhci->lock, flags);
 426         switch (typeReq) {
 427         case GetHubStatus:
 428                 /* No power source, over-current reported per port */
 429                 memset(buf, 0, 4);
 430                 break;
 431         case GetHubDescriptor:
 432                 /* Check to make sure userspace is asking for the USB 3.0 hub
 433                  * descriptor for the USB 3.0 roothub.  If not, we stall the
 434                  * endpoint, like external hubs do.
 435                  */
 436                 if (hcd->speed == HCD_USB3 &&
 437                                 (wLength < USB_DT_SS_HUB_SIZE ||
 438                                  wValue != (USB_DT_SS_HUB << 8))) {
 439                         xhci_dbg(xhci, "Wrong hub descriptor type for "
 440                                         "USB 3.0 roothub.\n");
 441                         goto error;
 442                 }
 443                 xhci_hub_descriptor(hcd, xhci,
 444                                 (struct usb_hub_descriptor *) buf);
 445                 break;
 446         case GetPortStatus:
 447                 if (!wIndex || wIndex > max_ports)
 448                         goto error;
 449                 wIndex--;
 450                 status = 0;
 451                 temp = xhci_readl(xhci, port_array[wIndex]);
 452                 if (temp == 0xffffffff) {
 453                         retval = -ENODEV;
 454                         break;
 455                 }
 456                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
 457
 458                 /* wPortChange bits */
 459                 if (temp & PORT_CSC)
 460                         status |= USB_PORT_STAT_C_CONNECTION << 16;
 461                 if (temp & PORT_PEC)
 462                         status |= USB_PORT_STAT_C_ENABLE << 16;
 463                 if ((temp & PORT_OCC))
 464                         status |= USB_PORT_STAT_C_OVERCURRENT << 16;
 465                 if ((temp & PORT_RC))
 466                         status |= USB_PORT_STAT_C_RESET << 16;
 467                 /* USB3.0 only */
 468                 if (hcd->speed == HCD_USB3) {
 469                         if ((temp & PORT_PLC))
 470                                 status |= USB_PORT_STAT_C_LINK_STATE << 16;
 471                         if ((temp & PORT_WRC))
 472                                 status |= USB_PORT_STAT_C_BH_RESET << 16;
 473                 }
 474
 475                 if (hcd->speed != HCD_USB3) {
 476                         if ((temp & PORT_PLS_MASK) == XDEV_U3
 477                                         && (temp & PORT_POWER))
 478                                 status |= USB_PORT_STAT_SUSPEND;
 479                 }
 480                 if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
 481                                 !DEV_SUPERSPEED(temp)) {
 482                         if ((temp & PORT_RESET) || !(temp & PORT_PE))
 483                                 goto error;
 484                         if (time_after_eq(jiffies,
 485                                         bus_state->resume_done[wIndex])) {
 486                                 xhci_dbg(xhci, "Resume USB2 port %d\n",
 487                                         wIndex + 1);
 488                                 bus_state->resume_done[wIndex] = 0;
 489                                 temp1 = xhci_port_state_to_neutral(temp);
 490                                 temp1 &= ~PORT_PLS_MASK;
 491                                 temp1 |= PORT_LINK_STROBE | XDEV_U0;
 492                                 xhci_writel(xhci, temp1, port_array[wIndex]);
 493
 494                                 xhci_dbg(xhci, "set port %d resume\n",
 495                                         wIndex + 1);
 496                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 497                                                                  wIndex + 1);
 498                                 if (!slot_id) {
 499                                         xhci_dbg(xhci, "slot_id is zero\n");
 500                                         goto error;
 501                                 }
 502                                 xhci_ring_device(xhci, slot_id);
 503                                 bus_state->port_c_suspend |= 1 << wIndex;
 504                                 bus_state->suspended_ports &= ~(1 << wIndex);
 505                         } else {
 506                                 /*
 507                                  * The resume has been signaling for less than
 508                                  * 20ms. Report the port status as SUSPEND,
 509                                  * let the usbcore check port status again
 510                                  * and clear resume signaling later.
 511                                  */
 512                                 status |= USB_PORT_STAT_SUSPEND;
 513                         }
 514                 }
 515                 if ((temp & PORT_PLS_MASK) == XDEV_U0
 516                         && (temp & PORT_POWER)
 517                         && (bus_state->suspended_ports & (1 << wIndex))) {
 518                         bus_state->suspended_ports &= ~(1 << wIndex);
 519                         if (hcd->speed != HCD_USB3)
 520                                 bus_state->port_c_suspend |= 1 << wIndex;
 521                 }
 522                 if (temp & PORT_CONNECT) {
 523                         status |= USB_PORT_STAT_CONNECTION;
 524                         status |= xhci_port_speed(temp);
 525                 }
 526                 if (temp & PORT_PE)
 527                         status |= USB_PORT_STAT_ENABLE;
 528                 if (temp & PORT_OC)
 529                         status |= USB_PORT_STAT_OVERCURRENT;
 530                 if (temp & PORT_RESET)
 531                         status |= USB_PORT_STAT_RESET;
 532                 if (temp & PORT_POWER) {
 533                         if (hcd->speed == HCD_USB3)
 534                                 status |= USB_SS_PORT_STAT_POWER;
 535                         else
 536                                 status |= USB_PORT_STAT_POWER;
 537                 }
 538                 /* Port Link State */
 539                 if (hcd->speed == HCD_USB3) {
 540                         /* resume state is a xHCI internal state.
 541                          * Do not report it to usb core.
 542                          */
 543                         if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
 544                                 status |= (temp & PORT_PLS_MASK);
 545                 }
 546                 if (bus_state->port_c_suspend & (1 << wIndex))
 547                         status |= 1 << USB_PORT_FEAT_C_SUSPEND;
 548                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
 549                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
 550                 break;
 551         case SetPortFeature:
 552                 if (wValue == USB_PORT_FEAT_LINK_STATE)
 553                         link_state = (wIndex & 0xff00) >> 3;
 554                 wIndex &= 0xff;
 555                 if (!wIndex || wIndex > max_ports)
 556                         goto error;
 557                 wIndex--;
 558                 temp = xhci_readl(xhci, port_array[wIndex]);
 559                 if (temp == 0xffffffff) {
 560                         retval = -ENODEV;
 561                         break;
 562                 }
 563                 temp = xhci_port_state_to_neutral(temp);
 564                 /* FIXME: What new port features do we need to support? */
 565                 switch (wValue) {
 566                 case USB_PORT_FEAT_SUSPEND:
 567                         temp = xhci_readl(xhci, port_array[wIndex]);
 568                         /* In spec software should not attempt to suspend
 569                          * a port unless the port reports that it is in the
 570                          * enabled (PED = ‘1’,PLS < ‘3’) state.
 571                          */
 572                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
 573                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
 574                                 xhci_warn(xhci, "USB core suspending device "
 575                                           "not in U0/U1/U2.\n");
 576                                 goto error;
 577                         }
 578
 579                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 580                                         wIndex + 1);
 581                         if (!slot_id) {
 582                                 xhci_warn(xhci, "slot_id is zero\n");
 583                                 goto error;
 584                         }
 585                         /* unlock to execute stop endpoint commands */
 586                         spin_unlock_irqrestore(&xhci->lock, flags);
 587                         xhci_stop_device(xhci, slot_id, 1);
 588                         spin_lock_irqsave(&xhci->lock, flags);
 589
 590                         temp = xhci_port_state_to_neutral(temp);
 591                         temp &= ~PORT_PLS_MASK;
 592                         temp |= PORT_LINK_STROBE | XDEV_U3;
 593                         xhci_writel(xhci, temp, port_array[wIndex]);
 594
 595                         spin_unlock_irqrestore(&xhci->lock, flags);
 596                         msleep(10); /* wait device to enter */
 597                         spin_lock_irqsave(&xhci->lock, flags);
 598
 599                         temp = xhci_readl(xhci, port_array[wIndex]);
 600                         bus_state->suspended_ports |= 1 << wIndex;
 601                         break;
 602                 case USB_PORT_FEAT_LINK_STATE:
 603                         temp = xhci_readl(xhci, port_array[wIndex]);
 604                         /* Software should not attempt to set
 605                          * port link state above '5' (Rx.Detect) and the port
 606                          * must be enabled.
 607                          */
 608                         if ((temp & PORT_PE) == 0 ||
 609                                 (link_state > USB_SS_PORT_LS_RX_DETECT)) {
 610                                 xhci_warn(xhci, "Cannot set link state.\n");
 611                                 goto error;
 612                         }
 613
 614                         if (link_state == USB_SS_PORT_LS_U3) {
 615                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 616                                                 wIndex + 1);
 617                                 if (slot_id) {
 618                                         /* unlock to execute stop endpoint
 619                                          * commands */
 620                                         spin_unlock_irqrestore(&xhci->lock,
 621                                                                 flags);
 622                                         xhci_stop_device(xhci, slot_id, 1);
 623                                         spin_lock_irqsave(&xhci->lock, flags);
 624                                 }
 625                         }
 626
 627                         temp = xhci_port_state_to_neutral(temp);
 628                         temp &= ~PORT_PLS_MASK;
 629                         temp |= PORT_LINK_STROBE | link_state;
 630                         xhci_writel(xhci, temp, port_array[wIndex]);
 631
 632                         spin_unlock_irqrestore(&xhci->lock, flags);
 633                         msleep(20); /* wait device to enter */
 634                         spin_lock_irqsave(&xhci->lock, flags);
 635
 636                         temp = xhci_readl(xhci, port_array[wIndex]);
 637                         if (link_state == USB_SS_PORT_LS_U3)
 638                                 bus_state->suspended_ports |= 1 << wIndex;
 639                         break;
 640                 case USB_PORT_FEAT_POWER:
 641                         /*
 642                          * Turn on ports, even if there isn't per-port switching.
 643                          * HC will report connect events even before this is set.
 644                          * However, khubd will ignore the roothub events until
 645                          * the roothub is registered.
 646                          */
 647                         xhci_writel(xhci, temp | PORT_POWER,
 648                                         port_array[wIndex]);
 649
 650                         temp = xhci_readl(xhci, port_array[wIndex]);
 651                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
 652                         break;
 653                 case USB_PORT_FEAT_RESET:
 654                         temp = (temp | PORT_RESET);
 655                         xhci_writel(xhci, temp, port_array[wIndex]);
 656
 657                         temp = xhci_readl(xhci, port_array[wIndex]);
 658                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
 659                         break;
 660                 case USB_PORT_FEAT_BH_PORT_RESET:
 661                         temp |= PORT_WR;
 662                         xhci_writel(xhci, temp, port_array[wIndex]);
 663
 664                         temp = xhci_readl(xhci, port_array[wIndex]);
 665                         break;
 666                 default:
 667                         goto error;
 668                 }
 669                 /* unblock any posted writes */
 670                 temp = xhci_readl(xhci, port_array[wIndex]);
 671                 break;
 672         case ClearPortFeature:
 673                 if (!wIndex || wIndex > max_ports)
 674                         goto error;
 675                 wIndex--;
 676                 temp = xhci_readl(xhci, port_array[wIndex]);
 677                 if (temp == 0xffffffff) {
 678                         retval = -ENODEV;
 679                         break;
 680                 }
 681                 /* FIXME: What new port features do we need to support? */
 682                 temp = xhci_port_state_to_neutral(temp);
 683                 switch (wValue) {
 684                 case USB_PORT_FEAT_SUSPEND:
 685                         temp = xhci_readl(xhci, port_array[wIndex]);
 686                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
 687                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
 688                         if (temp & PORT_RESET)
 689                                 goto error;
 690                         if ((temp & PORT_PLS_MASK) == XDEV_U3) {
 691                                 if ((temp & PORT_PE) == 0)
 692                                         goto error;
 693
 694                                 temp = xhci_port_state_to_neutral(temp);
 695                                 temp &= ~PORT_PLS_MASK;
 696                                 temp |= PORT_LINK_STROBE | XDEV_RESUME;
 697                                 xhci_writel(xhci, temp,
 698                                                 port_array[wIndex]);
 699
 700                                 spin_unlock_irqrestore(&xhci->lock,
 701                                                        flags);
 702                                 msleep(20);
 703                                 spin_lock_irqsave(&xhci->lock, flags);
 704
 705                                 temp = xhci_readl(xhci,
 706                                                 port_array[wIndex]);
 707                                 temp = xhci_port_state_to_neutral(temp);
 708                                 temp &= ~PORT_PLS_MASK;
 709                                 temp |= PORT_LINK_STROBE | XDEV_U0;
 710                                 xhci_writel(xhci, temp,
 711                                                 port_array[wIndex]);
 712                         }
 713                         bus_state->port_c_suspend |= 1 << wIndex;
 714
 715                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 716                                         wIndex + 1);
 717                         if (!slot_id) {
 718                                 xhci_dbg(xhci, "slot_id is zero\n");
 719                                 goto error;
 720                         }
 721                         xhci_ring_device(xhci, slot_id);
 722                         break;
 723                 case USB_PORT_FEAT_C_SUSPEND:
 724                         bus_state->port_c_suspend &= ~(1 << wIndex);
 725                 case USB_PORT_FEAT_C_RESET:
 726                 case USB_PORT_FEAT_C_BH_PORT_RESET:
 727                 case USB_PORT_FEAT_C_CONNECTION:
 728                 case USB_PORT_FEAT_C_OVER_CURRENT:
 729                 case USB_PORT_FEAT_C_ENABLE:
 730                 case USB_PORT_FEAT_C_PORT_LINK_STATE:
 731                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
 732                                         port_array[wIndex], temp);
 733                         break;
 734                 case USB_PORT_FEAT_ENABLE:
 735                         xhci_disable_port(hcd, xhci, wIndex,
 736                                         port_array[wIndex], temp);
 737                         break;
 738                 default:
 739                         goto error;
 740                 }
 741                 break;
 742         default:
 743 error:
 744                 /* "stall" on error */
 745                 retval = -EPIPE;
 746         }
 747         spin_unlock_irqrestore(&xhci->lock, flags);
 748         return retval;
 749 }
 750
 751 /*
 752  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
 753  * Ports are 0-indexed from the HCD point of view,
 754  * and 1-indexed from the USB core pointer of view.
 755  *
 756  * Note that the status change bits will be cleared as soon as a port status
 757  * change event is generated, so we use the saved status from that event.
 758  */
 759 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
 760 {
 761         unsigned long flags;
 762         u32 temp, status;
 763         u32 mask;
 764         int i, retval;
 765         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 766         int max_ports;
 767         __le32 __iomem **port_array;
 768         struct xhci_bus_state *bus_state;
 769
 770         max_ports = xhci_get_ports(hcd, &port_array);
 771         bus_state = &xhci->bus_state[hcd_index(hcd)];
 772
 773         /* Initial status is no changes */
 774         retval = (max_ports + 8) / 8;
 775         memset(buf, 0, retval);
 776         status = 0;
 777
 778         mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC;
 779
 780         spin_lock_irqsave(&xhci->lock, flags);
 781         /* For each port, did anything change?  If so, set that bit in buf. */
 782         for (i = 0; i < max_ports; i++) {
 783                 temp = xhci_readl(xhci, port_array[i]);
 784                 if (temp == 0xffffffff) {
 785                         retval = -ENODEV;
 786                         break;
 787                 }
 788                 if ((temp & mask) != 0 ||
 789                         (bus_state->port_c_suspend & 1 << i) ||
 790                         (bus_state->resume_done[i] && time_after_eq(
 791                             jiffies, bus_state->resume_done[i]))) {
 792                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
 793                         status = 1;
 794                 }
 795         }
 796         spin_unlock_irqrestore(&xhci->lock, flags);
 797         return status ? retval : 0;
 798 }
 799
 800 #ifdef CONFIG_PM
 801
 802 int xhci_bus_suspend(struct usb_hcd *hcd)
 803 {
 804         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 805         int max_ports, port_index;
 806         __le32 __iomem **port_array;
 807         struct xhci_bus_state *bus_state;
 808         unsigned long flags;
 809
 810         max_ports = xhci_get_ports(hcd, &port_array);
 811         bus_state = &xhci->bus_state[hcd_index(hcd)];
 812
 813         spin_lock_irqsave(&xhci->lock, flags);
 814
 815         if (hcd->self.root_hub->do_remote_wakeup) {
 816                 port_index = max_ports;
 817                 while (port_index--) {
 818                         if (bus_state->resume_done[port_index] != 0) {
 819                                 spin_unlock_irqrestore(&xhci->lock, flags);
 820                                 xhci_dbg(xhci, "suspend failed because "
 821                                                 "port %d is resuming\n",
 822                                                 port_index + 1);
 823                                 return -EBUSY;
 824                         }
 825                 }
 826         }
 827
 828         port_index = max_ports;
 829         bus_state->bus_suspended = 0;
 830         while (port_index--) {
 831                 /* suspend the port if the port is not suspended */
 832                 u32 t1, t2;
 833                 int slot_id;
 834
 835                 t1 = xhci_readl(xhci, port_array[port_index]);
 836                 t2 = xhci_port_state_to_neutral(t1);
 837
 838                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
 839                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
 840                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 841                                         port_index + 1);
 842                         if (slot_id) {
 843                                 spin_unlock_irqrestore(&xhci->lock, flags);
 844                                 xhci_stop_device(xhci, slot_id, 1);
 845                                 spin_lock_irqsave(&xhci->lock, flags);
 846                         }
 847                         t2 &= ~PORT_PLS_MASK;
 848                         t2 |= PORT_LINK_STROBE | XDEV_U3;
 849                         set_bit(port_index, &bus_state->bus_suspended);
 850                 }
 851                 if (hcd->self.root_hub->do_remote_wakeup) {
 852                         if (t1 & PORT_CONNECT) {
 853                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
 854                                 t2 &= ~PORT_WKCONN_E;
 855                         } else {
 856                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
 857                                 t2 &= ~PORT_WKDISC_E;
 858                         }
 859                 } else
 860                         t2 &= ~PORT_WAKE_BITS;
 861
 862                 t1 = xhci_port_state_to_neutral(t1);
 863                 if (t1 != t2)
 864                         xhci_writel(xhci, t2, port_array[port_index]);
 865
 866                 if (hcd->speed != HCD_USB3) {
 867                         /* enable remote wake up for USB 2.0 */
 868                         __le32 __iomem *addr;
 869                         u32 tmp;
 870
 871                         /* Add one to the port status register address to get
 872                          * the port power control register address.
 873                          */
 874                         addr = port_array[port_index] + 1;
 875                         tmp = xhci_readl(xhci, addr);
 876                         tmp |= PORT_RWE;
 877                         xhci_writel(xhci, tmp, addr);
 878                 }
 879         }
 880         hcd->state = HC_STATE_SUSPENDED;
 881         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
 882         spin_unlock_irqrestore(&xhci->lock, flags);
 883         return 0;
 884 }
 885
 886 int xhci_bus_resume(struct usb_hcd *hcd)
 887 {
 888         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 889         int max_ports, port_index;
 890         __le32 __iomem **port_array;
 891         struct xhci_bus_state *bus_state;
 892         u32 temp;
 893         unsigned long flags;
 894
 895         max_ports = xhci_get_ports(hcd, &port_array);
 896         bus_state = &xhci->bus_state[hcd_index(hcd)];
 897
 898         if (time_before(jiffies, bus_state->next_statechange))
 899                 msleep(5);
 900
 901         spin_lock_irqsave(&xhci->lock, flags);
 902         if (!HCD_HW_ACCESSIBLE(hcd)) {
 903                 spin_unlock_irqrestore(&xhci->lock, flags);
 904                 return -ESHUTDOWN;
 905         }
 906
 907         /* delay the irqs */
 908         temp = xhci_readl(xhci, &xhci->op_regs->command);
 909         temp &= ~CMD_EIE;
 910         xhci_writel(xhci, temp, &xhci->op_regs->command);
 911
 912         port_index = max_ports;
 913         while (port_index--) {
 914                 /* Check whether need resume ports. If needed
 915                    resume port and disable remote wakeup */
 916                 u32 temp;
 917                 int slot_id;
 918
 919                 temp = xhci_readl(xhci, port_array[port_index]);
 920                 if (DEV_SUPERSPEED(temp))
 921                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
 922                 else
 923                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
 924                 if (test_bit(port_index, &bus_state->bus_suspended) &&
 925                     (temp & PORT_PLS_MASK)) {
 926                         if (DEV_SUPERSPEED(temp)) {
 927                                 temp = xhci_port_state_to_neutral(temp);
 928                                 temp &= ~PORT_PLS_MASK;
 929                                 temp |= PORT_LINK_STROBE | XDEV_U0;
 930                                 xhci_writel(xhci, temp, port_array[port_index]);
 931                         } else {
 932                                 temp = xhci_port_state_to_neutral(temp);
 933                                 temp &= ~PORT_PLS_MASK;
 934                                 temp |= PORT_LINK_STROBE | XDEV_RESUME;
 935                                 xhci_writel(xhci, temp, port_array[port_index]);
 936
 937                                 spin_unlock_irqrestore(&xhci->lock, flags);
 938                                 msleep(20);
 939                                 spin_lock_irqsave(&xhci->lock, flags);
 940
 941                                 temp = xhci_readl(xhci, port_array[port_index]);
 942                                 temp = xhci_port_state_to_neutral(temp);
 943                                 temp &= ~PORT_PLS_MASK;
 944                                 temp |= PORT_LINK_STROBE | XDEV_U0;
 945                                 xhci_writel(xhci, temp, port_array[port_index]);
 946                         }
 947                         /* wait for the port to enter U0 and report port link
 948                          * state change.
 949                          */
 950                         spin_unlock_irqrestore(&xhci->lock, flags);
 951                         msleep(20);
 952                         spin_lock_irqsave(&xhci->lock, flags);
 953
 954                         /* Clear PLC */
 955                         xhci_test_and_clear_bit(xhci, port_array, port_index,
 956                                                 PORT_PLC);
 957
 958                         slot_id = xhci_find_slot_id_by_port(hcd,
 959                                         xhci, port_index + 1);
 960                         if (slot_id)
 961                                 xhci_ring_device(xhci, slot_id);
 962                 } else
 963                         xhci_writel(xhci, temp, port_array[port_index]);
 964
 965                 if (hcd->speed != HCD_USB3) {
 966                         /* disable remote wake up for USB 2.0 */
 967                         __le32 __iomem *addr;
 968                         u32 tmp;
 969
 970                         /* Add one to the port status register address to get
 971                          * the port power control register address.
 972                          */
 973                         addr = port_array[port_index] + 1;
 974                         tmp = xhci_readl(xhci, addr);
 975                         tmp &= ~PORT_RWE;
 976                         xhci_writel(xhci, tmp, addr);
 977                 }
 978         }
 979
 980         (void) xhci_readl(xhci, &xhci->op_regs->command);
 981
 982         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
 983         /* re-enable irqs */
 984         temp = xhci_readl(xhci, &xhci->op_regs->command);
 985         temp |= CMD_EIE;
 986         xhci_writel(xhci, temp, &xhci->op_regs->command);
 987         temp = xhci_readl(xhci, &xhci->op_regs->command);
 988
 989         spin_unlock_irqrestore(&xhci->lock, flags);
 990         return 0;
 991 }
 992
 993 #endif  /* CONFIG_PM */