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[SCSI] qla2xxx: Acquire hardware lock while manipulating dsd list.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / qla2xxx / qla_os.c
blob2caab83c4c9fd5214bfaaafe7a7239524b750ed9
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2011 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16
17 #include <scsi/scsi_tcq.h>
18 #include <scsi/scsicam.h>
19 #include <scsi/scsi_transport.h>
20 #include <scsi/scsi_transport_fc.h>
21
22 /*
23 * Driver version
24 */
25 char qla2x00_version_str[40];
26
27 static int apidev_major;
28
29 /*
30 * SRB allocation cache
31 */
32 static struct kmem_cache *srb_cachep;
33
34 /*
35 * CT6 CTX allocation cache
36 */
37 static struct kmem_cache *ctx_cachep;
38 /*
39 * error level for logging
40 */
41 int ql_errlev = ql_log_all;
42
43 int ql2xlogintimeout = 20;
44 module_param(ql2xlogintimeout, int, S_IRUGO);
45 MODULE_PARM_DESC(ql2xlogintimeout,
46 "Login timeout value in seconds.");
47
48 int qlport_down_retry;
49 module_param(qlport_down_retry, int, S_IRUGO);
50 MODULE_PARM_DESC(qlport_down_retry,
51 "Maximum number of command retries to a port that returns "
52 "a PORT-DOWN status.");
53
54 int ql2xplogiabsentdevice;
55 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
56 MODULE_PARM_DESC(ql2xplogiabsentdevice,
57 "Option to enable PLOGI to devices that are not present after "
58 "a Fabric scan. This is needed for several broken switches. "
59 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
60
61 int ql2xloginretrycount = 0;
62 module_param(ql2xloginretrycount, int, S_IRUGO);
63 MODULE_PARM_DESC(ql2xloginretrycount,
64 "Specify an alternate value for the NVRAM login retry count.");
65
66 int ql2xallocfwdump = 1;
67 module_param(ql2xallocfwdump, int, S_IRUGO);
68 MODULE_PARM_DESC(ql2xallocfwdump,
69 "Option to enable allocation of memory for a firmware dump "
70 "during HBA initialization. Memory allocation requirements "
71 "vary by ISP type. Default is 1 - allocate memory.");
72
73 int ql2xextended_error_logging;
74 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(ql2xextended_error_logging,
76 "Option to enable extended error logging,\n"
77 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
78 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
79 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
80 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
81 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
82 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
83 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
84 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
85 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
86 "\t\tDo LOGICAL OR of the value to enable more than one level");
87
88 int ql2xshiftctondsd = 6;
89 module_param(ql2xshiftctondsd, int, S_IRUGO);
90 MODULE_PARM_DESC(ql2xshiftctondsd,
91 "Set to control shifting of command type processing "
92 "based on total number of SG elements.");
93
94 static void qla2x00_free_device(scsi_qla_host_t *);
95
96 int ql2xfdmienable=1;
97 module_param(ql2xfdmienable, int, S_IRUGO);
98 MODULE_PARM_DESC(ql2xfdmienable,
99 "Enables FDMI registrations. "
100 "0 - no FDMI. Default is 1 - perform FDMI.");
101
102 #define MAX_Q_DEPTH 32
103 static int ql2xmaxqdepth = MAX_Q_DEPTH;
104 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
105 MODULE_PARM_DESC(ql2xmaxqdepth,
106 "Maximum queue depth to report for target devices.");
107
108 /* Do not change the value of this after module load */
109 int ql2xenabledif = 0;
110 module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
111 MODULE_PARM_DESC(ql2xenabledif,
112 " Enable T10-CRC-DIF "
113 " Default is 0 - No DIF Support. 1 - Enable it"
114 ", 2 - Enable DIF for all types, except Type 0.");
115
116 int ql2xenablehba_err_chk = 2;
117 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
118 MODULE_PARM_DESC(ql2xenablehba_err_chk,
119 " Enable T10-CRC-DIF Error isolation by HBA:\n"
120 " Default is 1.\n"
121 " 0 -- Error isolation disabled\n"
122 " 1 -- Error isolation enabled only for DIX Type 0\n"
123 " 2 -- Error isolation enabled for all Types\n");
124
125 int ql2xiidmaenable=1;
126 module_param(ql2xiidmaenable, int, S_IRUGO);
127 MODULE_PARM_DESC(ql2xiidmaenable,
128 "Enables iIDMA settings "
129 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
130
131 int ql2xmaxqueues = 1;
132 module_param(ql2xmaxqueues, int, S_IRUGO);
133 MODULE_PARM_DESC(ql2xmaxqueues,
134 "Enables MQ settings "
135 "Default is 1 for single queue. Set it to number "
136 "of queues in MQ mode.");
137
138 int ql2xmultique_tag;
139 module_param(ql2xmultique_tag, int, S_IRUGO);
140 MODULE_PARM_DESC(ql2xmultique_tag,
141 "Enables CPU affinity settings for the driver "
142 "Default is 0 for no affinity of request and response IO. "
143 "Set it to 1 to turn on the cpu affinity.");
144
145 int ql2xfwloadbin;
146 module_param(ql2xfwloadbin, int, S_IRUGO);
147 MODULE_PARM_DESC(ql2xfwloadbin,
148 "Option to specify location from which to load ISP firmware:.\n"
149 " 2 -- load firmware via the request_firmware() (hotplug).\n"
150 " interface.\n"
151 " 1 -- load firmware from flash.\n"
152 " 0 -- use default semantics.\n");
153
154 int ql2xetsenable;
155 module_param(ql2xetsenable, int, S_IRUGO);
156 MODULE_PARM_DESC(ql2xetsenable,
157 "Enables firmware ETS burst."
158 "Default is 0 - skip ETS enablement.");
159
160 int ql2xdbwr = 1;
161 module_param(ql2xdbwr, int, S_IRUGO);
162 MODULE_PARM_DESC(ql2xdbwr,
163 "Option to specify scheme for request queue posting.\n"
164 " 0 -- Regular doorbell.\n"
165 " 1 -- CAMRAM doorbell (faster).\n");
166
167 int ql2xtargetreset = 1;
168 module_param(ql2xtargetreset, int, S_IRUGO);
169 MODULE_PARM_DESC(ql2xtargetreset,
170 "Enable target reset."
171 "Default is 1 - use hw defaults.");
172
173 int ql2xgffidenable;
174 module_param(ql2xgffidenable, int, S_IRUGO);
175 MODULE_PARM_DESC(ql2xgffidenable,
176 "Enables GFF_ID checks of port type. "
177 "Default is 0 - Do not use GFF_ID information.");
178
179 int ql2xasynctmfenable;
180 module_param(ql2xasynctmfenable, int, S_IRUGO);
181 MODULE_PARM_DESC(ql2xasynctmfenable,
182 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
183 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
184
185 int ql2xdontresethba;
186 module_param(ql2xdontresethba, int, S_IRUGO);
187 MODULE_PARM_DESC(ql2xdontresethba,
188 "Option to specify reset behaviour.\n"
189 " 0 (Default) -- Reset on failure.\n"
190 " 1 -- Do not reset on failure.\n");
191
192 uint ql2xmaxlun = MAX_LUNS;
193 module_param(ql2xmaxlun, uint, S_IRUGO);
194 MODULE_PARM_DESC(ql2xmaxlun,
195 "Defines the maximum LU number to register with the SCSI "
196 "midlayer. Default is 65535.");
197
198 /*
199 * SCSI host template entry points
200 */
201 static int qla2xxx_slave_configure(struct scsi_device * device);
202 static int qla2xxx_slave_alloc(struct scsi_device *);
203 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
204 static void qla2xxx_scan_start(struct Scsi_Host *);
205 static void qla2xxx_slave_destroy(struct scsi_device *);
206 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
207 static int qla2xxx_eh_abort(struct scsi_cmnd *);
208 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
209 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
210 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
211 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
212
213 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
214 static int qla2x00_change_queue_type(struct scsi_device *, int);
215
216 struct scsi_host_template qla2xxx_driver_template = {
217 .module = THIS_MODULE,
218 .name = QLA2XXX_DRIVER_NAME,
219 .queuecommand = qla2xxx_queuecommand,
220
221 .eh_abort_handler = qla2xxx_eh_abort,
222 .eh_device_reset_handler = qla2xxx_eh_device_reset,
223 .eh_target_reset_handler = qla2xxx_eh_target_reset,
224 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
225 .eh_host_reset_handler = qla2xxx_eh_host_reset,
226
227 .slave_configure = qla2xxx_slave_configure,
228
229 .slave_alloc = qla2xxx_slave_alloc,
230 .slave_destroy = qla2xxx_slave_destroy,
231 .scan_finished = qla2xxx_scan_finished,
232 .scan_start = qla2xxx_scan_start,
233 .change_queue_depth = qla2x00_change_queue_depth,
234 .change_queue_type = qla2x00_change_queue_type,
235 .this_id = -1,
236 .cmd_per_lun = 3,
237 .use_clustering = ENABLE_CLUSTERING,
238 .sg_tablesize = SG_ALL,
239
240 .max_sectors = 0xFFFF,
241 .shost_attrs = qla2x00_host_attrs,
242 };
243
244 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
245 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
246
247 /* TODO Convert to inlines
248 *
249 * Timer routines
250 */
251
252 __inline__ void
253 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
254 {
255 init_timer(&vha->timer);
256 vha->timer.expires = jiffies + interval * HZ;
257 vha->timer.data = (unsigned long)vha;
258 vha->timer.function = (void (*)(unsigned long))func;
259 add_timer(&vha->timer);
260 vha->timer_active = 1;
261 }
262
263 static inline void
264 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
265 {
266 /* Currently used for 82XX only. */
267 if (vha->device_flags & DFLG_DEV_FAILED) {
268 ql_dbg(ql_dbg_timer, vha, 0x600d,
269 "Device in a failed state, returning.\n");
270 return;
271 }
272
273 mod_timer(&vha->timer, jiffies + interval * HZ);
274 }
275
276 static __inline__ void
277 qla2x00_stop_timer(scsi_qla_host_t *vha)
278 {
279 del_timer_sync(&vha->timer);
280 vha->timer_active = 0;
281 }
282
283 static int qla2x00_do_dpc(void *data);
284
285 static void qla2x00_rst_aen(scsi_qla_host_t *);
286
287 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
288 struct req_que **, struct rsp_que **);
289 static void qla2x00_free_fw_dump(struct qla_hw_data *);
290 static void qla2x00_mem_free(struct qla_hw_data *);
291 static void qla2x00_sp_free_dma(srb_t *);
292
293 /* -------------------------------------------------------------------------- */
294 static int qla2x00_alloc_queues(struct qla_hw_data *ha)
295 {
296 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
297 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
298 GFP_KERNEL);
299 if (!ha->req_q_map) {
300 ql_log(ql_log_fatal, vha, 0x003b,
301 "Unable to allocate memory for request queue ptrs.\n");
302 goto fail_req_map;
303 }
304
305 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
306 GFP_KERNEL);
307 if (!ha->rsp_q_map) {
308 ql_log(ql_log_fatal, vha, 0x003c,
309 "Unable to allocate memory for response queue ptrs.\n");
310 goto fail_rsp_map;
311 }
312 set_bit(0, ha->rsp_qid_map);
313 set_bit(0, ha->req_qid_map);
314 return 1;
315
316 fail_rsp_map:
317 kfree(ha->req_q_map);
318 ha->req_q_map = NULL;
319 fail_req_map:
320 return -ENOMEM;
321 }
322
323 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
324 {
325 if (req && req->ring)
326 dma_free_coherent(&ha->pdev->dev,
327 (req->length + 1) * sizeof(request_t),
328 req->ring, req->dma);
329
330 kfree(req);
331 req = NULL;
332 }
333
334 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
335 {
336 if (rsp && rsp->ring)
337 dma_free_coherent(&ha->pdev->dev,
338 (rsp->length + 1) * sizeof(response_t),
339 rsp->ring, rsp->dma);
340
341 kfree(rsp);
342 rsp = NULL;
343 }
344
345 static void qla2x00_free_queues(struct qla_hw_data *ha)
346 {
347 struct req_que *req;
348 struct rsp_que *rsp;
349 int cnt;
350
351 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
352 req = ha->req_q_map[cnt];
353 qla2x00_free_req_que(ha, req);
354 }
355 kfree(ha->req_q_map);
356 ha->req_q_map = NULL;
357
358 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
359 rsp = ha->rsp_q_map[cnt];
360 qla2x00_free_rsp_que(ha, rsp);
361 }
362 kfree(ha->rsp_q_map);
363 ha->rsp_q_map = NULL;
364 }
365
366 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
367 {
368 uint16_t options = 0;
369 int ques, req, ret;
370 struct qla_hw_data *ha = vha->hw;
371
372 if (!(ha->fw_attributes & BIT_6)) {
373 ql_log(ql_log_warn, vha, 0x00d8,
374 "Firmware is not multi-queue capable.\n");
375 goto fail;
376 }
377 if (ql2xmultique_tag) {
378 /* create a request queue for IO */
379 options |= BIT_7;
380 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
381 QLA_DEFAULT_QUE_QOS);
382 if (!req) {
383 ql_log(ql_log_warn, vha, 0x00e0,
384 "Failed to create request queue.\n");
385 goto fail;
386 }
387 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
388 vha->req = ha->req_q_map[req];
389 options |= BIT_1;
390 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
391 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
392 if (!ret) {
393 ql_log(ql_log_warn, vha, 0x00e8,
394 "Failed to create response queue.\n");
395 goto fail2;
396 }
397 }
398 ha->flags.cpu_affinity_enabled = 1;
399 ql_dbg(ql_dbg_multiq, vha, 0xc007,
400 "CPU affinity mode enalbed, "
401 "no. of response queues:%d no. of request queues:%d.\n",
402 ha->max_rsp_queues, ha->max_req_queues);
403 ql_dbg(ql_dbg_init, vha, 0x00e9,
404 "CPU affinity mode enalbed, "
405 "no. of response queues:%d no. of request queues:%d.\n",
406 ha->max_rsp_queues, ha->max_req_queues);
407 }
408 return 0;
409 fail2:
410 qla25xx_delete_queues(vha);
411 destroy_workqueue(ha->wq);
412 ha->wq = NULL;
413 fail:
414 ha->mqenable = 0;
415 kfree(ha->req_q_map);
416 kfree(ha->rsp_q_map);
417 ha->max_req_queues = ha->max_rsp_queues = 1;
418 return 1;
419 }
420
421 static char *
422 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
423 {
424 struct qla_hw_data *ha = vha->hw;
425 static char *pci_bus_modes[] = {
426 "33", "66", "100", "133",
427 };
428 uint16_t pci_bus;
429
430 strcpy(str, "PCI");
431 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
432 if (pci_bus) {
433 strcat(str, "-X (");
434 strcat(str, pci_bus_modes[pci_bus]);
435 } else {
436 pci_bus = (ha->pci_attr & BIT_8) >> 8;
437 strcat(str, " (");
438 strcat(str, pci_bus_modes[pci_bus]);
439 }
440 strcat(str, " MHz)");
441
442 return (str);
443 }
444
445 static char *
446 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
447 {
448 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
449 struct qla_hw_data *ha = vha->hw;
450 uint32_t pci_bus;
451 int pcie_reg;
452
453 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
454 if (pcie_reg) {
455 char lwstr[6];
456 uint16_t pcie_lstat, lspeed, lwidth;
457
458 pcie_reg += 0x12;
459 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
460 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
461 lwidth = (pcie_lstat &
462 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
463
464 strcpy(str, "PCIe (");
465 if (lspeed == 1)
466 strcat(str, "2.5GT/s ");
467 else if (lspeed == 2)
468 strcat(str, "5.0GT/s ");
469 else
470 strcat(str, "<unknown> ");
471 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
472 strcat(str, lwstr);
473
474 return str;
475 }
476
477 strcpy(str, "PCI");
478 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
479 if (pci_bus == 0 || pci_bus == 8) {
480 strcat(str, " (");
481 strcat(str, pci_bus_modes[pci_bus >> 3]);
482 } else {
483 strcat(str, "-X ");
484 if (pci_bus & BIT_2)
485 strcat(str, "Mode 2");
486 else
487 strcat(str, "Mode 1");
488 strcat(str, " (");
489 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
490 }
491 strcat(str, " MHz)");
492
493 return str;
494 }
495
496 static char *
497 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
498 {
499 char un_str[10];
500 struct qla_hw_data *ha = vha->hw;
501
502 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
503 ha->fw_minor_version,
504 ha->fw_subminor_version);
505
506 if (ha->fw_attributes & BIT_9) {
507 strcat(str, "FLX");
508 return (str);
509 }
510
511 switch (ha->fw_attributes & 0xFF) {
512 case 0x7:
513 strcat(str, "EF");
514 break;
515 case 0x17:
516 strcat(str, "TP");
517 break;
518 case 0x37:
519 strcat(str, "IP");
520 break;
521 case 0x77:
522 strcat(str, "VI");
523 break;
524 default:
525 sprintf(un_str, "(%x)", ha->fw_attributes);
526 strcat(str, un_str);
527 break;
528 }
529 if (ha->fw_attributes & 0x100)
530 strcat(str, "X");
531
532 return (str);
533 }
534
535 static char *
536 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
537 {
538 struct qla_hw_data *ha = vha->hw;
539
540 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
541 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
542 return str;
543 }
544
545 static inline srb_t *
546 qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
547 struct scsi_cmnd *cmd)
548 {
549 srb_t *sp;
550 struct qla_hw_data *ha = vha->hw;
551
552 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
553 if (!sp) {
554 ql_log(ql_log_warn, vha, 0x3006,
555 "Memory allocation failed for sp.\n");
556 return sp;
557 }
558
559 atomic_set(&sp->ref_count, 1);
560 sp->fcport = fcport;
561 sp->cmd = cmd;
562 sp->flags = 0;
563 CMD_SP(cmd) = (void *)sp;
564 sp->ctx = NULL;
565
566 return sp;
567 }
568
569 static int
570 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
571 {
572 scsi_qla_host_t *vha = shost_priv(host);
573 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
574 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
575 struct qla_hw_data *ha = vha->hw;
576 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
577 srb_t *sp;
578 int rval;
579
580 if (ha->flags.eeh_busy) {
581 if (ha->flags.pci_channel_io_perm_failure) {
582 ql_dbg(ql_dbg_io, vha, 0x3001,
583 "PCI Channel IO permanent failure, exiting "
584 "cmd=%p.\n", cmd);
585 cmd->result = DID_NO_CONNECT << 16;
586 } else {
587 ql_dbg(ql_dbg_io, vha, 0x3002,
588 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
589 cmd->result = DID_REQUEUE << 16;
590 }
591 goto qc24_fail_command;
592 }
593
594 rval = fc_remote_port_chkready(rport);
595 if (rval) {
596 cmd->result = rval;
597 ql_dbg(ql_dbg_io, vha, 0x3003,
598 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
599 cmd, rval);
600 goto qc24_fail_command;
601 }
602
603 if (!vha->flags.difdix_supported &&
604 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
605 ql_dbg(ql_dbg_io, vha, 0x3004,
606 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
607 cmd);
608 cmd->result = DID_NO_CONNECT << 16;
609 goto qc24_fail_command;
610 }
611 if (atomic_read(&fcport->state) != FCS_ONLINE) {
612 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
613 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
614 ql_dbg(ql_dbg_io, vha, 0x3005,
615 "Returning DNC, fcport_state=%d loop_state=%d.\n",
616 atomic_read(&fcport->state),
617 atomic_read(&base_vha->loop_state));
618 cmd->result = DID_NO_CONNECT << 16;
619 goto qc24_fail_command;
620 }
621 goto qc24_target_busy;
622 }
623
624 sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
625 if (!sp)
626 goto qc24_host_busy;
627
628 rval = ha->isp_ops->start_scsi(sp);
629 if (rval != QLA_SUCCESS) {
630 ql_dbg(ql_dbg_io, vha, 0x3013,
631 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
632 goto qc24_host_busy_free_sp;
633 }
634
635 return 0;
636
637 qc24_host_busy_free_sp:
638 qla2x00_sp_free_dma(sp);
639 mempool_free(sp, ha->srb_mempool);
640
641 qc24_host_busy:
642 return SCSI_MLQUEUE_HOST_BUSY;
643
644 qc24_target_busy:
645 return SCSI_MLQUEUE_TARGET_BUSY;
646
647 qc24_fail_command:
648 cmd->scsi_done(cmd);
649
650 return 0;
651 }
652
653 /*
654 * qla2x00_eh_wait_on_command
655 * Waits for the command to be returned by the Firmware for some
656 * max time.
657 *
658 * Input:
659 * cmd = Scsi Command to wait on.
660 *
661 * Return:
662 * Not Found : 0
663 * Found : 1
664 */
665 static int
666 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
667 {
668 #define ABORT_POLLING_PERIOD 1000
669 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
670 unsigned long wait_iter = ABORT_WAIT_ITER;
671 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
672 struct qla_hw_data *ha = vha->hw;
673 int ret = QLA_SUCCESS;
674
675 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
676 ql_dbg(ql_dbg_taskm, vha, 0x8005,
677 "Return:eh_wait.\n");
678 return ret;
679 }
680
681 while (CMD_SP(cmd) && wait_iter--) {
682 msleep(ABORT_POLLING_PERIOD);
683 }
684 if (CMD_SP(cmd))
685 ret = QLA_FUNCTION_FAILED;
686
687 return ret;
688 }
689
690 /*
691 * qla2x00_wait_for_hba_online
692 * Wait till the HBA is online after going through
693 * <= MAX_RETRIES_OF_ISP_ABORT or
694 * finally HBA is disabled ie marked offline
695 *
696 * Input:
697 * ha - pointer to host adapter structure
698 *
699 * Note:
700 * Does context switching-Release SPIN_LOCK
701 * (if any) before calling this routine.
702 *
703 * Return:
704 * Success (Adapter is online) : 0
705 * Failed (Adapter is offline/disabled) : 1
706 */
707 int
708 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
709 {
710 int return_status;
711 unsigned long wait_online;
712 struct qla_hw_data *ha = vha->hw;
713 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
714
715 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
716 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
717 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
718 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
719 ha->dpc_active) && time_before(jiffies, wait_online)) {
720
721 msleep(1000);
722 }
723 if (base_vha->flags.online)
724 return_status = QLA_SUCCESS;
725 else
726 return_status = QLA_FUNCTION_FAILED;
727
728 return (return_status);
729 }
730
731 /*
732 * qla2x00_wait_for_reset_ready
733 * Wait till the HBA is online after going through
734 * <= MAX_RETRIES_OF_ISP_ABORT or
735 * finally HBA is disabled ie marked offline or flash
736 * operations are in progress.
737 *
738 * Input:
739 * ha - pointer to host adapter structure
740 *
741 * Note:
742 * Does context switching-Release SPIN_LOCK
743 * (if any) before calling this routine.
744 *
745 * Return:
746 * Success (Adapter is online/no flash ops) : 0
747 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
748 */
749 static int
750 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
751 {
752 int return_status;
753 unsigned long wait_online;
754 struct qla_hw_data *ha = vha->hw;
755 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
756
757 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
758 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
759 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
760 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
761 ha->optrom_state != QLA_SWAITING ||
762 ha->dpc_active) && time_before(jiffies, wait_online))
763 msleep(1000);
764
765 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
766 return_status = QLA_SUCCESS;
767 else
768 return_status = QLA_FUNCTION_FAILED;
769
770 ql_dbg(ql_dbg_taskm, vha, 0x8019,
771 "%s return status=%d.\n", __func__, return_status);
772
773 return return_status;
774 }
775
776 int
777 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
778 {
779 int return_status;
780 unsigned long wait_reset;
781 struct qla_hw_data *ha = vha->hw;
782 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
783
784 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
785 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
786 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
787 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
788 ha->dpc_active) && time_before(jiffies, wait_reset)) {
789
790 msleep(1000);
791
792 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
793 ha->flags.chip_reset_done)
794 break;
795 }
796 if (ha->flags.chip_reset_done)
797 return_status = QLA_SUCCESS;
798 else
799 return_status = QLA_FUNCTION_FAILED;
800
801 return return_status;
802 }
803
804 /*
805 * qla2x00_wait_for_loop_ready
806 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
807 * to be in LOOP_READY state.
808 * Input:
809 * ha - pointer to host adapter structure
810 *
811 * Note:
812 * Does context switching-Release SPIN_LOCK
813 * (if any) before calling this routine.
814 *
815 *
816 * Return:
817 * Success (LOOP_READY) : 0
818 * Failed (LOOP_NOT_READY) : 1
819 */
820 static inline int
821 qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
822 {
823 int return_status = QLA_SUCCESS;
824 unsigned long loop_timeout ;
825 struct qla_hw_data *ha = vha->hw;
826 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
827
828 /* wait for 5 min at the max for loop to be ready */
829 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
830
831 while ((!atomic_read(&base_vha->loop_down_timer) &&
832 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
833 atomic_read(&base_vha->loop_state) != LOOP_READY) {
834 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
835 return_status = QLA_FUNCTION_FAILED;
836 break;
837 }
838 msleep(1000);
839 if (time_after_eq(jiffies, loop_timeout)) {
840 return_status = QLA_FUNCTION_FAILED;
841 break;
842 }
843 }
844 return (return_status);
845 }
846
847 static void
848 sp_get(struct srb *sp)
849 {
850 atomic_inc(&sp->ref_count);
851 }
852
853 /**************************************************************************
854 * qla2xxx_eh_abort
855 *
856 * Description:
857 * The abort function will abort the specified command.
858 *
859 * Input:
860 * cmd = Linux SCSI command packet to be aborted.
861 *
862 * Returns:
863 * Either SUCCESS or FAILED.
864 *
865 * Note:
866 * Only return FAILED if command not returned by firmware.
867 **************************************************************************/
868 static int
869 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
870 {
871 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
872 srb_t *sp;
873 int ret;
874 unsigned int id, lun;
875 unsigned long flags;
876 int wait = 0;
877 struct qla_hw_data *ha = vha->hw;
878
879 ql_dbg(ql_dbg_taskm, vha, 0x8000,
880 "Entered %s for cmd=%p.\n", __func__, cmd);
881 if (!CMD_SP(cmd))
882 return SUCCESS;
883
884 ret = fc_block_scsi_eh(cmd);
885 ql_dbg(ql_dbg_taskm, vha, 0x8001,
886 "Return value of fc_block_scsi_eh=%d.\n", ret);
887 if (ret != 0)
888 return ret;
889 ret = SUCCESS;
890
891 id = cmd->device->id;
892 lun = cmd->device->lun;
893
894 spin_lock_irqsave(&ha->hardware_lock, flags);
895 sp = (srb_t *) CMD_SP(cmd);
896 if (!sp) {
897 spin_unlock_irqrestore(&ha->hardware_lock, flags);
898 return SUCCESS;
899 }
900
901 ql_dbg(ql_dbg_taskm, vha, 0x8002,
902 "Aborting sp=%p cmd=%p from RISC ", sp, cmd);
903
904 /* Get a reference to the sp and drop the lock.*/
905 sp_get(sp);
906
907 spin_unlock_irqrestore(&ha->hardware_lock, flags);
908 if (ha->isp_ops->abort_command(sp)) {
909 ql_dbg(ql_dbg_taskm, vha, 0x8003,
910 "Abort command mbx failed for cmd=%p.\n", cmd);
911 } else {
912 ql_dbg(ql_dbg_taskm, vha, 0x8004,
913 "Abort command mbx success.\n");
914 wait = 1;
915 }
916
917 spin_lock_irqsave(&ha->hardware_lock, flags);
918 qla2x00_sp_compl(ha, sp);
919 spin_unlock_irqrestore(&ha->hardware_lock, flags);
920
921 /* Wait for the command to be returned. */
922 if (wait) {
923 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
924 ql_log(ql_log_warn, vha, 0x8006,
925 "Abort handler timed out for cmd=%p.\n", cmd);
926 ret = FAILED;
927 }
928 }
929
930 ql_log(ql_log_info, vha, 0x801c,
931 "Abort command issued -- %d %x.\n", wait, ret);
932
933 return ret;
934 }
935
936 int
937 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
938 unsigned int l, enum nexus_wait_type type)
939 {
940 int cnt, match, status;
941 unsigned long flags;
942 struct qla_hw_data *ha = vha->hw;
943 struct req_que *req;
944 srb_t *sp;
945
946 status = QLA_SUCCESS;
947
948 spin_lock_irqsave(&ha->hardware_lock, flags);
949 req = vha->req;
950 for (cnt = 1; status == QLA_SUCCESS &&
951 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
952 sp = req->outstanding_cmds[cnt];
953 if (!sp)
954 continue;
955 if ((sp->ctx) && !IS_PROT_IO(sp))
956 continue;
957 if (vha->vp_idx != sp->fcport->vha->vp_idx)
958 continue;
959 match = 0;
960 switch (type) {
961 case WAIT_HOST:
962 match = 1;
963 break;
964 case WAIT_TARGET:
965 match = sp->cmd->device->id == t;
966 break;
967 case WAIT_LUN:
968 match = (sp->cmd->device->id == t &&
969 sp->cmd->device->lun == l);
970 break;
971 }
972 if (!match)
973 continue;
974
975 spin_unlock_irqrestore(&ha->hardware_lock, flags);
976 status = qla2x00_eh_wait_on_command(sp->cmd);
977 spin_lock_irqsave(&ha->hardware_lock, flags);
978 }
979 spin_unlock_irqrestore(&ha->hardware_lock, flags);
980
981 return status;
982 }
983
984 static char *reset_errors[] = {
985 "HBA not online",
986 "HBA not ready",
987 "Task management failed",
988 "Waiting for command completions",
989 };
990
991 static int
992 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
993 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
994 {
995 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
996 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
997 int err;
998
999 if (!fcport) {
1000 ql_log(ql_log_warn, vha, 0x8007,
1001 "fcport is NULL.\n");
1002 return FAILED;
1003 }
1004
1005 err = fc_block_scsi_eh(cmd);
1006 ql_dbg(ql_dbg_taskm, vha, 0x8008,
1007 "fc_block_scsi_eh ret=%d.\n", err);
1008 if (err != 0)
1009 return err;
1010
1011 ql_log(ql_log_info, vha, 0x8009,
1012 "%s RESET ISSUED for id %d lun %d cmd=%p.\n", name,
1013 cmd->device->id, cmd->device->lun, cmd);
1014
1015 err = 0;
1016 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1017 ql_log(ql_log_warn, vha, 0x800a,
1018 "Wait for hba online failed for cmd=%p.\n", cmd);
1019 goto eh_reset_failed;
1020 }
1021 err = 1;
1022 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) {
1023 ql_log(ql_log_warn, vha, 0x800b,
1024 "Wait for loop ready failed for cmd=%p.\n", cmd);
1025 goto eh_reset_failed;
1026 }
1027 err = 2;
1028 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1029 != QLA_SUCCESS) {
1030 ql_log(ql_log_warn, vha, 0x800c,
1031 "do_reset failed for cmd=%p.\n", cmd);
1032 goto eh_reset_failed;
1033 }
1034 err = 3;
1035 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1036 cmd->device->lun, type) != QLA_SUCCESS) {
1037 ql_log(ql_log_warn, vha, 0x800d,
1038 "wait for peding cmds failed for cmd=%p.\n", cmd);
1039 goto eh_reset_failed;
1040 }
1041
1042 ql_log(ql_log_info, vha, 0x800e,
1043 "%s RESET SUCCEEDED for id %d lun %d cmd=%p.\n", name,
1044 cmd->device->id, cmd->device->lun, cmd);
1045
1046 return SUCCESS;
1047
1048 eh_reset_failed:
1049 ql_log(ql_log_info, vha, 0x800f,
1050 "%s RESET FAILED: %s for id %d lun %d cmd=%p.\n", name,
1051 reset_errors[err], cmd->device->id, cmd->device->lun);
1052 return FAILED;
1053 }
1054
1055 static int
1056 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1057 {
1058 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1059 struct qla_hw_data *ha = vha->hw;
1060
1061 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1062 ha->isp_ops->lun_reset);
1063 }
1064
1065 static int
1066 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1067 {
1068 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1069 struct qla_hw_data *ha = vha->hw;
1070
1071 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1072 ha->isp_ops->target_reset);
1073 }
1074
1075 /**************************************************************************
1076 * qla2xxx_eh_bus_reset
1077 *
1078 * Description:
1079 * The bus reset function will reset the bus and abort any executing
1080 * commands.
1081 *
1082 * Input:
1083 * cmd = Linux SCSI command packet of the command that cause the
1084 * bus reset.
1085 *
1086 * Returns:
1087 * SUCCESS/FAILURE (defined as macro in scsi.h).
1088 *
1089 **************************************************************************/
1090 static int
1091 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1092 {
1093 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1094 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1095 int ret = FAILED;
1096 unsigned int id, lun;
1097
1098 id = cmd->device->id;
1099 lun = cmd->device->lun;
1100
1101 if (!fcport) {
1102 ql_log(ql_log_warn, vha, 0x8010,
1103 "fcport is NULL.\n");
1104 return ret;
1105 }
1106
1107 ret = fc_block_scsi_eh(cmd);
1108 ql_dbg(ql_dbg_taskm, vha, 0x8011,
1109 "fc_block_scsi_eh ret=%d.\n", ret);
1110 if (ret != 0)
1111 return ret;
1112 ret = FAILED;
1113
1114 ql_log(ql_log_info, vha, 0x8012,
1115 "BUS RESET ISSUED for id %d lun %d.\n", id, lun);
1116
1117 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1118 ql_log(ql_log_fatal, vha, 0x8013,
1119 "Wait for hba online failed board disabled.\n");
1120 goto eh_bus_reset_done;
1121 }
1122
1123 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1124 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1125 ret = SUCCESS;
1126 }
1127 if (ret == FAILED)
1128 goto eh_bus_reset_done;
1129
1130 /* Flush outstanding commands. */
1131 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1132 QLA_SUCCESS) {
1133 ql_log(ql_log_warn, vha, 0x8014,
1134 "Wait for pending commands failed.\n");
1135 ret = FAILED;
1136 }
1137
1138 eh_bus_reset_done:
1139 ql_log(ql_log_warn, vha, 0x802b,
1140 "BUS RESET %s.\n", (ret == FAILED) ? "FAILED" : "SUCCEDED");
1141
1142 return ret;
1143 }
1144
1145 /**************************************************************************
1146 * qla2xxx_eh_host_reset
1147 *
1148 * Description:
1149 * The reset function will reset the Adapter.
1150 *
1151 * Input:
1152 * cmd = Linux SCSI command packet of the command that cause the
1153 * adapter reset.
1154 *
1155 * Returns:
1156 * Either SUCCESS or FAILED.
1157 *
1158 * Note:
1159 **************************************************************************/
1160 static int
1161 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1162 {
1163 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1164 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1165 struct qla_hw_data *ha = vha->hw;
1166 int ret = FAILED;
1167 unsigned int id, lun;
1168 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1169
1170 id = cmd->device->id;
1171 lun = cmd->device->lun;
1172
1173 if (!fcport) {
1174 ql_log(ql_log_warn, vha, 0x8016,
1175 "fcport is NULL.\n");
1176 return ret;
1177 }
1178
1179 ret = fc_block_scsi_eh(cmd);
1180 ql_dbg(ql_dbg_taskm, vha, 0x8017,
1181 "fc_block_scsi_eh ret=%d.\n", ret);
1182 if (ret != 0)
1183 return ret;
1184 ret = FAILED;
1185
1186 ql_log(ql_log_info, vha, 0x8018,
1187 "ADAPTER RESET ISSUED for id %d lun %d.\n", id, lun);
1188
1189 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1190 goto eh_host_reset_lock;
1191
1192 /*
1193 * Fixme-may be dpc thread is active and processing
1194 * loop_resync,so wait a while for it to
1195 * be completed and then issue big hammer.Otherwise
1196 * it may cause I/O failure as big hammer marks the
1197 * devices as lost kicking of the port_down_timer
1198 * while dpc is stuck for the mailbox to complete.
1199 */
1200 qla2x00_wait_for_loop_ready(vha);
1201 if (vha != base_vha) {
1202 if (qla2x00_vp_abort_isp(vha))
1203 goto eh_host_reset_lock;
1204 } else {
1205 if (IS_QLA82XX(vha->hw)) {
1206 if (!qla82xx_fcoe_ctx_reset(vha)) {
1207 /* Ctx reset success */
1208 ret = SUCCESS;
1209 goto eh_host_reset_lock;
1210 }
1211 /* fall thru if ctx reset failed */
1212 }
1213 if (ha->wq)
1214 flush_workqueue(ha->wq);
1215
1216 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1217 if (ha->isp_ops->abort_isp(base_vha)) {
1218 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1219 /* failed. schedule dpc to try */
1220 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1221
1222 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1223 ql_log(ql_log_warn, vha, 0x802a,
1224 "wait for hba online failed.\n");
1225 goto eh_host_reset_lock;
1226 }
1227 }
1228 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1229 }
1230
1231 /* Waiting for command to be returned to OS.*/
1232 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1233 QLA_SUCCESS)
1234 ret = SUCCESS;
1235
1236 eh_host_reset_lock:
1237 qla_printk(KERN_INFO, ha, "%s: reset %s.\n", __func__,
1238 (ret == FAILED) ? "failed" : "succeeded");
1239
1240 return ret;
1241 }
1242
1243 /*
1244 * qla2x00_loop_reset
1245 * Issue loop reset.
1246 *
1247 * Input:
1248 * ha = adapter block pointer.
1249 *
1250 * Returns:
1251 * 0 = success
1252 */
1253 int
1254 qla2x00_loop_reset(scsi_qla_host_t *vha)
1255 {
1256 int ret;
1257 struct fc_port *fcport;
1258 struct qla_hw_data *ha = vha->hw;
1259
1260 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1261 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1262 if (fcport->port_type != FCT_TARGET)
1263 continue;
1264
1265 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1266 if (ret != QLA_SUCCESS) {
1267 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1268 "Bus Reset failed: Target Reset=%d "
1269 "d_id=%x.\n", ret, fcport->d_id.b24);
1270 }
1271 }
1272 }
1273
1274 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
1275 ret = qla2x00_full_login_lip(vha);
1276 if (ret != QLA_SUCCESS) {
1277 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1278 "full_login_lip=%d.\n", ret);
1279 }
1280 atomic_set(&vha->loop_state, LOOP_DOWN);
1281 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1282 qla2x00_mark_all_devices_lost(vha, 0);
1283 qla2x00_wait_for_loop_ready(vha);
1284 }
1285
1286 if (ha->flags.enable_lip_reset) {
1287 ret = qla2x00_lip_reset(vha);
1288 if (ret != QLA_SUCCESS) {
1289 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1290 "lip_reset failed (%d).\n", ret);
1291 } else
1292 qla2x00_wait_for_loop_ready(vha);
1293 }
1294
1295 /* Issue marker command only when we are going to start the I/O */
1296 vha->marker_needed = 1;
1297
1298 return QLA_SUCCESS;
1299 }
1300
1301 void
1302 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1303 {
1304 int que, cnt;
1305 unsigned long flags;
1306 srb_t *sp;
1307 struct srb_ctx *ctx;
1308 struct qla_hw_data *ha = vha->hw;
1309 struct req_que *req;
1310
1311 spin_lock_irqsave(&ha->hardware_lock, flags);
1312 for (que = 0; que < ha->max_req_queues; que++) {
1313 req = ha->req_q_map[que];
1314 if (!req)
1315 continue;
1316 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1317 sp = req->outstanding_cmds[cnt];
1318 if (sp) {
1319 req->outstanding_cmds[cnt] = NULL;
1320 if (!sp->ctx ||
1321 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1322 IS_PROT_IO(sp)) {
1323 sp->cmd->result = res;
1324 qla2x00_sp_compl(ha, sp);
1325 } else {
1326 ctx = sp->ctx;
1327 if (ctx->type == SRB_LOGIN_CMD ||
1328 ctx->type == SRB_LOGOUT_CMD) {
1329 ctx->u.iocb_cmd->free(sp);
1330 } else {
1331 struct fc_bsg_job *bsg_job =
1332 ctx->u.bsg_job;
1333 if (bsg_job->request->msgcode
1334 == FC_BSG_HST_CT)
1335 kfree(sp->fcport);
1336 bsg_job->req->errors = 0;
1337 bsg_job->reply->result = res;
1338 bsg_job->job_done(bsg_job);
1339 kfree(sp->ctx);
1340 mempool_free(sp,
1341 ha->srb_mempool);
1342 }
1343 }
1344 }
1345 }
1346 }
1347 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1348 }
1349
1350 static int
1351 qla2xxx_slave_alloc(struct scsi_device *sdev)
1352 {
1353 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1354
1355 if (!rport || fc_remote_port_chkready(rport))
1356 return -ENXIO;
1357
1358 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1359
1360 return 0;
1361 }
1362
1363 static int
1364 qla2xxx_slave_configure(struct scsi_device *sdev)
1365 {
1366 scsi_qla_host_t *vha = shost_priv(sdev->host);
1367 struct req_que *req = vha->req;
1368
1369 if (sdev->tagged_supported)
1370 scsi_activate_tcq(sdev, req->max_q_depth);
1371 else
1372 scsi_deactivate_tcq(sdev, req->max_q_depth);
1373 return 0;
1374 }
1375
1376 static void
1377 qla2xxx_slave_destroy(struct scsi_device *sdev)
1378 {
1379 sdev->hostdata = NULL;
1380 }
1381
1382 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1383 {
1384 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1385
1386 if (!scsi_track_queue_full(sdev, qdepth))
1387 return;
1388
1389 ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1390 "Queue depth adjusted-down "
1391 "to %d for scsi(%ld:%d:%d:%d).\n",
1392 sdev->queue_depth, fcport->vha->host_no,
1393 sdev->channel, sdev->id, sdev->lun);
1394 }
1395
1396 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1397 {
1398 fc_port_t *fcport = sdev->hostdata;
1399 struct scsi_qla_host *vha = fcport->vha;
1400 struct req_que *req = NULL;
1401
1402 req = vha->req;
1403 if (!req)
1404 return;
1405
1406 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1407 return;
1408
1409 if (sdev->ordered_tags)
1410 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1411 else
1412 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1413
1414 ql_dbg(ql_dbg_io, vha, 0x302a,
1415 "Queue depth adjusted-up to %d for "
1416 "scsi(%ld:%d:%d:%d).\n",
1417 sdev->queue_depth, fcport->vha->host_no,
1418 sdev->channel, sdev->id, sdev->lun);
1419 }
1420
1421 static int
1422 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1423 {
1424 switch (reason) {
1425 case SCSI_QDEPTH_DEFAULT:
1426 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1427 break;
1428 case SCSI_QDEPTH_QFULL:
1429 qla2x00_handle_queue_full(sdev, qdepth);
1430 break;
1431 case SCSI_QDEPTH_RAMP_UP:
1432 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1433 break;
1434 default:
1435 return -EOPNOTSUPP;
1436 }
1437
1438 return sdev->queue_depth;
1439 }
1440
1441 static int
1442 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1443 {
1444 if (sdev->tagged_supported) {
1445 scsi_set_tag_type(sdev, tag_type);
1446 if (tag_type)
1447 scsi_activate_tcq(sdev, sdev->queue_depth);
1448 else
1449 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1450 } else
1451 tag_type = 0;
1452
1453 return tag_type;
1454 }
1455
1456 /**
1457 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1458 * @ha: HA context
1459 *
1460 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1461 * supported addressing method.
1462 */
1463 static void
1464 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1465 {
1466 /* Assume a 32bit DMA mask. */
1467 ha->flags.enable_64bit_addressing = 0;
1468
1469 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1470 /* Any upper-dword bits set? */
1471 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1472 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1473 /* Ok, a 64bit DMA mask is applicable. */
1474 ha->flags.enable_64bit_addressing = 1;
1475 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1476 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1477 return;
1478 }
1479 }
1480
1481 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1482 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1483 }
1484
1485 static void
1486 qla2x00_enable_intrs(struct qla_hw_data *ha)
1487 {
1488 unsigned long flags = 0;
1489 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1490
1491 spin_lock_irqsave(&ha->hardware_lock, flags);
1492 ha->interrupts_on = 1;
1493 /* enable risc and host interrupts */
1494 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1495 RD_REG_WORD(&reg->ictrl);
1496 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1497
1498 }
1499
1500 static void
1501 qla2x00_disable_intrs(struct qla_hw_data *ha)
1502 {
1503 unsigned long flags = 0;
1504 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1505
1506 spin_lock_irqsave(&ha->hardware_lock, flags);
1507 ha->interrupts_on = 0;
1508 /* disable risc and host interrupts */
1509 WRT_REG_WORD(&reg->ictrl, 0);
1510 RD_REG_WORD(&reg->ictrl);
1511 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1512 }
1513
1514 static void
1515 qla24xx_enable_intrs(struct qla_hw_data *ha)
1516 {
1517 unsigned long flags = 0;
1518 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1519
1520 spin_lock_irqsave(&ha->hardware_lock, flags);
1521 ha->interrupts_on = 1;
1522 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1523 RD_REG_DWORD(&reg->ictrl);
1524 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1525 }
1526
1527 static void
1528 qla24xx_disable_intrs(struct qla_hw_data *ha)
1529 {
1530 unsigned long flags = 0;
1531 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1532
1533 if (IS_NOPOLLING_TYPE(ha))
1534 return;
1535 spin_lock_irqsave(&ha->hardware_lock, flags);
1536 ha->interrupts_on = 0;
1537 WRT_REG_DWORD(&reg->ictrl, 0);
1538 RD_REG_DWORD(&reg->ictrl);
1539 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1540 }
1541
1542 static struct isp_operations qla2100_isp_ops = {
1543 .pci_config = qla2100_pci_config,
1544 .reset_chip = qla2x00_reset_chip,
1545 .chip_diag = qla2x00_chip_diag,
1546 .config_rings = qla2x00_config_rings,
1547 .reset_adapter = qla2x00_reset_adapter,
1548 .nvram_config = qla2x00_nvram_config,
1549 .update_fw_options = qla2x00_update_fw_options,
1550 .load_risc = qla2x00_load_risc,
1551 .pci_info_str = qla2x00_pci_info_str,
1552 .fw_version_str = qla2x00_fw_version_str,
1553 .intr_handler = qla2100_intr_handler,
1554 .enable_intrs = qla2x00_enable_intrs,
1555 .disable_intrs = qla2x00_disable_intrs,
1556 .abort_command = qla2x00_abort_command,
1557 .target_reset = qla2x00_abort_target,
1558 .lun_reset = qla2x00_lun_reset,
1559 .fabric_login = qla2x00_login_fabric,
1560 .fabric_logout = qla2x00_fabric_logout,
1561 .calc_req_entries = qla2x00_calc_iocbs_32,
1562 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1563 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1564 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1565 .read_nvram = qla2x00_read_nvram_data,
1566 .write_nvram = qla2x00_write_nvram_data,
1567 .fw_dump = qla2100_fw_dump,
1568 .beacon_on = NULL,
1569 .beacon_off = NULL,
1570 .beacon_blink = NULL,
1571 .read_optrom = qla2x00_read_optrom_data,
1572 .write_optrom = qla2x00_write_optrom_data,
1573 .get_flash_version = qla2x00_get_flash_version,
1574 .start_scsi = qla2x00_start_scsi,
1575 .abort_isp = qla2x00_abort_isp,
1576 };
1577
1578 static struct isp_operations qla2300_isp_ops = {
1579 .pci_config = qla2300_pci_config,
1580 .reset_chip = qla2x00_reset_chip,
1581 .chip_diag = qla2x00_chip_diag,
1582 .config_rings = qla2x00_config_rings,
1583 .reset_adapter = qla2x00_reset_adapter,
1584 .nvram_config = qla2x00_nvram_config,
1585 .update_fw_options = qla2x00_update_fw_options,
1586 .load_risc = qla2x00_load_risc,
1587 .pci_info_str = qla2x00_pci_info_str,
1588 .fw_version_str = qla2x00_fw_version_str,
1589 .intr_handler = qla2300_intr_handler,
1590 .enable_intrs = qla2x00_enable_intrs,
1591 .disable_intrs = qla2x00_disable_intrs,
1592 .abort_command = qla2x00_abort_command,
1593 .target_reset = qla2x00_abort_target,
1594 .lun_reset = qla2x00_lun_reset,
1595 .fabric_login = qla2x00_login_fabric,
1596 .fabric_logout = qla2x00_fabric_logout,
1597 .calc_req_entries = qla2x00_calc_iocbs_32,
1598 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1599 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1600 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1601 .read_nvram = qla2x00_read_nvram_data,
1602 .write_nvram = qla2x00_write_nvram_data,
1603 .fw_dump = qla2300_fw_dump,
1604 .beacon_on = qla2x00_beacon_on,
1605 .beacon_off = qla2x00_beacon_off,
1606 .beacon_blink = qla2x00_beacon_blink,
1607 .read_optrom = qla2x00_read_optrom_data,
1608 .write_optrom = qla2x00_write_optrom_data,
1609 .get_flash_version = qla2x00_get_flash_version,
1610 .start_scsi = qla2x00_start_scsi,
1611 .abort_isp = qla2x00_abort_isp,
1612 };
1613
1614 static struct isp_operations qla24xx_isp_ops = {
1615 .pci_config = qla24xx_pci_config,
1616 .reset_chip = qla24xx_reset_chip,
1617 .chip_diag = qla24xx_chip_diag,
1618 .config_rings = qla24xx_config_rings,
1619 .reset_adapter = qla24xx_reset_adapter,
1620 .nvram_config = qla24xx_nvram_config,
1621 .update_fw_options = qla24xx_update_fw_options,
1622 .load_risc = qla24xx_load_risc,
1623 .pci_info_str = qla24xx_pci_info_str,
1624 .fw_version_str = qla24xx_fw_version_str,
1625 .intr_handler = qla24xx_intr_handler,
1626 .enable_intrs = qla24xx_enable_intrs,
1627 .disable_intrs = qla24xx_disable_intrs,
1628 .abort_command = qla24xx_abort_command,
1629 .target_reset = qla24xx_abort_target,
1630 .lun_reset = qla24xx_lun_reset,
1631 .fabric_login = qla24xx_login_fabric,
1632 .fabric_logout = qla24xx_fabric_logout,
1633 .calc_req_entries = NULL,
1634 .build_iocbs = NULL,
1635 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1636 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1637 .read_nvram = qla24xx_read_nvram_data,
1638 .write_nvram = qla24xx_write_nvram_data,
1639 .fw_dump = qla24xx_fw_dump,
1640 .beacon_on = qla24xx_beacon_on,
1641 .beacon_off = qla24xx_beacon_off,
1642 .beacon_blink = qla24xx_beacon_blink,
1643 .read_optrom = qla24xx_read_optrom_data,
1644 .write_optrom = qla24xx_write_optrom_data,
1645 .get_flash_version = qla24xx_get_flash_version,
1646 .start_scsi = qla24xx_start_scsi,
1647 .abort_isp = qla2x00_abort_isp,
1648 };
1649
1650 static struct isp_operations qla25xx_isp_ops = {
1651 .pci_config = qla25xx_pci_config,
1652 .reset_chip = qla24xx_reset_chip,
1653 .chip_diag = qla24xx_chip_diag,
1654 .config_rings = qla24xx_config_rings,
1655 .reset_adapter = qla24xx_reset_adapter,
1656 .nvram_config = qla24xx_nvram_config,
1657 .update_fw_options = qla24xx_update_fw_options,
1658 .load_risc = qla24xx_load_risc,
1659 .pci_info_str = qla24xx_pci_info_str,
1660 .fw_version_str = qla24xx_fw_version_str,
1661 .intr_handler = qla24xx_intr_handler,
1662 .enable_intrs = qla24xx_enable_intrs,
1663 .disable_intrs = qla24xx_disable_intrs,
1664 .abort_command = qla24xx_abort_command,
1665 .target_reset = qla24xx_abort_target,
1666 .lun_reset = qla24xx_lun_reset,
1667 .fabric_login = qla24xx_login_fabric,
1668 .fabric_logout = qla24xx_fabric_logout,
1669 .calc_req_entries = NULL,
1670 .build_iocbs = NULL,
1671 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1672 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1673 .read_nvram = qla25xx_read_nvram_data,
1674 .write_nvram = qla25xx_write_nvram_data,
1675 .fw_dump = qla25xx_fw_dump,
1676 .beacon_on = qla24xx_beacon_on,
1677 .beacon_off = qla24xx_beacon_off,
1678 .beacon_blink = qla24xx_beacon_blink,
1679 .read_optrom = qla25xx_read_optrom_data,
1680 .write_optrom = qla24xx_write_optrom_data,
1681 .get_flash_version = qla24xx_get_flash_version,
1682 .start_scsi = qla24xx_dif_start_scsi,
1683 .abort_isp = qla2x00_abort_isp,
1684 };
1685
1686 static struct isp_operations qla81xx_isp_ops = {
1687 .pci_config = qla25xx_pci_config,
1688 .reset_chip = qla24xx_reset_chip,
1689 .chip_diag = qla24xx_chip_diag,
1690 .config_rings = qla24xx_config_rings,
1691 .reset_adapter = qla24xx_reset_adapter,
1692 .nvram_config = qla81xx_nvram_config,
1693 .update_fw_options = qla81xx_update_fw_options,
1694 .load_risc = qla81xx_load_risc,
1695 .pci_info_str = qla24xx_pci_info_str,
1696 .fw_version_str = qla24xx_fw_version_str,
1697 .intr_handler = qla24xx_intr_handler,
1698 .enable_intrs = qla24xx_enable_intrs,
1699 .disable_intrs = qla24xx_disable_intrs,
1700 .abort_command = qla24xx_abort_command,
1701 .target_reset = qla24xx_abort_target,
1702 .lun_reset = qla24xx_lun_reset,
1703 .fabric_login = qla24xx_login_fabric,
1704 .fabric_logout = qla24xx_fabric_logout,
1705 .calc_req_entries = NULL,
1706 .build_iocbs = NULL,
1707 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1708 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1709 .read_nvram = NULL,
1710 .write_nvram = NULL,
1711 .fw_dump = qla81xx_fw_dump,
1712 .beacon_on = qla24xx_beacon_on,
1713 .beacon_off = qla24xx_beacon_off,
1714 .beacon_blink = qla24xx_beacon_blink,
1715 .read_optrom = qla25xx_read_optrom_data,
1716 .write_optrom = qla24xx_write_optrom_data,
1717 .get_flash_version = qla24xx_get_flash_version,
1718 .start_scsi = qla24xx_dif_start_scsi,
1719 .abort_isp = qla2x00_abort_isp,
1720 };
1721
1722 static struct isp_operations qla82xx_isp_ops = {
1723 .pci_config = qla82xx_pci_config,
1724 .reset_chip = qla82xx_reset_chip,
1725 .chip_diag = qla24xx_chip_diag,
1726 .config_rings = qla82xx_config_rings,
1727 .reset_adapter = qla24xx_reset_adapter,
1728 .nvram_config = qla81xx_nvram_config,
1729 .update_fw_options = qla24xx_update_fw_options,
1730 .load_risc = qla82xx_load_risc,
1731 .pci_info_str = qla82xx_pci_info_str,
1732 .fw_version_str = qla24xx_fw_version_str,
1733 .intr_handler = qla82xx_intr_handler,
1734 .enable_intrs = qla82xx_enable_intrs,
1735 .disable_intrs = qla82xx_disable_intrs,
1736 .abort_command = qla24xx_abort_command,
1737 .target_reset = qla24xx_abort_target,
1738 .lun_reset = qla24xx_lun_reset,
1739 .fabric_login = qla24xx_login_fabric,
1740 .fabric_logout = qla24xx_fabric_logout,
1741 .calc_req_entries = NULL,
1742 .build_iocbs = NULL,
1743 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1744 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1745 .read_nvram = qla24xx_read_nvram_data,
1746 .write_nvram = qla24xx_write_nvram_data,
1747 .fw_dump = qla24xx_fw_dump,
1748 .beacon_on = qla24xx_beacon_on,
1749 .beacon_off = qla24xx_beacon_off,
1750 .beacon_blink = qla24xx_beacon_blink,
1751 .read_optrom = qla82xx_read_optrom_data,
1752 .write_optrom = qla82xx_write_optrom_data,
1753 .get_flash_version = qla24xx_get_flash_version,
1754 .start_scsi = qla82xx_start_scsi,
1755 .abort_isp = qla82xx_abort_isp,
1756 };
1757
1758 static inline void
1759 qla2x00_set_isp_flags(struct qla_hw_data *ha)
1760 {
1761 ha->device_type = DT_EXTENDED_IDS;
1762 switch (ha->pdev->device) {
1763 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1764 ha->device_type |= DT_ISP2100;
1765 ha->device_type &= ~DT_EXTENDED_IDS;
1766 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1767 break;
1768 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1769 ha->device_type |= DT_ISP2200;
1770 ha->device_type &= ~DT_EXTENDED_IDS;
1771 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1772 break;
1773 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1774 ha->device_type |= DT_ISP2300;
1775 ha->device_type |= DT_ZIO_SUPPORTED;
1776 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1777 break;
1778 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1779 ha->device_type |= DT_ISP2312;
1780 ha->device_type |= DT_ZIO_SUPPORTED;
1781 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1782 break;
1783 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1784 ha->device_type |= DT_ISP2322;
1785 ha->device_type |= DT_ZIO_SUPPORTED;
1786 if (ha->pdev->subsystem_vendor == 0x1028 &&
1787 ha->pdev->subsystem_device == 0x0170)
1788 ha->device_type |= DT_OEM_001;
1789 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1790 break;
1791 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1792 ha->device_type |= DT_ISP6312;
1793 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1794 break;
1795 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1796 ha->device_type |= DT_ISP6322;
1797 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1798 break;
1799 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1800 ha->device_type |= DT_ISP2422;
1801 ha->device_type |= DT_ZIO_SUPPORTED;
1802 ha->device_type |= DT_FWI2;
1803 ha->device_type |= DT_IIDMA;
1804 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1805 break;
1806 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1807 ha->device_type |= DT_ISP2432;
1808 ha->device_type |= DT_ZIO_SUPPORTED;
1809 ha->device_type |= DT_FWI2;
1810 ha->device_type |= DT_IIDMA;
1811 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1812 break;
1813 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1814 ha->device_type |= DT_ISP8432;
1815 ha->device_type |= DT_ZIO_SUPPORTED;
1816 ha->device_type |= DT_FWI2;
1817 ha->device_type |= DT_IIDMA;
1818 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1819 break;
1820 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1821 ha->device_type |= DT_ISP5422;
1822 ha->device_type |= DT_FWI2;
1823 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1824 break;
1825 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1826 ha->device_type |= DT_ISP5432;
1827 ha->device_type |= DT_FWI2;
1828 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1829 break;
1830 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1831 ha->device_type |= DT_ISP2532;
1832 ha->device_type |= DT_ZIO_SUPPORTED;
1833 ha->device_type |= DT_FWI2;
1834 ha->device_type |= DT_IIDMA;
1835 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1836 break;
1837 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1838 ha->device_type |= DT_ISP8001;
1839 ha->device_type |= DT_ZIO_SUPPORTED;
1840 ha->device_type |= DT_FWI2;
1841 ha->device_type |= DT_IIDMA;
1842 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1843 break;
1844 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1845 ha->device_type |= DT_ISP8021;
1846 ha->device_type |= DT_ZIO_SUPPORTED;
1847 ha->device_type |= DT_FWI2;
1848 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1849 /* Initialize 82XX ISP flags */
1850 qla82xx_init_flags(ha);
1851 break;
1852 }
1853
1854 if (IS_QLA82XX(ha))
1855 ha->port_no = !(ha->portnum & 1);
1856 else
1857 /* Get adapter physical port no from interrupt pin register. */
1858 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1859
1860 if (ha->port_no & 1)
1861 ha->flags.port0 = 1;
1862 else
1863 ha->flags.port0 = 0;
1864 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
1865 "device_type=0x%x port=%d fw_srisc_address=%p.\n",
1866 ha->device_type, ha->flags.port0, ha->fw_srisc_address);
1867 }
1868
1869 static int
1870 qla2x00_iospace_config(struct qla_hw_data *ha)
1871 {
1872 resource_size_t pio;
1873 uint16_t msix;
1874 int cpus;
1875
1876 if (IS_QLA82XX(ha))
1877 return qla82xx_iospace_config(ha);
1878
1879 if (pci_request_selected_regions(ha->pdev, ha->bars,
1880 QLA2XXX_DRIVER_NAME)) {
1881 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1882 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1883 pci_name(ha->pdev));
1884 goto iospace_error_exit;
1885 }
1886 if (!(ha->bars & 1))
1887 goto skip_pio;
1888
1889 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1890 pio = pci_resource_start(ha->pdev, 0);
1891 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1892 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1893 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1894 "Invalid pci I/O region size (%s).\n",
1895 pci_name(ha->pdev));
1896 pio = 0;
1897 }
1898 } else {
1899 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1900 "Region #0 no a PIO resource (%s).\n",
1901 pci_name(ha->pdev));
1902 pio = 0;
1903 }
1904 ha->pio_address = pio;
1905 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1906 "PIO address=%p.\n",
1907 ha->pio_address);
1908
1909 skip_pio:
1910 /* Use MMIO operations for all accesses. */
1911 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1912 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1913 "Region #1 not an MMIO resource (%s), aborting.\n",
1914 pci_name(ha->pdev));
1915 goto iospace_error_exit;
1916 }
1917 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1918 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1919 "Invalid PCI mem region size (%s), aborting.\n",
1920 pci_name(ha->pdev));
1921 goto iospace_error_exit;
1922 }
1923
1924 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1925 if (!ha->iobase) {
1926 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1927 "Cannot remap MMIO (%s), aborting.\n",
1928 pci_name(ha->pdev));
1929 goto iospace_error_exit;
1930 }
1931
1932 /* Determine queue resources */
1933 ha->max_req_queues = ha->max_rsp_queues = 1;
1934 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1935 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1936 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1937 goto mqiobase_exit;
1938
1939 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1940 pci_resource_len(ha->pdev, 3));
1941 if (ha->mqiobase) {
1942 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1943 "MQIO Base=%p.\n", ha->mqiobase);
1944 /* Read MSIX vector size of the board */
1945 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1946 ha->msix_count = msix;
1947 /* Max queues are bounded by available msix vectors */
1948 /* queue 0 uses two msix vectors */
1949 if (ql2xmultique_tag) {
1950 cpus = num_online_cpus();
1951 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1952 (cpus + 1) : (ha->msix_count - 1);
1953 ha->max_req_queues = 2;
1954 } else if (ql2xmaxqueues > 1) {
1955 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1956 QLA_MQ_SIZE : ql2xmaxqueues;
1957 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1958 "QoS mode set, max no of request queues:%d.\n",
1959 ha->max_req_queues);
1960 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1961 "QoS mode set, max no of request queues:%d.\n",
1962 ha->max_req_queues);
1963 }
1964 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1965 "MSI-X vector count: %d.\n", msix);
1966 } else
1967 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1968 "BAR 3 not enabled.\n");
1969
1970 mqiobase_exit:
1971 ha->msix_count = ha->max_rsp_queues + 1;
1972 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1973 "MSIX Count:%d.\n", ha->msix_count);
1974 return (0);
1975
1976 iospace_error_exit:
1977 return (-ENOMEM);
1978 }
1979
1980 static void
1981 qla2xxx_scan_start(struct Scsi_Host *shost)
1982 {
1983 scsi_qla_host_t *vha = shost_priv(shost);
1984
1985 if (vha->hw->flags.running_gold_fw)
1986 return;
1987
1988 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1989 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1990 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1991 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1992 }
1993
1994 static int
1995 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1996 {
1997 scsi_qla_host_t *vha = shost_priv(shost);
1998
1999 if (!vha->host)
2000 return 1;
2001 if (time > vha->hw->loop_reset_delay * HZ)
2002 return 1;
2003
2004 return atomic_read(&vha->loop_state) == LOOP_READY;
2005 }
2006
2007 /*
2008 * PCI driver interface
2009 */
2010 static int __devinit
2011 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2012 {
2013 int ret = -ENODEV;
2014 struct Scsi_Host *host;
2015 scsi_qla_host_t *base_vha = NULL;
2016 struct qla_hw_data *ha;
2017 char pci_info[30];
2018 char fw_str[30];
2019 struct scsi_host_template *sht;
2020 int bars, max_id, mem_only = 0;
2021 uint16_t req_length = 0, rsp_length = 0;
2022 struct req_que *req = NULL;
2023 struct rsp_que *rsp = NULL;
2024
2025 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2026 sht = &qla2xxx_driver_template;
2027 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2028 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2029 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2030 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2031 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2032 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2033 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2034 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
2035 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2036 mem_only = 1;
2037 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2038 "Mem only adapter.\n");
2039 }
2040 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2041 "Bars=%d.\n", bars);
2042
2043 if (mem_only) {
2044 if (pci_enable_device_mem(pdev))
2045 goto probe_out;
2046 } else {
2047 if (pci_enable_device(pdev))
2048 goto probe_out;
2049 }
2050
2051 /* This may fail but that's ok */
2052 pci_enable_pcie_error_reporting(pdev);
2053
2054 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2055 if (!ha) {
2056 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2057 "Unable to allocate memory for ha.\n");
2058 goto probe_out;
2059 }
2060 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2061 "Memory allocated for ha=%p.\n", ha);
2062 ha->pdev = pdev;
2063
2064 /* Clear our data area */
2065 ha->bars = bars;
2066 ha->mem_only = mem_only;
2067 spin_lock_init(&ha->hardware_lock);
2068 spin_lock_init(&ha->vport_slock);
2069
2070 /* Set ISP-type information. */
2071 qla2x00_set_isp_flags(ha);
2072
2073 /* Set EEH reset type to fundamental if required by hba */
2074 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
2075 pdev->needs_freset = 1;
2076 }
2077
2078 /* Configure PCI I/O space */
2079 ret = qla2x00_iospace_config(ha);
2080 if (ret)
2081 goto probe_hw_failed;
2082
2083 ql_log_pci(ql_log_info, pdev, 0x001d,
2084 "Found an ISP%04X irq %d iobase 0x%p.\n",
2085 pdev->device, pdev->irq, ha->iobase);
2086 ha->prev_topology = 0;
2087 ha->init_cb_size = sizeof(init_cb_t);
2088 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2089 ha->optrom_size = OPTROM_SIZE_2300;
2090
2091 /* Assign ISP specific operations. */
2092 max_id = MAX_TARGETS_2200;
2093 if (IS_QLA2100(ha)) {
2094 max_id = MAX_TARGETS_2100;
2095 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2096 req_length = REQUEST_ENTRY_CNT_2100;
2097 rsp_length = RESPONSE_ENTRY_CNT_2100;
2098 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2099 ha->gid_list_info_size = 4;
2100 ha->flash_conf_off = ~0;
2101 ha->flash_data_off = ~0;
2102 ha->nvram_conf_off = ~0;
2103 ha->nvram_data_off = ~0;
2104 ha->isp_ops = &qla2100_isp_ops;
2105 } else if (IS_QLA2200(ha)) {
2106 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2107 req_length = REQUEST_ENTRY_CNT_2200;
2108 rsp_length = RESPONSE_ENTRY_CNT_2100;
2109 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2110 ha->gid_list_info_size = 4;
2111 ha->flash_conf_off = ~0;
2112 ha->flash_data_off = ~0;
2113 ha->nvram_conf_off = ~0;
2114 ha->nvram_data_off = ~0;
2115 ha->isp_ops = &qla2100_isp_ops;
2116 } else if (IS_QLA23XX(ha)) {
2117 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2118 req_length = REQUEST_ENTRY_CNT_2200;
2119 rsp_length = RESPONSE_ENTRY_CNT_2300;
2120 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2121 ha->gid_list_info_size = 6;
2122 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2123 ha->optrom_size = OPTROM_SIZE_2322;
2124 ha->flash_conf_off = ~0;
2125 ha->flash_data_off = ~0;
2126 ha->nvram_conf_off = ~0;
2127 ha->nvram_data_off = ~0;
2128 ha->isp_ops = &qla2300_isp_ops;
2129 } else if (IS_QLA24XX_TYPE(ha)) {
2130 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2131 req_length = REQUEST_ENTRY_CNT_24XX;
2132 rsp_length = RESPONSE_ENTRY_CNT_2300;
2133 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2134 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2135 ha->gid_list_info_size = 8;
2136 ha->optrom_size = OPTROM_SIZE_24XX;
2137 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2138 ha->isp_ops = &qla24xx_isp_ops;
2139 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2140 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2141 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2142 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2143 } else if (IS_QLA25XX(ha)) {
2144 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2145 req_length = REQUEST_ENTRY_CNT_24XX;
2146 rsp_length = RESPONSE_ENTRY_CNT_2300;
2147 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2148 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2149 ha->gid_list_info_size = 8;
2150 ha->optrom_size = OPTROM_SIZE_25XX;
2151 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2152 ha->isp_ops = &qla25xx_isp_ops;
2153 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2154 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2155 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2156 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2157 } else if (IS_QLA81XX(ha)) {
2158 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2159 req_length = REQUEST_ENTRY_CNT_24XX;
2160 rsp_length = RESPONSE_ENTRY_CNT_2300;
2161 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2162 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2163 ha->gid_list_info_size = 8;
2164 ha->optrom_size = OPTROM_SIZE_81XX;
2165 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2166 ha->isp_ops = &qla81xx_isp_ops;
2167 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2168 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2169 ha->nvram_conf_off = ~0;
2170 ha->nvram_data_off = ~0;
2171 } else if (IS_QLA82XX(ha)) {
2172 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2173 req_length = REQUEST_ENTRY_CNT_82XX;
2174 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2175 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2176 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2177 ha->gid_list_info_size = 8;
2178 ha->optrom_size = OPTROM_SIZE_82XX;
2179 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2180 ha->isp_ops = &qla82xx_isp_ops;
2181 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2182 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2183 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2184 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2185 }
2186 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2187 "mbx_count=%d, req_length=%d, "
2188 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2189 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n",
2190 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2191 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2192 ha->nvram_npiv_size);
2193 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2194 "isp_ops=%p, flash_conf_off=%d, "
2195 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2196 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2197 ha->nvram_conf_off, ha->nvram_data_off);
2198 mutex_init(&ha->vport_lock);
2199 init_completion(&ha->mbx_cmd_comp);
2200 complete(&ha->mbx_cmd_comp);
2201 init_completion(&ha->mbx_intr_comp);
2202 init_completion(&ha->dcbx_comp);
2203
2204 set_bit(0, (unsigned long *) ha->vp_idx_map);
2205
2206 qla2x00_config_dma_addressing(ha);
2207 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2208 "64 Bit addressing is %s.\n",
2209 ha->flags.enable_64bit_addressing ? "enable" :
2210 "disable");
2211 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2212 if (!ret) {
2213 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2214 "Failed to allocate memory for adapter, aborting.\n");
2215
2216 goto probe_hw_failed;
2217 }
2218
2219 req->max_q_depth = MAX_Q_DEPTH;
2220 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2221 req->max_q_depth = ql2xmaxqdepth;
2222
2223
2224 base_vha = qla2x00_create_host(sht, ha);
2225 if (!base_vha) {
2226 ret = -ENOMEM;
2227 qla2x00_mem_free(ha);
2228 qla2x00_free_req_que(ha, req);
2229 qla2x00_free_rsp_que(ha, rsp);
2230 goto probe_hw_failed;
2231 }
2232
2233 pci_set_drvdata(pdev, base_vha);
2234
2235 host = base_vha->host;
2236 base_vha->req = req;
2237 host->can_queue = req->length + 128;
2238 if (IS_QLA2XXX_MIDTYPE(ha))
2239 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2240 else
2241 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2242 base_vha->vp_idx;
2243
2244 /* Set the SG table size based on ISP type */
2245 if (!IS_FWI2_CAPABLE(ha)) {
2246 if (IS_QLA2100(ha))
2247 host->sg_tablesize = 32;
2248 } else {
2249 if (!IS_QLA82XX(ha))
2250 host->sg_tablesize = QLA_SG_ALL;
2251 }
2252 ql_dbg(ql_dbg_init, base_vha, 0x0032,
2253 "can_queue=%d, req=%p, "
2254 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2255 host->can_queue, base_vha->req,
2256 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2257 host->max_id = max_id;
2258 host->this_id = 255;
2259 host->cmd_per_lun = 3;
2260 host->unique_id = host->host_no;
2261 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2262 host->max_cmd_len = 32;
2263 else
2264 host->max_cmd_len = MAX_CMDSZ;
2265 host->max_channel = MAX_BUSES - 1;
2266 host->max_lun = ql2xmaxlun;
2267 host->transportt = qla2xxx_transport_template;
2268 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2269
2270 ql_dbg(ql_dbg_init, base_vha, 0x0033,
2271 "max_id=%d this_id=%d "
2272 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2273 "max_lun=%d transportt=%p, vendor_id=%d.\n", host->max_id,
2274 host->this_id, host->cmd_per_lun, host->unique_id,
2275 host->max_cmd_len, host->max_channel, host->max_lun,
2276 host->transportt, sht->vendor_id);
2277
2278 /* Set up the irqs */
2279 ret = qla2x00_request_irqs(ha, rsp);
2280 if (ret)
2281 goto probe_init_failed;
2282
2283 pci_save_state(pdev);
2284
2285 /* Alloc arrays of request and response ring ptrs */
2286 que_init:
2287 if (!qla2x00_alloc_queues(ha)) {
2288 ql_log(ql_log_fatal, base_vha, 0x003d,
2289 "Failed to allocate memory for queue pointers.. aborting.\n");
2290 goto probe_init_failed;
2291 }
2292
2293 ha->rsp_q_map[0] = rsp;
2294 ha->req_q_map[0] = req;
2295 rsp->req = req;
2296 req->rsp = rsp;
2297 set_bit(0, ha->req_qid_map);
2298 set_bit(0, ha->rsp_qid_map);
2299 /* FWI2-capable only. */
2300 req->req_q_in = &ha->iobase->isp24.req_q_in;
2301 req->req_q_out = &ha->iobase->isp24.req_q_out;
2302 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2303 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2304 if (ha->mqenable) {
2305 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2306 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2307 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2308 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
2309 }
2310
2311 if (IS_QLA82XX(ha)) {
2312 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2313 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2314 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2315 }
2316
2317 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2318 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2319 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2320 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2321 "req->req_q_in=%p req->req_q_out=%p "
2322 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2323 req->req_q_in, req->req_q_out,
2324 rsp->rsp_q_in, rsp->rsp_q_out);
2325 ql_dbg(ql_dbg_init, base_vha, 0x003e,
2326 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2327 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2328 ql_dbg(ql_dbg_init, base_vha, 0x003f,
2329 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2330 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2331
2332 if (qla2x00_initialize_adapter(base_vha)) {
2333 ql_log(ql_log_fatal, base_vha, 0x00d6,
2334 "Failed to initialize adapter - Adapter flags %x.\n",
2335 base_vha->device_flags);
2336
2337 if (IS_QLA82XX(ha)) {
2338 qla82xx_idc_lock(ha);
2339 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2340 QLA82XX_DEV_FAILED);
2341 qla82xx_idc_unlock(ha);
2342 ql_log(ql_log_fatal, base_vha, 0x00d7,
2343 "HW State: FAILED.\n");
2344 }
2345
2346 ret = -ENODEV;
2347 goto probe_failed;
2348 }
2349
2350 if (ha->mqenable) {
2351 if (qla25xx_setup_mode(base_vha)) {
2352 ql_log(ql_log_warn, base_vha, 0x00ec,
2353 "Failed to create queues, falling back to single queue mode.\n");
2354 goto que_init;
2355 }
2356 }
2357
2358 if (ha->flags.running_gold_fw)
2359 goto skip_dpc;
2360
2361 /*
2362 * Startup the kernel thread for this host adapter
2363 */
2364 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2365 "%s_dpc", base_vha->host_str);
2366 if (IS_ERR(ha->dpc_thread)) {
2367 ql_log(ql_log_fatal, base_vha, 0x00ed,
2368 "Failed to start DPC thread.\n");
2369 ret = PTR_ERR(ha->dpc_thread);
2370 goto probe_failed;
2371 }
2372 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2373 "DPC thread started successfully.\n");
2374
2375 skip_dpc:
2376 list_add_tail(&base_vha->list, &ha->vp_list);
2377 base_vha->host->irq = ha->pdev->irq;
2378
2379 /* Initialized the timer */
2380 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2381 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2382 "Started qla2x00_timer with "
2383 "interval=%d.\n", WATCH_INTERVAL);
2384 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2385 "Detected hba at address=%p.\n",
2386 ha);
2387
2388 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2389 if (ha->fw_attributes & BIT_4) {
2390 int prot = 0;
2391 base_vha->flags.difdix_supported = 1;
2392 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2393 "Registering for DIF/DIX type 1 and 3 protection.\n");
2394 if (ql2xenabledif == 1)
2395 prot = SHOST_DIX_TYPE0_PROTECTION;
2396 scsi_host_set_prot(host,
2397 prot | SHOST_DIF_TYPE1_PROTECTION
2398 | SHOST_DIF_TYPE2_PROTECTION
2399 | SHOST_DIF_TYPE3_PROTECTION
2400 | SHOST_DIX_TYPE1_PROTECTION
2401 | SHOST_DIX_TYPE2_PROTECTION
2402 | SHOST_DIX_TYPE3_PROTECTION);
2403 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2404 } else
2405 base_vha->flags.difdix_supported = 0;
2406 }
2407
2408 ha->isp_ops->enable_intrs(ha);
2409
2410 ret = scsi_add_host(host, &pdev->dev);
2411 if (ret)
2412 goto probe_failed;
2413
2414 base_vha->flags.init_done = 1;
2415 base_vha->flags.online = 1;
2416
2417 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2418 "Init done and hba is online.\n");
2419
2420 scsi_scan_host(host);
2421
2422 qla2x00_alloc_sysfs_attr(base_vha);
2423
2424 qla2x00_init_host_attr(base_vha);
2425
2426 qla2x00_dfs_setup(base_vha);
2427
2428 ql_log(ql_log_info, base_vha, 0x00fa,
2429 "QLogic Fibre Channed HBA Driver: %s.\n",
2430 qla2x00_version_str);
2431 ql_log(ql_log_info, base_vha, 0x00fb,
2432 "QLogic %s - %s.\n",
2433 ha->model_number, ha->model_desc ? ha->model_desc : "");
2434 ql_log(ql_log_info, base_vha, 0x00fc,
2435 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2436 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2437 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2438 base_vha->host_no,
2439 ha->isp_ops->fw_version_str(base_vha, fw_str));
2440
2441 return 0;
2442
2443 probe_init_failed:
2444 qla2x00_free_req_que(ha, req);
2445 qla2x00_free_rsp_que(ha, rsp);
2446 ha->max_req_queues = ha->max_rsp_queues = 0;
2447
2448 probe_failed:
2449 if (base_vha->timer_active)
2450 qla2x00_stop_timer(base_vha);
2451 base_vha->flags.online = 0;
2452 if (ha->dpc_thread) {
2453 struct task_struct *t = ha->dpc_thread;
2454
2455 ha->dpc_thread = NULL;
2456 kthread_stop(t);
2457 }
2458
2459 qla2x00_free_device(base_vha);
2460
2461 scsi_host_put(base_vha->host);
2462
2463 probe_hw_failed:
2464 if (IS_QLA82XX(ha)) {
2465 qla82xx_idc_lock(ha);
2466 qla82xx_clear_drv_active(ha);
2467 qla82xx_idc_unlock(ha);
2468 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2469 if (!ql2xdbwr)
2470 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2471 } else {
2472 if (ha->iobase)
2473 iounmap(ha->iobase);
2474 }
2475 pci_release_selected_regions(ha->pdev, ha->bars);
2476 kfree(ha);
2477 ha = NULL;
2478
2479 probe_out:
2480 pci_disable_device(pdev);
2481 return ret;
2482 }
2483
2484 static void
2485 qla2x00_shutdown(struct pci_dev *pdev)
2486 {
2487 scsi_qla_host_t *vha;
2488 struct qla_hw_data *ha;
2489
2490 vha = pci_get_drvdata(pdev);
2491 ha = vha->hw;
2492
2493 /* Turn-off FCE trace */
2494 if (ha->flags.fce_enabled) {
2495 qla2x00_disable_fce_trace(vha, NULL, NULL);
2496 ha->flags.fce_enabled = 0;
2497 }
2498
2499 /* Turn-off EFT trace */
2500 if (ha->eft)
2501 qla2x00_disable_eft_trace(vha);
2502
2503 /* Stop currently executing firmware. */
2504 qla2x00_try_to_stop_firmware(vha);
2505
2506 /* Turn adapter off line */
2507 vha->flags.online = 0;
2508
2509 /* turn-off interrupts on the card */
2510 if (ha->interrupts_on) {
2511 vha->flags.init_done = 0;
2512 ha->isp_ops->disable_intrs(ha);
2513 }
2514
2515 qla2x00_free_irqs(vha);
2516
2517 qla2x00_free_fw_dump(ha);
2518 }
2519
2520 static void
2521 qla2x00_remove_one(struct pci_dev *pdev)
2522 {
2523 scsi_qla_host_t *base_vha, *vha;
2524 struct qla_hw_data *ha;
2525 unsigned long flags;
2526
2527 base_vha = pci_get_drvdata(pdev);
2528 ha = base_vha->hw;
2529
2530 mutex_lock(&ha->vport_lock);
2531 while (ha->cur_vport_count) {
2532 struct Scsi_Host *scsi_host;
2533
2534 spin_lock_irqsave(&ha->vport_slock, flags);
2535
2536 BUG_ON(base_vha->list.next == &ha->vp_list);
2537 /* This assumes first entry in ha->vp_list is always base vha */
2538 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2539 scsi_host = scsi_host_get(vha->host);
2540
2541 spin_unlock_irqrestore(&ha->vport_slock, flags);
2542 mutex_unlock(&ha->vport_lock);
2543
2544 fc_vport_terminate(vha->fc_vport);
2545 scsi_host_put(vha->host);
2546
2547 mutex_lock(&ha->vport_lock);
2548 }
2549 mutex_unlock(&ha->vport_lock);
2550
2551 set_bit(UNLOADING, &base_vha->dpc_flags);
2552
2553 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2554
2555 qla2x00_dfs_remove(base_vha);
2556
2557 qla84xx_put_chip(base_vha);
2558
2559 /* Disable timer */
2560 if (base_vha->timer_active)
2561 qla2x00_stop_timer(base_vha);
2562
2563 base_vha->flags.online = 0;
2564
2565 /* Flush the work queue and remove it */
2566 if (ha->wq) {
2567 flush_workqueue(ha->wq);
2568 destroy_workqueue(ha->wq);
2569 ha->wq = NULL;
2570 }
2571
2572 /* Kill the kernel thread for this host */
2573 if (ha->dpc_thread) {
2574 struct task_struct *t = ha->dpc_thread;
2575
2576 /*
2577 * qla2xxx_wake_dpc checks for ->dpc_thread
2578 * so we need to zero it out.
2579 */
2580 ha->dpc_thread = NULL;
2581 kthread_stop(t);
2582 }
2583
2584 qla2x00_free_sysfs_attr(base_vha);
2585
2586 fc_remove_host(base_vha->host);
2587
2588 scsi_remove_host(base_vha->host);
2589
2590 qla2x00_free_device(base_vha);
2591
2592 scsi_host_put(base_vha->host);
2593
2594 if (IS_QLA82XX(ha)) {
2595 qla82xx_idc_lock(ha);
2596 qla82xx_clear_drv_active(ha);
2597 qla82xx_idc_unlock(ha);
2598
2599 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2600 if (!ql2xdbwr)
2601 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2602 } else {
2603 if (ha->iobase)
2604 iounmap(ha->iobase);
2605
2606 if (ha->mqiobase)
2607 iounmap(ha->mqiobase);
2608 }
2609
2610 pci_release_selected_regions(ha->pdev, ha->bars);
2611 kfree(ha);
2612 ha = NULL;
2613
2614 pci_disable_pcie_error_reporting(pdev);
2615
2616 pci_disable_device(pdev);
2617 pci_set_drvdata(pdev, NULL);
2618 }
2619
2620 static void
2621 qla2x00_free_device(scsi_qla_host_t *vha)
2622 {
2623 struct qla_hw_data *ha = vha->hw;
2624
2625 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2626
2627 /* Disable timer */
2628 if (vha->timer_active)
2629 qla2x00_stop_timer(vha);
2630
2631 /* Kill the kernel thread for this host */
2632 if (ha->dpc_thread) {
2633 struct task_struct *t = ha->dpc_thread;
2634
2635 /*
2636 * qla2xxx_wake_dpc checks for ->dpc_thread
2637 * so we need to zero it out.
2638 */
2639 ha->dpc_thread = NULL;
2640 kthread_stop(t);
2641 }
2642
2643 qla25xx_delete_queues(vha);
2644
2645 if (ha->flags.fce_enabled)
2646 qla2x00_disable_fce_trace(vha, NULL, NULL);
2647
2648 if (ha->eft)
2649 qla2x00_disable_eft_trace(vha);
2650
2651 /* Stop currently executing firmware. */
2652 qla2x00_try_to_stop_firmware(vha);
2653
2654 vha->flags.online = 0;
2655
2656 /* turn-off interrupts on the card */
2657 if (ha->interrupts_on) {
2658 vha->flags.init_done = 0;
2659 ha->isp_ops->disable_intrs(ha);
2660 }
2661
2662 qla2x00_free_irqs(vha);
2663
2664 qla2x00_free_fcports(vha);
2665
2666 qla2x00_mem_free(ha);
2667
2668 qla2x00_free_queues(ha);
2669 }
2670
2671 void qla2x00_free_fcports(struct scsi_qla_host *vha)
2672 {
2673 fc_port_t *fcport, *tfcport;
2674
2675 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2676 list_del(&fcport->list);
2677 kfree(fcport);
2678 fcport = NULL;
2679 }
2680 }
2681
2682 static inline void
2683 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2684 int defer)
2685 {
2686 struct fc_rport *rport;
2687 scsi_qla_host_t *base_vha;
2688 unsigned long flags;
2689
2690 if (!fcport->rport)
2691 return;
2692
2693 rport = fcport->rport;
2694 if (defer) {
2695 base_vha = pci_get_drvdata(vha->hw->pdev);
2696 spin_lock_irqsave(vha->host->host_lock, flags);
2697 fcport->drport = rport;
2698 spin_unlock_irqrestore(vha->host->host_lock, flags);
2699 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2700 qla2xxx_wake_dpc(base_vha);
2701 } else
2702 fc_remote_port_delete(rport);
2703 }
2704
2705 /*
2706 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2707 *
2708 * Input: ha = adapter block pointer. fcport = port structure pointer.
2709 *
2710 * Return: None.
2711 *
2712 * Context:
2713 */
2714 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2715 int do_login, int defer)
2716 {
2717 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2718 vha->vp_idx == fcport->vp_idx) {
2719 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2720 qla2x00_schedule_rport_del(vha, fcport, defer);
2721 }
2722 /*
2723 * We may need to retry the login, so don't change the state of the
2724 * port but do the retries.
2725 */
2726 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2727 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2728
2729 if (!do_login)
2730 return;
2731
2732 if (fcport->login_retry == 0) {
2733 fcport->login_retry = vha->hw->login_retry_count;
2734 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2735
2736 ql_dbg(ql_dbg_disc, vha, 0x2067,
2737 "Port login retry "
2738 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2739 "id = 0x%04x retry cnt=%d.\n",
2740 fcport->port_name[0], fcport->port_name[1],
2741 fcport->port_name[2], fcport->port_name[3],
2742 fcport->port_name[4], fcport->port_name[5],
2743 fcport->port_name[6], fcport->port_name[7],
2744 fcport->loop_id, fcport->login_retry);
2745 }
2746 }
2747
2748 /*
2749 * qla2x00_mark_all_devices_lost
2750 * Updates fcport state when device goes offline.
2751 *
2752 * Input:
2753 * ha = adapter block pointer.
2754 * fcport = port structure pointer.
2755 *
2756 * Return:
2757 * None.
2758 *
2759 * Context:
2760 */
2761 void
2762 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
2763 {
2764 fc_port_t *fcport;
2765
2766 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2767 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
2768 continue;
2769
2770 /*
2771 * No point in marking the device as lost, if the device is
2772 * already DEAD.
2773 */
2774 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2775 continue;
2776 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2777 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2778 if (defer)
2779 qla2x00_schedule_rport_del(vha, fcport, defer);
2780 else if (vha->vp_idx == fcport->vp_idx)
2781 qla2x00_schedule_rport_del(vha, fcport, defer);
2782 }
2783 }
2784 }
2785
2786 /*
2787 * qla2x00_mem_alloc
2788 * Allocates adapter memory.
2789 *
2790 * Returns:
2791 * 0 = success.
2792 * !0 = failure.
2793 */
2794 static int
2795 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2796 struct req_que **req, struct rsp_que **rsp)
2797 {
2798 char name[16];
2799
2800 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
2801 &ha->init_cb_dma, GFP_KERNEL);
2802 if (!ha->init_cb)
2803 goto fail;
2804
2805 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2806 &ha->gid_list_dma, GFP_KERNEL);
2807 if (!ha->gid_list)
2808 goto fail_free_init_cb;
2809
2810 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2811 if (!ha->srb_mempool)
2812 goto fail_free_gid_list;
2813
2814 if (IS_QLA82XX(ha)) {
2815 /* Allocate cache for CT6 Ctx. */
2816 if (!ctx_cachep) {
2817 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2818 sizeof(struct ct6_dsd), 0,
2819 SLAB_HWCACHE_ALIGN, NULL);
2820 if (!ctx_cachep)
2821 goto fail_free_gid_list;
2822 }
2823 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2824 ctx_cachep);
2825 if (!ha->ctx_mempool)
2826 goto fail_free_srb_mempool;
2827 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
2828 "ctx_cachep=%p ctx_mempool=%p.\n",
2829 ctx_cachep, ha->ctx_mempool);
2830 }
2831
2832 /* Get memory for cached NVRAM */
2833 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2834 if (!ha->nvram)
2835 goto fail_free_ctx_mempool;
2836
2837 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2838 ha->pdev->device);
2839 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2840 DMA_POOL_SIZE, 8, 0);
2841 if (!ha->s_dma_pool)
2842 goto fail_free_nvram;
2843
2844 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
2845 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
2846 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
2847
2848 if (IS_QLA82XX(ha) || ql2xenabledif) {
2849 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2850 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2851 if (!ha->dl_dma_pool) {
2852 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
2853 "Failed to allocate memory for dl_dma_pool.\n");
2854 goto fail_s_dma_pool;
2855 }
2856
2857 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2858 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2859 if (!ha->fcp_cmnd_dma_pool) {
2860 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
2861 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
2862 goto fail_dl_dma_pool;
2863 }
2864 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
2865 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
2866 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
2867 }
2868
2869 /* Allocate memory for SNS commands */
2870 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2871 /* Get consistent memory allocated for SNS commands */
2872 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
2873 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
2874 if (!ha->sns_cmd)
2875 goto fail_dma_pool;
2876 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
2877 "sns_cmd.\n", ha->sns_cmd);
2878 } else {
2879 /* Get consistent memory allocated for MS IOCB */
2880 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2881 &ha->ms_iocb_dma);
2882 if (!ha->ms_iocb)
2883 goto fail_dma_pool;
2884 /* Get consistent memory allocated for CT SNS commands */
2885 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
2886 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
2887 if (!ha->ct_sns)
2888 goto fail_free_ms_iocb;
2889 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
2890 "ms_iocb=%p ct_sns=%p.\n",
2891 ha->ms_iocb, ha->ct_sns);
2892 }
2893
2894 /* Allocate memory for request ring */
2895 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2896 if (!*req) {
2897 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
2898 "Failed to allocate memory for req.\n");
2899 goto fail_req;
2900 }
2901 (*req)->length = req_len;
2902 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2903 ((*req)->length + 1) * sizeof(request_t),
2904 &(*req)->dma, GFP_KERNEL);
2905 if (!(*req)->ring) {
2906 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
2907 "Failed to allocate memory for req_ring.\n");
2908 goto fail_req_ring;
2909 }
2910 /* Allocate memory for response ring */
2911 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2912 if (!*rsp) {
2913 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
2914 "Failed to allocate memory for rsp.\n");
2915 goto fail_rsp;
2916 }
2917 (*rsp)->hw = ha;
2918 (*rsp)->length = rsp_len;
2919 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2920 ((*rsp)->length + 1) * sizeof(response_t),
2921 &(*rsp)->dma, GFP_KERNEL);
2922 if (!(*rsp)->ring) {
2923 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
2924 "Failed to allocate memory for rsp_ring.\n");
2925 goto fail_rsp_ring;
2926 }
2927 (*req)->rsp = *rsp;
2928 (*rsp)->req = *req;
2929 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
2930 "req=%p req->length=%d req->ring=%p rsp=%p "
2931 "rsp->length=%d rsp->ring=%p.\n",
2932 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
2933 (*rsp)->ring);
2934 /* Allocate memory for NVRAM data for vports */
2935 if (ha->nvram_npiv_size) {
2936 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2937 ha->nvram_npiv_size, GFP_KERNEL);
2938 if (!ha->npiv_info) {
2939 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
2940 "Failed to allocate memory for npiv_info.\n");
2941 goto fail_npiv_info;
2942 }
2943 } else
2944 ha->npiv_info = NULL;
2945
2946 /* Get consistent memory allocated for EX-INIT-CB. */
2947 if (IS_QLA8XXX_TYPE(ha)) {
2948 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2949 &ha->ex_init_cb_dma);
2950 if (!ha->ex_init_cb)
2951 goto fail_ex_init_cb;
2952 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
2953 "ex_init_cb=%p.\n", ha->ex_init_cb);
2954 }
2955
2956 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2957
2958 /* Get consistent memory allocated for Async Port-Database. */
2959 if (!IS_FWI2_CAPABLE(ha)) {
2960 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2961 &ha->async_pd_dma);
2962 if (!ha->async_pd)
2963 goto fail_async_pd;
2964 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
2965 "async_pd=%p.\n", ha->async_pd);
2966 }
2967
2968 INIT_LIST_HEAD(&ha->vp_list);
2969 return 1;
2970
2971 fail_async_pd:
2972 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
2973 fail_ex_init_cb:
2974 kfree(ha->npiv_info);
2975 fail_npiv_info:
2976 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2977 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2978 (*rsp)->ring = NULL;
2979 (*rsp)->dma = 0;
2980 fail_rsp_ring:
2981 kfree(*rsp);
2982 fail_rsp:
2983 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2984 sizeof(request_t), (*req)->ring, (*req)->dma);
2985 (*req)->ring = NULL;
2986 (*req)->dma = 0;
2987 fail_req_ring:
2988 kfree(*req);
2989 fail_req:
2990 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2991 ha->ct_sns, ha->ct_sns_dma);
2992 ha->ct_sns = NULL;
2993 ha->ct_sns_dma = 0;
2994 fail_free_ms_iocb:
2995 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2996 ha->ms_iocb = NULL;
2997 ha->ms_iocb_dma = 0;
2998 fail_dma_pool:
2999 if (IS_QLA82XX(ha) || ql2xenabledif) {
3000 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3001 ha->fcp_cmnd_dma_pool = NULL;
3002 }
3003 fail_dl_dma_pool:
3004 if (IS_QLA82XX(ha) || ql2xenabledif) {
3005 dma_pool_destroy(ha->dl_dma_pool);
3006 ha->dl_dma_pool = NULL;
3007 }
3008 fail_s_dma_pool:
3009 dma_pool_destroy(ha->s_dma_pool);
3010 ha->s_dma_pool = NULL;
3011 fail_free_nvram:
3012 kfree(ha->nvram);
3013 ha->nvram = NULL;
3014 fail_free_ctx_mempool:
3015 mempool_destroy(ha->ctx_mempool);
3016 ha->ctx_mempool = NULL;
3017 fail_free_srb_mempool:
3018 mempool_destroy(ha->srb_mempool);
3019 ha->srb_mempool = NULL;
3020 fail_free_gid_list:
3021 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
3022 ha->gid_list_dma);
3023 ha->gid_list = NULL;
3024 ha->gid_list_dma = 0;
3025 fail_free_init_cb:
3026 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3027 ha->init_cb_dma);
3028 ha->init_cb = NULL;
3029 ha->init_cb_dma = 0;
3030 fail:
3031 ql_log(ql_log_fatal, NULL, 0x0030,
3032 "Memory allocation failure.\n");
3033 return -ENOMEM;
3034 }
3035
3036 /*
3037 * qla2x00_free_fw_dump
3038 * Frees fw dump stuff.
3039 *
3040 * Input:
3041 * ha = adapter block pointer.
3042 */
3043 static void
3044 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3045 {
3046 if (ha->fce)
3047 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3048 ha->fce_dma);
3049
3050 if (ha->fw_dump) {
3051 if (ha->eft)
3052 dma_free_coherent(&ha->pdev->dev,
3053 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3054 vfree(ha->fw_dump);
3055 }
3056 ha->fce = NULL;
3057 ha->fce_dma = 0;
3058 ha->eft = NULL;
3059 ha->eft_dma = 0;
3060 ha->fw_dump = NULL;
3061 ha->fw_dumped = 0;
3062 ha->fw_dump_reading = 0;
3063 }
3064
3065 /*
3066 * qla2x00_mem_free
3067 * Frees all adapter allocated memory.
3068 *
3069 * Input:
3070 * ha = adapter block pointer.
3071 */
3072 static void
3073 qla2x00_mem_free(struct qla_hw_data *ha)
3074 {
3075 qla2x00_free_fw_dump(ha);
3076
3077 if (ha->srb_mempool)
3078 mempool_destroy(ha->srb_mempool);
3079
3080 if (ha->dcbx_tlv)
3081 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3082 ha->dcbx_tlv, ha->dcbx_tlv_dma);
3083
3084 if (ha->xgmac_data)
3085 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3086 ha->xgmac_data, ha->xgmac_data_dma);
3087
3088 if (ha->sns_cmd)
3089 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3090 ha->sns_cmd, ha->sns_cmd_dma);
3091
3092 if (ha->ct_sns)
3093 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3094 ha->ct_sns, ha->ct_sns_dma);
3095
3096 if (ha->sfp_data)
3097 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3098
3099 if (ha->edc_data)
3100 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
3101
3102 if (ha->ms_iocb)
3103 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3104
3105 if (ha->ex_init_cb)
3106 dma_pool_free(ha->s_dma_pool,
3107 ha->ex_init_cb, ha->ex_init_cb_dma);
3108
3109 if (ha->async_pd)
3110 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3111
3112 if (ha->s_dma_pool)
3113 dma_pool_destroy(ha->s_dma_pool);
3114
3115 if (ha->gid_list)
3116 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
3117 ha->gid_list_dma);
3118
3119 if (IS_QLA82XX(ha)) {
3120 if (!list_empty(&ha->gbl_dsd_list)) {
3121 struct dsd_dma *dsd_ptr, *tdsd_ptr;
3122
3123 /* clean up allocated prev pool */
3124 list_for_each_entry_safe(dsd_ptr,
3125 tdsd_ptr, &ha->gbl_dsd_list, list) {
3126 dma_pool_free(ha->dl_dma_pool,
3127 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3128 list_del(&dsd_ptr->list);
3129 kfree(dsd_ptr);
3130 }
3131 }
3132 }
3133
3134 if (ha->dl_dma_pool)
3135 dma_pool_destroy(ha->dl_dma_pool);
3136
3137 if (ha->fcp_cmnd_dma_pool)
3138 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3139
3140 if (ha->ctx_mempool)
3141 mempool_destroy(ha->ctx_mempool);
3142
3143 if (ha->init_cb)
3144 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3145 ha->init_cb, ha->init_cb_dma);
3146 vfree(ha->optrom_buffer);
3147 kfree(ha->nvram);
3148 kfree(ha->npiv_info);
3149
3150 ha->srb_mempool = NULL;
3151 ha->ctx_mempool = NULL;
3152 ha->sns_cmd = NULL;
3153 ha->sns_cmd_dma = 0;
3154 ha->ct_sns = NULL;
3155 ha->ct_sns_dma = 0;
3156 ha->ms_iocb = NULL;
3157 ha->ms_iocb_dma = 0;
3158 ha->init_cb = NULL;
3159 ha->init_cb_dma = 0;
3160 ha->ex_init_cb = NULL;
3161 ha->ex_init_cb_dma = 0;
3162 ha->async_pd = NULL;
3163 ha->async_pd_dma = 0;
3164
3165 ha->s_dma_pool = NULL;
3166 ha->dl_dma_pool = NULL;
3167 ha->fcp_cmnd_dma_pool = NULL;
3168
3169 ha->gid_list = NULL;
3170 ha->gid_list_dma = 0;
3171 }
3172
3173 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3174 struct qla_hw_data *ha)
3175 {
3176 struct Scsi_Host *host;
3177 struct scsi_qla_host *vha = NULL;
3178
3179 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3180 if (host == NULL) {
3181 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3182 "Failed to allocate host from the scsi layer, aborting.\n");
3183 goto fail;
3184 }
3185
3186 /* Clear our data area */
3187 vha = shost_priv(host);
3188 memset(vha, 0, sizeof(scsi_qla_host_t));
3189
3190 vha->host = host;
3191 vha->host_no = host->host_no;
3192 vha->hw = ha;
3193
3194 INIT_LIST_HEAD(&vha->vp_fcports);
3195 INIT_LIST_HEAD(&vha->work_list);
3196 INIT_LIST_HEAD(&vha->list);
3197
3198 spin_lock_init(&vha->work_lock);
3199
3200 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3201 ql_dbg(ql_dbg_init, vha, 0x0041,
3202 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3203 vha->host, vha->hw, vha,
3204 dev_name(&(ha->pdev->dev)));
3205
3206 return vha;
3207
3208 fail:
3209 return vha;
3210 }
3211
3212 static struct qla_work_evt *
3213 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3214 {
3215 struct qla_work_evt *e;
3216 uint8_t bail;
3217
3218 QLA_VHA_MARK_BUSY(vha, bail);
3219 if (bail)
3220 return NULL;
3221
3222 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3223 if (!e) {
3224 QLA_VHA_MARK_NOT_BUSY(vha);
3225 return NULL;
3226 }
3227
3228 INIT_LIST_HEAD(&e->list);
3229 e->type = type;
3230 e->flags = QLA_EVT_FLAG_FREE;
3231 return e;
3232 }
3233
3234 static int
3235 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3236 {
3237 unsigned long flags;
3238
3239 spin_lock_irqsave(&vha->work_lock, flags);
3240 list_add_tail(&e->list, &vha->work_list);
3241 spin_unlock_irqrestore(&vha->work_lock, flags);
3242 qla2xxx_wake_dpc(vha);
3243
3244 return QLA_SUCCESS;
3245 }
3246
3247 int
3248 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3249 u32 data)
3250 {
3251 struct qla_work_evt *e;
3252
3253 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3254 if (!e)
3255 return QLA_FUNCTION_FAILED;
3256
3257 e->u.aen.code = code;
3258 e->u.aen.data = data;
3259 return qla2x00_post_work(vha, e);
3260 }
3261
3262 int
3263 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3264 {
3265 struct qla_work_evt *e;
3266
3267 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3268 if (!e)
3269 return QLA_FUNCTION_FAILED;
3270
3271 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3272 return qla2x00_post_work(vha, e);
3273 }
3274
3275 #define qla2x00_post_async_work(name, type) \
3276 int qla2x00_post_async_##name##_work( \
3277 struct scsi_qla_host *vha, \
3278 fc_port_t *fcport, uint16_t *data) \
3279 { \
3280 struct qla_work_evt *e; \
3281 \
3282 e = qla2x00_alloc_work(vha, type); \
3283 if (!e) \
3284 return QLA_FUNCTION_FAILED; \
3285 \
3286 e->u.logio.fcport = fcport; \
3287 if (data) { \
3288 e->u.logio.data[0] = data[0]; \
3289 e->u.logio.data[1] = data[1]; \
3290 } \
3291 return qla2x00_post_work(vha, e); \
3292 }
3293
3294 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3295 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3296 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3297 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3298 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3299 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3300
3301 int
3302 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3303 {
3304 struct qla_work_evt *e;
3305
3306 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3307 if (!e)
3308 return QLA_FUNCTION_FAILED;
3309
3310 e->u.uevent.code = code;
3311 return qla2x00_post_work(vha, e);
3312 }
3313
3314 static void
3315 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3316 {
3317 char event_string[40];
3318 char *envp[] = { event_string, NULL };
3319
3320 switch (code) {
3321 case QLA_UEVENT_CODE_FW_DUMP:
3322 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3323 vha->host_no);
3324 break;
3325 default:
3326 /* do nothing */
3327 break;
3328 }
3329 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3330 }
3331
3332 void
3333 qla2x00_do_work(struct scsi_qla_host *vha)
3334 {
3335 struct qla_work_evt *e, *tmp;
3336 unsigned long flags;
3337 LIST_HEAD(work);
3338
3339 spin_lock_irqsave(&vha->work_lock, flags);
3340 list_splice_init(&vha->work_list, &work);
3341 spin_unlock_irqrestore(&vha->work_lock, flags);
3342
3343 list_for_each_entry_safe(e, tmp, &work, list) {
3344 list_del_init(&e->list);
3345
3346 switch (e->type) {
3347 case QLA_EVT_AEN:
3348 fc_host_post_event(vha->host, fc_get_event_number(),
3349 e->u.aen.code, e->u.aen.data);
3350 break;
3351 case QLA_EVT_IDC_ACK:
3352 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3353 break;
3354 case QLA_EVT_ASYNC_LOGIN:
3355 qla2x00_async_login(vha, e->u.logio.fcport,
3356 e->u.logio.data);
3357 break;
3358 case QLA_EVT_ASYNC_LOGIN_DONE:
3359 qla2x00_async_login_done(vha, e->u.logio.fcport,
3360 e->u.logio.data);
3361 break;
3362 case QLA_EVT_ASYNC_LOGOUT:
3363 qla2x00_async_logout(vha, e->u.logio.fcport);
3364 break;
3365 case QLA_EVT_ASYNC_LOGOUT_DONE:
3366 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3367 e->u.logio.data);
3368 break;
3369 case QLA_EVT_ASYNC_ADISC:
3370 qla2x00_async_adisc(vha, e->u.logio.fcport,
3371 e->u.logio.data);
3372 break;
3373 case QLA_EVT_ASYNC_ADISC_DONE:
3374 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3375 e->u.logio.data);
3376 break;
3377 case QLA_EVT_UEVENT:
3378 qla2x00_uevent_emit(vha, e->u.uevent.code);
3379 break;
3380 }
3381 if (e->flags & QLA_EVT_FLAG_FREE)
3382 kfree(e);
3383
3384 /* For each work completed decrement vha ref count */
3385 QLA_VHA_MARK_NOT_BUSY(vha);
3386 }
3387 }
3388
3389 /* Relogins all the fcports of a vport
3390 * Context: dpc thread
3391 */
3392 void qla2x00_relogin(struct scsi_qla_host *vha)
3393 {
3394 fc_port_t *fcport;
3395 int status;
3396 uint16_t next_loopid = 0;
3397 struct qla_hw_data *ha = vha->hw;
3398 uint16_t data[2];
3399
3400 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3401 /*
3402 * If the port is not ONLINE then try to login
3403 * to it if we haven't run out of retries.
3404 */
3405 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3406 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3407 fcport->login_retry--;
3408 if (fcport->flags & FCF_FABRIC_DEVICE) {
3409 if (fcport->flags & FCF_FCP2_DEVICE)
3410 ha->isp_ops->fabric_logout(vha,
3411 fcport->loop_id,
3412 fcport->d_id.b.domain,
3413 fcport->d_id.b.area,
3414 fcport->d_id.b.al_pa);
3415
3416 if (fcport->loop_id == FC_NO_LOOP_ID) {
3417 fcport->loop_id = next_loopid =
3418 ha->min_external_loopid;
3419 status = qla2x00_find_new_loop_id(
3420 vha, fcport);
3421 if (status != QLA_SUCCESS) {
3422 /* Ran out of IDs to use */
3423 break;
3424 }
3425 }
3426
3427 if (IS_ALOGIO_CAPABLE(ha)) {
3428 fcport->flags |= FCF_ASYNC_SENT;
3429 data[0] = 0;
3430 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3431 status = qla2x00_post_async_login_work(
3432 vha, fcport, data);
3433 if (status == QLA_SUCCESS)
3434 continue;
3435 /* Attempt a retry. */
3436 status = 1;
3437 } else
3438 status = qla2x00_fabric_login(vha,
3439 fcport, &next_loopid);
3440 } else
3441 status = qla2x00_local_device_login(vha,
3442 fcport);
3443
3444 if (status == QLA_SUCCESS) {
3445 fcport->old_loop_id = fcport->loop_id;
3446
3447 ql_dbg(ql_dbg_disc, vha, 0x2003,
3448 "Port login OK: logged in ID 0x%x.\n",
3449 fcport->loop_id);
3450
3451 qla2x00_update_fcport(vha, fcport);
3452
3453 } else if (status == 1) {
3454 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3455 /* retry the login again */
3456 ql_dbg(ql_dbg_disc, vha, 0x2007,
3457 "Retrying %d login again loop_id 0x%x.\n",
3458 fcport->login_retry, fcport->loop_id);
3459 } else {
3460 fcport->login_retry = 0;
3461 }
3462
3463 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3464 fcport->loop_id = FC_NO_LOOP_ID;
3465 }
3466 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3467 break;
3468 }
3469 }
3470
3471 /**************************************************************************
3472 * qla2x00_do_dpc
3473 * This kernel thread is a task that is schedule by the interrupt handler
3474 * to perform the background processing for interrupts.
3475 *
3476 * Notes:
3477 * This task always run in the context of a kernel thread. It
3478 * is kick-off by the driver's detect code and starts up
3479 * up one per adapter. It immediately goes to sleep and waits for
3480 * some fibre event. When either the interrupt handler or
3481 * the timer routine detects a event it will one of the task
3482 * bits then wake us up.
3483 **************************************************************************/
3484 static int
3485 qla2x00_do_dpc(void *data)
3486 {
3487 int rval;
3488 scsi_qla_host_t *base_vha;
3489 struct qla_hw_data *ha;
3490
3491 ha = (struct qla_hw_data *)data;
3492 base_vha = pci_get_drvdata(ha->pdev);
3493
3494 set_user_nice(current, -20);
3495
3496 set_current_state(TASK_INTERRUPTIBLE);
3497 while (!kthread_should_stop()) {
3498 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
3499 "DPC handler sleeping.\n");
3500
3501 schedule();
3502 __set_current_state(TASK_RUNNING);
3503
3504 ql_dbg(ql_dbg_dpc, base_vha, 0x4001,
3505 "DPC handler waking up.\n");
3506 ql_dbg(ql_dbg_dpc, base_vha, 0x4002,
3507 "dpc_flags=0x%lx.\n", base_vha->dpc_flags);
3508
3509 /* Initialization not yet finished. Don't do anything yet. */
3510 if (!base_vha->flags.init_done)
3511 continue;
3512
3513 if (ha->flags.eeh_busy) {
3514 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
3515 "eeh_busy=%d.\n", ha->flags.eeh_busy);
3516 continue;
3517 }
3518
3519 ha->dpc_active = 1;
3520
3521 if (ha->flags.mbox_busy) {
3522 ha->dpc_active = 0;
3523 continue;
3524 }
3525
3526 qla2x00_do_work(base_vha);
3527
3528 if (IS_QLA82XX(ha)) {
3529 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3530 &base_vha->dpc_flags)) {
3531 qla82xx_idc_lock(ha);
3532 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3533 QLA82XX_DEV_FAILED);
3534 qla82xx_idc_unlock(ha);
3535 ql_log(ql_log_info, base_vha, 0x4004,
3536 "HW State: FAILED.\n");
3537 qla82xx_device_state_handler(base_vha);
3538 continue;
3539 }
3540
3541 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3542 &base_vha->dpc_flags)) {
3543
3544 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
3545 "FCoE context reset scheduled.\n");
3546 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3547 &base_vha->dpc_flags))) {
3548 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3549 /* FCoE-ctx reset failed.
3550 * Escalate to chip-reset
3551 */
3552 set_bit(ISP_ABORT_NEEDED,
3553 &base_vha->dpc_flags);
3554 }
3555 clear_bit(ABORT_ISP_ACTIVE,
3556 &base_vha->dpc_flags);
3557 }
3558
3559 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
3560 "FCoE context reset end.\n");
3561 }
3562 }
3563
3564 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3565 &base_vha->dpc_flags)) {
3566
3567 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
3568 "ISP abort scheduled.\n");
3569 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3570 &base_vha->dpc_flags))) {
3571
3572 if (ha->isp_ops->abort_isp(base_vha)) {
3573 /* failed. retry later */
3574 set_bit(ISP_ABORT_NEEDED,
3575 &base_vha->dpc_flags);
3576 }
3577 clear_bit(ABORT_ISP_ACTIVE,
3578 &base_vha->dpc_flags);
3579 }
3580
3581 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
3582 "ISP abort end.\n");
3583 }
3584
3585 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3586 qla2x00_update_fcports(base_vha);
3587 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3588 }
3589
3590 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3591 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
3592 "Quiescence mode scheduled.\n");
3593 qla82xx_device_state_handler(base_vha);
3594 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3595 if (!ha->flags.quiesce_owner) {
3596 qla2x00_perform_loop_resync(base_vha);
3597
3598 qla82xx_idc_lock(ha);
3599 qla82xx_clear_qsnt_ready(base_vha);
3600 qla82xx_idc_unlock(ha);
3601 }
3602 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
3603 "Quiescence mode end.\n");
3604 }
3605
3606 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3607 &base_vha->dpc_flags) &&
3608 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
3609
3610 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
3611 "Reset marker scheduled.\n");
3612 qla2x00_rst_aen(base_vha);
3613 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
3614 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
3615 "Reset marker end.\n");
3616 }
3617
3618 /* Retry each device up to login retry count */
3619 if ((test_and_clear_bit(RELOGIN_NEEDED,
3620 &base_vha->dpc_flags)) &&
3621 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3622 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
3623
3624 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
3625 "Relogin scheduled.\n");
3626 qla2x00_relogin(base_vha);
3627 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
3628 "Relogin end.\n");
3629 }
3630
3631 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3632 &base_vha->dpc_flags)) {
3633
3634 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
3635 "Loop resync scheduled.\n");
3636
3637 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
3638 &base_vha->dpc_flags))) {
3639
3640 rval = qla2x00_loop_resync(base_vha);
3641
3642 clear_bit(LOOP_RESYNC_ACTIVE,
3643 &base_vha->dpc_flags);
3644 }
3645
3646 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
3647 "Loop resync end.\n");
3648 }
3649
3650 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3651 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3652 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3653 qla2xxx_flash_npiv_conf(base_vha);
3654 }
3655
3656 if (!ha->interrupts_on)
3657 ha->isp_ops->enable_intrs(ha);
3658
3659 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3660 &base_vha->dpc_flags))
3661 ha->isp_ops->beacon_blink(base_vha);
3662
3663 qla2x00_do_dpc_all_vps(base_vha);
3664
3665 ha->dpc_active = 0;
3666 set_current_state(TASK_INTERRUPTIBLE);
3667 } /* End of while(1) */
3668 __set_current_state(TASK_RUNNING);
3669
3670 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
3671 "DPC handler exiting.\n");
3672
3673 /*
3674 * Make sure that nobody tries to wake us up again.
3675 */
3676 ha->dpc_active = 0;
3677
3678 /* Cleanup any residual CTX SRBs. */
3679 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3680
3681 return 0;
3682 }
3683
3684 void
3685 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
3686 {
3687 struct qla_hw_data *ha = vha->hw;
3688 struct task_struct *t = ha->dpc_thread;
3689
3690 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
3691 wake_up_process(t);
3692 }
3693
3694 /*
3695 * qla2x00_rst_aen
3696 * Processes asynchronous reset.
3697 *
3698 * Input:
3699 * ha = adapter block pointer.
3700 */
3701 static void
3702 qla2x00_rst_aen(scsi_qla_host_t *vha)
3703 {
3704 if (vha->flags.online && !vha->flags.reset_active &&
3705 !atomic_read(&vha->loop_down_timer) &&
3706 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
3707 do {
3708 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
3709
3710 /*
3711 * Issue marker command only when we are going to start
3712 * the I/O.
3713 */
3714 vha->marker_needed = 1;
3715 } while (!atomic_read(&vha->loop_down_timer) &&
3716 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
3717 }
3718 }
3719
3720 static void
3721 qla2x00_sp_free_dma(srb_t *sp)
3722 {
3723 struct scsi_cmnd *cmd = sp->cmd;
3724 struct qla_hw_data *ha = sp->fcport->vha->hw;
3725
3726 if (sp->flags & SRB_DMA_VALID) {
3727 scsi_dma_unmap(cmd);
3728 sp->flags &= ~SRB_DMA_VALID;
3729 }
3730
3731 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3732 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3733 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3734 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3735 }
3736
3737 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3738 /* List assured to be having elements */
3739 qla2x00_clean_dsd_pool(ha, sp);
3740 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3741 }
3742
3743 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3744 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3745 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3746 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3747 }
3748
3749 CMD_SP(cmd) = NULL;
3750 }
3751
3752 static void
3753 qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
3754 {
3755 struct scsi_cmnd *cmd = sp->cmd;
3756
3757 qla2x00_sp_free_dma(sp);
3758
3759 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3760 struct ct6_dsd *ctx = sp->ctx;
3761 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3762 ctx->fcp_cmnd_dma);
3763 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3764 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3765 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3766 mempool_free(sp->ctx, ha->ctx_mempool);
3767 sp->ctx = NULL;
3768 }
3769
3770 mempool_free(sp, ha->srb_mempool);
3771 cmd->scsi_done(cmd);
3772 }
3773
3774 void
3775 qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3776 {
3777 if (atomic_read(&sp->ref_count) == 0) {
3778 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
3779 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
3780 sp, sp->cmd);
3781 if (ql2xextended_error_logging & ql_dbg_io)
3782 BUG();
3783 return;
3784 }
3785 if (!atomic_dec_and_test(&sp->ref_count))
3786 return;
3787 qla2x00_sp_final_compl(ha, sp);
3788 }
3789
3790 /**************************************************************************
3791 * qla2x00_timer
3792 *
3793 * Description:
3794 * One second timer
3795 *
3796 * Context: Interrupt
3797 ***************************************************************************/
3798 void
3799 qla2x00_timer(scsi_qla_host_t *vha)
3800 {
3801 unsigned long cpu_flags = 0;
3802 int start_dpc = 0;
3803 int index;
3804 srb_t *sp;
3805 uint16_t w;
3806 struct qla_hw_data *ha = vha->hw;
3807 struct req_que *req;
3808
3809 if (ha->flags.eeh_busy) {
3810 ql_dbg(ql_dbg_timer, vha, 0x6000,
3811 "EEH = %d, restarting timer.\n",
3812 ha->flags.eeh_busy);
3813 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3814 return;
3815 }
3816
3817 /* Hardware read to raise pending EEH errors during mailbox waits. */
3818 if (!pci_channel_offline(ha->pdev))
3819 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
3820
3821 /* Make sure qla82xx_watchdog is run only for physical port */
3822 if (!vha->vp_idx && IS_QLA82XX(ha)) {
3823 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3824 start_dpc++;
3825 qla82xx_watchdog(vha);
3826 }
3827
3828 /* Loop down handler. */
3829 if (atomic_read(&vha->loop_down_timer) > 0 &&
3830 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
3831 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
3832 && vha->flags.online) {
3833
3834 if (atomic_read(&vha->loop_down_timer) ==
3835 vha->loop_down_abort_time) {
3836
3837 ql_log(ql_log_info, vha, 0x6008,
3838 "Loop down - aborting the queues before time expires.\n");
3839
3840 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3841 atomic_set(&vha->loop_state, LOOP_DEAD);
3842
3843 /*
3844 * Schedule an ISP abort to return any FCP2-device
3845 * commands.
3846 */
3847 /* NPIV - scan physical port only */
3848 if (!vha->vp_idx) {
3849 spin_lock_irqsave(&ha->hardware_lock,
3850 cpu_flags);
3851 req = ha->req_q_map[0];
3852 for (index = 1;
3853 index < MAX_OUTSTANDING_COMMANDS;
3854 index++) {
3855 fc_port_t *sfcp;
3856
3857 sp = req->outstanding_cmds[index];
3858 if (!sp)
3859 continue;
3860 if (sp->ctx && !IS_PROT_IO(sp))
3861 continue;
3862 sfcp = sp->fcport;
3863 if (!(sfcp->flags & FCF_FCP2_DEVICE))
3864 continue;
3865
3866 if (IS_QLA82XX(ha))
3867 set_bit(FCOE_CTX_RESET_NEEDED,
3868 &vha->dpc_flags);
3869 else
3870 set_bit(ISP_ABORT_NEEDED,
3871 &vha->dpc_flags);
3872 break;
3873 }
3874 spin_unlock_irqrestore(&ha->hardware_lock,
3875 cpu_flags);
3876 }
3877 start_dpc++;
3878 }
3879
3880 /* if the loop has been down for 4 minutes, reinit adapter */
3881 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
3882 if (!(vha->device_flags & DFLG_NO_CABLE)) {
3883 ql_log(ql_log_warn, vha, 0x6009,
3884 "Loop down - aborting ISP.\n");
3885
3886 if (IS_QLA82XX(ha))
3887 set_bit(FCOE_CTX_RESET_NEEDED,
3888 &vha->dpc_flags);
3889 else
3890 set_bit(ISP_ABORT_NEEDED,
3891 &vha->dpc_flags);
3892 }
3893 }
3894 ql_dbg(ql_dbg_timer, vha, 0x600a,
3895 "Loop down - seconds remaining %d.\n",
3896 atomic_read(&vha->loop_down_timer));
3897 }
3898
3899 /* Check if beacon LED needs to be blinked for physical host only */
3900 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
3901 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
3902 start_dpc++;
3903 }
3904
3905 /* Process any deferred work. */
3906 if (!list_empty(&vha->work_list))
3907 start_dpc++;
3908
3909 /* Schedule the DPC routine if needed */
3910 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3911 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3912 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
3913 start_dpc ||
3914 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3915 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
3916 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3917 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
3918 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3919 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
3920 ql_dbg(ql_dbg_timer, vha, 0x600b,
3921 "isp_abort_needed=%d loop_resync_needed=%d "
3922 "fcport_update_needed=%d start_dpc=%d "
3923 "reset_marker_needed=%d",
3924 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
3925 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
3926 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
3927 start_dpc,
3928 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
3929 ql_dbg(ql_dbg_timer, vha, 0x600c,
3930 "beacon_blink_needed=%d isp_unrecoverable=%d "
3931 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
3932 "relogin_needed=%d.\n",
3933 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
3934 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
3935 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
3936 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
3937 test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
3938 qla2xxx_wake_dpc(vha);
3939 }
3940
3941 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3942 }
3943
3944 /* Firmware interface routines. */
3945
3946 #define FW_BLOBS 8
3947 #define FW_ISP21XX 0
3948 #define FW_ISP22XX 1
3949 #define FW_ISP2300 2
3950 #define FW_ISP2322 3
3951 #define FW_ISP24XX 4
3952 #define FW_ISP25XX 5
3953 #define FW_ISP81XX 6
3954 #define FW_ISP82XX 7
3955
3956 #define FW_FILE_ISP21XX "ql2100_fw.bin"
3957 #define FW_FILE_ISP22XX "ql2200_fw.bin"
3958 #define FW_FILE_ISP2300 "ql2300_fw.bin"
3959 #define FW_FILE_ISP2322 "ql2322_fw.bin"
3960 #define FW_FILE_ISP24XX "ql2400_fw.bin"
3961 #define FW_FILE_ISP25XX "ql2500_fw.bin"
3962 #define FW_FILE_ISP81XX "ql8100_fw.bin"
3963 #define FW_FILE_ISP82XX "ql8200_fw.bin"
3964
3965 static DEFINE_MUTEX(qla_fw_lock);
3966
3967 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
3968 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3969 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3970 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3971 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3972 { .name = FW_FILE_ISP24XX, },
3973 { .name = FW_FILE_ISP25XX, },
3974 { .name = FW_FILE_ISP81XX, },
3975 { .name = FW_FILE_ISP82XX, },
3976 };
3977
3978 struct fw_blob *
3979 qla2x00_request_firmware(scsi_qla_host_t *vha)
3980 {
3981 struct qla_hw_data *ha = vha->hw;
3982 struct fw_blob *blob;
3983
3984 blob = NULL;
3985 if (IS_QLA2100(ha)) {
3986 blob = &qla_fw_blobs[FW_ISP21XX];
3987 } else if (IS_QLA2200(ha)) {
3988 blob = &qla_fw_blobs[FW_ISP22XX];
3989 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3990 blob = &qla_fw_blobs[FW_ISP2300];
3991 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
3992 blob = &qla_fw_blobs[FW_ISP2322];
3993 } else if (IS_QLA24XX_TYPE(ha)) {
3994 blob = &qla_fw_blobs[FW_ISP24XX];
3995 } else if (IS_QLA25XX(ha)) {
3996 blob = &qla_fw_blobs[FW_ISP25XX];
3997 } else if (IS_QLA81XX(ha)) {
3998 blob = &qla_fw_blobs[FW_ISP81XX];
3999 } else if (IS_QLA82XX(ha)) {
4000 blob = &qla_fw_blobs[FW_ISP82XX];
4001 }
4002
4003 mutex_lock(&qla_fw_lock);
4004 if (blob->fw)
4005 goto out;
4006
4007 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
4008 ql_log(ql_log_warn, vha, 0x0063,
4009 "Failed to load firmware image (%s).\n", blob->name);
4010 blob->fw = NULL;
4011 blob = NULL;
4012 goto out;
4013 }
4014
4015 out:
4016 mutex_unlock(&qla_fw_lock);
4017 return blob;
4018 }
4019
4020 static void
4021 qla2x00_release_firmware(void)
4022 {
4023 int idx;
4024
4025 mutex_lock(&qla_fw_lock);
4026 for (idx = 0; idx < FW_BLOBS; idx++)
4027 if (qla_fw_blobs[idx].fw)
4028 release_firmware(qla_fw_blobs[idx].fw);
4029 mutex_unlock(&qla_fw_lock);
4030 }
4031
4032 static pci_ers_result_t
4033 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4034 {
4035 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
4036 struct qla_hw_data *ha = vha->hw;
4037
4038 ql_dbg(ql_dbg_aer, vha, 0x9000,
4039 "PCI error detected, state %x.\n", state);
4040
4041 switch (state) {
4042 case pci_channel_io_normal:
4043 ha->flags.eeh_busy = 0;
4044 return PCI_ERS_RESULT_CAN_RECOVER;
4045 case pci_channel_io_frozen:
4046 ha->flags.eeh_busy = 1;
4047 /* For ISP82XX complete any pending mailbox cmd */
4048 if (IS_QLA82XX(ha)) {
4049 ha->flags.isp82xx_fw_hung = 1;
4050 if (ha->flags.mbox_busy) {
4051 ha->flags.mbox_int = 1;
4052 ql_dbg(ql_dbg_aer, vha, 0x9001,
4053 "Due to pci channel io frozen, doing premature "
4054 "completion of mbx command.\n");
4055 complete(&ha->mbx_intr_comp);
4056 }
4057 }
4058 qla2x00_free_irqs(vha);
4059 pci_disable_device(pdev);
4060 /* Return back all IOs */
4061 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4062 return PCI_ERS_RESULT_NEED_RESET;
4063 case pci_channel_io_perm_failure:
4064 ha->flags.pci_channel_io_perm_failure = 1;
4065 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4066 return PCI_ERS_RESULT_DISCONNECT;
4067 }
4068 return PCI_ERS_RESULT_NEED_RESET;
4069 }
4070
4071 static pci_ers_result_t
4072 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
4073 {
4074 int risc_paused = 0;
4075 uint32_t stat;
4076 unsigned long flags;
4077 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4078 struct qla_hw_data *ha = base_vha->hw;
4079 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4080 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
4081
4082 if (IS_QLA82XX(ha))
4083 return PCI_ERS_RESULT_RECOVERED;
4084
4085 spin_lock_irqsave(&ha->hardware_lock, flags);
4086 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
4087 stat = RD_REG_DWORD(&reg->hccr);
4088 if (stat & HCCR_RISC_PAUSE)
4089 risc_paused = 1;
4090 } else if (IS_QLA23XX(ha)) {
4091 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
4092 if (stat & HSR_RISC_PAUSED)
4093 risc_paused = 1;
4094 } else if (IS_FWI2_CAPABLE(ha)) {
4095 stat = RD_REG_DWORD(&reg24->host_status);
4096 if (stat & HSRX_RISC_PAUSED)
4097 risc_paused = 1;
4098 }
4099 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4100
4101 if (risc_paused) {
4102 ql_log(ql_log_info, base_vha, 0x9003,
4103 "RISC paused -- mmio_enabled, Dumping firmware.\n");
4104 ha->isp_ops->fw_dump(base_vha, 0);
4105
4106 return PCI_ERS_RESULT_NEED_RESET;
4107 } else
4108 return PCI_ERS_RESULT_RECOVERED;
4109 }
4110
4111 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
4112 {
4113 uint32_t rval = QLA_FUNCTION_FAILED;
4114 uint32_t drv_active = 0;
4115 struct qla_hw_data *ha = base_vha->hw;
4116 int fn;
4117 struct pci_dev *other_pdev = NULL;
4118
4119 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
4120 "Entered %s.\n", __func__);
4121
4122 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4123
4124 if (base_vha->flags.online) {
4125 /* Abort all outstanding commands,
4126 * so as to be requeued later */
4127 qla2x00_abort_isp_cleanup(base_vha);
4128 }
4129
4130
4131 fn = PCI_FUNC(ha->pdev->devfn);
4132 while (fn > 0) {
4133 fn--;
4134 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
4135 "Finding pci device at function = 0x%x.\n", fn);
4136 other_pdev =
4137 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
4138 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
4139 fn));
4140
4141 if (!other_pdev)
4142 continue;
4143 if (atomic_read(&other_pdev->enable_cnt)) {
4144 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
4145 "Found PCI func available and enable at 0x%x.\n",
4146 fn);
4147 pci_dev_put(other_pdev);
4148 break;
4149 }
4150 pci_dev_put(other_pdev);
4151 }
4152
4153 if (!fn) {
4154 /* Reset owner */
4155 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
4156 "This devfn is reset owner = 0x%x.\n",
4157 ha->pdev->devfn);
4158 qla82xx_idc_lock(ha);
4159
4160 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4161 QLA82XX_DEV_INITIALIZING);
4162
4163 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
4164 QLA82XX_IDC_VERSION);
4165
4166 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
4167 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
4168 "drv_active = 0x%x.\n", drv_active);
4169
4170 qla82xx_idc_unlock(ha);
4171 /* Reset if device is not already reset
4172 * drv_active would be 0 if a reset has already been done
4173 */
4174 if (drv_active)
4175 rval = qla82xx_start_firmware(base_vha);
4176 else
4177 rval = QLA_SUCCESS;
4178 qla82xx_idc_lock(ha);
4179
4180 if (rval != QLA_SUCCESS) {
4181 ql_log(ql_log_info, base_vha, 0x900b,
4182 "HW State: FAILED.\n");
4183 qla82xx_clear_drv_active(ha);
4184 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4185 QLA82XX_DEV_FAILED);
4186 } else {
4187 ql_log(ql_log_info, base_vha, 0x900c,
4188 "HW State: READY.\n");
4189 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4190 QLA82XX_DEV_READY);
4191 qla82xx_idc_unlock(ha);
4192 ha->flags.isp82xx_fw_hung = 0;
4193 rval = qla82xx_restart_isp(base_vha);
4194 qla82xx_idc_lock(ha);
4195 /* Clear driver state register */
4196 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
4197 qla82xx_set_drv_active(base_vha);
4198 }
4199 qla82xx_idc_unlock(ha);
4200 } else {
4201 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
4202 "This devfn is not reset owner = 0x%x.\n",
4203 ha->pdev->devfn);
4204 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
4205 QLA82XX_DEV_READY)) {
4206 ha->flags.isp82xx_fw_hung = 0;
4207 rval = qla82xx_restart_isp(base_vha);
4208 qla82xx_idc_lock(ha);
4209 qla82xx_set_drv_active(base_vha);
4210 qla82xx_idc_unlock(ha);
4211 }
4212 }
4213 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4214
4215 return rval;
4216 }
4217
4218 static pci_ers_result_t
4219 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
4220 {
4221 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
4222 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4223 struct qla_hw_data *ha = base_vha->hw;
4224 struct rsp_que *rsp;
4225 int rc, retries = 10;
4226
4227 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
4228 "Slot Reset.\n");
4229
4230 /* Workaround: qla2xxx driver which access hardware earlier
4231 * needs error state to be pci_channel_io_online.
4232 * Otherwise mailbox command timesout.
4233 */
4234 pdev->error_state = pci_channel_io_normal;
4235
4236 pci_restore_state(pdev);
4237
4238 /* pci_restore_state() clears the saved_state flag of the device
4239 * save restored state which resets saved_state flag
4240 */
4241 pci_save_state(pdev);
4242
4243 if (ha->mem_only)
4244 rc = pci_enable_device_mem(pdev);
4245 else
4246 rc = pci_enable_device(pdev);
4247
4248 if (rc) {
4249 ql_log(ql_log_warn, base_vha, 0x9005,
4250 "Can't re-enable PCI device after reset.\n");
4251 goto exit_slot_reset;
4252 }
4253
4254 rsp = ha->rsp_q_map[0];
4255 if (qla2x00_request_irqs(ha, rsp))
4256 goto exit_slot_reset;
4257
4258 if (ha->isp_ops->pci_config(base_vha))
4259 goto exit_slot_reset;
4260
4261 if (IS_QLA82XX(ha)) {
4262 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4263 ret = PCI_ERS_RESULT_RECOVERED;
4264 goto exit_slot_reset;
4265 } else
4266 goto exit_slot_reset;
4267 }
4268
4269 while (ha->flags.mbox_busy && retries--)
4270 msleep(1000);
4271
4272 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4273 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
4274 ret = PCI_ERS_RESULT_RECOVERED;
4275 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4276
4277
4278 exit_slot_reset:
4279 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
4280 "slot_reset return %x.\n", ret);
4281
4282 return ret;
4283 }
4284
4285 static void
4286 qla2xxx_pci_resume(struct pci_dev *pdev)
4287 {
4288 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4289 struct qla_hw_data *ha = base_vha->hw;
4290 int ret;
4291
4292 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
4293 "pci_resume.\n");
4294
4295 ret = qla2x00_wait_for_hba_online(base_vha);
4296 if (ret != QLA_SUCCESS) {
4297 ql_log(ql_log_fatal, base_vha, 0x9002,
4298 "The device failed to resume I/O from slot/link_reset.\n");
4299 }
4300
4301 pci_cleanup_aer_uncorrect_error_status(pdev);
4302
4303 ha->flags.eeh_busy = 0;
4304 }
4305
4306 static struct pci_error_handlers qla2xxx_err_handler = {
4307 .error_detected = qla2xxx_pci_error_detected,
4308 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4309 .slot_reset = qla2xxx_pci_slot_reset,
4310 .resume = qla2xxx_pci_resume,
4311 };
4312
4313 static struct pci_device_id qla2xxx_pci_tbl[] = {
4314 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4315 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4316 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4317 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4318 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4319 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4320 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4321 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4322 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4323 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
4324 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4325 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
4326 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
4327 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
4328 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
4329 { 0 },
4330 };
4331 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4332
4333 static struct pci_driver qla2xxx_pci_driver = {
4334 .name = QLA2XXX_DRIVER_NAME,
4335 .driver = {
4336 .owner = THIS_MODULE,
4337 },
4338 .id_table = qla2xxx_pci_tbl,
4339 .probe = qla2x00_probe_one,
4340 .remove = qla2x00_remove_one,
4341 .shutdown = qla2x00_shutdown,
4342 .err_handler = &qla2xxx_err_handler,
4343 };
4344
4345 static struct file_operations apidev_fops = {
4346 .owner = THIS_MODULE,
4347 .llseek = noop_llseek,
4348 };
4349
4350 /**
4351 * qla2x00_module_init - Module initialization.
4352 **/
4353 static int __init
4354 qla2x00_module_init(void)
4355 {
4356 int ret = 0;
4357
4358 /* Allocate cache for SRBs. */
4359 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
4360 SLAB_HWCACHE_ALIGN, NULL);
4361 if (srb_cachep == NULL) {
4362 ql_log(ql_log_fatal, NULL, 0x0001,
4363 "Unable to allocate SRB cache...Failing load!.\n");
4364 return -ENOMEM;
4365 }
4366
4367 /* Derive version string. */
4368 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
4369 if (ql2xextended_error_logging)
4370 strcat(qla2x00_version_str, "-debug");
4371
4372 qla2xxx_transport_template =
4373 fc_attach_transport(&qla2xxx_transport_functions);
4374 if (!qla2xxx_transport_template) {
4375 kmem_cache_destroy(srb_cachep);
4376 ql_log(ql_log_fatal, NULL, 0x0002,
4377 "fc_attach_transport failed...Failing load!.\n");
4378 return -ENODEV;
4379 }
4380
4381 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4382 if (apidev_major < 0) {
4383 ql_log(ql_log_fatal, NULL, 0x0003,
4384 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
4385 }
4386
4387 qla2xxx_transport_vport_template =
4388 fc_attach_transport(&qla2xxx_transport_vport_functions);
4389 if (!qla2xxx_transport_vport_template) {
4390 kmem_cache_destroy(srb_cachep);
4391 fc_release_transport(qla2xxx_transport_template);
4392 ql_log(ql_log_fatal, NULL, 0x0004,
4393 "fc_attach_transport vport failed...Failing load!.\n");
4394 return -ENODEV;
4395 }
4396 ql_log(ql_log_info, NULL, 0x0005,
4397 "QLogic Fibre Channel HBA Driver: %s.\n",
4398 qla2x00_version_str);
4399 ret = pci_register_driver(&qla2xxx_pci_driver);
4400 if (ret) {
4401 kmem_cache_destroy(srb_cachep);
4402 fc_release_transport(qla2xxx_transport_template);
4403 fc_release_transport(qla2xxx_transport_vport_template);
4404 ql_log(ql_log_fatal, NULL, 0x0006,
4405 "pci_register_driver failed...ret=%d Failing load!.\n",
4406 ret);
4407 }
4408 return ret;
4409 }
4410
4411 /**
4412 * qla2x00_module_exit - Module cleanup.
4413 **/
4414 static void __exit
4415 qla2x00_module_exit(void)
4416 {
4417 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
4418 pci_unregister_driver(&qla2xxx_pci_driver);
4419 qla2x00_release_firmware();
4420 kmem_cache_destroy(srb_cachep);
4421 if (ctx_cachep)
4422 kmem_cache_destroy(ctx_cachep);
4423 fc_release_transport(qla2xxx_transport_template);
4424 fc_release_transport(qla2xxx_transport_vport_template);
4425 }
4426
4427 module_init(qla2x00_module_init);
4428 module_exit(qla2x00_module_exit);
4429
4430 MODULE_AUTHOR("QLogic Corporation");
4431 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4432 MODULE_LICENSE("GPL");
4433 MODULE_VERSION(QLA2XXX_VERSION);
4434 MODULE_FIRMWARE(FW_FILE_ISP21XX);
4435 MODULE_FIRMWARE(FW_FILE_ISP22XX);
4436 MODULE_FIRMWARE(FW_FILE_ISP2300);
4437 MODULE_FIRMWARE(FW_FILE_ISP2322);
4438 MODULE_FIRMWARE(FW_FILE_ISP24XX);
4439 MODULE_FIRMWARE(FW_FILE_ISP25XX);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree