OMAP3/4: l3: fix omap3_l3_probe error path
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-omap2 / omap_l3_smx.c
blob45aaa5cb97f30ca81658554f71057b5e7bba8c14
1 /*
2 * OMAP3XXX L3 Interconnect Driver
4 * Copyright (C) 2011 Texas Corporation
5 * Felipe Balbi <balbi@ti.com>
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 * Sricharan <r.sricharan@ti.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/platform_device.h>
28 #include <linux/interrupt.h>
29 #include <linux/io.h>
30 #include "omap_l3_smx.h"
32 static inline u64 omap3_l3_readll(void __iomem *base, u16 reg)
34 return __raw_readll(base + reg);
37 static inline void omap3_l3_writell(void __iomem *base, u16 reg, u64 value)
39 __raw_writell(value, base + reg);
42 static inline enum omap3_l3_code omap3_l3_decode_error_code(u64 error)
44 return (error & 0x0f000000) >> L3_ERROR_LOG_CODE;
47 static inline u32 omap3_l3_decode_addr(u64 error_addr)
49 return error_addr & 0xffffffff;
52 static inline unsigned omap3_l3_decode_cmd(u64 error)
54 return (error & 0x07) >> L3_ERROR_LOG_CMD;
57 static inline enum omap3_l3_initiator_id omap3_l3_decode_initid(u64 error)
59 return (error & 0xff00) >> L3_ERROR_LOG_INITID;
62 static inline unsigned omap3_l3_decode_req_info(u64 error)
64 return (error >> 32) & 0xffff;
67 static char *omap3_l3_code_string(u8 code)
69 switch (code) {
70 case OMAP_L3_CODE_NOERROR:
71 return "No Error";
72 case OMAP_L3_CODE_UNSUP_CMD:
73 return "Unsupported Command";
74 case OMAP_L3_CODE_ADDR_HOLE:
75 return "Address Hole";
76 case OMAP_L3_CODE_PROTECT_VIOLATION:
77 return "Protection Violation";
78 case OMAP_L3_CODE_IN_BAND_ERR:
79 return "In-band Error";
80 case OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT:
81 return "Request Timeout Not Accepted";
82 case OMAP_L3_CODE_REQ_TOUT_NO_RESP:
83 return "Request Timeout, no response";
84 default:
85 return "UNKNOWN error";
89 static char *omap3_l3_initiator_string(u8 initid)
91 switch (initid) {
92 case OMAP_L3_LCD:
93 return "LCD";
94 case OMAP_L3_SAD2D:
95 return "SAD2D";
96 case OMAP_L3_IA_MPU_SS_1:
97 case OMAP_L3_IA_MPU_SS_2:
98 case OMAP_L3_IA_MPU_SS_3:
99 case OMAP_L3_IA_MPU_SS_4:
100 case OMAP_L3_IA_MPU_SS_5:
101 return "MPU";
102 case OMAP_L3_IA_IVA_SS_1:
103 case OMAP_L3_IA_IVA_SS_2:
104 case OMAP_L3_IA_IVA_SS_3:
105 return "IVA_SS";
106 case OMAP_L3_IA_IVA_SS_DMA_1:
107 case OMAP_L3_IA_IVA_SS_DMA_2:
108 case OMAP_L3_IA_IVA_SS_DMA_3:
109 case OMAP_L3_IA_IVA_SS_DMA_4:
110 case OMAP_L3_IA_IVA_SS_DMA_5:
111 case OMAP_L3_IA_IVA_SS_DMA_6:
112 return "IVA_SS_DMA";
113 case OMAP_L3_IA_SGX:
114 return "SGX";
115 case OMAP_L3_IA_CAM_1:
116 case OMAP_L3_IA_CAM_2:
117 case OMAP_L3_IA_CAM_3:
118 return "CAM";
119 case OMAP_L3_IA_DAP:
120 return "DAP";
121 case OMAP_L3_SDMA_WR_1:
122 case OMAP_L3_SDMA_WR_2:
123 return "SDMA_WR";
124 case OMAP_L3_SDMA_RD_1:
125 case OMAP_L3_SDMA_RD_2:
126 case OMAP_L3_SDMA_RD_3:
127 case OMAP_L3_SDMA_RD_4:
128 return "SDMA_RD";
129 case OMAP_L3_USBOTG:
130 return "USB_OTG";
131 case OMAP_L3_USBHOST:
132 return "USB_HOST";
133 default:
134 return "UNKNOWN Initiator";
139 * omap3_l3_block_irq - handles a register block's irq
140 * @l3: struct omap3_l3 *
141 * @base: register block base address
142 * @error: L3_ERROR_LOG register of our block
144 * Called in hard-irq context. Caller should take care of locking
146 * OMAP36xx TRM gives, on page 2001, Figure 9-10, the Typical Error
147 * Analysis Sequence, we are following that sequence here, please
148 * refer to that Figure for more information on the subject.
150 static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
151 u64 error, int error_addr)
153 u8 code = omap3_l3_decode_error_code(error);
154 u8 initid = omap3_l3_decode_initid(error);
155 u8 multi = error & L3_ERROR_LOG_MULTI;
156 u32 address = omap3_l3_decode_addr(error_addr);
158 WARN(true, "%s Error seen by %s %s at address %x\n",
159 omap3_l3_code_string(code),
160 omap3_l3_initiator_string(initid),
161 multi ? "Multiple Errors" : "",
162 address);
164 return IRQ_HANDLED;
167 static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
169 struct omap3_l3 *l3 = _l3;
171 u64 status, clear;
172 u64 error;
173 u64 error_addr;
174 u64 err_source = 0;
175 void __iomem *base;
176 int int_type;
178 irqreturn_t ret = IRQ_NONE;
180 if (irq == l3->app_irq)
181 int_type = L3_APPLICATION_ERROR;
182 else
183 int_type = L3_DEBUG_ERROR;
185 if (!int_type) {
186 status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0);
188 * if we have a timeout error, there's nothing we can
189 * do besides rebooting the board. So let's BUG on any
190 * of such errors and handle the others. timeout error
191 * is severe and not expected to occur.
193 BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);
194 } else {
195 status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_1);
196 /* No timeout error for debug sources */
199 base = ((l3->rt) + (*(omap3_l3_bases[int_type] + err_source)));
201 /* identify the error source */
202 for (err_source = 0; !(status & (1 << err_source)); err_source++)
204 error = omap3_l3_readll(base, L3_ERROR_LOG);
206 if (error) {
207 error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
209 ret |= omap3_l3_block_irq(l3, error, error_addr);
212 /* Clear the status register */
213 clear = ((L3_AGENT_STATUS_CLEAR_IA << int_type) |
214 (L3_AGENT_STATUS_CLEAR_TA));
216 omap3_l3_writell(base, L3_AGENT_STATUS, clear);
218 /* clear the error log register */
219 omap3_l3_writell(base, L3_ERROR_LOG, error);
221 return ret;
224 static int __init omap3_l3_probe(struct platform_device *pdev)
226 struct omap3_l3 *l3;
227 struct resource *res;
228 int ret;
230 l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
231 if (!l3)
232 return -ENOMEM;
234 platform_set_drvdata(pdev, l3);
236 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
237 if (!res) {
238 dev_err(&pdev->dev, "couldn't find resource\n");
239 ret = -ENODEV;
240 goto err0;
242 l3->rt = ioremap(res->start, resource_size(res));
243 if (!(l3->rt)) {
244 dev_err(&pdev->dev, "ioremap failed\n");
245 ret = -ENOMEM;
246 goto err0;
249 l3->debug_irq = platform_get_irq(pdev, 0);
250 ret = request_irq(l3->debug_irq, omap3_l3_app_irq,
251 IRQF_DISABLED | IRQF_TRIGGER_RISING,
252 "l3-debug-irq", l3);
253 if (ret) {
254 dev_err(&pdev->dev, "couldn't request debug irq\n");
255 goto err1;
258 l3->app_irq = platform_get_irq(pdev, 1);
259 ret = request_irq(l3->app_irq, omap3_l3_app_irq,
260 IRQF_DISABLED | IRQF_TRIGGER_RISING,
261 "l3-app-irq", l3);
263 if (ret) {
264 dev_err(&pdev->dev, "couldn't request app irq\n");
265 goto err2;
268 return 0;
270 err2:
271 free_irq(l3->debug_irq, l3);
272 err1:
273 iounmap(l3->rt);
274 err0:
275 kfree(l3);
276 return ret;
279 static int __exit omap3_l3_remove(struct platform_device *pdev)
281 struct omap3_l3 *l3 = platform_get_drvdata(pdev);
283 free_irq(l3->app_irq, l3);
284 free_irq(l3->debug_irq, l3);
285 iounmap(l3->rt);
286 kfree(l3);
288 return 0;
291 static struct platform_driver omap3_l3_driver = {
292 .remove = __exit_p(omap3_l3_remove),
293 .driver = {
294 .name = "omap_l3_smx",
298 static int __init omap3_l3_init(void)
300 return platform_driver_probe(&omap3_l3_driver, omap3_l3_probe);
302 postcore_initcall_sync(omap3_l3_init);
304 static void __exit omap3_l3_exit(void)
306 platform_driver_unregister(&omap3_l3_driver);
308 module_exit(omap3_l3_exit);