netfilter: xtables: stackptr should be percpu
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / rtc / rtc-cmos.c
blob11b8ea29d2b76ecf0e60e482195629d4d04d17f6
1 /*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
40 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
41 #include <asm-generic/rtc.h>
43 struct cmos_rtc {
44 struct rtc_device *rtc;
45 struct device *dev;
46 int irq;
47 struct resource *iomem;
49 void (*wake_on)(struct device *);
50 void (*wake_off)(struct device *);
52 u8 enabled_wake;
53 u8 suspend_ctrl;
55 /* newer hardware extends the original register set */
56 u8 day_alrm;
57 u8 mon_alrm;
58 u8 century;
61 /* both platform and pnp busses use negative numbers for invalid irqs */
62 #define is_valid_irq(n) ((n) > 0)
64 static const char driver_name[] = "rtc_cmos";
66 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
67 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
68 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
70 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
72 static inline int is_intr(u8 rtc_intr)
74 if (!(rtc_intr & RTC_IRQF))
75 return 0;
76 return rtc_intr & RTC_IRQMASK;
79 /*----------------------------------------------------------------*/
81 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
82 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
83 * used in a broken "legacy replacement" mode. The breakage includes
84 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
85 * other (better) use.
87 * When that broken mode is in use, platform glue provides a partial
88 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
89 * want to use HPET for anything except those IRQs though...
91 #ifdef CONFIG_HPET_EMULATE_RTC
92 #include <asm/hpet.h>
93 #else
95 static inline int is_hpet_enabled(void)
97 return 0;
100 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
102 return 0;
105 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
107 return 0;
110 static inline int
111 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
113 return 0;
116 static inline int hpet_set_periodic_freq(unsigned long freq)
118 return 0;
121 static inline int hpet_rtc_dropped_irq(void)
123 return 0;
126 static inline int hpet_rtc_timer_init(void)
128 return 0;
131 extern irq_handler_t hpet_rtc_interrupt;
133 static inline int hpet_register_irq_handler(irq_handler_t handler)
135 return 0;
138 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
140 return 0;
143 #endif
145 /*----------------------------------------------------------------*/
147 #ifdef RTC_PORT
149 /* Most newer x86 systems have two register banks, the first used
150 * for RTC and NVRAM and the second only for NVRAM. Caller must
151 * own rtc_lock ... and we won't worry about access during NMI.
153 #define can_bank2 true
155 static inline unsigned char cmos_read_bank2(unsigned char addr)
157 outb(addr, RTC_PORT(2));
158 return inb(RTC_PORT(3));
161 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
163 outb(addr, RTC_PORT(2));
164 outb(val, RTC_PORT(2));
167 #else
169 #define can_bank2 false
171 static inline unsigned char cmos_read_bank2(unsigned char addr)
173 return 0;
176 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
180 #endif
182 /*----------------------------------------------------------------*/
184 static int cmos_read_time(struct device *dev, struct rtc_time *t)
186 /* REVISIT: if the clock has a "century" register, use
187 * that instead of the heuristic in get_rtc_time().
188 * That'll make Y3K compatility (year > 2070) easy!
190 get_rtc_time(t);
191 return 0;
194 static int cmos_set_time(struct device *dev, struct rtc_time *t)
196 /* REVISIT: set the "century" register if available
198 * NOTE: this ignores the issue whereby updating the seconds
199 * takes effect exactly 500ms after we write the register.
200 * (Also queueing and other delays before we get this far.)
202 return set_rtc_time(t);
205 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
207 struct cmos_rtc *cmos = dev_get_drvdata(dev);
208 unsigned char rtc_control;
210 if (!is_valid_irq(cmos->irq))
211 return -EIO;
213 /* Basic alarms only support hour, minute, and seconds fields.
214 * Some also support day and month, for alarms up to a year in
215 * the future.
217 t->time.tm_mday = -1;
218 t->time.tm_mon = -1;
220 spin_lock_irq(&rtc_lock);
221 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
222 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
223 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
225 if (cmos->day_alrm) {
226 /* ignore upper bits on readback per ACPI spec */
227 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
228 if (!t->time.tm_mday)
229 t->time.tm_mday = -1;
231 if (cmos->mon_alrm) {
232 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
233 if (!t->time.tm_mon)
234 t->time.tm_mon = -1;
238 rtc_control = CMOS_READ(RTC_CONTROL);
239 spin_unlock_irq(&rtc_lock);
241 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
242 if (((unsigned)t->time.tm_sec) < 0x60)
243 t->time.tm_sec = bcd2bin(t->time.tm_sec);
244 else
245 t->time.tm_sec = -1;
246 if (((unsigned)t->time.tm_min) < 0x60)
247 t->time.tm_min = bcd2bin(t->time.tm_min);
248 else
249 t->time.tm_min = -1;
250 if (((unsigned)t->time.tm_hour) < 0x24)
251 t->time.tm_hour = bcd2bin(t->time.tm_hour);
252 else
253 t->time.tm_hour = -1;
255 if (cmos->day_alrm) {
256 if (((unsigned)t->time.tm_mday) <= 0x31)
257 t->time.tm_mday = bcd2bin(t->time.tm_mday);
258 else
259 t->time.tm_mday = -1;
261 if (cmos->mon_alrm) {
262 if (((unsigned)t->time.tm_mon) <= 0x12)
263 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
264 else
265 t->time.tm_mon = -1;
269 t->time.tm_year = -1;
271 t->enabled = !!(rtc_control & RTC_AIE);
272 t->pending = 0;
274 return 0;
277 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
279 unsigned char rtc_intr;
281 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
282 * allegedly some older rtcs need that to handle irqs properly
284 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
286 if (is_hpet_enabled())
287 return;
289 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
290 if (is_intr(rtc_intr))
291 rtc_update_irq(cmos->rtc, 1, rtc_intr);
294 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
296 unsigned char rtc_control;
298 /* flush any pending IRQ status, notably for update irqs,
299 * before we enable new IRQs
301 rtc_control = CMOS_READ(RTC_CONTROL);
302 cmos_checkintr(cmos, rtc_control);
304 rtc_control |= mask;
305 CMOS_WRITE(rtc_control, RTC_CONTROL);
306 hpet_set_rtc_irq_bit(mask);
308 cmos_checkintr(cmos, rtc_control);
311 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
313 unsigned char rtc_control;
315 rtc_control = CMOS_READ(RTC_CONTROL);
316 rtc_control &= ~mask;
317 CMOS_WRITE(rtc_control, RTC_CONTROL);
318 hpet_mask_rtc_irq_bit(mask);
320 cmos_checkintr(cmos, rtc_control);
323 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
325 struct cmos_rtc *cmos = dev_get_drvdata(dev);
326 unsigned char mon, mday, hrs, min, sec, rtc_control;
328 if (!is_valid_irq(cmos->irq))
329 return -EIO;
331 mon = t->time.tm_mon + 1;
332 mday = t->time.tm_mday;
333 hrs = t->time.tm_hour;
334 min = t->time.tm_min;
335 sec = t->time.tm_sec;
337 rtc_control = CMOS_READ(RTC_CONTROL);
338 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
339 /* Writing 0xff means "don't care" or "match all". */
340 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
341 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
342 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
343 min = (min < 60) ? bin2bcd(min) : 0xff;
344 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
347 spin_lock_irq(&rtc_lock);
349 /* next rtc irq must not be from previous alarm setting */
350 cmos_irq_disable(cmos, RTC_AIE);
352 /* update alarm */
353 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
354 CMOS_WRITE(min, RTC_MINUTES_ALARM);
355 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
357 /* the system may support an "enhanced" alarm */
358 if (cmos->day_alrm) {
359 CMOS_WRITE(mday, cmos->day_alrm);
360 if (cmos->mon_alrm)
361 CMOS_WRITE(mon, cmos->mon_alrm);
364 /* FIXME the HPET alarm glue currently ignores day_alrm
365 * and mon_alrm ...
367 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
369 if (t->enabled)
370 cmos_irq_enable(cmos, RTC_AIE);
372 spin_unlock_irq(&rtc_lock);
374 return 0;
377 static int cmos_irq_set_freq(struct device *dev, int freq)
379 struct cmos_rtc *cmos = dev_get_drvdata(dev);
380 int f;
381 unsigned long flags;
383 if (!is_valid_irq(cmos->irq))
384 return -ENXIO;
386 if (!is_power_of_2(freq))
387 return -EINVAL;
388 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
389 f = ffs(freq);
390 if (f-- > 16)
391 return -EINVAL;
392 f = 16 - f;
394 spin_lock_irqsave(&rtc_lock, flags);
395 hpet_set_periodic_freq(freq);
396 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
397 spin_unlock_irqrestore(&rtc_lock, flags);
399 return 0;
402 static int cmos_irq_set_state(struct device *dev, int enabled)
404 struct cmos_rtc *cmos = dev_get_drvdata(dev);
405 unsigned long flags;
407 if (!is_valid_irq(cmos->irq))
408 return -ENXIO;
410 spin_lock_irqsave(&rtc_lock, flags);
412 if (enabled)
413 cmos_irq_enable(cmos, RTC_PIE);
414 else
415 cmos_irq_disable(cmos, RTC_PIE);
417 spin_unlock_irqrestore(&rtc_lock, flags);
418 return 0;
421 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
423 struct cmos_rtc *cmos = dev_get_drvdata(dev);
424 unsigned long flags;
426 if (!is_valid_irq(cmos->irq))
427 return -EINVAL;
429 spin_lock_irqsave(&rtc_lock, flags);
431 if (enabled)
432 cmos_irq_enable(cmos, RTC_AIE);
433 else
434 cmos_irq_disable(cmos, RTC_AIE);
436 spin_unlock_irqrestore(&rtc_lock, flags);
437 return 0;
440 static int cmos_update_irq_enable(struct device *dev, unsigned int enabled)
442 struct cmos_rtc *cmos = dev_get_drvdata(dev);
443 unsigned long flags;
445 if (!is_valid_irq(cmos->irq))
446 return -EINVAL;
448 spin_lock_irqsave(&rtc_lock, flags);
450 if (enabled)
451 cmos_irq_enable(cmos, RTC_UIE);
452 else
453 cmos_irq_disable(cmos, RTC_UIE);
455 spin_unlock_irqrestore(&rtc_lock, flags);
456 return 0;
459 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
461 static int cmos_procfs(struct device *dev, struct seq_file *seq)
463 struct cmos_rtc *cmos = dev_get_drvdata(dev);
464 unsigned char rtc_control, valid;
466 spin_lock_irq(&rtc_lock);
467 rtc_control = CMOS_READ(RTC_CONTROL);
468 valid = CMOS_READ(RTC_VALID);
469 spin_unlock_irq(&rtc_lock);
471 /* NOTE: at least ICH6 reports battery status using a different
472 * (non-RTC) bit; and SQWE is ignored on many current systems.
474 return seq_printf(seq,
475 "periodic_IRQ\t: %s\n"
476 "update_IRQ\t: %s\n"
477 "HPET_emulated\t: %s\n"
478 // "square_wave\t: %s\n"
479 "BCD\t\t: %s\n"
480 "DST_enable\t: %s\n"
481 "periodic_freq\t: %d\n"
482 "batt_status\t: %s\n",
483 (rtc_control & RTC_PIE) ? "yes" : "no",
484 (rtc_control & RTC_UIE) ? "yes" : "no",
485 is_hpet_enabled() ? "yes" : "no",
486 // (rtc_control & RTC_SQWE) ? "yes" : "no",
487 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
488 (rtc_control & RTC_DST_EN) ? "yes" : "no",
489 cmos->rtc->irq_freq,
490 (valid & RTC_VRT) ? "okay" : "dead");
493 #else
494 #define cmos_procfs NULL
495 #endif
497 static const struct rtc_class_ops cmos_rtc_ops = {
498 .read_time = cmos_read_time,
499 .set_time = cmos_set_time,
500 .read_alarm = cmos_read_alarm,
501 .set_alarm = cmos_set_alarm,
502 .proc = cmos_procfs,
503 .irq_set_freq = cmos_irq_set_freq,
504 .irq_set_state = cmos_irq_set_state,
505 .alarm_irq_enable = cmos_alarm_irq_enable,
506 .update_irq_enable = cmos_update_irq_enable,
509 /*----------------------------------------------------------------*/
512 * All these chips have at least 64 bytes of address space, shared by
513 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
514 * by boot firmware. Modern chips have 128 or 256 bytes.
517 #define NVRAM_OFFSET (RTC_REG_D + 1)
519 static ssize_t
520 cmos_nvram_read(struct file *filp, struct kobject *kobj,
521 struct bin_attribute *attr,
522 char *buf, loff_t off, size_t count)
524 int retval;
526 if (unlikely(off >= attr->size))
527 return 0;
528 if (unlikely(off < 0))
529 return -EINVAL;
530 if ((off + count) > attr->size)
531 count = attr->size - off;
533 off += NVRAM_OFFSET;
534 spin_lock_irq(&rtc_lock);
535 for (retval = 0; count; count--, off++, retval++) {
536 if (off < 128)
537 *buf++ = CMOS_READ(off);
538 else if (can_bank2)
539 *buf++ = cmos_read_bank2(off);
540 else
541 break;
543 spin_unlock_irq(&rtc_lock);
545 return retval;
548 static ssize_t
549 cmos_nvram_write(struct file *filp, struct kobject *kobj,
550 struct bin_attribute *attr,
551 char *buf, loff_t off, size_t count)
553 struct cmos_rtc *cmos;
554 int retval;
556 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
557 if (unlikely(off >= attr->size))
558 return -EFBIG;
559 if (unlikely(off < 0))
560 return -EINVAL;
561 if ((off + count) > attr->size)
562 count = attr->size - off;
564 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
565 * checksum on part of the NVRAM data. That's currently ignored
566 * here. If userspace is smart enough to know what fields of
567 * NVRAM to update, updating checksums is also part of its job.
569 off += NVRAM_OFFSET;
570 spin_lock_irq(&rtc_lock);
571 for (retval = 0; count; count--, off++, retval++) {
572 /* don't trash RTC registers */
573 if (off == cmos->day_alrm
574 || off == cmos->mon_alrm
575 || off == cmos->century)
576 buf++;
577 else if (off < 128)
578 CMOS_WRITE(*buf++, off);
579 else if (can_bank2)
580 cmos_write_bank2(*buf++, off);
581 else
582 break;
584 spin_unlock_irq(&rtc_lock);
586 return retval;
589 static struct bin_attribute nvram = {
590 .attr = {
591 .name = "nvram",
592 .mode = S_IRUGO | S_IWUSR,
595 .read = cmos_nvram_read,
596 .write = cmos_nvram_write,
597 /* size gets set up later */
600 /*----------------------------------------------------------------*/
602 static struct cmos_rtc cmos_rtc;
604 static irqreturn_t cmos_interrupt(int irq, void *p)
606 u8 irqstat;
607 u8 rtc_control;
609 spin_lock(&rtc_lock);
611 /* When the HPET interrupt handler calls us, the interrupt
612 * status is passed as arg1 instead of the irq number. But
613 * always clear irq status, even when HPET is in the way.
615 * Note that HPET and RTC are almost certainly out of phase,
616 * giving different IRQ status ...
618 irqstat = CMOS_READ(RTC_INTR_FLAGS);
619 rtc_control = CMOS_READ(RTC_CONTROL);
620 if (is_hpet_enabled())
621 irqstat = (unsigned long)irq & 0xF0;
622 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
624 /* All Linux RTC alarms should be treated as if they were oneshot.
625 * Similar code may be needed in system wakeup paths, in case the
626 * alarm woke the system.
628 if (irqstat & RTC_AIE) {
629 rtc_control &= ~RTC_AIE;
630 CMOS_WRITE(rtc_control, RTC_CONTROL);
631 hpet_mask_rtc_irq_bit(RTC_AIE);
633 CMOS_READ(RTC_INTR_FLAGS);
635 spin_unlock(&rtc_lock);
637 if (is_intr(irqstat)) {
638 rtc_update_irq(p, 1, irqstat);
639 return IRQ_HANDLED;
640 } else
641 return IRQ_NONE;
644 #ifdef CONFIG_PNP
645 #define INITSECTION
647 #else
648 #define INITSECTION __init
649 #endif
651 static int INITSECTION
652 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
654 struct cmos_rtc_board_info *info = dev->platform_data;
655 int retval = 0;
656 unsigned char rtc_control;
657 unsigned address_space;
659 /* there can be only one ... */
660 if (cmos_rtc.dev)
661 return -EBUSY;
663 if (!ports)
664 return -ENODEV;
666 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
668 * REVISIT non-x86 systems may instead use memory space resources
669 * (needing ioremap etc), not i/o space resources like this ...
671 ports = request_region(ports->start,
672 ports->end + 1 - ports->start,
673 driver_name);
674 if (!ports) {
675 dev_dbg(dev, "i/o registers already in use\n");
676 return -EBUSY;
679 cmos_rtc.irq = rtc_irq;
680 cmos_rtc.iomem = ports;
682 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
683 * driver did, but don't reject unknown configs. Old hardware
684 * won't address 128 bytes. Newer chips have multiple banks,
685 * though they may not be listed in one I/O resource.
687 #if defined(CONFIG_ATARI)
688 address_space = 64;
689 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
690 || defined(__sparc__) || defined(__mips__)
691 address_space = 128;
692 #else
693 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
694 address_space = 128;
695 #endif
696 if (can_bank2 && ports->end > (ports->start + 1))
697 address_space = 256;
699 /* For ACPI systems extension info comes from the FADT. On others,
700 * board specific setup provides it as appropriate. Systems where
701 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
702 * some almost-clones) can provide hooks to make that behave.
704 * Note that ACPI doesn't preclude putting these registers into
705 * "extended" areas of the chip, including some that we won't yet
706 * expect CMOS_READ and friends to handle.
708 if (info) {
709 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
710 cmos_rtc.day_alrm = info->rtc_day_alarm;
711 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
712 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
713 if (info->rtc_century && info->rtc_century < 128)
714 cmos_rtc.century = info->rtc_century;
716 if (info->wake_on && info->wake_off) {
717 cmos_rtc.wake_on = info->wake_on;
718 cmos_rtc.wake_off = info->wake_off;
722 cmos_rtc.dev = dev;
723 dev_set_drvdata(dev, &cmos_rtc);
725 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
726 &cmos_rtc_ops, THIS_MODULE);
727 if (IS_ERR(cmos_rtc.rtc)) {
728 retval = PTR_ERR(cmos_rtc.rtc);
729 goto cleanup0;
732 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
734 spin_lock_irq(&rtc_lock);
736 /* force periodic irq to CMOS reset default of 1024Hz;
738 * REVISIT it's been reported that at least one x86_64 ALI mobo
739 * doesn't use 32KHz here ... for portability we might need to
740 * do something about other clock frequencies.
742 cmos_rtc.rtc->irq_freq = 1024;
743 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
744 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
746 /* disable irqs */
747 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
749 rtc_control = CMOS_READ(RTC_CONTROL);
751 spin_unlock_irq(&rtc_lock);
753 /* FIXME:
754 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
756 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
757 dev_warn(dev, "only 24-hr supported\n");
758 retval = -ENXIO;
759 goto cleanup1;
762 if (is_valid_irq(rtc_irq)) {
763 irq_handler_t rtc_cmos_int_handler;
765 if (is_hpet_enabled()) {
766 int err;
768 rtc_cmos_int_handler = hpet_rtc_interrupt;
769 err = hpet_register_irq_handler(cmos_interrupt);
770 if (err != 0) {
771 printk(KERN_WARNING "hpet_register_irq_handler "
772 " failed in rtc_init().");
773 goto cleanup1;
775 } else
776 rtc_cmos_int_handler = cmos_interrupt;
778 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
779 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
780 cmos_rtc.rtc);
781 if (retval < 0) {
782 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
783 goto cleanup1;
786 hpet_rtc_timer_init();
788 /* export at least the first block of NVRAM */
789 nvram.size = address_space - NVRAM_OFFSET;
790 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
791 if (retval < 0) {
792 dev_dbg(dev, "can't create nvram file? %d\n", retval);
793 goto cleanup2;
796 pr_info("%s: %s%s, %zd bytes nvram%s\n",
797 dev_name(&cmos_rtc.rtc->dev),
798 !is_valid_irq(rtc_irq) ? "no alarms" :
799 cmos_rtc.mon_alrm ? "alarms up to one year" :
800 cmos_rtc.day_alrm ? "alarms up to one month" :
801 "alarms up to one day",
802 cmos_rtc.century ? ", y3k" : "",
803 nvram.size,
804 is_hpet_enabled() ? ", hpet irqs" : "");
806 return 0;
808 cleanup2:
809 if (is_valid_irq(rtc_irq))
810 free_irq(rtc_irq, cmos_rtc.rtc);
811 cleanup1:
812 cmos_rtc.dev = NULL;
813 rtc_device_unregister(cmos_rtc.rtc);
814 cleanup0:
815 release_region(ports->start, ports->end + 1 - ports->start);
816 return retval;
819 static void cmos_do_shutdown(void)
821 spin_lock_irq(&rtc_lock);
822 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
823 spin_unlock_irq(&rtc_lock);
826 static void __exit cmos_do_remove(struct device *dev)
828 struct cmos_rtc *cmos = dev_get_drvdata(dev);
829 struct resource *ports;
831 cmos_do_shutdown();
833 sysfs_remove_bin_file(&dev->kobj, &nvram);
835 if (is_valid_irq(cmos->irq)) {
836 free_irq(cmos->irq, cmos->rtc);
837 hpet_unregister_irq_handler(cmos_interrupt);
840 rtc_device_unregister(cmos->rtc);
841 cmos->rtc = NULL;
843 ports = cmos->iomem;
844 release_region(ports->start, ports->end + 1 - ports->start);
845 cmos->iomem = NULL;
847 cmos->dev = NULL;
848 dev_set_drvdata(dev, NULL);
851 #ifdef CONFIG_PM
853 static int cmos_suspend(struct device *dev, pm_message_t mesg)
855 struct cmos_rtc *cmos = dev_get_drvdata(dev);
856 unsigned char tmp;
858 /* only the alarm might be a wakeup event source */
859 spin_lock_irq(&rtc_lock);
860 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
861 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
862 unsigned char mask;
864 if (device_may_wakeup(dev))
865 mask = RTC_IRQMASK & ~RTC_AIE;
866 else
867 mask = RTC_IRQMASK;
868 tmp &= ~mask;
869 CMOS_WRITE(tmp, RTC_CONTROL);
871 /* shut down hpet emulation - we don't need it for alarm */
872 hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE);
873 cmos_checkintr(cmos, tmp);
875 spin_unlock_irq(&rtc_lock);
877 if (tmp & RTC_AIE) {
878 cmos->enabled_wake = 1;
879 if (cmos->wake_on)
880 cmos->wake_on(dev);
881 else
882 enable_irq_wake(cmos->irq);
885 pr_debug("%s: suspend%s, ctrl %02x\n",
886 dev_name(&cmos_rtc.rtc->dev),
887 (tmp & RTC_AIE) ? ", alarm may wake" : "",
888 tmp);
890 return 0;
893 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
894 * after a detour through G3 "mechanical off", although the ACPI spec
895 * says wakeup should only work from G1/S4 "hibernate". To most users,
896 * distinctions between S4 and S5 are pointless. So when the hardware
897 * allows, don't draw that distinction.
899 static inline int cmos_poweroff(struct device *dev)
901 return cmos_suspend(dev, PMSG_HIBERNATE);
904 static int cmos_resume(struct device *dev)
906 struct cmos_rtc *cmos = dev_get_drvdata(dev);
907 unsigned char tmp = cmos->suspend_ctrl;
909 /* re-enable any irqs previously active */
910 if (tmp & RTC_IRQMASK) {
911 unsigned char mask;
913 if (cmos->enabled_wake) {
914 if (cmos->wake_off)
915 cmos->wake_off(dev);
916 else
917 disable_irq_wake(cmos->irq);
918 cmos->enabled_wake = 0;
921 spin_lock_irq(&rtc_lock);
922 do {
923 CMOS_WRITE(tmp, RTC_CONTROL);
924 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
926 mask = CMOS_READ(RTC_INTR_FLAGS);
927 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
928 if (!is_hpet_enabled() || !is_intr(mask))
929 break;
931 /* force one-shot behavior if HPET blocked
932 * the wake alarm's irq
934 rtc_update_irq(cmos->rtc, 1, mask);
935 tmp &= ~RTC_AIE;
936 hpet_mask_rtc_irq_bit(RTC_AIE);
937 } while (mask & RTC_AIE);
938 spin_unlock_irq(&rtc_lock);
941 pr_debug("%s: resume, ctrl %02x\n",
942 dev_name(&cmos_rtc.rtc->dev),
943 tmp);
945 return 0;
948 #else
949 #define cmos_suspend NULL
950 #define cmos_resume NULL
952 static inline int cmos_poweroff(struct device *dev)
954 return -ENOSYS;
957 #endif
959 /*----------------------------------------------------------------*/
961 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
962 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
963 * probably list them in similar PNPBIOS tables; so PNP is more common.
965 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
966 * predate even PNPBIOS should set up platform_bus devices.
969 #ifdef CONFIG_ACPI
971 #include <linux/acpi.h>
973 #ifdef CONFIG_PM
974 static u32 rtc_handler(void *context)
976 acpi_clear_event(ACPI_EVENT_RTC);
977 acpi_disable_event(ACPI_EVENT_RTC, 0);
978 return ACPI_INTERRUPT_HANDLED;
981 static inline void rtc_wake_setup(void)
983 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
985 * After the RTC handler is installed, the Fixed_RTC event should
986 * be disabled. Only when the RTC alarm is set will it be enabled.
988 acpi_clear_event(ACPI_EVENT_RTC);
989 acpi_disable_event(ACPI_EVENT_RTC, 0);
992 static void rtc_wake_on(struct device *dev)
994 acpi_clear_event(ACPI_EVENT_RTC);
995 acpi_enable_event(ACPI_EVENT_RTC, 0);
998 static void rtc_wake_off(struct device *dev)
1000 acpi_disable_event(ACPI_EVENT_RTC, 0);
1002 #else
1003 #define rtc_wake_setup() do{}while(0)
1004 #define rtc_wake_on NULL
1005 #define rtc_wake_off NULL
1006 #endif
1008 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1009 * its device node and pass extra config data. This helps its driver use
1010 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1011 * that this board's RTC is wakeup-capable (per ACPI spec).
1013 static struct cmos_rtc_board_info acpi_rtc_info;
1015 static void __devinit
1016 cmos_wake_setup(struct device *dev)
1018 if (acpi_disabled)
1019 return;
1021 rtc_wake_setup();
1022 acpi_rtc_info.wake_on = rtc_wake_on;
1023 acpi_rtc_info.wake_off = rtc_wake_off;
1025 /* workaround bug in some ACPI tables */
1026 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1027 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1028 acpi_gbl_FADT.month_alarm);
1029 acpi_gbl_FADT.month_alarm = 0;
1032 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1033 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1034 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1036 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1037 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1038 dev_info(dev, "RTC can wake from S4\n");
1040 dev->platform_data = &acpi_rtc_info;
1042 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1043 device_init_wakeup(dev, 1);
1046 #else
1048 static void __devinit
1049 cmos_wake_setup(struct device *dev)
1053 #endif
1055 #ifdef CONFIG_PNP
1057 #include <linux/pnp.h>
1059 static int __devinit
1060 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1062 cmos_wake_setup(&pnp->dev);
1064 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1065 /* Some machines contain a PNP entry for the RTC, but
1066 * don't define the IRQ. It should always be safe to
1067 * hardcode it in these cases
1069 return cmos_do_probe(&pnp->dev,
1070 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1071 else
1072 return cmos_do_probe(&pnp->dev,
1073 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1074 pnp_irq(pnp, 0));
1077 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1079 cmos_do_remove(&pnp->dev);
1082 #ifdef CONFIG_PM
1084 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1086 return cmos_suspend(&pnp->dev, mesg);
1089 static int cmos_pnp_resume(struct pnp_dev *pnp)
1091 return cmos_resume(&pnp->dev);
1094 #else
1095 #define cmos_pnp_suspend NULL
1096 #define cmos_pnp_resume NULL
1097 #endif
1099 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1101 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1102 return;
1104 cmos_do_shutdown();
1107 static const struct pnp_device_id rtc_ids[] = {
1108 { .id = "PNP0b00", },
1109 { .id = "PNP0b01", },
1110 { .id = "PNP0b02", },
1111 { },
1113 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1115 static struct pnp_driver cmos_pnp_driver = {
1116 .name = (char *) driver_name,
1117 .id_table = rtc_ids,
1118 .probe = cmos_pnp_probe,
1119 .remove = __exit_p(cmos_pnp_remove),
1120 .shutdown = cmos_pnp_shutdown,
1122 /* flag ensures resume() gets called, and stops syslog spam */
1123 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1124 .suspend = cmos_pnp_suspend,
1125 .resume = cmos_pnp_resume,
1128 #endif /* CONFIG_PNP */
1130 /*----------------------------------------------------------------*/
1132 /* Platform setup should have set up an RTC device, when PNP is
1133 * unavailable ... this could happen even on (older) PCs.
1136 static int __init cmos_platform_probe(struct platform_device *pdev)
1138 cmos_wake_setup(&pdev->dev);
1139 return cmos_do_probe(&pdev->dev,
1140 platform_get_resource(pdev, IORESOURCE_IO, 0),
1141 platform_get_irq(pdev, 0));
1144 static int __exit cmos_platform_remove(struct platform_device *pdev)
1146 cmos_do_remove(&pdev->dev);
1147 return 0;
1150 static void cmos_platform_shutdown(struct platform_device *pdev)
1152 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1153 return;
1155 cmos_do_shutdown();
1158 /* work with hotplug and coldplug */
1159 MODULE_ALIAS("platform:rtc_cmos");
1161 static struct platform_driver cmos_platform_driver = {
1162 .remove = __exit_p(cmos_platform_remove),
1163 .shutdown = cmos_platform_shutdown,
1164 .driver = {
1165 .name = (char *) driver_name,
1166 .suspend = cmos_suspend,
1167 .resume = cmos_resume,
1171 #ifdef CONFIG_PNP
1172 static bool pnp_driver_registered;
1173 #endif
1174 static bool platform_driver_registered;
1176 static int __init cmos_init(void)
1178 int retval = 0;
1180 #ifdef CONFIG_PNP
1181 retval = pnp_register_driver(&cmos_pnp_driver);
1182 if (retval == 0)
1183 pnp_driver_registered = true;
1184 #endif
1186 if (!cmos_rtc.dev) {
1187 retval = platform_driver_probe(&cmos_platform_driver,
1188 cmos_platform_probe);
1189 if (retval == 0)
1190 platform_driver_registered = true;
1193 if (retval == 0)
1194 return 0;
1196 #ifdef CONFIG_PNP
1197 if (pnp_driver_registered)
1198 pnp_unregister_driver(&cmos_pnp_driver);
1199 #endif
1200 return retval;
1202 module_init(cmos_init);
1204 static void __exit cmos_exit(void)
1206 #ifdef CONFIG_PNP
1207 if (pnp_driver_registered)
1208 pnp_unregister_driver(&cmos_pnp_driver);
1209 #endif
1210 if (platform_driver_registered)
1211 platform_driver_unregister(&cmos_platform_driver);
1213 module_exit(cmos_exit);
1216 MODULE_AUTHOR("David Brownell");
1217 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1218 MODULE_LICENSE("GPL");