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iwlwifi: reuse page for notification packets
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
blobea1b9315f17c88417cbd6f011ea5a4833b922ec3
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119 ret = iwl_check_rxon_cmd(priv);
120 if (ret) {
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
122 return -EINVAL;
123 }
124
125 /* If we don't need to send a full RXON, we can use
126 * iwl_rxon_assoc_cmd which is used to reconfigure filter
127 * and other flags for the current radio configuration. */
128 if (!iwl_full_rxon_required(priv)) {
129 ret = iwl_send_rxon_assoc(priv);
130 if (ret) {
131 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132 return ret;
133 }
134
135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136 return 0;
137 }
138
139 /* station table will be cleared */
140 priv->assoc_station_added = 0;
141
142 /* If we are currently associated and the new config requires
143 * an RXON_ASSOC and the new config wants the associated mask enabled,
144 * we must clear the associated from the active configuration
145 * before we apply the new config */
146 if (iwl_is_associated(priv) && new_assoc) {
147 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
148 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
149
150 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
151 sizeof(struct iwl_rxon_cmd),
152 &priv->active_rxon);
153
154 /* If the mask clearing failed then we set
155 * active_rxon back to what it was previously */
156 if (ret) {
157 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
158 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
159 return ret;
160 }
161 }
162
163 IWL_DEBUG_INFO(priv, "Sending RXON\n"
164 "* with%s RXON_FILTER_ASSOC_MSK\n"
165 "* channel = %d\n"
166 "* bssid = %pM\n",
167 (new_assoc ? "" : "out"),
168 le16_to_cpu(priv->staging_rxon.channel),
169 priv->staging_rxon.bssid_addr);
170
171 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
172
173 /* Apply the new configuration
174 * RXON unassoc clears the station table in uCode, send it before
175 * we add the bcast station. If assoc bit is set, we will send RXON
176 * after having added the bcast and bssid station.
177 */
178 if (!new_assoc) {
179 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
180 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
181 if (ret) {
182 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
183 return ret;
184 }
185 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186 }
187
188 iwl_clear_stations_table(priv);
189
190 priv->start_calib = 0;
191
192 /* Add the broadcast address so we can send broadcast frames */
193 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
194 IWL_INVALID_STATION) {
195 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
196 return -EIO;
197 }
198
199 /* If we have set the ASSOC_MSK and we are in BSS mode then
200 * add the IWL_AP_ID to the station rate table */
201 if (new_assoc) {
202 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
203 ret = iwl_rxon_add_station(priv,
204 priv->active_rxon.bssid_addr, 1);
205 if (ret == IWL_INVALID_STATION) {
206 IWL_ERR(priv,
207 "Error adding AP address for TX.\n");
208 return -EIO;
209 }
210 priv->assoc_station_added = 1;
211 if (priv->default_wep_key &&
212 iwl_send_static_wepkey_cmd(priv, 0))
213 IWL_ERR(priv,
214 "Could not send WEP static key.\n");
215 }
216
217 /*
218 * allow CTS-to-self if possible for new association.
219 * this is relevant only for 5000 series and up,
220 * but will not damage 4965
221 */
222 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
223
224 /* Apply the new configuration
225 * RXON assoc doesn't clear the station table in uCode,
226 */
227 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
228 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
229 if (ret) {
230 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
231 return ret;
232 }
233 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
234 }
235
236 iwl_init_sensitivity(priv);
237
238 /* If we issue a new RXON command which required a tune then we must
239 * send a new TXPOWER command or we won't be able to Tx any frames */
240 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
241 if (ret) {
242 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
243 return ret;
244 }
245
246 return 0;
247 }
248
249 void iwl_update_chain_flags(struct iwl_priv *priv)
250 {
251
252 if (priv->cfg->ops->hcmd->set_rxon_chain)
253 priv->cfg->ops->hcmd->set_rxon_chain(priv);
254 iwlcore_commit_rxon(priv);
255 }
256
257 static void iwl_clear_free_frames(struct iwl_priv *priv)
258 {
259 struct list_head *element;
260
261 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
262 priv->frames_count);
263
264 while (!list_empty(&priv->free_frames)) {
265 element = priv->free_frames.next;
266 list_del(element);
267 kfree(list_entry(element, struct iwl_frame, list));
268 priv->frames_count--;
269 }
270
271 if (priv->frames_count) {
272 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
273 priv->frames_count);
274 priv->frames_count = 0;
275 }
276 }
277
278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
279 {
280 struct iwl_frame *frame;
281 struct list_head *element;
282 if (list_empty(&priv->free_frames)) {
283 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
284 if (!frame) {
285 IWL_ERR(priv, "Could not allocate frame!\n");
286 return NULL;
287 }
288
289 priv->frames_count++;
290 return frame;
291 }
292
293 element = priv->free_frames.next;
294 list_del(element);
295 return list_entry(element, struct iwl_frame, list);
296 }
297
298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
299 {
300 memset(frame, 0, sizeof(*frame));
301 list_add(&frame->list, &priv->free_frames);
302 }
303
304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
305 struct ieee80211_hdr *hdr,
306 int left)
307 {
308 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
309 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
310 (priv->iw_mode != NL80211_IFTYPE_AP)))
311 return 0;
312
313 if (priv->ibss_beacon->len > left)
314 return 0;
315
316 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
317
318 return priv->ibss_beacon->len;
319 }
320
321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
322 struct iwl_frame *frame, u8 rate)
323 {
324 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
325 unsigned int frame_size;
326
327 tx_beacon_cmd = &frame->u.beacon;
328 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
329
330 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
331 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
332
333 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
334 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
335
336 BUG_ON(frame_size > MAX_MPDU_SIZE);
337 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
338
339 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
340 tx_beacon_cmd->tx.rate_n_flags =
341 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
342 else
343 tx_beacon_cmd->tx.rate_n_flags =
344 iwl_hw_set_rate_n_flags(rate, 0);
345
346 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
347 TX_CMD_FLG_TSF_MSK |
348 TX_CMD_FLG_STA_RATE_MSK;
349
350 return sizeof(*tx_beacon_cmd) + frame_size;
351 }
352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
353 {
354 struct iwl_frame *frame;
355 unsigned int frame_size;
356 int rc;
357 u8 rate;
358
359 frame = iwl_get_free_frame(priv);
360
361 if (!frame) {
362 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
363 "command.\n");
364 return -ENOMEM;
365 }
366
367 rate = iwl_rate_get_lowest_plcp(priv);
368
369 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
370
371 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
372 &frame->u.cmd[0]);
373
374 iwl_free_frame(priv, frame);
375
376 return rc;
377 }
378
379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
380 {
381 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
382
383 dma_addr_t addr = get_unaligned_le32(&tb->lo);
384 if (sizeof(dma_addr_t) > sizeof(u32))
385 addr |=
386 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
387
388 return addr;
389 }
390
391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
392 {
393 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
394
395 return le16_to_cpu(tb->hi_n_len) >> 4;
396 }
397
398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
399 dma_addr_t addr, u16 len)
400 {
401 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
402 u16 hi_n_len = len << 4;
403
404 put_unaligned_le32(addr, &tb->lo);
405 if (sizeof(dma_addr_t) > sizeof(u32))
406 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
407
408 tb->hi_n_len = cpu_to_le16(hi_n_len);
409
410 tfd->num_tbs = idx + 1;
411 }
412
413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
414 {
415 return tfd->num_tbs & 0x1f;
416 }
417
418 /**
419 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
420 * @priv - driver private data
421 * @txq - tx queue
422 *
423 * Does NOT advance any TFD circular buffer read/write indexes
424 * Does NOT free the TFD itself (which is within circular buffer)
425 */
426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
427 {
428 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
429 struct iwl_tfd *tfd;
430 struct pci_dev *dev = priv->pci_dev;
431 int index = txq->q.read_ptr;
432 int i;
433 int num_tbs;
434
435 tfd = &tfd_tmp[index];
436
437 /* Sanity check on number of chunks */
438 num_tbs = iwl_tfd_get_num_tbs(tfd);
439
440 if (num_tbs >= IWL_NUM_OF_TBS) {
441 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
442 /* @todo issue fatal error, it is quite serious situation */
443 return;
444 }
445
446 /* Unmap tx_cmd */
447 if (num_tbs)
448 pci_unmap_single(dev,
449 pci_unmap_addr(&txq->meta[index], mapping),
450 pci_unmap_len(&txq->meta[index], len),
451 PCI_DMA_BIDIRECTIONAL);
452
453 /* Unmap chunks, if any. */
454 for (i = 1; i < num_tbs; i++) {
455 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
456 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
457
458 if (txq->txb) {
459 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
460 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
461 }
462 }
463 }
464
465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
466 struct iwl_tx_queue *txq,
467 dma_addr_t addr, u16 len,
468 u8 reset, u8 pad)
469 {
470 struct iwl_queue *q;
471 struct iwl_tfd *tfd, *tfd_tmp;
472 u32 num_tbs;
473
474 q = &txq->q;
475 tfd_tmp = (struct iwl_tfd *)txq->tfds;
476 tfd = &tfd_tmp[q->write_ptr];
477
478 if (reset)
479 memset(tfd, 0, sizeof(*tfd));
480
481 num_tbs = iwl_tfd_get_num_tbs(tfd);
482
483 /* Each TFD can point to a maximum 20 Tx buffers */
484 if (num_tbs >= IWL_NUM_OF_TBS) {
485 IWL_ERR(priv, "Error can not send more than %d chunks\n",
486 IWL_NUM_OF_TBS);
487 return -EINVAL;
488 }
489
490 BUG_ON(addr & ~DMA_BIT_MASK(36));
491 if (unlikely(addr & ~IWL_TX_DMA_MASK))
492 IWL_ERR(priv, "Unaligned address = %llx\n",
493 (unsigned long long)addr);
494
495 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
496
497 return 0;
498 }
499
500 /*
501 * Tell nic where to find circular buffer of Tx Frame Descriptors for
502 * given Tx queue, and enable the DMA channel used for that queue.
503 *
504 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
505 * channels supported in hardware.
506 */
507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
508 struct iwl_tx_queue *txq)
509 {
510 int txq_id = txq->q.id;
511
512 /* Circular buffer (TFD queue in DRAM) physical base address */
513 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
514 txq->q.dma_addr >> 8);
515
516 return 0;
517 }
518
519 /******************************************************************************
520 *
521 * Generic RX handler implementations
522 *
523 ******************************************************************************/
524 static void iwl_rx_reply_alive(struct iwl_priv *priv,
525 struct iwl_rx_mem_buffer *rxb)
526 {
527 struct iwl_rx_packet *pkt = rxb_addr(rxb);
528 struct iwl_alive_resp *palive;
529 struct delayed_work *pwork;
530
531 palive = &pkt->u.alive_frame;
532
533 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
534 "0x%01X 0x%01X\n",
535 palive->is_valid, palive->ver_type,
536 palive->ver_subtype);
537
538 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
539 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
540 memcpy(&priv->card_alive_init,
541 &pkt->u.alive_frame,
542 sizeof(struct iwl_init_alive_resp));
543 pwork = &priv->init_alive_start;
544 } else {
545 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
546 memcpy(&priv->card_alive, &pkt->u.alive_frame,
547 sizeof(struct iwl_alive_resp));
548 pwork = &priv->alive_start;
549 }
550
551 /* We delay the ALIVE response by 5ms to
552 * give the HW RF Kill time to activate... */
553 if (palive->is_valid == UCODE_VALID_OK)
554 queue_delayed_work(priv->workqueue, pwork,
555 msecs_to_jiffies(5));
556 else
557 IWL_WARN(priv, "uCode did not respond OK.\n");
558 }
559
560 static void iwl_bg_beacon_update(struct work_struct *work)
561 {
562 struct iwl_priv *priv =
563 container_of(work, struct iwl_priv, beacon_update);
564 struct sk_buff *beacon;
565
566 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
567 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
568
569 if (!beacon) {
570 IWL_ERR(priv, "update beacon failed\n");
571 return;
572 }
573
574 mutex_lock(&priv->mutex);
575 /* new beacon skb is allocated every time; dispose previous.*/
576 if (priv->ibss_beacon)
577 dev_kfree_skb(priv->ibss_beacon);
578
579 priv->ibss_beacon = beacon;
580 mutex_unlock(&priv->mutex);
581
582 iwl_send_beacon_cmd(priv);
583 }
584
585 /**
586 * iwl_bg_statistics_periodic - Timer callback to queue statistics
587 *
588 * This callback is provided in order to send a statistics request.
589 *
590 * This timer function is continually reset to execute within
591 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592 * was received. We need to ensure we receive the statistics in order
593 * to update the temperature used for calibrating the TXPOWER.
594 */
595 static void iwl_bg_statistics_periodic(unsigned long data)
596 {
597 struct iwl_priv *priv = (struct iwl_priv *)data;
598
599 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
600 return;
601
602 /* dont send host command if rf-kill is on */
603 if (!iwl_is_ready_rf(priv))
604 return;
605
606 iwl_send_statistics_request(priv, CMD_ASYNC);
607 }
608
609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
610 struct iwl_rx_mem_buffer *rxb)
611 {
612 #ifdef CONFIG_IWLWIFI_DEBUG
613 struct iwl_rx_packet *pkt = rxb_addr(rxb);
614 struct iwl4965_beacon_notif *beacon =
615 (struct iwl4965_beacon_notif *)pkt->u.raw;
616 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
617
618 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
619 "tsf %d %d rate %d\n",
620 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
621 beacon->beacon_notify_hdr.failure_frame,
622 le32_to_cpu(beacon->ibss_mgr_status),
623 le32_to_cpu(beacon->high_tsf),
624 le32_to_cpu(beacon->low_tsf), rate);
625 #endif
626
627 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
628 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
629 queue_work(priv->workqueue, &priv->beacon_update);
630 }
631
632 /* Handle notification from uCode that card's power state is changing
633 * due to software, hardware, or critical temperature RFKILL */
634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
635 struct iwl_rx_mem_buffer *rxb)
636 {
637 struct iwl_rx_packet *pkt = rxb_addr(rxb);
638 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
639 unsigned long status = priv->status;
640
641 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
642 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
643 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
644
645 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
646 RF_CARD_DISABLED)) {
647
648 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
649 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
650
651 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
652 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
653
654 if (!(flags & RXON_CARD_DISABLED)) {
655 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
656 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
657 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
658 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
659 }
660 if (flags & RF_CARD_DISABLED)
661 iwl_tt_enter_ct_kill(priv);
662 }
663 if (!(flags & RF_CARD_DISABLED))
664 iwl_tt_exit_ct_kill(priv);
665
666 if (flags & HW_CARD_DISABLED)
667 set_bit(STATUS_RF_KILL_HW, &priv->status);
668 else
669 clear_bit(STATUS_RF_KILL_HW, &priv->status);
670
671
672 if (!(flags & RXON_CARD_DISABLED))
673 iwl_scan_cancel(priv);
674
675 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
676 test_bit(STATUS_RF_KILL_HW, &priv->status)))
677 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
678 test_bit(STATUS_RF_KILL_HW, &priv->status));
679 else
680 wake_up_interruptible(&priv->wait_command_queue);
681 }
682
683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
684 {
685 if (src == IWL_PWR_SRC_VAUX) {
686 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
687 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
688 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
689 ~APMG_PS_CTRL_MSK_PWR_SRC);
690 } else {
691 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
693 ~APMG_PS_CTRL_MSK_PWR_SRC);
694 }
695
696 return 0;
697 }
698
699 /**
700 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
701 *
702 * Setup the RX handlers for each of the reply types sent from the uCode
703 * to the host.
704 *
705 * This function chains into the hardware specific files for them to setup
706 * any hardware specific handlers as well.
707 */
708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
709 {
710 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
711 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
712 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
713 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
714 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
715 iwl_rx_pm_debug_statistics_notif;
716 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
717
718 /*
719 * The same handler is used for both the REPLY to a discrete
720 * statistics request from the host as well as for the periodic
721 * statistics notifications (after received beacons) from the uCode.
722 */
723 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
724 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
725
726 iwl_setup_spectrum_handlers(priv);
727 iwl_setup_rx_scan_handlers(priv);
728
729 /* status change handler */
730 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
731
732 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
733 iwl_rx_missed_beacon_notif;
734 /* Rx handlers */
735 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
736 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
737 /* block ack */
738 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
739 /* Set up hardware specific Rx handlers */
740 priv->cfg->ops->lib->rx_handler_setup(priv);
741 }
742
743 /**
744 * iwl_rx_handle - Main entry function for receiving responses from uCode
745 *
746 * Uses the priv->rx_handlers callback function array to invoke
747 * the appropriate handlers, including command responses,
748 * frame-received notifications, and other notifications.
749 */
750 void iwl_rx_handle(struct iwl_priv *priv)
751 {
752 struct iwl_rx_mem_buffer *rxb;
753 struct iwl_rx_packet *pkt;
754 struct iwl_rx_queue *rxq = &priv->rxq;
755 u32 r, i;
756 int reclaim;
757 unsigned long flags;
758 u8 fill_rx = 0;
759 u32 count = 8;
760 int total_empty;
761
762 /* uCode's read index (stored in shared DRAM) indicates the last Rx
763 * buffer that the driver may process (last buffer filled by ucode). */
764 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
765 i = rxq->read;
766
767 /* Rx interrupt, but nothing sent from uCode */
768 if (i == r)
769 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
770
771 /* calculate total frames need to be restock after handling RX */
772 total_empty = r - rxq->write_actual;
773 if (total_empty < 0)
774 total_empty += RX_QUEUE_SIZE;
775
776 if (total_empty > (RX_QUEUE_SIZE / 2))
777 fill_rx = 1;
778
779 while (i != r) {
780 rxb = rxq->queue[i];
781
782 /* If an RXB doesn't have a Rx queue slot associated with it,
783 * then a bug has been introduced in the queue refilling
784 * routines -- catch it here */
785 BUG_ON(rxb == NULL);
786
787 rxq->queue[i] = NULL;
788
789 pci_unmap_page(priv->pci_dev, rxb->page_dma,
790 PAGE_SIZE << priv->hw_params.rx_page_order,
791 PCI_DMA_FROMDEVICE);
792 pkt = rxb_addr(rxb);
793
794 trace_iwlwifi_dev_rx(priv, pkt,
795 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
796
797 /* Reclaim a command buffer only if this packet is a response
798 * to a (driver-originated) command.
799 * If the packet (e.g. Rx frame) originated from uCode,
800 * there is no command buffer to reclaim.
801 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
802 * but apparently a few don't get set; catch them here. */
803 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
804 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
805 (pkt->hdr.cmd != REPLY_RX) &&
806 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
807 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
808 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
809 (pkt->hdr.cmd != REPLY_TX);
810
811 /* Based on type of command response or notification,
812 * handle those that need handling via function in
813 * rx_handlers table. See iwl_setup_rx_handlers() */
814 if (priv->rx_handlers[pkt->hdr.cmd]) {
815 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
816 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
817 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
818 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
819 } else {
820 /* No handling needed */
821 IWL_DEBUG_RX(priv,
822 "r %d i %d No handler needed for %s, 0x%02x\n",
823 r, i, get_cmd_string(pkt->hdr.cmd),
824 pkt->hdr.cmd);
825 }
826
827 /*
828 * XXX: After here, we should always check rxb->page
829 * against NULL before touching it or its virtual
830 * memory (pkt). Because some rx_handler might have
831 * already taken or freed the pages.
832 */
833
834 if (reclaim) {
835 /* Invoke any callbacks, transfer the buffer to caller,
836 * and fire off the (possibly) blocking iwl_send_cmd()
837 * as we reclaim the driver command queue */
838 if (rxb->page)
839 iwl_tx_cmd_complete(priv, rxb);
840 else
841 IWL_WARN(priv, "Claim null rxb?\n");
842 }
843
844 /* Reuse the page if possible. For notification packets and
845 * SKBs that fail to Rx correctly, add them back into the
846 * rx_free list for reuse later. */
847 spin_lock_irqsave(&rxq->lock, flags);
848 if (rxb->page != NULL) {
849 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
850 0, PAGE_SIZE << priv->hw_params.rx_page_order,
851 PCI_DMA_FROMDEVICE);
852 list_add_tail(&rxb->list, &rxq->rx_free);
853 rxq->free_count++;
854 } else
855 list_add_tail(&rxb->list, &rxq->rx_used);
856
857 spin_unlock_irqrestore(&rxq->lock, flags);
858
859 i = (i + 1) & RX_QUEUE_MASK;
860 /* If there are a lot of unused frames,
861 * restock the Rx queue so ucode wont assert. */
862 if (fill_rx) {
863 count++;
864 if (count >= 8) {
865 rxq->read = i;
866 iwl_rx_replenish_now(priv);
867 count = 0;
868 }
869 }
870 }
871
872 /* Backtrack one entry */
873 rxq->read = i;
874 if (fill_rx)
875 iwl_rx_replenish_now(priv);
876 else
877 iwl_rx_queue_restock(priv);
878 }
879
880 /* call this function to flush any scheduled tasklet */
881 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
882 {
883 /* wait to make sure we flush pending tasklet*/
884 synchronize_irq(priv->pci_dev->irq);
885 tasklet_kill(&priv->irq_tasklet);
886 }
887
888 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
889 {
890 u32 inta, handled = 0;
891 u32 inta_fh;
892 unsigned long flags;
893 #ifdef CONFIG_IWLWIFI_DEBUG
894 u32 inta_mask;
895 #endif
896
897 spin_lock_irqsave(&priv->lock, flags);
898
899 /* Ack/clear/reset pending uCode interrupts.
900 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
901 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
902 inta = iwl_read32(priv, CSR_INT);
903 iwl_write32(priv, CSR_INT, inta);
904
905 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
906 * Any new interrupts that happen after this, either while we're
907 * in this tasklet, or later, will show up in next ISR/tasklet. */
908 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
909 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
910
911 #ifdef CONFIG_IWLWIFI_DEBUG
912 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
913 /* just for debug */
914 inta_mask = iwl_read32(priv, CSR_INT_MASK);
915 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
916 inta, inta_mask, inta_fh);
917 }
918 #endif
919
920 spin_unlock_irqrestore(&priv->lock, flags);
921
922 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
923 * atomic, make sure that inta covers all the interrupts that
924 * we've discovered, even if FH interrupt came in just after
925 * reading CSR_INT. */
926 if (inta_fh & CSR49_FH_INT_RX_MASK)
927 inta |= CSR_INT_BIT_FH_RX;
928 if (inta_fh & CSR49_FH_INT_TX_MASK)
929 inta |= CSR_INT_BIT_FH_TX;
930
931 /* Now service all interrupt bits discovered above. */
932 if (inta & CSR_INT_BIT_HW_ERR) {
933 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
934
935 /* Tell the device to stop sending interrupts */
936 iwl_disable_interrupts(priv);
937
938 priv->isr_stats.hw++;
939 iwl_irq_handle_error(priv);
940
941 handled |= CSR_INT_BIT_HW_ERR;
942
943 return;
944 }
945
946 #ifdef CONFIG_IWLWIFI_DEBUG
947 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
948 /* NIC fires this, but we don't use it, redundant with WAKEUP */
949 if (inta & CSR_INT_BIT_SCD) {
950 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
951 "the frame/frames.\n");
952 priv->isr_stats.sch++;
953 }
954
955 /* Alive notification via Rx interrupt will do the real work */
956 if (inta & CSR_INT_BIT_ALIVE) {
957 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
958 priv->isr_stats.alive++;
959 }
960 }
961 #endif
962 /* Safely ignore these bits for debug checks below */
963 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
964
965 /* HW RF KILL switch toggled */
966 if (inta & CSR_INT_BIT_RF_KILL) {
967 int hw_rf_kill = 0;
968 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
969 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
970 hw_rf_kill = 1;
971
972 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
973 hw_rf_kill ? "disable radio" : "enable radio");
974
975 priv->isr_stats.rfkill++;
976
977 /* driver only loads ucode once setting the interface up.
978 * the driver allows loading the ucode even if the radio
979 * is killed. Hence update the killswitch state here. The
980 * rfkill handler will care about restarting if needed.
981 */
982 if (!test_bit(STATUS_ALIVE, &priv->status)) {
983 if (hw_rf_kill)
984 set_bit(STATUS_RF_KILL_HW, &priv->status);
985 else
986 clear_bit(STATUS_RF_KILL_HW, &priv->status);
987 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
988 }
989
990 handled |= CSR_INT_BIT_RF_KILL;
991 }
992
993 /* Chip got too hot and stopped itself */
994 if (inta & CSR_INT_BIT_CT_KILL) {
995 IWL_ERR(priv, "Microcode CT kill error detected.\n");
996 priv->isr_stats.ctkill++;
997 handled |= CSR_INT_BIT_CT_KILL;
998 }
999
1000 /* Error detected by uCode */
1001 if (inta & CSR_INT_BIT_SW_ERR) {
1002 IWL_ERR(priv, "Microcode SW error detected. "
1003 " Restarting 0x%X.\n", inta);
1004 priv->isr_stats.sw++;
1005 priv->isr_stats.sw_err = inta;
1006 iwl_irq_handle_error(priv);
1007 handled |= CSR_INT_BIT_SW_ERR;
1008 }
1009
1010 /* uCode wakes up after power-down sleep */
1011 if (inta & CSR_INT_BIT_WAKEUP) {
1012 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1013 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1014 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1015 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1016 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1017 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1018 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1019 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1020
1021 priv->isr_stats.wakeup++;
1022
1023 handled |= CSR_INT_BIT_WAKEUP;
1024 }
1025
1026 /* All uCode command responses, including Tx command responses,
1027 * Rx "responses" (frame-received notification), and other
1028 * notifications from uCode come through here*/
1029 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1030 iwl_rx_handle(priv);
1031 priv->isr_stats.rx++;
1032 iwl_leds_background(priv);
1033 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1034 }
1035
1036 if (inta & CSR_INT_BIT_FH_TX) {
1037 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1038 priv->isr_stats.tx++;
1039 handled |= CSR_INT_BIT_FH_TX;
1040 /* FH finished to write, send event */
1041 priv->ucode_write_complete = 1;
1042 wake_up_interruptible(&priv->wait_command_queue);
1043 }
1044
1045 if (inta & ~handled) {
1046 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1047 priv->isr_stats.unhandled++;
1048 }
1049
1050 if (inta & ~(priv->inta_mask)) {
1051 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1052 inta & ~priv->inta_mask);
1053 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1054 }
1055
1056 /* Re-enable all interrupts */
1057 /* only Re-enable if diabled by irq */
1058 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1059 iwl_enable_interrupts(priv);
1060
1061 #ifdef CONFIG_IWLWIFI_DEBUG
1062 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1063 inta = iwl_read32(priv, CSR_INT);
1064 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1065 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1066 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1067 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1068 }
1069 #endif
1070 }
1071
1072 /* tasklet for iwlagn interrupt */
1073 static void iwl_irq_tasklet(struct iwl_priv *priv)
1074 {
1075 u32 inta = 0;
1076 u32 handled = 0;
1077 unsigned long flags;
1078 #ifdef CONFIG_IWLWIFI_DEBUG
1079 u32 inta_mask;
1080 #endif
1081
1082 spin_lock_irqsave(&priv->lock, flags);
1083
1084 /* Ack/clear/reset pending uCode interrupts.
1085 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1086 */
1087 iwl_write32(priv, CSR_INT, priv->inta);
1088
1089 inta = priv->inta;
1090
1091 #ifdef CONFIG_IWLWIFI_DEBUG
1092 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1093 /* just for debug */
1094 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1095 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1096 inta, inta_mask);
1097 }
1098 #endif
1099
1100 spin_unlock_irqrestore(&priv->lock, flags);
1101
1102 /* saved interrupt in inta variable now we can reset priv->inta */
1103 priv->inta = 0;
1104
1105 /* Now service all interrupt bits discovered above. */
1106 if (inta & CSR_INT_BIT_HW_ERR) {
1107 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1108
1109 /* Tell the device to stop sending interrupts */
1110 iwl_disable_interrupts(priv);
1111
1112 priv->isr_stats.hw++;
1113 iwl_irq_handle_error(priv);
1114
1115 handled |= CSR_INT_BIT_HW_ERR;
1116
1117 return;
1118 }
1119
1120 #ifdef CONFIG_IWLWIFI_DEBUG
1121 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1122 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1123 if (inta & CSR_INT_BIT_SCD) {
1124 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1125 "the frame/frames.\n");
1126 priv->isr_stats.sch++;
1127 }
1128
1129 /* Alive notification via Rx interrupt will do the real work */
1130 if (inta & CSR_INT_BIT_ALIVE) {
1131 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1132 priv->isr_stats.alive++;
1133 }
1134 }
1135 #endif
1136 /* Safely ignore these bits for debug checks below */
1137 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1138
1139 /* HW RF KILL switch toggled */
1140 if (inta & CSR_INT_BIT_RF_KILL) {
1141 int hw_rf_kill = 0;
1142 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1143 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1144 hw_rf_kill = 1;
1145
1146 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1147 hw_rf_kill ? "disable radio" : "enable radio");
1148
1149 priv->isr_stats.rfkill++;
1150
1151 /* driver only loads ucode once setting the interface up.
1152 * the driver allows loading the ucode even if the radio
1153 * is killed. Hence update the killswitch state here. The
1154 * rfkill handler will care about restarting if needed.
1155 */
1156 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1157 if (hw_rf_kill)
1158 set_bit(STATUS_RF_KILL_HW, &priv->status);
1159 else
1160 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1161 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1162 }
1163
1164 handled |= CSR_INT_BIT_RF_KILL;
1165 }
1166
1167 /* Chip got too hot and stopped itself */
1168 if (inta & CSR_INT_BIT_CT_KILL) {
1169 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1170 priv->isr_stats.ctkill++;
1171 handled |= CSR_INT_BIT_CT_KILL;
1172 }
1173
1174 /* Error detected by uCode */
1175 if (inta & CSR_INT_BIT_SW_ERR) {
1176 IWL_ERR(priv, "Microcode SW error detected. "
1177 " Restarting 0x%X.\n", inta);
1178 priv->isr_stats.sw++;
1179 priv->isr_stats.sw_err = inta;
1180 iwl_irq_handle_error(priv);
1181 handled |= CSR_INT_BIT_SW_ERR;
1182 }
1183
1184 /* uCode wakes up after power-down sleep */
1185 if (inta & CSR_INT_BIT_WAKEUP) {
1186 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1187 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1188 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1189 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1190 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1191 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1192 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1193 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1194
1195 priv->isr_stats.wakeup++;
1196
1197 handled |= CSR_INT_BIT_WAKEUP;
1198 }
1199
1200 /* All uCode command responses, including Tx command responses,
1201 * Rx "responses" (frame-received notification), and other
1202 * notifications from uCode come through here*/
1203 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1204 CSR_INT_BIT_RX_PERIODIC)) {
1205 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1206 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1207 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1208 iwl_write32(priv, CSR_FH_INT_STATUS,
1209 CSR49_FH_INT_RX_MASK);
1210 }
1211 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1212 handled |= CSR_INT_BIT_RX_PERIODIC;
1213 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1214 }
1215 /* Sending RX interrupt require many steps to be done in the
1216 * the device:
1217 * 1- write interrupt to current index in ICT table.
1218 * 2- dma RX frame.
1219 * 3- update RX shared data to indicate last write index.
1220 * 4- send interrupt.
1221 * This could lead to RX race, driver could receive RX interrupt
1222 * but the shared data changes does not reflect this.
1223 * this could lead to RX race, RX periodic will solve this race
1224 */
1225 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1226 CSR_INT_PERIODIC_DIS);
1227 iwl_rx_handle(priv);
1228 /* Only set RX periodic if real RX is received. */
1229 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1230 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1231 CSR_INT_PERIODIC_ENA);
1232
1233 priv->isr_stats.rx++;
1234 iwl_leds_background(priv);
1235 }
1236
1237 if (inta & CSR_INT_BIT_FH_TX) {
1238 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1239 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1240 priv->isr_stats.tx++;
1241 handled |= CSR_INT_BIT_FH_TX;
1242 /* FH finished to write, send event */
1243 priv->ucode_write_complete = 1;
1244 wake_up_interruptible(&priv->wait_command_queue);
1245 }
1246
1247 if (inta & ~handled) {
1248 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1249 priv->isr_stats.unhandled++;
1250 }
1251
1252 if (inta & ~(priv->inta_mask)) {
1253 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1254 inta & ~priv->inta_mask);
1255 }
1256
1257 /* Re-enable all interrupts */
1258 /* only Re-enable if diabled by irq */
1259 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1260 iwl_enable_interrupts(priv);
1261 }
1262
1263
1264 /******************************************************************************
1265 *
1266 * uCode download functions
1267 *
1268 ******************************************************************************/
1269
1270 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1271 {
1272 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1273 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1274 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1275 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1276 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1277 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1278 }
1279
1280 static void iwl_nic_start(struct iwl_priv *priv)
1281 {
1282 /* Remove all resets to allow NIC to operate */
1283 iwl_write32(priv, CSR_RESET, 0);
1284 }
1285
1286
1287 /**
1288 * iwl_read_ucode - Read uCode images from disk file.
1289 *
1290 * Copy into buffers for card to fetch via bus-mastering
1291 */
1292 static int iwl_read_ucode(struct iwl_priv *priv)
1293 {
1294 struct iwl_ucode_header *ucode;
1295 int ret = -EINVAL, index;
1296 const struct firmware *ucode_raw;
1297 const char *name_pre = priv->cfg->fw_name_pre;
1298 const unsigned int api_max = priv->cfg->ucode_api_max;
1299 const unsigned int api_min = priv->cfg->ucode_api_min;
1300 char buf[25];
1301 u8 *src;
1302 size_t len;
1303 u32 api_ver, build;
1304 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1305 u16 eeprom_ver;
1306
1307 /* Ask kernel firmware_class module to get the boot firmware off disk.
1308 * request_firmware() is synchronous, file is in memory on return. */
1309 for (index = api_max; index >= api_min; index--) {
1310 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1311 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1312 if (ret < 0) {
1313 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1314 buf, ret);
1315 if (ret == -ENOENT)
1316 continue;
1317 else
1318 goto error;
1319 } else {
1320 if (index < api_max)
1321 IWL_ERR(priv, "Loaded firmware %s, "
1322 "which is deprecated. "
1323 "Please use API v%u instead.\n",
1324 buf, api_max);
1325
1326 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1327 buf, ucode_raw->size);
1328 break;
1329 }
1330 }
1331
1332 if (ret < 0)
1333 goto error;
1334
1335 /* Make sure that we got at least the v1 header! */
1336 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1337 IWL_ERR(priv, "File size way too small!\n");
1338 ret = -EINVAL;
1339 goto err_release;
1340 }
1341
1342 /* Data from ucode file: header followed by uCode images */
1343 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1344
1345 priv->ucode_ver = le32_to_cpu(ucode->ver);
1346 api_ver = IWL_UCODE_API(priv->ucode_ver);
1347 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1348 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1349 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1350 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1351 init_data_size =
1352 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1353 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1354 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1355
1356 /* api_ver should match the api version forming part of the
1357 * firmware filename ... but we don't check for that and only rely
1358 * on the API version read from firmware header from here on forward */
1359
1360 if (api_ver < api_min || api_ver > api_max) {
1361 IWL_ERR(priv, "Driver unable to support your firmware API. "
1362 "Driver supports v%u, firmware is v%u.\n",
1363 api_max, api_ver);
1364 priv->ucode_ver = 0;
1365 ret = -EINVAL;
1366 goto err_release;
1367 }
1368 if (api_ver != api_max)
1369 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1370 "got v%u. New firmware can be obtained "
1371 "from http://www.intellinuxwireless.org.\n",
1372 api_max, api_ver);
1373
1374 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1375 IWL_UCODE_MAJOR(priv->ucode_ver),
1376 IWL_UCODE_MINOR(priv->ucode_ver),
1377 IWL_UCODE_API(priv->ucode_ver),
1378 IWL_UCODE_SERIAL(priv->ucode_ver));
1379
1380 if (build)
1381 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1382
1383 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1384 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1385 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1386 ? "OTP" : "EEPROM", eeprom_ver);
1387
1388 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1389 priv->ucode_ver);
1390 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1391 inst_size);
1392 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1393 data_size);
1394 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1395 init_size);
1396 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1397 init_data_size);
1398 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1399 boot_size);
1400
1401 /* Verify size of file vs. image size info in file's header */
1402 if (ucode_raw->size !=
1403 priv->cfg->ops->ucode->get_header_size(api_ver) +
1404 inst_size + data_size + init_size +
1405 init_data_size + boot_size) {
1406
1407 IWL_DEBUG_INFO(priv,
1408 "uCode file size %d does not match expected size\n",
1409 (int)ucode_raw->size);
1410 ret = -EINVAL;
1411 goto err_release;
1412 }
1413
1414 /* Verify that uCode images will fit in card's SRAM */
1415 if (inst_size > priv->hw_params.max_inst_size) {
1416 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1417 inst_size);
1418 ret = -EINVAL;
1419 goto err_release;
1420 }
1421
1422 if (data_size > priv->hw_params.max_data_size) {
1423 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1424 data_size);
1425 ret = -EINVAL;
1426 goto err_release;
1427 }
1428 if (init_size > priv->hw_params.max_inst_size) {
1429 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1430 init_size);
1431 ret = -EINVAL;
1432 goto err_release;
1433 }
1434 if (init_data_size > priv->hw_params.max_data_size) {
1435 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1436 init_data_size);
1437 ret = -EINVAL;
1438 goto err_release;
1439 }
1440 if (boot_size > priv->hw_params.max_bsm_size) {
1441 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1442 boot_size);
1443 ret = -EINVAL;
1444 goto err_release;
1445 }
1446
1447 /* Allocate ucode buffers for card's bus-master loading ... */
1448
1449 /* Runtime instructions and 2 copies of data:
1450 * 1) unmodified from disk
1451 * 2) backup cache for save/restore during power-downs */
1452 priv->ucode_code.len = inst_size;
1453 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1454
1455 priv->ucode_data.len = data_size;
1456 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1457
1458 priv->ucode_data_backup.len = data_size;
1459 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1460
1461 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1462 !priv->ucode_data_backup.v_addr)
1463 goto err_pci_alloc;
1464
1465 /* Initialization instructions and data */
1466 if (init_size && init_data_size) {
1467 priv->ucode_init.len = init_size;
1468 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1469
1470 priv->ucode_init_data.len = init_data_size;
1471 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1472
1473 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1474 goto err_pci_alloc;
1475 }
1476
1477 /* Bootstrap (instructions only, no data) */
1478 if (boot_size) {
1479 priv->ucode_boot.len = boot_size;
1480 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1481
1482 if (!priv->ucode_boot.v_addr)
1483 goto err_pci_alloc;
1484 }
1485
1486 /* Copy images into buffers for card's bus-master reads ... */
1487
1488 /* Runtime instructions (first block of data in file) */
1489 len = inst_size;
1490 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1491 memcpy(priv->ucode_code.v_addr, src, len);
1492 src += len;
1493
1494 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1495 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1496
1497 /* Runtime data (2nd block)
1498 * NOTE: Copy into backup buffer will be done in iwl_up() */
1499 len = data_size;
1500 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1501 memcpy(priv->ucode_data.v_addr, src, len);
1502 memcpy(priv->ucode_data_backup.v_addr, src, len);
1503 src += len;
1504
1505 /* Initialization instructions (3rd block) */
1506 if (init_size) {
1507 len = init_size;
1508 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1509 len);
1510 memcpy(priv->ucode_init.v_addr, src, len);
1511 src += len;
1512 }
1513
1514 /* Initialization data (4th block) */
1515 if (init_data_size) {
1516 len = init_data_size;
1517 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1518 len);
1519 memcpy(priv->ucode_init_data.v_addr, src, len);
1520 src += len;
1521 }
1522
1523 /* Bootstrap instructions (5th block) */
1524 len = boot_size;
1525 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1526 memcpy(priv->ucode_boot.v_addr, src, len);
1527
1528 /* We have our copies now, allow OS release its copies */
1529 release_firmware(ucode_raw);
1530 return 0;
1531
1532 err_pci_alloc:
1533 IWL_ERR(priv, "failed to allocate pci memory\n");
1534 ret = -ENOMEM;
1535 iwl_dealloc_ucode_pci(priv);
1536
1537 err_release:
1538 release_firmware(ucode_raw);
1539
1540 error:
1541 return ret;
1542 }
1543
1544 #ifdef CONFIG_IWLWIFI_DEBUG
1545 static const char *desc_lookup_text[] = {
1546 "OK",
1547 "FAIL",
1548 "BAD_PARAM",
1549 "BAD_CHECKSUM",
1550 "NMI_INTERRUPT_WDG",
1551 "SYSASSERT",
1552 "FATAL_ERROR",
1553 "BAD_COMMAND",
1554 "HW_ERROR_TUNE_LOCK",
1555 "HW_ERROR_TEMPERATURE",
1556 "ILLEGAL_CHAN_FREQ",
1557 "VCC_NOT_STABLE",
1558 "FH_ERROR",
1559 "NMI_INTERRUPT_HOST",
1560 "NMI_INTERRUPT_ACTION_PT",
1561 "NMI_INTERRUPT_UNKNOWN",
1562 "UCODE_VERSION_MISMATCH",
1563 "HW_ERROR_ABS_LOCK",
1564 "HW_ERROR_CAL_LOCK_FAIL",
1565 "NMI_INTERRUPT_INST_ACTION_PT",
1566 "NMI_INTERRUPT_DATA_ACTION_PT",
1567 "NMI_TRM_HW_ER",
1568 "NMI_INTERRUPT_TRM",
1569 "NMI_INTERRUPT_BREAK_POINT"
1570 "DEBUG_0",
1571 "DEBUG_1",
1572 "DEBUG_2",
1573 "DEBUG_3",
1574 "UNKNOWN"
1575 };
1576
1577 static const char *desc_lookup(int i)
1578 {
1579 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1580
1581 if (i < 0 || i > max)
1582 i = max;
1583
1584 return desc_lookup_text[i];
1585 }
1586
1587 #define ERROR_START_OFFSET (1 * sizeof(u32))
1588 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1589
1590 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1591 {
1592 u32 data2, line;
1593 u32 desc, time, count, base, data1;
1594 u32 blink1, blink2, ilink1, ilink2;
1595
1596 if (priv->ucode_type == UCODE_INIT)
1597 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1598 else
1599 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1600
1601 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1602 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1603 return;
1604 }
1605
1606 count = iwl_read_targ_mem(priv, base);
1607
1608 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1609 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1610 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1611 priv->status, count);
1612 }
1613
1614 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1615 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1616 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1617 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1618 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1619 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1620 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1621 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1622 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1623
1624 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1625 blink1, blink2, ilink1, ilink2);
1626
1627 IWL_ERR(priv, "Desc Time "
1628 "data1 data2 line\n");
1629 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1630 desc_lookup(desc), desc, time, data1, data2, line);
1631 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1632 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1633 ilink1, ilink2);
1634
1635 }
1636
1637 #define EVENT_START_OFFSET (4 * sizeof(u32))
1638
1639 /**
1640 * iwl_print_event_log - Dump error event log to syslog
1641 *
1642 */
1643 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1644 u32 num_events, u32 mode)
1645 {
1646 u32 i;
1647 u32 base; /* SRAM byte address of event log header */
1648 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1649 u32 ptr; /* SRAM byte address of log data */
1650 u32 ev, time, data; /* event log data */
1651
1652 if (num_events == 0)
1653 return;
1654 if (priv->ucode_type == UCODE_INIT)
1655 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1656 else
1657 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1658
1659 if (mode == 0)
1660 event_size = 2 * sizeof(u32);
1661 else
1662 event_size = 3 * sizeof(u32);
1663
1664 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1665
1666 /* "time" is actually "data" for mode 0 (no timestamp).
1667 * place event id # at far right for easier visual parsing. */
1668 for (i = 0; i < num_events; i++) {
1669 ev = iwl_read_targ_mem(priv, ptr);
1670 ptr += sizeof(u32);
1671 time = iwl_read_targ_mem(priv, ptr);
1672 ptr += sizeof(u32);
1673 if (mode == 0) {
1674 /* data, ev */
1675 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1676 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1677 } else {
1678 data = iwl_read_targ_mem(priv, ptr);
1679 ptr += sizeof(u32);
1680 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1681 time, data, ev);
1682 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1683 }
1684 }
1685 }
1686
1687 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1688 {
1689 u32 base; /* SRAM byte address of event log header */
1690 u32 capacity; /* event log capacity in # entries */
1691 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1692 u32 num_wraps; /* # times uCode wrapped to top of log */
1693 u32 next_entry; /* index of next entry to be written by uCode */
1694 u32 size; /* # entries that we'll print */
1695
1696 if (priv->ucode_type == UCODE_INIT)
1697 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1698 else
1699 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1700
1701 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1702 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1703 return;
1704 }
1705
1706 /* event log header */
1707 capacity = iwl_read_targ_mem(priv, base);
1708 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1709 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1710 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1711
1712 size = num_wraps ? capacity : next_entry;
1713
1714 /* bail out if nothing in log */
1715 if (size == 0) {
1716 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1717 return;
1718 }
1719
1720 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1721 size, num_wraps);
1722
1723 /* if uCode has wrapped back to top of log, start at the oldest entry,
1724 * i.e the next one that uCode would fill. */
1725 if (num_wraps)
1726 iwl_print_event_log(priv, next_entry,
1727 capacity - next_entry, mode);
1728 /* (then/else) start at top of log */
1729 iwl_print_event_log(priv, 0, next_entry, mode);
1730
1731 }
1732 #endif
1733
1734 /**
1735 * iwl_alive_start - called after REPLY_ALIVE notification received
1736 * from protocol/runtime uCode (initialization uCode's
1737 * Alive gets handled by iwl_init_alive_start()).
1738 */
1739 static void iwl_alive_start(struct iwl_priv *priv)
1740 {
1741 int ret = 0;
1742
1743 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1744
1745 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1746 /* We had an error bringing up the hardware, so take it
1747 * all the way back down so we can try again */
1748 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1749 goto restart;
1750 }
1751
1752 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1753 * This is a paranoid check, because we would not have gotten the
1754 * "runtime" alive if code weren't properly loaded. */
1755 if (iwl_verify_ucode(priv)) {
1756 /* Runtime instruction load was bad;
1757 * take it all the way back down so we can try again */
1758 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1759 goto restart;
1760 }
1761
1762 iwl_clear_stations_table(priv);
1763 ret = priv->cfg->ops->lib->alive_notify(priv);
1764 if (ret) {
1765 IWL_WARN(priv,
1766 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1767 goto restart;
1768 }
1769
1770 /* After the ALIVE response, we can send host commands to the uCode */
1771 set_bit(STATUS_ALIVE, &priv->status);
1772
1773 if (iwl_is_rfkill(priv))
1774 return;
1775
1776 ieee80211_wake_queues(priv->hw);
1777
1778 priv->active_rate = priv->rates_mask;
1779 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1780
1781 /* Configure Tx antenna selection based on H/W config */
1782 if (priv->cfg->ops->hcmd->set_tx_ant)
1783 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1784
1785 if (iwl_is_associated(priv)) {
1786 struct iwl_rxon_cmd *active_rxon =
1787 (struct iwl_rxon_cmd *)&priv->active_rxon;
1788 /* apply any changes in staging */
1789 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1790 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1791 } else {
1792 /* Initialize our rx_config data */
1793 iwl_connection_init_rx_config(priv, priv->iw_mode);
1794
1795 if (priv->cfg->ops->hcmd->set_rxon_chain)
1796 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1797
1798 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1799 }
1800
1801 /* Configure Bluetooth device coexistence support */
1802 iwl_send_bt_config(priv);
1803
1804 iwl_reset_run_time_calib(priv);
1805
1806 /* Configure the adapter for unassociated operation */
1807 iwlcore_commit_rxon(priv);
1808
1809 /* At this point, the NIC is initialized and operational */
1810 iwl_rf_kill_ct_config(priv);
1811
1812 iwl_leds_init(priv);
1813
1814 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1815 set_bit(STATUS_READY, &priv->status);
1816 wake_up_interruptible(&priv->wait_command_queue);
1817
1818 iwl_power_update_mode(priv, true);
1819
1820 /* reassociate for ADHOC mode */
1821 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1822 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1823 priv->vif);
1824 if (beacon)
1825 iwl_mac_beacon_update(priv->hw, beacon);
1826 }
1827
1828
1829 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1830 iwl_set_mode(priv, priv->iw_mode);
1831
1832 return;
1833
1834 restart:
1835 queue_work(priv->workqueue, &priv->restart);
1836 }
1837
1838 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1839
1840 static void __iwl_down(struct iwl_priv *priv)
1841 {
1842 unsigned long flags;
1843 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1844
1845 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1846
1847 if (!exit_pending)
1848 set_bit(STATUS_EXIT_PENDING, &priv->status);
1849
1850 iwl_clear_stations_table(priv);
1851
1852 /* Unblock any waiting calls */
1853 wake_up_interruptible_all(&priv->wait_command_queue);
1854
1855 /* Wipe out the EXIT_PENDING status bit if we are not actually
1856 * exiting the module */
1857 if (!exit_pending)
1858 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1859
1860 /* stop and reset the on-board processor */
1861 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1862
1863 /* tell the device to stop sending interrupts */
1864 spin_lock_irqsave(&priv->lock, flags);
1865 iwl_disable_interrupts(priv);
1866 spin_unlock_irqrestore(&priv->lock, flags);
1867 iwl_synchronize_irq(priv);
1868
1869 if (priv->mac80211_registered)
1870 ieee80211_stop_queues(priv->hw);
1871
1872 /* If we have not previously called iwl_init() then
1873 * clear all bits but the RF Kill bit and return */
1874 if (!iwl_is_init(priv)) {
1875 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1876 STATUS_RF_KILL_HW |
1877 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1878 STATUS_GEO_CONFIGURED |
1879 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1880 STATUS_EXIT_PENDING;
1881 goto exit;
1882 }
1883
1884 /* ...otherwise clear out all the status bits but the RF Kill
1885 * bit and continue taking the NIC down. */
1886 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1887 STATUS_RF_KILL_HW |
1888 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1889 STATUS_GEO_CONFIGURED |
1890 test_bit(STATUS_FW_ERROR, &priv->status) <<
1891 STATUS_FW_ERROR |
1892 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1893 STATUS_EXIT_PENDING;
1894
1895 /* device going down, Stop using ICT table */
1896 iwl_disable_ict(priv);
1897 spin_lock_irqsave(&priv->lock, flags);
1898 iwl_clear_bit(priv, CSR_GP_CNTRL,
1899 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1900 spin_unlock_irqrestore(&priv->lock, flags);
1901
1902 iwl_txq_ctx_stop(priv);
1903 iwl_rxq_stop(priv);
1904
1905 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1906 APMG_CLK_VAL_DMA_CLK_RQT);
1907
1908 udelay(5);
1909
1910 /* Stop the device, and put it in low power state */
1911 priv->cfg->ops->lib->apm_ops.stop(priv);
1912
1913 exit:
1914 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1915
1916 if (priv->ibss_beacon)
1917 dev_kfree_skb(priv->ibss_beacon);
1918 priv->ibss_beacon = NULL;
1919
1920 /* clear out any free frames */
1921 iwl_clear_free_frames(priv);
1922 }
1923
1924 static void iwl_down(struct iwl_priv *priv)
1925 {
1926 mutex_lock(&priv->mutex);
1927 __iwl_down(priv);
1928 mutex_unlock(&priv->mutex);
1929
1930 iwl_cancel_deferred_work(priv);
1931 }
1932
1933 #define HW_READY_TIMEOUT (50)
1934
1935 static int iwl_set_hw_ready(struct iwl_priv *priv)
1936 {
1937 int ret = 0;
1938
1939 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1940 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1941
1942 /* See if we got it */
1943 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1944 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1945 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1946 HW_READY_TIMEOUT);
1947 if (ret != -ETIMEDOUT)
1948 priv->hw_ready = true;
1949 else
1950 priv->hw_ready = false;
1951
1952 IWL_DEBUG_INFO(priv, "hardware %s\n",
1953 (priv->hw_ready == 1) ? "ready" : "not ready");
1954 return ret;
1955 }
1956
1957 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1958 {
1959 int ret = 0;
1960
1961 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1962
1963 ret = iwl_set_hw_ready(priv);
1964 if (priv->hw_ready)
1965 return ret;
1966
1967 /* If HW is not ready, prepare the conditions to check again */
1968 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1969 CSR_HW_IF_CONFIG_REG_PREPARE);
1970
1971 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1972 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1973 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1974
1975 /* HW should be ready by now, check again. */
1976 if (ret != -ETIMEDOUT)
1977 iwl_set_hw_ready(priv);
1978
1979 return ret;
1980 }
1981
1982 #define MAX_HW_RESTARTS 5
1983
1984 static int __iwl_up(struct iwl_priv *priv)
1985 {
1986 int i;
1987 int ret;
1988
1989 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1990 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1991 return -EIO;
1992 }
1993
1994 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1995 IWL_ERR(priv, "ucode not available for device bringup\n");
1996 return -EIO;
1997 }
1998
1999 iwl_prepare_card_hw(priv);
2000
2001 if (!priv->hw_ready) {
2002 IWL_WARN(priv, "Exit HW not ready\n");
2003 return -EIO;
2004 }
2005
2006 /* If platform's RF_KILL switch is NOT set to KILL */
2007 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2008 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2009 else
2010 set_bit(STATUS_RF_KILL_HW, &priv->status);
2011
2012 if (iwl_is_rfkill(priv)) {
2013 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2014
2015 iwl_enable_interrupts(priv);
2016 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2017 return 0;
2018 }
2019
2020 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2021
2022 ret = iwl_hw_nic_init(priv);
2023 if (ret) {
2024 IWL_ERR(priv, "Unable to init nic\n");
2025 return ret;
2026 }
2027
2028 /* make sure rfkill handshake bits are cleared */
2029 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2030 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2031 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2032
2033 /* clear (again), then enable host interrupts */
2034 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2035 iwl_enable_interrupts(priv);
2036
2037 /* really make sure rfkill handshake bits are cleared */
2038 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2039 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2040
2041 /* Copy original ucode data image from disk into backup cache.
2042 * This will be used to initialize the on-board processor's
2043 * data SRAM for a clean start when the runtime program first loads. */
2044 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2045 priv->ucode_data.len);
2046
2047 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2048
2049 iwl_clear_stations_table(priv);
2050
2051 /* load bootstrap state machine,
2052 * load bootstrap program into processor's memory,
2053 * prepare to load the "initialize" uCode */
2054 ret = priv->cfg->ops->lib->load_ucode(priv);
2055
2056 if (ret) {
2057 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2058 ret);
2059 continue;
2060 }
2061
2062 /* start card; "initialize" will load runtime ucode */
2063 iwl_nic_start(priv);
2064
2065 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2066
2067 return 0;
2068 }
2069
2070 set_bit(STATUS_EXIT_PENDING, &priv->status);
2071 __iwl_down(priv);
2072 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2073
2074 /* tried to restart and config the device for as long as our
2075 * patience could withstand */
2076 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2077 return -EIO;
2078 }
2079
2080
2081 /*****************************************************************************
2082 *
2083 * Workqueue callbacks
2084 *
2085 *****************************************************************************/
2086
2087 static void iwl_bg_init_alive_start(struct work_struct *data)
2088 {
2089 struct iwl_priv *priv =
2090 container_of(data, struct iwl_priv, init_alive_start.work);
2091
2092 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2093 return;
2094
2095 mutex_lock(&priv->mutex);
2096 priv->cfg->ops->lib->init_alive_start(priv);
2097 mutex_unlock(&priv->mutex);
2098 }
2099
2100 static void iwl_bg_alive_start(struct work_struct *data)
2101 {
2102 struct iwl_priv *priv =
2103 container_of(data, struct iwl_priv, alive_start.work);
2104
2105 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2106 return;
2107
2108 /* enable dram interrupt */
2109 iwl_reset_ict(priv);
2110
2111 mutex_lock(&priv->mutex);
2112 iwl_alive_start(priv);
2113 mutex_unlock(&priv->mutex);
2114 }
2115
2116 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2117 {
2118 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2119 run_time_calib_work);
2120
2121 mutex_lock(&priv->mutex);
2122
2123 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2124 test_bit(STATUS_SCANNING, &priv->status)) {
2125 mutex_unlock(&priv->mutex);
2126 return;
2127 }
2128
2129 if (priv->start_calib) {
2130 iwl_chain_noise_calibration(priv, &priv->statistics);
2131
2132 iwl_sensitivity_calibration(priv, &priv->statistics);
2133 }
2134
2135 mutex_unlock(&priv->mutex);
2136 return;
2137 }
2138
2139 static void iwl_bg_up(struct work_struct *data)
2140 {
2141 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2142
2143 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2144 return;
2145
2146 mutex_lock(&priv->mutex);
2147 __iwl_up(priv);
2148 mutex_unlock(&priv->mutex);
2149 }
2150
2151 static void iwl_bg_restart(struct work_struct *data)
2152 {
2153 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2154
2155 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2156 return;
2157
2158 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2159 mutex_lock(&priv->mutex);
2160 priv->vif = NULL;
2161 priv->is_open = 0;
2162 mutex_unlock(&priv->mutex);
2163 iwl_down(priv);
2164 ieee80211_restart_hw(priv->hw);
2165 } else {
2166 iwl_down(priv);
2167 queue_work(priv->workqueue, &priv->up);
2168 }
2169 }
2170
2171 static void iwl_bg_rx_replenish(struct work_struct *data)
2172 {
2173 struct iwl_priv *priv =
2174 container_of(data, struct iwl_priv, rx_replenish);
2175
2176 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2177 return;
2178
2179 mutex_lock(&priv->mutex);
2180 iwl_rx_replenish(priv);
2181 mutex_unlock(&priv->mutex);
2182 }
2183
2184 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2185
2186 void iwl_post_associate(struct iwl_priv *priv)
2187 {
2188 struct ieee80211_conf *conf = NULL;
2189 int ret = 0;
2190 unsigned long flags;
2191
2192 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2193 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2194 return;
2195 }
2196
2197 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2198 priv->assoc_id, priv->active_rxon.bssid_addr);
2199
2200
2201 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2202 return;
2203
2204
2205 if (!priv->vif || !priv->is_open)
2206 return;
2207
2208 iwl_scan_cancel_timeout(priv, 200);
2209
2210 conf = ieee80211_get_hw_conf(priv->hw);
2211
2212 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2213 iwlcore_commit_rxon(priv);
2214
2215 iwl_setup_rxon_timing(priv);
2216 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2217 sizeof(priv->rxon_timing), &priv->rxon_timing);
2218 if (ret)
2219 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2220 "Attempting to continue.\n");
2221
2222 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2223
2224 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2225
2226 if (priv->cfg->ops->hcmd->set_rxon_chain)
2227 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2228
2229 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2230
2231 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2232 priv->assoc_id, priv->beacon_int);
2233
2234 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2235 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2236 else
2237 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2238
2239 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2240 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2241 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2242 else
2243 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2244
2245 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2246 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2247
2248 }
2249
2250 iwlcore_commit_rxon(priv);
2251
2252 switch (priv->iw_mode) {
2253 case NL80211_IFTYPE_STATION:
2254 break;
2255
2256 case NL80211_IFTYPE_ADHOC:
2257
2258 /* assume default assoc id */
2259 priv->assoc_id = 1;
2260
2261 iwl_rxon_add_station(priv, priv->bssid, 0);
2262 iwl_send_beacon_cmd(priv);
2263
2264 break;
2265
2266 default:
2267 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2268 __func__, priv->iw_mode);
2269 break;
2270 }
2271
2272 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2273 priv->assoc_station_added = 1;
2274
2275 spin_lock_irqsave(&priv->lock, flags);
2276 iwl_activate_qos(priv, 0);
2277 spin_unlock_irqrestore(&priv->lock, flags);
2278
2279 /* the chain noise calibration will enabled PM upon completion
2280 * If chain noise has already been run, then we need to enable
2281 * power management here */
2282 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2283 iwl_power_update_mode(priv, false);
2284
2285 /* Enable Rx differential gain and sensitivity calibrations */
2286 iwl_chain_noise_reset(priv);
2287 priv->start_calib = 1;
2288
2289 }
2290
2291 /*****************************************************************************
2292 *
2293 * mac80211 entry point functions
2294 *
2295 *****************************************************************************/
2296
2297 #define UCODE_READY_TIMEOUT (4 * HZ)
2298
2299 /*
2300 * Not a mac80211 entry point function, but it fits in with all the
2301 * other mac80211 functions grouped here.
2302 */
2303 static int iwl_setup_mac(struct iwl_priv *priv)
2304 {
2305 int ret;
2306 struct ieee80211_hw *hw = priv->hw;
2307 hw->rate_control_algorithm = "iwl-agn-rs";
2308
2309 /* Tell mac80211 our characteristics */
2310 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2311 IEEE80211_HW_NOISE_DBM |
2312 IEEE80211_HW_AMPDU_AGGREGATION |
2313 IEEE80211_HW_SPECTRUM_MGMT;
2314
2315 if (!priv->cfg->broken_powersave)
2316 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2317 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2318
2319 hw->sta_data_size = sizeof(struct iwl_station_priv);
2320 hw->wiphy->interface_modes =
2321 BIT(NL80211_IFTYPE_STATION) |
2322 BIT(NL80211_IFTYPE_ADHOC);
2323
2324 hw->wiphy->custom_regulatory = true;
2325
2326 /* Firmware does not support this */
2327 hw->wiphy->disable_beacon_hints = true;
2328
2329 /*
2330 * For now, disable PS by default because it affects
2331 * RX performance significantly.
2332 */
2333 hw->wiphy->ps_default = false;
2334
2335 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2336 /* we create the 802.11 header and a zero-length SSID element */
2337 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2338
2339 /* Default value; 4 EDCA QOS priorities */
2340 hw->queues = 4;
2341
2342 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2343
2344 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2345 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2346 &priv->bands[IEEE80211_BAND_2GHZ];
2347 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2348 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2349 &priv->bands[IEEE80211_BAND_5GHZ];
2350
2351 ret = ieee80211_register_hw(priv->hw);
2352 if (ret) {
2353 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2354 return ret;
2355 }
2356 priv->mac80211_registered = 1;
2357
2358 return 0;
2359 }
2360
2361
2362 static int iwl_mac_start(struct ieee80211_hw *hw)
2363 {
2364 struct iwl_priv *priv = hw->priv;
2365 int ret;
2366
2367 IWL_DEBUG_MAC80211(priv, "enter\n");
2368
2369 /* we should be verifying the device is ready to be opened */
2370 mutex_lock(&priv->mutex);
2371
2372 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2373 * ucode filename and max sizes are card-specific. */
2374
2375 if (!priv->ucode_code.len) {
2376 ret = iwl_read_ucode(priv);
2377 if (ret) {
2378 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2379 mutex_unlock(&priv->mutex);
2380 return ret;
2381 }
2382 }
2383
2384 ret = __iwl_up(priv);
2385
2386 mutex_unlock(&priv->mutex);
2387
2388 if (ret)
2389 return ret;
2390
2391 if (iwl_is_rfkill(priv))
2392 goto out;
2393
2394 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2395
2396 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2397 * mac80211 will not be run successfully. */
2398 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2399 test_bit(STATUS_READY, &priv->status),
2400 UCODE_READY_TIMEOUT);
2401 if (!ret) {
2402 if (!test_bit(STATUS_READY, &priv->status)) {
2403 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2404 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2405 return -ETIMEDOUT;
2406 }
2407 }
2408
2409 iwl_led_start(priv);
2410
2411 out:
2412 priv->is_open = 1;
2413 IWL_DEBUG_MAC80211(priv, "leave\n");
2414 return 0;
2415 }
2416
2417 static void iwl_mac_stop(struct ieee80211_hw *hw)
2418 {
2419 struct iwl_priv *priv = hw->priv;
2420
2421 IWL_DEBUG_MAC80211(priv, "enter\n");
2422
2423 if (!priv->is_open)
2424 return;
2425
2426 priv->is_open = 0;
2427
2428 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2429 /* stop mac, cancel any scan request and clear
2430 * RXON_FILTER_ASSOC_MSK BIT
2431 */
2432 mutex_lock(&priv->mutex);
2433 iwl_scan_cancel_timeout(priv, 100);
2434 mutex_unlock(&priv->mutex);
2435 }
2436
2437 iwl_down(priv);
2438
2439 flush_workqueue(priv->workqueue);
2440
2441 /* enable interrupts again in order to receive rfkill changes */
2442 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2443 iwl_enable_interrupts(priv);
2444
2445 IWL_DEBUG_MAC80211(priv, "leave\n");
2446 }
2447
2448 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2449 {
2450 struct iwl_priv *priv = hw->priv;
2451
2452 IWL_DEBUG_MACDUMP(priv, "enter\n");
2453
2454 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2455 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2456
2457 if (iwl_tx_skb(priv, skb))
2458 dev_kfree_skb_any(skb);
2459
2460 IWL_DEBUG_MACDUMP(priv, "leave\n");
2461 return NETDEV_TX_OK;
2462 }
2463
2464 void iwl_config_ap(struct iwl_priv *priv)
2465 {
2466 int ret = 0;
2467 unsigned long flags;
2468
2469 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2470 return;
2471
2472 /* The following should be done only at AP bring up */
2473 if (!iwl_is_associated(priv)) {
2474
2475 /* RXON - unassoc (to set timing command) */
2476 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2477 iwlcore_commit_rxon(priv);
2478
2479 /* RXON Timing */
2480 iwl_setup_rxon_timing(priv);
2481 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2482 sizeof(priv->rxon_timing), &priv->rxon_timing);
2483 if (ret)
2484 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2485 "Attempting to continue.\n");
2486
2487 if (priv->cfg->ops->hcmd->set_rxon_chain)
2488 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2489
2490 /* FIXME: what should be the assoc_id for AP? */
2491 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2492 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2493 priv->staging_rxon.flags |=
2494 RXON_FLG_SHORT_PREAMBLE_MSK;
2495 else
2496 priv->staging_rxon.flags &=
2497 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2498
2499 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2500 if (priv->assoc_capability &
2501 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2502 priv->staging_rxon.flags |=
2503 RXON_FLG_SHORT_SLOT_MSK;
2504 else
2505 priv->staging_rxon.flags &=
2506 ~RXON_FLG_SHORT_SLOT_MSK;
2507
2508 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2509 priv->staging_rxon.flags &=
2510 ~RXON_FLG_SHORT_SLOT_MSK;
2511 }
2512 /* restore RXON assoc */
2513 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2514 iwlcore_commit_rxon(priv);
2515 spin_lock_irqsave(&priv->lock, flags);
2516 iwl_activate_qos(priv, 1);
2517 spin_unlock_irqrestore(&priv->lock, flags);
2518 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2519 }
2520 iwl_send_beacon_cmd(priv);
2521
2522 /* FIXME - we need to add code here to detect a totally new
2523 * configuration, reset the AP, unassoc, rxon timing, assoc,
2524 * clear sta table, add BCAST sta... */
2525 }
2526
2527 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2528 struct ieee80211_key_conf *keyconf, const u8 *addr,
2529 u32 iv32, u16 *phase1key)
2530 {
2531
2532 struct iwl_priv *priv = hw->priv;
2533 IWL_DEBUG_MAC80211(priv, "enter\n");
2534
2535 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2536
2537 IWL_DEBUG_MAC80211(priv, "leave\n");
2538 }
2539
2540 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2541 struct ieee80211_vif *vif,
2542 struct ieee80211_sta *sta,
2543 struct ieee80211_key_conf *key)
2544 {
2545 struct iwl_priv *priv = hw->priv;
2546 const u8 *addr;
2547 int ret;
2548 u8 sta_id;
2549 bool is_default_wep_key = false;
2550
2551 IWL_DEBUG_MAC80211(priv, "enter\n");
2552
2553 if (priv->cfg->mod_params->sw_crypto) {
2554 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2555 return -EOPNOTSUPP;
2556 }
2557 addr = sta ? sta->addr : iwl_bcast_addr;
2558 sta_id = iwl_find_station(priv, addr);
2559 if (sta_id == IWL_INVALID_STATION) {
2560 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2561 addr);
2562 return -EINVAL;
2563
2564 }
2565
2566 mutex_lock(&priv->mutex);
2567 iwl_scan_cancel_timeout(priv, 100);
2568 mutex_unlock(&priv->mutex);
2569
2570 /* If we are getting WEP group key and we didn't receive any key mapping
2571 * so far, we are in legacy wep mode (group key only), otherwise we are
2572 * in 1X mode.
2573 * In legacy wep mode, we use another host command to the uCode */
2574 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2575 priv->iw_mode != NL80211_IFTYPE_AP) {
2576 if (cmd == SET_KEY)
2577 is_default_wep_key = !priv->key_mapping_key;
2578 else
2579 is_default_wep_key =
2580 (key->hw_key_idx == HW_KEY_DEFAULT);
2581 }
2582
2583 switch (cmd) {
2584 case SET_KEY:
2585 if (is_default_wep_key)
2586 ret = iwl_set_default_wep_key(priv, key);
2587 else
2588 ret = iwl_set_dynamic_key(priv, key, sta_id);
2589
2590 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2591 break;
2592 case DISABLE_KEY:
2593 if (is_default_wep_key)
2594 ret = iwl_remove_default_wep_key(priv, key);
2595 else
2596 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2597
2598 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2599 break;
2600 default:
2601 ret = -EINVAL;
2602 }
2603
2604 IWL_DEBUG_MAC80211(priv, "leave\n");
2605
2606 return ret;
2607 }
2608
2609 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2610 enum ieee80211_ampdu_mlme_action action,
2611 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2612 {
2613 struct iwl_priv *priv = hw->priv;
2614 int ret;
2615
2616 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2617 sta->addr, tid);
2618
2619 if (!(priv->cfg->sku & IWL_SKU_N))
2620 return -EACCES;
2621
2622 switch (action) {
2623 case IEEE80211_AMPDU_RX_START:
2624 IWL_DEBUG_HT(priv, "start Rx\n");
2625 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2626 case IEEE80211_AMPDU_RX_STOP:
2627 IWL_DEBUG_HT(priv, "stop Rx\n");
2628 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2629 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2630 return 0;
2631 else
2632 return ret;
2633 case IEEE80211_AMPDU_TX_START:
2634 IWL_DEBUG_HT(priv, "start Tx\n");
2635 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2636 case IEEE80211_AMPDU_TX_STOP:
2637 IWL_DEBUG_HT(priv, "stop Tx\n");
2638 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2639 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2640 return 0;
2641 else
2642 return ret;
2643 default:
2644 IWL_DEBUG_HT(priv, "unknown\n");
2645 return -EINVAL;
2646 break;
2647 }
2648 return 0;
2649 }
2650
2651 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2652 struct ieee80211_low_level_stats *stats)
2653 {
2654 struct iwl_priv *priv = hw->priv;
2655
2656 priv = hw->priv;
2657 IWL_DEBUG_MAC80211(priv, "enter\n");
2658 IWL_DEBUG_MAC80211(priv, "leave\n");
2659
2660 return 0;
2661 }
2662
2663 /*****************************************************************************
2664 *
2665 * sysfs attributes
2666 *
2667 *****************************************************************************/
2668
2669 #ifdef CONFIG_IWLWIFI_DEBUG
2670
2671 /*
2672 * The following adds a new attribute to the sysfs representation
2673 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2674 * used for controlling the debug level.
2675 *
2676 * See the level definitions in iwl for details.
2677 *
2678 * The debug_level being managed using sysfs below is a per device debug
2679 * level that is used instead of the global debug level if it (the per
2680 * device debug level) is set.
2681 */
2682 static ssize_t show_debug_level(struct device *d,
2683 struct device_attribute *attr, char *buf)
2684 {
2685 struct iwl_priv *priv = dev_get_drvdata(d);
2686 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2687 }
2688 static ssize_t store_debug_level(struct device *d,
2689 struct device_attribute *attr,
2690 const char *buf, size_t count)
2691 {
2692 struct iwl_priv *priv = dev_get_drvdata(d);
2693 unsigned long val;
2694 int ret;
2695
2696 ret = strict_strtoul(buf, 0, &val);
2697 if (ret)
2698 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2699 else {
2700 priv->debug_level = val;
2701 if (iwl_alloc_traffic_mem(priv))
2702 IWL_ERR(priv,
2703 "Not enough memory to generate traffic log\n");
2704 }
2705 return strnlen(buf, count);
2706 }
2707
2708 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2709 show_debug_level, store_debug_level);
2710
2711
2712 #endif /* CONFIG_IWLWIFI_DEBUG */
2713
2714
2715 static ssize_t show_temperature(struct device *d,
2716 struct device_attribute *attr, char *buf)
2717 {
2718 struct iwl_priv *priv = dev_get_drvdata(d);
2719
2720 if (!iwl_is_alive(priv))
2721 return -EAGAIN;
2722
2723 return sprintf(buf, "%d\n", priv->temperature);
2724 }
2725
2726 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2727
2728 static ssize_t show_tx_power(struct device *d,
2729 struct device_attribute *attr, char *buf)
2730 {
2731 struct iwl_priv *priv = dev_get_drvdata(d);
2732
2733 if (!iwl_is_ready_rf(priv))
2734 return sprintf(buf, "off\n");
2735 else
2736 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2737 }
2738
2739 static ssize_t store_tx_power(struct device *d,
2740 struct device_attribute *attr,
2741 const char *buf, size_t count)
2742 {
2743 struct iwl_priv *priv = dev_get_drvdata(d);
2744 unsigned long val;
2745 int ret;
2746
2747 ret = strict_strtoul(buf, 10, &val);
2748 if (ret)
2749 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2750 else {
2751 ret = iwl_set_tx_power(priv, val, false);
2752 if (ret)
2753 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2754 ret);
2755 else
2756 ret = count;
2757 }
2758 return ret;
2759 }
2760
2761 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2762
2763 static ssize_t show_flags(struct device *d,
2764 struct device_attribute *attr, char *buf)
2765 {
2766 struct iwl_priv *priv = dev_get_drvdata(d);
2767
2768 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2769 }
2770
2771 static ssize_t store_flags(struct device *d,
2772 struct device_attribute *attr,
2773 const char *buf, size_t count)
2774 {
2775 struct iwl_priv *priv = dev_get_drvdata(d);
2776 unsigned long val;
2777 u32 flags;
2778 int ret = strict_strtoul(buf, 0, &val);
2779 if (ret)
2780 return ret;
2781 flags = (u32)val;
2782
2783 mutex_lock(&priv->mutex);
2784 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2785 /* Cancel any currently running scans... */
2786 if (iwl_scan_cancel_timeout(priv, 100))
2787 IWL_WARN(priv, "Could not cancel scan.\n");
2788 else {
2789 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2790 priv->staging_rxon.flags = cpu_to_le32(flags);
2791 iwlcore_commit_rxon(priv);
2792 }
2793 }
2794 mutex_unlock(&priv->mutex);
2795
2796 return count;
2797 }
2798
2799 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2800
2801 static ssize_t show_filter_flags(struct device *d,
2802 struct device_attribute *attr, char *buf)
2803 {
2804 struct iwl_priv *priv = dev_get_drvdata(d);
2805
2806 return sprintf(buf, "0x%04X\n",
2807 le32_to_cpu(priv->active_rxon.filter_flags));
2808 }
2809
2810 static ssize_t store_filter_flags(struct device *d,
2811 struct device_attribute *attr,
2812 const char *buf, size_t count)
2813 {
2814 struct iwl_priv *priv = dev_get_drvdata(d);
2815 unsigned long val;
2816 u32 filter_flags;
2817 int ret = strict_strtoul(buf, 0, &val);
2818 if (ret)
2819 return ret;
2820 filter_flags = (u32)val;
2821
2822 mutex_lock(&priv->mutex);
2823 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2824 /* Cancel any currently running scans... */
2825 if (iwl_scan_cancel_timeout(priv, 100))
2826 IWL_WARN(priv, "Could not cancel scan.\n");
2827 else {
2828 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2829 "0x%04X\n", filter_flags);
2830 priv->staging_rxon.filter_flags =
2831 cpu_to_le32(filter_flags);
2832 iwlcore_commit_rxon(priv);
2833 }
2834 }
2835 mutex_unlock(&priv->mutex);
2836
2837 return count;
2838 }
2839
2840 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2841 store_filter_flags);
2842
2843
2844 static ssize_t show_statistics(struct device *d,
2845 struct device_attribute *attr, char *buf)
2846 {
2847 struct iwl_priv *priv = dev_get_drvdata(d);
2848 u32 size = sizeof(struct iwl_notif_statistics);
2849 u32 len = 0, ofs = 0;
2850 u8 *data = (u8 *)&priv->statistics;
2851 int rc = 0;
2852
2853 if (!iwl_is_alive(priv))
2854 return -EAGAIN;
2855
2856 mutex_lock(&priv->mutex);
2857 rc = iwl_send_statistics_request(priv, 0);
2858 mutex_unlock(&priv->mutex);
2859
2860 if (rc) {
2861 len = sprintf(buf,
2862 "Error sending statistics request: 0x%08X\n", rc);
2863 return len;
2864 }
2865
2866 while (size && (PAGE_SIZE - len)) {
2867 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2868 PAGE_SIZE - len, 1);
2869 len = strlen(buf);
2870 if (PAGE_SIZE - len)
2871 buf[len++] = '\n';
2872
2873 ofs += 16;
2874 size -= min(size, 16U);
2875 }
2876
2877 return len;
2878 }
2879
2880 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2881
2882 static ssize_t show_rts_ht_protection(struct device *d,
2883 struct device_attribute *attr, char *buf)
2884 {
2885 struct iwl_priv *priv = dev_get_drvdata(d);
2886
2887 return sprintf(buf, "%s\n",
2888 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2889 }
2890
2891 static ssize_t store_rts_ht_protection(struct device *d,
2892 struct device_attribute *attr,
2893 const char *buf, size_t count)
2894 {
2895 struct iwl_priv *priv = dev_get_drvdata(d);
2896 unsigned long val;
2897 int ret;
2898
2899 ret = strict_strtoul(buf, 10, &val);
2900 if (ret)
2901 IWL_INFO(priv, "Input is not in decimal form.\n");
2902 else {
2903 if (!iwl_is_associated(priv))
2904 priv->cfg->use_rts_for_ht = val ? true : false;
2905 else
2906 IWL_ERR(priv, "Sta associated with AP - "
2907 "Change protection mechanism is not allowed\n");
2908 ret = count;
2909 }
2910 return ret;
2911 }
2912
2913 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2914 show_rts_ht_protection, store_rts_ht_protection);
2915
2916
2917 /*****************************************************************************
2918 *
2919 * driver setup and teardown
2920 *
2921 *****************************************************************************/
2922
2923 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2924 {
2925 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2926
2927 init_waitqueue_head(&priv->wait_command_queue);
2928
2929 INIT_WORK(&priv->up, iwl_bg_up);
2930 INIT_WORK(&priv->restart, iwl_bg_restart);
2931 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2932 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2933 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2934 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2935 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2936
2937 iwl_setup_scan_deferred_work(priv);
2938
2939 if (priv->cfg->ops->lib->setup_deferred_work)
2940 priv->cfg->ops->lib->setup_deferred_work(priv);
2941
2942 init_timer(&priv->statistics_periodic);
2943 priv->statistics_periodic.data = (unsigned long)priv;
2944 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2945
2946 if (!priv->cfg->use_isr_legacy)
2947 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2948 iwl_irq_tasklet, (unsigned long)priv);
2949 else
2950 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2951 iwl_irq_tasklet_legacy, (unsigned long)priv);
2952 }
2953
2954 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2955 {
2956 if (priv->cfg->ops->lib->cancel_deferred_work)
2957 priv->cfg->ops->lib->cancel_deferred_work(priv);
2958
2959 cancel_delayed_work_sync(&priv->init_alive_start);
2960 cancel_delayed_work(&priv->scan_check);
2961 cancel_delayed_work(&priv->alive_start);
2962 cancel_work_sync(&priv->beacon_update);
2963 del_timer_sync(&priv->statistics_periodic);
2964 }
2965
2966 static struct attribute *iwl_sysfs_entries[] = {
2967 &dev_attr_flags.attr,
2968 &dev_attr_filter_flags.attr,
2969 &dev_attr_statistics.attr,
2970 &dev_attr_temperature.attr,
2971 &dev_attr_tx_power.attr,
2972 &dev_attr_rts_ht_protection.attr,
2973 #ifdef CONFIG_IWLWIFI_DEBUG
2974 &dev_attr_debug_level.attr,
2975 #endif
2976 NULL
2977 };
2978
2979 static struct attribute_group iwl_attribute_group = {
2980 .name = NULL, /* put in device directory */
2981 .attrs = iwl_sysfs_entries,
2982 };
2983
2984 static struct ieee80211_ops iwl_hw_ops = {
2985 .tx = iwl_mac_tx,
2986 .start = iwl_mac_start,
2987 .stop = iwl_mac_stop,
2988 .add_interface = iwl_mac_add_interface,
2989 .remove_interface = iwl_mac_remove_interface,
2990 .config = iwl_mac_config,
2991 .configure_filter = iwl_configure_filter,
2992 .set_key = iwl_mac_set_key,
2993 .update_tkip_key = iwl_mac_update_tkip_key,
2994 .get_stats = iwl_mac_get_stats,
2995 .get_tx_stats = iwl_mac_get_tx_stats,
2996 .conf_tx = iwl_mac_conf_tx,
2997 .reset_tsf = iwl_mac_reset_tsf,
2998 .bss_info_changed = iwl_bss_info_changed,
2999 .ampdu_action = iwl_mac_ampdu_action,
3000 .hw_scan = iwl_mac_hw_scan
3001 };
3002
3003 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3004 {
3005 int err = 0;
3006 struct iwl_priv *priv;
3007 struct ieee80211_hw *hw;
3008 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3009 unsigned long flags;
3010 u16 pci_cmd;
3011
3012 /************************
3013 * 1. Allocating HW data
3014 ************************/
3015
3016 /* Disabling hardware scan means that mac80211 will perform scans
3017 * "the hard way", rather than using device's scan. */
3018 if (cfg->mod_params->disable_hw_scan) {
3019 if (iwl_debug_level & IWL_DL_INFO)
3020 dev_printk(KERN_DEBUG, &(pdev->dev),
3021 "Disabling hw_scan\n");
3022 iwl_hw_ops.hw_scan = NULL;
3023 }
3024
3025 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3026 if (!hw) {
3027 err = -ENOMEM;
3028 goto out;
3029 }
3030 priv = hw->priv;
3031 /* At this point both hw and priv are allocated. */
3032
3033 SET_IEEE80211_DEV(hw, &pdev->dev);
3034
3035 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3036 priv->cfg = cfg;
3037 priv->pci_dev = pdev;
3038 priv->inta_mask = CSR_INI_SET_MASK;
3039
3040 #ifdef CONFIG_IWLWIFI_DEBUG
3041 atomic_set(&priv->restrict_refcnt, 0);
3042 #endif
3043 if (iwl_alloc_traffic_mem(priv))
3044 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3045
3046 /**************************
3047 * 2. Initializing PCI bus
3048 **************************/
3049 if (pci_enable_device(pdev)) {
3050 err = -ENODEV;
3051 goto out_ieee80211_free_hw;
3052 }
3053
3054 pci_set_master(pdev);
3055
3056 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3057 if (!err)
3058 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3059 if (err) {
3060 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3061 if (!err)
3062 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3063 /* both attempts failed: */
3064 if (err) {
3065 IWL_WARN(priv, "No suitable DMA available.\n");
3066 goto out_pci_disable_device;
3067 }
3068 }
3069
3070 err = pci_request_regions(pdev, DRV_NAME);
3071 if (err)
3072 goto out_pci_disable_device;
3073
3074 pci_set_drvdata(pdev, priv);
3075
3076
3077 /***********************
3078 * 3. Read REV register
3079 ***********************/
3080 priv->hw_base = pci_iomap(pdev, 0, 0);
3081 if (!priv->hw_base) {
3082 err = -ENODEV;
3083 goto out_pci_release_regions;
3084 }
3085
3086 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3087 (unsigned long long) pci_resource_len(pdev, 0));
3088 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3089
3090 /* this spin lock will be used in apm_ops.init and EEPROM access
3091 * we should init now
3092 */
3093 spin_lock_init(&priv->reg_lock);
3094 iwl_hw_detect(priv);
3095 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3096 priv->cfg->name, priv->hw_rev);
3097
3098 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3099 * PCI Tx retries from interfering with C3 CPU state */
3100 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3101
3102 iwl_prepare_card_hw(priv);
3103 if (!priv->hw_ready) {
3104 IWL_WARN(priv, "Failed, HW not ready\n");
3105 goto out_iounmap;
3106 }
3107
3108 /* amp init */
3109 err = priv->cfg->ops->lib->apm_ops.init(priv);
3110 if (err < 0) {
3111 IWL_ERR(priv, "Failed to init APMG\n");
3112 goto out_iounmap;
3113 }
3114 /*****************
3115 * 4. Read EEPROM
3116 *****************/
3117 /* Read the EEPROM */
3118 err = iwl_eeprom_init(priv);
3119 if (err) {
3120 IWL_ERR(priv, "Unable to init EEPROM\n");
3121 goto out_iounmap;
3122 }
3123 err = iwl_eeprom_check_version(priv);
3124 if (err)
3125 goto out_free_eeprom;
3126
3127 /* extract MAC Address */
3128 iwl_eeprom_get_mac(priv, priv->mac_addr);
3129 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3130 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3131
3132 /************************
3133 * 5. Setup HW constants
3134 ************************/
3135 if (iwl_set_hw_params(priv)) {
3136 IWL_ERR(priv, "failed to set hw parameters\n");
3137 goto out_free_eeprom;
3138 }
3139
3140 /*******************
3141 * 6. Setup priv
3142 *******************/
3143
3144 err = iwl_init_drv(priv);
3145 if (err)
3146 goto out_free_eeprom;
3147 /* At this point both hw and priv are initialized. */
3148
3149 /********************
3150 * 7. Setup services
3151 ********************/
3152 spin_lock_irqsave(&priv->lock, flags);
3153 iwl_disable_interrupts(priv);
3154 spin_unlock_irqrestore(&priv->lock, flags);
3155
3156 pci_enable_msi(priv->pci_dev);
3157
3158 iwl_alloc_isr_ict(priv);
3159 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3160 IRQF_SHARED, DRV_NAME, priv);
3161 if (err) {
3162 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3163 goto out_disable_msi;
3164 }
3165 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3166 if (err) {
3167 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3168 goto out_free_irq;
3169 }
3170
3171 iwl_setup_deferred_work(priv);
3172 iwl_setup_rx_handlers(priv);
3173
3174 /**********************************
3175 * 8. Setup and register mac80211
3176 **********************************/
3177
3178 /* enable interrupts if needed: hw bug w/a */
3179 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3180 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3181 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3182 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3183 }
3184
3185 iwl_enable_interrupts(priv);
3186
3187 err = iwl_setup_mac(priv);
3188 if (err)
3189 goto out_remove_sysfs;
3190
3191 err = iwl_dbgfs_register(priv, DRV_NAME);
3192 if (err)
3193 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3194
3195 /* If platform's RF_KILL switch is NOT set to KILL */
3196 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3197 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3198 else
3199 set_bit(STATUS_RF_KILL_HW, &priv->status);
3200
3201 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3202 test_bit(STATUS_RF_KILL_HW, &priv->status));
3203
3204 iwl_power_initialize(priv);
3205 iwl_tt_initialize(priv);
3206 return 0;
3207
3208 out_remove_sysfs:
3209 destroy_workqueue(priv->workqueue);
3210 priv->workqueue = NULL;
3211 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3212 out_free_irq:
3213 free_irq(priv->pci_dev->irq, priv);
3214 iwl_free_isr_ict(priv);
3215 out_disable_msi:
3216 pci_disable_msi(priv->pci_dev);
3217 iwl_uninit_drv(priv);
3218 out_free_eeprom:
3219 iwl_eeprom_free(priv);
3220 out_iounmap:
3221 pci_iounmap(pdev, priv->hw_base);
3222 out_pci_release_regions:
3223 pci_set_drvdata(pdev, NULL);
3224 pci_release_regions(pdev);
3225 out_pci_disable_device:
3226 pci_disable_device(pdev);
3227 out_ieee80211_free_hw:
3228 iwl_free_traffic_mem(priv);
3229 ieee80211_free_hw(priv->hw);
3230 out:
3231 return err;
3232 }
3233
3234 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3235 {
3236 struct iwl_priv *priv = pci_get_drvdata(pdev);
3237 unsigned long flags;
3238
3239 if (!priv)
3240 return;
3241
3242 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3243
3244 iwl_dbgfs_unregister(priv);
3245 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3246
3247 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3248 * to be called and iwl_down since we are removing the device
3249 * we need to set STATUS_EXIT_PENDING bit.
3250 */
3251 set_bit(STATUS_EXIT_PENDING, &priv->status);
3252 if (priv->mac80211_registered) {
3253 ieee80211_unregister_hw(priv->hw);
3254 priv->mac80211_registered = 0;
3255 } else {
3256 iwl_down(priv);
3257 }
3258
3259 iwl_tt_exit(priv);
3260
3261 /* make sure we flush any pending irq or
3262 * tasklet for the driver
3263 */
3264 spin_lock_irqsave(&priv->lock, flags);
3265 iwl_disable_interrupts(priv);
3266 spin_unlock_irqrestore(&priv->lock, flags);
3267
3268 iwl_synchronize_irq(priv);
3269
3270 iwl_dealloc_ucode_pci(priv);
3271
3272 if (priv->rxq.bd)
3273 iwl_rx_queue_free(priv, &priv->rxq);
3274 iwl_hw_txq_ctx_free(priv);
3275
3276 iwl_clear_stations_table(priv);
3277 iwl_eeprom_free(priv);
3278
3279
3280 /*netif_stop_queue(dev); */
3281 flush_workqueue(priv->workqueue);
3282
3283 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3284 * priv->workqueue... so we can't take down the workqueue
3285 * until now... */
3286 destroy_workqueue(priv->workqueue);
3287 priv->workqueue = NULL;
3288 iwl_free_traffic_mem(priv);
3289
3290 free_irq(priv->pci_dev->irq, priv);
3291 pci_disable_msi(priv->pci_dev);
3292 pci_iounmap(pdev, priv->hw_base);
3293 pci_release_regions(pdev);
3294 pci_disable_device(pdev);
3295 pci_set_drvdata(pdev, NULL);
3296
3297 iwl_uninit_drv(priv);
3298
3299 iwl_free_isr_ict(priv);
3300
3301 if (priv->ibss_beacon)
3302 dev_kfree_skb(priv->ibss_beacon);
3303
3304 ieee80211_free_hw(priv->hw);
3305 }
3306
3307
3308 /*****************************************************************************
3309 *
3310 * driver and module entry point
3311 *
3312 *****************************************************************************/
3313
3314 /* Hardware specific file defines the PCI IDs table for that hardware module */
3315 static struct pci_device_id iwl_hw_card_ids[] = {
3316 #ifdef CONFIG_IWL4965
3317 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3318 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3319 #endif /* CONFIG_IWL4965 */
3320 #ifdef CONFIG_IWL5000
3321 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3322 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3323 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3324 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3325 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3326 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3327 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3328 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3329 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3330 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3331 /* 5350 WiFi/WiMax */
3332 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3333 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3334 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3335 /* 5150 Wifi/WiMax */
3336 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3337 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3338
3339 /* 6x00 Series */
3340 {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3341 {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3342 {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3343 {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3344 {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3345 {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3346 {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3347
3348 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3349 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3350 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3351 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3352 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3353 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3354 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3355 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3356 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3357 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3358
3359 /* 6x50 WiFi/WiMax Series */
3360 {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3361 {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3362 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3363 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3364 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3365 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3366 {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3367 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3368 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3369
3370 /* 1000 Series WiFi */
3371 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3372 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3373 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3374 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3375 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3376 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3377 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3378 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3379 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3380 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3381 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3382 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3383 #endif /* CONFIG_IWL5000 */
3384
3385 {0}
3386 };
3387 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3388
3389 static struct pci_driver iwl_driver = {
3390 .name = DRV_NAME,
3391 .id_table = iwl_hw_card_ids,
3392 .probe = iwl_pci_probe,
3393 .remove = __devexit_p(iwl_pci_remove),
3394 #ifdef CONFIG_PM
3395 .suspend = iwl_pci_suspend,
3396 .resume = iwl_pci_resume,
3397 #endif
3398 };
3399
3400 static int __init iwl_init(void)
3401 {
3402
3403 int ret;
3404 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3405 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3406
3407 ret = iwlagn_rate_control_register();
3408 if (ret) {
3409 printk(KERN_ERR DRV_NAME
3410 "Unable to register rate control algorithm: %d\n", ret);
3411 return ret;
3412 }
3413
3414 ret = pci_register_driver(&iwl_driver);
3415 if (ret) {
3416 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3417 goto error_register;
3418 }
3419
3420 return ret;
3421
3422 error_register:
3423 iwlagn_rate_control_unregister();
3424 return ret;
3425 }
3426
3427 static void __exit iwl_exit(void)
3428 {
3429 pci_unregister_driver(&iwl_driver);
3430 iwlagn_rate_control_unregister();
3431 }
3432
3433 module_exit(iwl_exit);
3434 module_init(iwl_init);
3435
3436 #ifdef CONFIG_IWLWIFI_DEBUG
3437 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3438 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3439 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3440 MODULE_PARM_DESC(debug, "debug output mask");
3441 #endif
3442
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree