powerpc: Print 32 bits of DSISR in show_regs
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / powerpc / kernel / process.c
blob7a1d5cb76932312f7e15609fe5f84c077696eda3
1 /*
2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/mm.h>
21 #include <linux/smp.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/elf.h>
28 #include <linux/init.h>
29 #include <linux/prctl.h>
30 #include <linux/init_task.h>
31 #include <linux/module.h>
32 #include <linux/kallsyms.h>
33 #include <linux/mqueue.h>
34 #include <linux/hardirq.h>
35 #include <linux/utsname.h>
36 #include <linux/ftrace.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/personality.h>
39 #include <linux/random.h>
40 #include <linux/hw_breakpoint.h>
42 #include <asm/pgtable.h>
43 #include <asm/uaccess.h>
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/processor.h>
47 #include <asm/mmu.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/time.h>
51 #include <asm/syscalls.h>
52 #ifdef CONFIG_PPC64
53 #include <asm/firmware.h>
54 #endif
55 #include <linux/kprobes.h>
56 #include <linux/kdebug.h>
58 extern unsigned long _get_SP(void);
60 #ifndef CONFIG_SMP
61 struct task_struct *last_task_used_math = NULL;
62 struct task_struct *last_task_used_altivec = NULL;
63 struct task_struct *last_task_used_vsx = NULL;
64 struct task_struct *last_task_used_spe = NULL;
65 #endif
68 * Make sure the floating-point register state in the
69 * the thread_struct is up to date for task tsk.
71 void flush_fp_to_thread(struct task_struct *tsk)
73 if (tsk->thread.regs) {
75 * We need to disable preemption here because if we didn't,
76 * another process could get scheduled after the regs->msr
77 * test but before we have finished saving the FP registers
78 * to the thread_struct. That process could take over the
79 * FPU, and then when we get scheduled again we would store
80 * bogus values for the remaining FP registers.
82 preempt_disable();
83 if (tsk->thread.regs->msr & MSR_FP) {
84 #ifdef CONFIG_SMP
86 * This should only ever be called for current or
87 * for a stopped child process. Since we save away
88 * the FP register state on context switch on SMP,
89 * there is something wrong if a stopped child appears
90 * to still have its FP state in the CPU registers.
92 BUG_ON(tsk != current);
93 #endif
94 giveup_fpu(tsk);
96 preempt_enable();
100 void enable_kernel_fp(void)
102 WARN_ON(preemptible());
104 #ifdef CONFIG_SMP
105 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
106 giveup_fpu(current);
107 else
108 giveup_fpu(NULL); /* just enables FP for kernel */
109 #else
110 giveup_fpu(last_task_used_math);
111 #endif /* CONFIG_SMP */
113 EXPORT_SYMBOL(enable_kernel_fp);
115 #ifdef CONFIG_ALTIVEC
116 void enable_kernel_altivec(void)
118 WARN_ON(preemptible());
120 #ifdef CONFIG_SMP
121 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
122 giveup_altivec(current);
123 else
124 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
125 #else
126 giveup_altivec(last_task_used_altivec);
127 #endif /* CONFIG_SMP */
129 EXPORT_SYMBOL(enable_kernel_altivec);
132 * Make sure the VMX/Altivec register state in the
133 * the thread_struct is up to date for task tsk.
135 void flush_altivec_to_thread(struct task_struct *tsk)
137 if (tsk->thread.regs) {
138 preempt_disable();
139 if (tsk->thread.regs->msr & MSR_VEC) {
140 #ifdef CONFIG_SMP
141 BUG_ON(tsk != current);
142 #endif
143 giveup_altivec(tsk);
145 preempt_enable();
148 #endif /* CONFIG_ALTIVEC */
150 #ifdef CONFIG_VSX
151 #if 0
152 /* not currently used, but some crazy RAID module might want to later */
153 void enable_kernel_vsx(void)
155 WARN_ON(preemptible());
157 #ifdef CONFIG_SMP
158 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
159 giveup_vsx(current);
160 else
161 giveup_vsx(NULL); /* just enable vsx for kernel - force */
162 #else
163 giveup_vsx(last_task_used_vsx);
164 #endif /* CONFIG_SMP */
166 EXPORT_SYMBOL(enable_kernel_vsx);
167 #endif
169 void giveup_vsx(struct task_struct *tsk)
171 giveup_fpu(tsk);
172 giveup_altivec(tsk);
173 __giveup_vsx(tsk);
176 void flush_vsx_to_thread(struct task_struct *tsk)
178 if (tsk->thread.regs) {
179 preempt_disable();
180 if (tsk->thread.regs->msr & MSR_VSX) {
181 #ifdef CONFIG_SMP
182 BUG_ON(tsk != current);
183 #endif
184 giveup_vsx(tsk);
186 preempt_enable();
189 #endif /* CONFIG_VSX */
191 #ifdef CONFIG_SPE
193 void enable_kernel_spe(void)
195 WARN_ON(preemptible());
197 #ifdef CONFIG_SMP
198 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
199 giveup_spe(current);
200 else
201 giveup_spe(NULL); /* just enable SPE for kernel - force */
202 #else
203 giveup_spe(last_task_used_spe);
204 #endif /* __SMP __ */
206 EXPORT_SYMBOL(enable_kernel_spe);
208 void flush_spe_to_thread(struct task_struct *tsk)
210 if (tsk->thread.regs) {
211 preempt_disable();
212 if (tsk->thread.regs->msr & MSR_SPE) {
213 #ifdef CONFIG_SMP
214 BUG_ON(tsk != current);
215 #endif
216 giveup_spe(tsk);
218 preempt_enable();
221 #endif /* CONFIG_SPE */
223 #ifndef CONFIG_SMP
225 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
226 * and the current task has some state, discard it.
228 void discard_lazy_cpu_state(void)
230 preempt_disable();
231 if (last_task_used_math == current)
232 last_task_used_math = NULL;
233 #ifdef CONFIG_ALTIVEC
234 if (last_task_used_altivec == current)
235 last_task_used_altivec = NULL;
236 #endif /* CONFIG_ALTIVEC */
237 #ifdef CONFIG_VSX
238 if (last_task_used_vsx == current)
239 last_task_used_vsx = NULL;
240 #endif /* CONFIG_VSX */
241 #ifdef CONFIG_SPE
242 if (last_task_used_spe == current)
243 last_task_used_spe = NULL;
244 #endif
245 preempt_enable();
247 #endif /* CONFIG_SMP */
249 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
250 void do_send_trap(struct pt_regs *regs, unsigned long address,
251 unsigned long error_code, int signal_code, int breakpt)
253 siginfo_t info;
255 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
256 11, SIGSEGV) == NOTIFY_STOP)
257 return;
259 /* Deliver the signal to userspace */
260 info.si_signo = SIGTRAP;
261 info.si_errno = breakpt; /* breakpoint or watchpoint id */
262 info.si_code = signal_code;
263 info.si_addr = (void __user *)address;
264 force_sig_info(SIGTRAP, &info, current);
266 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
267 void do_dabr(struct pt_regs *regs, unsigned long address,
268 unsigned long error_code)
270 siginfo_t info;
272 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
273 11, SIGSEGV) == NOTIFY_STOP)
274 return;
276 if (debugger_dabr_match(regs))
277 return;
279 /* Clear the DABR */
280 set_dabr(0);
282 /* Deliver the signal to userspace */
283 info.si_signo = SIGTRAP;
284 info.si_errno = 0;
285 info.si_code = TRAP_HWBKPT;
286 info.si_addr = (void __user *)address;
287 force_sig_info(SIGTRAP, &info, current);
289 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
291 static DEFINE_PER_CPU(unsigned long, current_dabr);
293 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
295 * Set the debug registers back to their default "safe" values.
297 static void set_debug_reg_defaults(struct thread_struct *thread)
299 thread->iac1 = thread->iac2 = 0;
300 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
301 thread->iac3 = thread->iac4 = 0;
302 #endif
303 thread->dac1 = thread->dac2 = 0;
304 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
305 thread->dvc1 = thread->dvc2 = 0;
306 #endif
307 thread->dbcr0 = 0;
308 #ifdef CONFIG_BOOKE
310 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
312 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
313 DBCR1_IAC3US | DBCR1_IAC4US;
315 * Force Data Address Compare User/Supervisor bits to be User-only
316 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
318 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
319 #else
320 thread->dbcr1 = 0;
321 #endif
324 static void prime_debug_regs(struct thread_struct *thread)
326 mtspr(SPRN_IAC1, thread->iac1);
327 mtspr(SPRN_IAC2, thread->iac2);
328 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
329 mtspr(SPRN_IAC3, thread->iac3);
330 mtspr(SPRN_IAC4, thread->iac4);
331 #endif
332 mtspr(SPRN_DAC1, thread->dac1);
333 mtspr(SPRN_DAC2, thread->dac2);
334 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
335 mtspr(SPRN_DVC1, thread->dvc1);
336 mtspr(SPRN_DVC2, thread->dvc2);
337 #endif
338 mtspr(SPRN_DBCR0, thread->dbcr0);
339 mtspr(SPRN_DBCR1, thread->dbcr1);
340 #ifdef CONFIG_BOOKE
341 mtspr(SPRN_DBCR2, thread->dbcr2);
342 #endif
345 * Unless neither the old or new thread are making use of the
346 * debug registers, set the debug registers from the values
347 * stored in the new thread.
349 static void switch_booke_debug_regs(struct thread_struct *new_thread)
351 if ((current->thread.dbcr0 & DBCR0_IDM)
352 || (new_thread->dbcr0 & DBCR0_IDM))
353 prime_debug_regs(new_thread);
355 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
356 static void set_debug_reg_defaults(struct thread_struct *thread)
358 if (thread->dabr) {
359 thread->dabr = 0;
360 set_dabr(0);
363 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
365 int set_dabr(unsigned long dabr)
367 __get_cpu_var(current_dabr) = dabr;
369 if (ppc_md.set_dabr)
370 return ppc_md.set_dabr(dabr);
372 /* XXX should we have a CPU_FTR_HAS_DABR ? */
373 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
374 mtspr(SPRN_DAC1, dabr);
375 #ifdef CONFIG_PPC_47x
376 isync();
377 #endif
378 #elif defined(CONFIG_PPC_BOOK3S)
379 mtspr(SPRN_DABR, dabr);
380 #endif
383 return 0;
386 #ifdef CONFIG_PPC64
387 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
388 #endif
390 struct task_struct *__switch_to(struct task_struct *prev,
391 struct task_struct *new)
393 struct thread_struct *new_thread, *old_thread;
394 unsigned long flags;
395 struct task_struct *last;
397 #ifdef CONFIG_SMP
398 /* avoid complexity of lazy save/restore of fpu
399 * by just saving it every time we switch out if
400 * this task used the fpu during the last quantum.
402 * If it tries to use the fpu again, it'll trap and
403 * reload its fp regs. So we don't have to do a restore
404 * every switch, just a save.
405 * -- Cort
407 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
408 giveup_fpu(prev);
409 #ifdef CONFIG_ALTIVEC
411 * If the previous thread used altivec in the last quantum
412 * (thus changing altivec regs) then save them.
413 * We used to check the VRSAVE register but not all apps
414 * set it, so we don't rely on it now (and in fact we need
415 * to save & restore VSCR even if VRSAVE == 0). -- paulus
417 * On SMP we always save/restore altivec regs just to avoid the
418 * complexity of changing processors.
419 * -- Cort
421 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
422 giveup_altivec(prev);
423 #endif /* CONFIG_ALTIVEC */
424 #ifdef CONFIG_VSX
425 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
426 /* VMX and FPU registers are already save here */
427 __giveup_vsx(prev);
428 #endif /* CONFIG_VSX */
429 #ifdef CONFIG_SPE
431 * If the previous thread used spe in the last quantum
432 * (thus changing spe regs) then save them.
434 * On SMP we always save/restore spe regs just to avoid the
435 * complexity of changing processors.
437 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
438 giveup_spe(prev);
439 #endif /* CONFIG_SPE */
441 #else /* CONFIG_SMP */
442 #ifdef CONFIG_ALTIVEC
443 /* Avoid the trap. On smp this this never happens since
444 * we don't set last_task_used_altivec -- Cort
446 if (new->thread.regs && last_task_used_altivec == new)
447 new->thread.regs->msr |= MSR_VEC;
448 #endif /* CONFIG_ALTIVEC */
449 #ifdef CONFIG_VSX
450 if (new->thread.regs && last_task_used_vsx == new)
451 new->thread.regs->msr |= MSR_VSX;
452 #endif /* CONFIG_VSX */
453 #ifdef CONFIG_SPE
454 /* Avoid the trap. On smp this this never happens since
455 * we don't set last_task_used_spe
457 if (new->thread.regs && last_task_used_spe == new)
458 new->thread.regs->msr |= MSR_SPE;
459 #endif /* CONFIG_SPE */
461 #endif /* CONFIG_SMP */
463 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
464 switch_booke_debug_regs(&new->thread);
465 #else
467 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
468 * schedule DABR
470 #ifndef CONFIG_HAVE_HW_BREAKPOINT
471 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
472 set_dabr(new->thread.dabr);
473 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
474 #endif
477 new_thread = &new->thread;
478 old_thread = &current->thread;
480 #if defined(CONFIG_PPC_BOOK3E_64)
481 /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
482 * we always hold the user values, so we set it now.
484 * However, we ensure the kernel MSR:DE is appropriately cleared too
485 * to avoid spurrious single step exceptions in the kernel.
487 * This will have to change to merge with the ppc32 code at some point,
488 * but I don't like much what ppc32 is doing today so there's some
489 * thinking needed there
491 if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
492 u32 dbcr0;
494 mtmsr(mfmsr() & ~MSR_DE);
495 isync();
496 dbcr0 = mfspr(SPRN_DBCR0);
497 dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
498 mtspr(SPRN_DBCR0, dbcr0);
500 #endif /* CONFIG_PPC64_BOOK3E */
502 #ifdef CONFIG_PPC64
504 * Collect processor utilization data per process
506 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
507 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
508 long unsigned start_tb, current_tb;
509 start_tb = old_thread->start_tb;
510 cu->current_tb = current_tb = mfspr(SPRN_PURR);
511 old_thread->accum_tb += (current_tb - start_tb);
512 new_thread->start_tb = current_tb;
514 #endif
516 local_irq_save(flags);
518 account_system_vtime(current);
519 account_process_vtime(current);
522 * We can't take a PMU exception inside _switch() since there is a
523 * window where the kernel stack SLB and the kernel stack are out
524 * of sync. Hard disable here.
526 hard_irq_disable();
527 last = _switch(old_thread, new_thread);
529 local_irq_restore(flags);
531 return last;
534 static int instructions_to_print = 16;
536 static void show_instructions(struct pt_regs *regs)
538 int i;
539 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
540 sizeof(int));
542 printk("Instruction dump:");
544 for (i = 0; i < instructions_to_print; i++) {
545 int instr;
547 if (!(i % 8))
548 printk("\n");
550 #if !defined(CONFIG_BOOKE)
551 /* If executing with the IMMU off, adjust pc rather
552 * than print XXXXXXXX.
554 if (!(regs->msr & MSR_IR))
555 pc = (unsigned long)phys_to_virt(pc);
556 #endif
558 /* We use __get_user here *only* to avoid an OOPS on a
559 * bad address because the pc *should* only be a
560 * kernel address.
562 if (!__kernel_text_address(pc) ||
563 __get_user(instr, (unsigned int __user *)pc)) {
564 printk("XXXXXXXX ");
565 } else {
566 if (regs->nip == pc)
567 printk("<%08x> ", instr);
568 else
569 printk("%08x ", instr);
572 pc += sizeof(int);
575 printk("\n");
578 static struct regbit {
579 unsigned long bit;
580 const char *name;
581 } msr_bits[] = {
582 {MSR_EE, "EE"},
583 {MSR_PR, "PR"},
584 {MSR_FP, "FP"},
585 {MSR_VEC, "VEC"},
586 {MSR_VSX, "VSX"},
587 {MSR_ME, "ME"},
588 {MSR_CE, "CE"},
589 {MSR_DE, "DE"},
590 {MSR_IR, "IR"},
591 {MSR_DR, "DR"},
592 {0, NULL}
595 static void printbits(unsigned long val, struct regbit *bits)
597 const char *sep = "";
599 printk("<");
600 for (; bits->bit; ++bits)
601 if (val & bits->bit) {
602 printk("%s%s", sep, bits->name);
603 sep = ",";
605 printk(">");
608 #ifdef CONFIG_PPC64
609 #define REG "%016lx"
610 #define REGS_PER_LINE 4
611 #define LAST_VOLATILE 13
612 #else
613 #define REG "%08lx"
614 #define REGS_PER_LINE 8
615 #define LAST_VOLATILE 12
616 #endif
618 void show_regs(struct pt_regs * regs)
620 int i, trap;
622 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
623 regs->nip, regs->link, regs->ctr);
624 printk("REGS: %p TRAP: %04lx %s (%s)\n",
625 regs, regs->trap, print_tainted(), init_utsname()->release);
626 printk("MSR: "REG" ", regs->msr);
627 printbits(regs->msr, msr_bits);
628 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
629 trap = TRAP(regs);
630 if (trap == 0x300 || trap == 0x600)
631 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
632 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
633 #else
634 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
635 #endif
636 printk("TASK = %p[%d] '%s' THREAD: %p",
637 current, task_pid_nr(current), current->comm, task_thread_info(current));
639 #ifdef CONFIG_SMP
640 printk(" CPU: %d", raw_smp_processor_id());
641 #endif /* CONFIG_SMP */
643 for (i = 0; i < 32; i++) {
644 if ((i % REGS_PER_LINE) == 0)
645 printk("\nGPR%02d: ", i);
646 printk(REG " ", regs->gpr[i]);
647 if (i == LAST_VOLATILE && !FULL_REGS(regs))
648 break;
650 printk("\n");
651 #ifdef CONFIG_KALLSYMS
653 * Lookup NIP late so we have the best change of getting the
654 * above info out without failing
656 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
657 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
658 #endif
659 show_stack(current, (unsigned long *) regs->gpr[1]);
660 if (!user_mode(regs))
661 show_instructions(regs);
664 void exit_thread(void)
666 discard_lazy_cpu_state();
669 void flush_thread(void)
671 discard_lazy_cpu_state();
673 #ifdef CONFIG_HAVE_HW_BREAKPOINTS
674 flush_ptrace_hw_breakpoint(current);
675 #else /* CONFIG_HAVE_HW_BREAKPOINTS */
676 set_debug_reg_defaults(&current->thread);
677 #endif /* CONFIG_HAVE_HW_BREAKPOINTS */
680 void
681 release_thread(struct task_struct *t)
686 * This gets called before we allocate a new thread and copy
687 * the current task into it.
689 void prepare_to_copy(struct task_struct *tsk)
691 flush_fp_to_thread(current);
692 flush_altivec_to_thread(current);
693 flush_vsx_to_thread(current);
694 flush_spe_to_thread(current);
695 #ifdef CONFIG_HAVE_HW_BREAKPOINT
696 flush_ptrace_hw_breakpoint(tsk);
697 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
701 * Copy a thread..
703 int copy_thread(unsigned long clone_flags, unsigned long usp,
704 unsigned long unused, struct task_struct *p,
705 struct pt_regs *regs)
707 struct pt_regs *childregs, *kregs;
708 extern void ret_from_fork(void);
709 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
711 CHECK_FULL_REGS(regs);
712 /* Copy registers */
713 sp -= sizeof(struct pt_regs);
714 childregs = (struct pt_regs *) sp;
715 *childregs = *regs;
716 if ((childregs->msr & MSR_PR) == 0) {
717 /* for kernel thread, set `current' and stackptr in new task */
718 childregs->gpr[1] = sp + sizeof(struct pt_regs);
719 #ifdef CONFIG_PPC32
720 childregs->gpr[2] = (unsigned long) p;
721 #else
722 clear_tsk_thread_flag(p, TIF_32BIT);
723 #endif
724 p->thread.regs = NULL; /* no user register state */
725 } else {
726 childregs->gpr[1] = usp;
727 p->thread.regs = childregs;
728 if (clone_flags & CLONE_SETTLS) {
729 #ifdef CONFIG_PPC64
730 if (!is_32bit_task())
731 childregs->gpr[13] = childregs->gpr[6];
732 else
733 #endif
734 childregs->gpr[2] = childregs->gpr[6];
737 childregs->gpr[3] = 0; /* Result from fork() */
738 sp -= STACK_FRAME_OVERHEAD;
741 * The way this works is that at some point in the future
742 * some task will call _switch to switch to the new task.
743 * That will pop off the stack frame created below and start
744 * the new task running at ret_from_fork. The new task will
745 * do some house keeping and then return from the fork or clone
746 * system call, using the stack frame created above.
748 sp -= sizeof(struct pt_regs);
749 kregs = (struct pt_regs *) sp;
750 sp -= STACK_FRAME_OVERHEAD;
751 p->thread.ksp = sp;
752 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
753 _ALIGN_UP(sizeof(struct thread_info), 16);
755 #ifdef CONFIG_PPC_STD_MMU_64
756 if (cpu_has_feature(CPU_FTR_SLB)) {
757 unsigned long sp_vsid;
758 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
760 if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
761 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
762 << SLB_VSID_SHIFT_1T;
763 else
764 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
765 << SLB_VSID_SHIFT;
766 sp_vsid |= SLB_VSID_KERNEL | llp;
767 p->thread.ksp_vsid = sp_vsid;
769 #endif /* CONFIG_PPC_STD_MMU_64 */
772 * The PPC64 ABI makes use of a TOC to contain function
773 * pointers. The function (ret_from_except) is actually a pointer
774 * to the TOC entry. The first entry is a pointer to the actual
775 * function.
777 #ifdef CONFIG_PPC64
778 kregs->nip = *((unsigned long *)ret_from_fork);
779 #else
780 kregs->nip = (unsigned long)ret_from_fork;
781 #endif
783 return 0;
787 * Set up a thread for executing a new program
789 void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
791 #ifdef CONFIG_PPC64
792 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
793 #endif
795 set_fs(USER_DS);
798 * If we exec out of a kernel thread then thread.regs will not be
799 * set. Do it now.
801 if (!current->thread.regs) {
802 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
803 current->thread.regs = regs - 1;
806 memset(regs->gpr, 0, sizeof(regs->gpr));
807 regs->ctr = 0;
808 regs->link = 0;
809 regs->xer = 0;
810 regs->ccr = 0;
811 regs->gpr[1] = sp;
814 * We have just cleared all the nonvolatile GPRs, so make
815 * FULL_REGS(regs) return true. This is necessary to allow
816 * ptrace to examine the thread immediately after exec.
818 regs->trap &= ~1UL;
820 #ifdef CONFIG_PPC32
821 regs->mq = 0;
822 regs->nip = start;
823 regs->msr = MSR_USER;
824 #else
825 if (!is_32bit_task()) {
826 unsigned long entry, toc;
828 /* start is a relocated pointer to the function descriptor for
829 * the elf _start routine. The first entry in the function
830 * descriptor is the entry address of _start and the second
831 * entry is the TOC value we need to use.
833 __get_user(entry, (unsigned long __user *)start);
834 __get_user(toc, (unsigned long __user *)start+1);
836 /* Check whether the e_entry function descriptor entries
837 * need to be relocated before we can use them.
839 if (load_addr != 0) {
840 entry += load_addr;
841 toc += load_addr;
843 regs->nip = entry;
844 regs->gpr[2] = toc;
845 regs->msr = MSR_USER64;
846 } else {
847 regs->nip = start;
848 regs->gpr[2] = 0;
849 regs->msr = MSR_USER32;
851 #endif
853 discard_lazy_cpu_state();
854 #ifdef CONFIG_VSX
855 current->thread.used_vsr = 0;
856 #endif
857 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
858 current->thread.fpscr.val = 0;
859 #ifdef CONFIG_ALTIVEC
860 memset(current->thread.vr, 0, sizeof(current->thread.vr));
861 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
862 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
863 current->thread.vrsave = 0;
864 current->thread.used_vr = 0;
865 #endif /* CONFIG_ALTIVEC */
866 #ifdef CONFIG_SPE
867 memset(current->thread.evr, 0, sizeof(current->thread.evr));
868 current->thread.acc = 0;
869 current->thread.spefscr = 0;
870 current->thread.used_spe = 0;
871 #endif /* CONFIG_SPE */
874 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
875 | PR_FP_EXC_RES | PR_FP_EXC_INV)
877 int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
879 struct pt_regs *regs = tsk->thread.regs;
881 /* This is a bit hairy. If we are an SPE enabled processor
882 * (have embedded fp) we store the IEEE exception enable flags in
883 * fpexc_mode. fpexc_mode is also used for setting FP exception
884 * mode (asyn, precise, disabled) for 'Classic' FP. */
885 if (val & PR_FP_EXC_SW_ENABLE) {
886 #ifdef CONFIG_SPE
887 if (cpu_has_feature(CPU_FTR_SPE)) {
888 tsk->thread.fpexc_mode = val &
889 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
890 return 0;
891 } else {
892 return -EINVAL;
894 #else
895 return -EINVAL;
896 #endif
899 /* on a CONFIG_SPE this does not hurt us. The bits that
900 * __pack_fe01 use do not overlap with bits used for
901 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
902 * on CONFIG_SPE implementations are reserved so writing to
903 * them does not change anything */
904 if (val > PR_FP_EXC_PRECISE)
905 return -EINVAL;
906 tsk->thread.fpexc_mode = __pack_fe01(val);
907 if (regs != NULL && (regs->msr & MSR_FP) != 0)
908 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
909 | tsk->thread.fpexc_mode;
910 return 0;
913 int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
915 unsigned int val;
917 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
918 #ifdef CONFIG_SPE
919 if (cpu_has_feature(CPU_FTR_SPE))
920 val = tsk->thread.fpexc_mode;
921 else
922 return -EINVAL;
923 #else
924 return -EINVAL;
925 #endif
926 else
927 val = __unpack_fe01(tsk->thread.fpexc_mode);
928 return put_user(val, (unsigned int __user *) adr);
931 int set_endian(struct task_struct *tsk, unsigned int val)
933 struct pt_regs *regs = tsk->thread.regs;
935 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
936 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
937 return -EINVAL;
939 if (regs == NULL)
940 return -EINVAL;
942 if (val == PR_ENDIAN_BIG)
943 regs->msr &= ~MSR_LE;
944 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
945 regs->msr |= MSR_LE;
946 else
947 return -EINVAL;
949 return 0;
952 int get_endian(struct task_struct *tsk, unsigned long adr)
954 struct pt_regs *regs = tsk->thread.regs;
955 unsigned int val;
957 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
958 !cpu_has_feature(CPU_FTR_REAL_LE))
959 return -EINVAL;
961 if (regs == NULL)
962 return -EINVAL;
964 if (regs->msr & MSR_LE) {
965 if (cpu_has_feature(CPU_FTR_REAL_LE))
966 val = PR_ENDIAN_LITTLE;
967 else
968 val = PR_ENDIAN_PPC_LITTLE;
969 } else
970 val = PR_ENDIAN_BIG;
972 return put_user(val, (unsigned int __user *)adr);
975 int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
977 tsk->thread.align_ctl = val;
978 return 0;
981 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
983 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
986 #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
988 int sys_clone(unsigned long clone_flags, unsigned long usp,
989 int __user *parent_tidp, void __user *child_threadptr,
990 int __user *child_tidp, int p6,
991 struct pt_regs *regs)
993 CHECK_FULL_REGS(regs);
994 if (usp == 0)
995 usp = regs->gpr[1]; /* stack pointer for child */
996 #ifdef CONFIG_PPC64
997 if (is_32bit_task()) {
998 parent_tidp = TRUNC_PTR(parent_tidp);
999 child_tidp = TRUNC_PTR(child_tidp);
1001 #endif
1002 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
1005 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
1006 unsigned long p4, unsigned long p5, unsigned long p6,
1007 struct pt_regs *regs)
1009 CHECK_FULL_REGS(regs);
1010 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
1013 int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
1014 unsigned long p4, unsigned long p5, unsigned long p6,
1015 struct pt_regs *regs)
1017 CHECK_FULL_REGS(regs);
1018 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
1019 regs, 0, NULL, NULL);
1022 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
1023 unsigned long a3, unsigned long a4, unsigned long a5,
1024 struct pt_regs *regs)
1026 int error;
1027 char *filename;
1029 filename = getname((const char __user *) a0);
1030 error = PTR_ERR(filename);
1031 if (IS_ERR(filename))
1032 goto out;
1033 flush_fp_to_thread(current);
1034 flush_altivec_to_thread(current);
1035 flush_spe_to_thread(current);
1036 error = do_execve(filename,
1037 (const char __user *const __user *) a1,
1038 (const char __user *const __user *) a2, regs);
1039 putname(filename);
1040 out:
1041 return error;
1044 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1045 unsigned long nbytes)
1047 unsigned long stack_page;
1048 unsigned long cpu = task_cpu(p);
1051 * Avoid crashing if the stack has overflowed and corrupted
1052 * task_cpu(p), which is in the thread_info struct.
1054 if (cpu < NR_CPUS && cpu_possible(cpu)) {
1055 stack_page = (unsigned long) hardirq_ctx[cpu];
1056 if (sp >= stack_page + sizeof(struct thread_struct)
1057 && sp <= stack_page + THREAD_SIZE - nbytes)
1058 return 1;
1060 stack_page = (unsigned long) softirq_ctx[cpu];
1061 if (sp >= stack_page + sizeof(struct thread_struct)
1062 && sp <= stack_page + THREAD_SIZE - nbytes)
1063 return 1;
1065 return 0;
1068 int validate_sp(unsigned long sp, struct task_struct *p,
1069 unsigned long nbytes)
1071 unsigned long stack_page = (unsigned long)task_stack_page(p);
1073 if (sp >= stack_page + sizeof(struct thread_struct)
1074 && sp <= stack_page + THREAD_SIZE - nbytes)
1075 return 1;
1077 return valid_irq_stack(sp, p, nbytes);
1080 EXPORT_SYMBOL(validate_sp);
1082 unsigned long get_wchan(struct task_struct *p)
1084 unsigned long ip, sp;
1085 int count = 0;
1087 if (!p || p == current || p->state == TASK_RUNNING)
1088 return 0;
1090 sp = p->thread.ksp;
1091 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
1092 return 0;
1094 do {
1095 sp = *(unsigned long *)sp;
1096 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
1097 return 0;
1098 if (count > 0) {
1099 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
1100 if (!in_sched_functions(ip))
1101 return ip;
1103 } while (count++ < 16);
1104 return 0;
1107 static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
1109 void show_stack(struct task_struct *tsk, unsigned long *stack)
1111 unsigned long sp, ip, lr, newsp;
1112 int count = 0;
1113 int firstframe = 1;
1114 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1115 int curr_frame = current->curr_ret_stack;
1116 extern void return_to_handler(void);
1117 unsigned long rth = (unsigned long)return_to_handler;
1118 unsigned long mrth = -1;
1119 #ifdef CONFIG_PPC64
1120 extern void mod_return_to_handler(void);
1121 rth = *(unsigned long *)rth;
1122 mrth = (unsigned long)mod_return_to_handler;
1123 mrth = *(unsigned long *)mrth;
1124 #endif
1125 #endif
1127 sp = (unsigned long) stack;
1128 if (tsk == NULL)
1129 tsk = current;
1130 if (sp == 0) {
1131 if (tsk == current)
1132 asm("mr %0,1" : "=r" (sp));
1133 else
1134 sp = tsk->thread.ksp;
1137 lr = 0;
1138 printk("Call Trace:\n");
1139 do {
1140 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
1141 return;
1143 stack = (unsigned long *) sp;
1144 newsp = stack[0];
1145 ip = stack[STACK_FRAME_LR_SAVE];
1146 if (!firstframe || ip != lr) {
1147 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
1148 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1149 if ((ip == rth || ip == mrth) && curr_frame >= 0) {
1150 printk(" (%pS)",
1151 (void *)current->ret_stack[curr_frame].ret);
1152 curr_frame--;
1154 #endif
1155 if (firstframe)
1156 printk(" (unreliable)");
1157 printk("\n");
1159 firstframe = 0;
1162 * See if this is an exception frame.
1163 * We look for the "regshere" marker in the current frame.
1165 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1166 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
1167 struct pt_regs *regs = (struct pt_regs *)
1168 (sp + STACK_FRAME_OVERHEAD);
1169 lr = regs->link;
1170 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1171 regs->trap, (void *)regs->nip, (void *)lr);
1172 firstframe = 1;
1175 sp = newsp;
1176 } while (count++ < kstack_depth_to_print);
1179 void dump_stack(void)
1181 show_stack(current, NULL);
1183 EXPORT_SYMBOL(dump_stack);
1185 #ifdef CONFIG_PPC64
1186 void ppc64_runlatch_on(void)
1188 unsigned long ctrl;
1190 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
1191 HMT_medium();
1193 ctrl = mfspr(SPRN_CTRLF);
1194 ctrl |= CTRL_RUNLATCH;
1195 mtspr(SPRN_CTRLT, ctrl);
1197 set_thread_flag(TIF_RUNLATCH);
1201 void __ppc64_runlatch_off(void)
1203 unsigned long ctrl;
1205 HMT_medium();
1207 clear_thread_flag(TIF_RUNLATCH);
1209 ctrl = mfspr(SPRN_CTRLF);
1210 ctrl &= ~CTRL_RUNLATCH;
1211 mtspr(SPRN_CTRLT, ctrl);
1213 #endif
1215 #if THREAD_SHIFT < PAGE_SHIFT
1217 static struct kmem_cache *thread_info_cache;
1219 struct thread_info *alloc_thread_info(struct task_struct *tsk)
1221 struct thread_info *ti;
1223 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
1224 if (unlikely(ti == NULL))
1225 return NULL;
1226 #ifdef CONFIG_DEBUG_STACK_USAGE
1227 memset(ti, 0, THREAD_SIZE);
1228 #endif
1229 return ti;
1232 void free_thread_info(struct thread_info *ti)
1234 kmem_cache_free(thread_info_cache, ti);
1237 void thread_info_cache_init(void)
1239 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
1240 THREAD_SIZE, 0, NULL);
1241 BUG_ON(thread_info_cache == NULL);
1244 #endif /* THREAD_SHIFT < PAGE_SHIFT */
1246 unsigned long arch_align_stack(unsigned long sp)
1248 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1249 sp -= get_random_int() & ~PAGE_MASK;
1250 return sp & ~0xf;
1253 static inline unsigned long brk_rnd(void)
1255 unsigned long rnd = 0;
1257 /* 8MB for 32bit, 1GB for 64bit */
1258 if (is_32bit_task())
1259 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1260 else
1261 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1263 return rnd << PAGE_SHIFT;
1266 unsigned long arch_randomize_brk(struct mm_struct *mm)
1268 unsigned long base = mm->brk;
1269 unsigned long ret;
1271 #ifdef CONFIG_PPC_STD_MMU_64
1273 * If we are using 1TB segments and we are allowed to randomise
1274 * the heap, we can put it above 1TB so it is backed by a 1TB
1275 * segment. Otherwise the heap will be in the bottom 1TB
1276 * which always uses 256MB segments and this may result in a
1277 * performance penalty.
1279 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1280 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1281 #endif
1283 ret = PAGE_ALIGN(base + brk_rnd());
1285 if (ret < mm->brk)
1286 return mm->brk;
1288 return ret;
1291 unsigned long randomize_et_dyn(unsigned long base)
1293 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1295 if (ret < base)
1296 return base;
1298 return ret;