2 * SGI UltraViolet TLB flush routines.
4 * (c) 2008 Cliff Wickman <cpw@sgi.com>, SGI.
6 * This code is released under the GNU General Public License version 2 or
9 #include <linux/mc146818rtc.h>
10 #include <linux/proc_fs.h>
11 #include <linux/kernel.h>
13 #include <asm/mmu_context.h>
14 #include <asm/uv/uv_mmrs.h>
15 #include <asm/uv/uv_hub.h>
16 #include <asm/uv/uv_bau.h>
17 #include <asm/genapic.h>
21 #include <mach_apic.h>
23 static struct bau_control
**uv_bau_table_bases __read_mostly
;
24 static int uv_bau_retry_limit __read_mostly
;
26 /* position of pnode (which is nasid>>1): */
27 static int uv_nshift __read_mostly
;
29 static unsigned long uv_mmask __read_mostly
;
31 static DEFINE_PER_CPU(struct ptc_stats
, ptcstats
);
32 static DEFINE_PER_CPU(struct bau_control
, bau_control
);
35 * Free a software acknowledge hardware resource by clearing its Pending
36 * bit. This will return a reply to the sender.
37 * If the message has timed out, a reply has already been sent by the
38 * hardware but the resource has not been released. In that case our
39 * clear of the Timeout bit (as well) will free the resource. No reply will
40 * be sent (the hardware will only do one reply per message).
42 static void uv_reply_to_message(int resource
,
43 struct bau_payload_queue_entry
*msg
,
44 struct bau_msg_status
*msp
)
48 dw
= (1 << (resource
+ UV_SW_ACK_NPENDING
)) | (1 << resource
);
50 msg
->sw_ack_vector
= 0;
52 msp
->seen_by
.bits
= 0;
53 uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS
, dw
);
57 * Do all the things a cpu should do for a TLB shootdown message.
58 * Other cpu's may come here at the same time for this message.
60 static void uv_bau_process_message(struct bau_payload_queue_entry
*msg
,
61 int msg_slot
, int sw_ack_slot
)
63 unsigned long this_cpu_mask
;
64 struct bau_msg_status
*msp
;
67 msp
= __get_cpu_var(bau_control
).msg_statuses
+ msg_slot
;
68 cpu
= uv_blade_processor_id();
70 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id()));
71 this_cpu_mask
= 1UL << cpu
;
72 if (msp
->seen_by
.bits
& this_cpu_mask
)
74 atomic_or_long(&msp
->seen_by
.bits
, this_cpu_mask
);
76 if (msg
->replied_to
== 1)
79 if (msg
->address
== TLB_FLUSH_ALL
) {
81 __get_cpu_var(ptcstats
).alltlb
++;
83 __flush_tlb_one(msg
->address
);
84 __get_cpu_var(ptcstats
).onetlb
++;
87 __get_cpu_var(ptcstats
).requestee
++;
89 atomic_inc_short(&msg
->acknowledge_count
);
90 if (msg
->number_of_cpus
== msg
->acknowledge_count
)
91 uv_reply_to_message(sw_ack_slot
, msg
, msp
);
95 * Examine the payload queue on one distribution node to see
96 * which messages have not been seen, and which cpu(s) have not seen them.
98 * Returns the number of cpu's that have not responded.
100 static int uv_examine_destination(struct bau_control
*bau_tablesp
, int sender
)
102 struct bau_payload_queue_entry
*msg
;
103 struct bau_msg_status
*msp
;
108 for (msg
= bau_tablesp
->va_queue_first
, i
= 0; i
< DEST_Q_SIZE
;
110 if ((msg
->sending_cpu
== sender
) && (!msg
->replied_to
)) {
111 msp
= bau_tablesp
->msg_statuses
+ i
;
113 "blade %d: address:%#lx %d of %d, not cpu(s): ",
114 i
, msg
->address
, msg
->acknowledge_count
,
115 msg
->number_of_cpus
);
116 for (j
= 0; j
< msg
->number_of_cpus
; j
++) {
117 if (!((1L << j
) & msp
->seen_by
.bits
)) {
129 * Examine the payload queue on all the distribution nodes to see
130 * which messages have not been seen, and which cpu(s) have not seen them.
132 * Returns the number of cpu's that have not responded.
134 static int uv_examine_destinations(struct bau_target_nodemask
*distribution
)
140 sender
= smp_processor_id();
141 for (i
= 0; i
< sizeof(struct bau_target_nodemask
) * BITSPERBYTE
; i
++) {
142 if (!bau_node_isset(i
, distribution
))
144 count
+= uv_examine_destination(uv_bau_table_bases
[i
], sender
);
150 * wait for completion of a broadcast message
152 * return COMPLETE, RETRY or GIVEUP
154 static int uv_wait_completion(struct bau_desc
*bau_desc
,
155 unsigned long mmr_offset
, int right_shift
)
158 long destination_timeouts
= 0;
159 long source_timeouts
= 0;
160 unsigned long descriptor_status
;
162 while ((descriptor_status
= (((unsigned long)
163 uv_read_local_mmr(mmr_offset
) >>
164 right_shift
) & UV_ACT_STATUS_MASK
)) !=
166 if (descriptor_status
== DESC_STATUS_SOURCE_TIMEOUT
) {
168 if (source_timeouts
> SOURCE_TIMEOUT_LIMIT
)
170 __get_cpu_var(ptcstats
).s_retry
++;
174 * spin here looking for progress at the destinations
176 if (descriptor_status
== DESC_STATUS_DESTINATION_TIMEOUT
) {
177 destination_timeouts
++;
178 if (destination_timeouts
> DESTINATION_TIMEOUT_LIMIT
) {
180 * returns number of cpus not responding
182 if (uv_examine_destinations
183 (&bau_desc
->distribution
) == 0) {
184 __get_cpu_var(ptcstats
).d_retry
++;
188 if (exams
>= uv_bau_retry_limit
) {
190 "uv_flush_tlb_others");
191 printk("giving up on cpu %d\n",
196 * delays can hang the simulator
199 destination_timeouts
= 0;
203 return FLUSH_COMPLETE
;
207 * uv_flush_send_and_wait
209 * Send a broadcast and wait for a broadcast message to complete.
211 * The cpumaskp mask contains the cpus the broadcast was sent to.
213 * Returns 1 if all remote flushing was done. The mask is zeroed.
214 * Returns 0 if some remote flushing remains to be done. The mask is left
217 int uv_flush_send_and_wait(int cpu
, int this_blade
, struct bau_desc
*bau_desc
,
220 int completion_status
= 0;
225 unsigned long mmr_offset
;
230 if (cpu
< UV_CPUS_PER_ACT_STATUS
) {
231 mmr_offset
= UVH_LB_BAU_SB_ACTIVATION_STATUS_0
;
232 right_shift
= cpu
* UV_ACT_STATUS_SIZE
;
234 mmr_offset
= UVH_LB_BAU_SB_ACTIVATION_STATUS_1
;
236 ((cpu
- UV_CPUS_PER_ACT_STATUS
) * UV_ACT_STATUS_SIZE
);
238 time1
= get_cycles();
241 index
= (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT
) |
243 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL
, index
);
244 completion_status
= uv_wait_completion(bau_desc
, mmr_offset
,
246 } while (completion_status
== FLUSH_RETRY
);
247 time2
= get_cycles();
248 __get_cpu_var(ptcstats
).sflush
+= (time2
- time1
);
250 __get_cpu_var(ptcstats
).retriesok
++;
252 if (completion_status
== FLUSH_GIVEUP
) {
254 * Cause the caller to do an IPI-style TLB shootdown on
255 * the cpu's, all of which are still in the mask.
257 __get_cpu_var(ptcstats
).ptc_i
++;
262 * Success, so clear the remote cpu's from the mask so we don't
263 * use the IPI method of shootdown on them.
265 for_each_cpu_mask(bit
, *cpumaskp
) {
266 blade
= uv_cpu_to_blade_id(bit
);
267 if (blade
== this_blade
)
269 cpu_clear(bit
, *cpumaskp
);
271 if (!cpus_empty(*cpumaskp
))
277 * uv_flush_tlb_others - globally purge translation cache of a virtual
278 * address or all TLB's
279 * @cpumaskp: mask of all cpu's in which the address is to be removed
280 * @mm: mm_struct containing virtual address range
281 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
283 * This is the entry point for initiating any UV global TLB shootdown.
285 * Purges the translation caches of all specified processors of the given
286 * virtual address, or purges all TLB's on specified processors.
288 * The caller has derived the cpumaskp from the mm_struct and has subtracted
289 * the local cpu from the mask. This function is called only if there
290 * are bits set in the mask. (e.g. flush_tlb_page())
292 * The cpumaskp is converted into a nodemask of the nodes containing
295 * Returns 1 if all remote flushing was done.
296 * Returns 0 if some remote flushing remains to be done.
298 int uv_flush_tlb_others(cpumask_t
*cpumaskp
, struct mm_struct
*mm
,
307 struct bau_desc
*bau_desc
;
309 cpu
= uv_blade_processor_id();
310 this_blade
= uv_numa_blade_id();
311 bau_desc
= __get_cpu_var(bau_control
).descriptor_base
;
312 bau_desc
+= UV_ITEMS_PER_DESCRIPTOR
* cpu
;
314 bau_nodes_clear(&bau_desc
->distribution
, UV_DISTRIBUTION_SIZE
);
317 for_each_cpu_mask(bit
, *cpumaskp
) {
318 blade
= uv_cpu_to_blade_id(bit
);
319 BUG_ON(blade
> (UV_DISTRIBUTION_SIZE
- 1));
320 if (blade
== this_blade
) {
324 bau_node_set(blade
, &bau_desc
->distribution
);
329 * no off_node flushing; return status for local node
336 __get_cpu_var(ptcstats
).requestor
++;
337 __get_cpu_var(ptcstats
).ntargeted
+= i
;
339 bau_desc
->payload
.address
= va
;
340 bau_desc
->payload
.sending_cpu
= smp_processor_id();
342 return uv_flush_send_and_wait(cpu
, this_blade
, bau_desc
, cpumaskp
);
346 * The BAU message interrupt comes here. (registered by set_intr_gate)
349 * We received a broadcast assist message.
351 * Interrupts may have been disabled; this interrupt could represent
352 * the receipt of several messages.
354 * All cores/threads on this node get this interrupt.
355 * The last one to see it does the s/w ack.
356 * (the resource will not be freed until noninterruptable cpus see this
357 * interrupt; hardware will timeout the s/w ack and reply ERROR)
359 void uv_bau_message_interrupt(struct pt_regs
*regs
)
361 struct bau_payload_queue_entry
*va_queue_first
;
362 struct bau_payload_queue_entry
*va_queue_last
;
363 struct bau_payload_queue_entry
*msg
;
364 struct pt_regs
*old_regs
= set_irq_regs(regs
);
371 unsigned long local_pnode
;
377 time1
= get_cycles();
379 local_pnode
= uv_blade_to_pnode(uv_numa_blade_id());
381 va_queue_first
= __get_cpu_var(bau_control
).va_queue_first
;
382 va_queue_last
= __get_cpu_var(bau_control
).va_queue_last
;
384 msg
= __get_cpu_var(bau_control
).bau_msg_head
;
385 while (msg
->sw_ack_vector
) {
387 fw
= msg
->sw_ack_vector
;
388 msg_slot
= msg
- va_queue_first
;
389 sw_ack_slot
= ffs(fw
) - 1;
391 uv_bau_process_message(msg
, msg_slot
, sw_ack_slot
);
394 if (msg
> va_queue_last
)
395 msg
= va_queue_first
;
396 __get_cpu_var(bau_control
).bau_msg_head
= msg
;
399 __get_cpu_var(ptcstats
).nomsg
++;
401 __get_cpu_var(ptcstats
).multmsg
++;
403 time2
= get_cycles();
404 __get_cpu_var(ptcstats
).dflush
+= (time2
- time1
);
407 set_irq_regs(old_regs
);
410 static void uv_enable_timeouts(void)
417 unsigned long apicid
;
420 for_each_online_node(i
) {
421 blade
= uv_node_to_blade_id(i
);
422 if (blade
== last_blade
)
425 apicid
= per_cpu(x86_cpu_to_apicid
, cur_cpu
);
426 pnode
= uv_blade_to_pnode(blade
);
427 cur_cpu
+= uv_blade_nr_possible_cpus(i
);
431 static void *uv_ptc_seq_start(struct seq_file
*file
, loff_t
*offset
)
433 if (*offset
< num_possible_cpus())
438 static void *uv_ptc_seq_next(struct seq_file
*file
, void *data
, loff_t
*offset
)
441 if (*offset
< num_possible_cpus())
446 static void uv_ptc_seq_stop(struct seq_file
*file
, void *data
)
451 * Display the statistics thru /proc
452 * data points to the cpu number
454 static int uv_ptc_seq_show(struct seq_file
*file
, void *data
)
456 struct ptc_stats
*stat
;
459 cpu
= *(loff_t
*)data
;
463 "# cpu requestor requestee one all sretry dretry ptc_i ");
465 "sw_ack sflush dflush sok dnomsg dmult starget\n");
467 if (cpu
< num_possible_cpus() && cpu_online(cpu
)) {
468 stat
= &per_cpu(ptcstats
, cpu
);
469 seq_printf(file
, "cpu %d %ld %ld %ld %ld %ld %ld %ld ",
470 cpu
, stat
->requestor
,
471 stat
->requestee
, stat
->onetlb
, stat
->alltlb
,
472 stat
->s_retry
, stat
->d_retry
, stat
->ptc_i
);
473 seq_printf(file
, "%lx %ld %ld %ld %ld %ld %ld\n",
474 uv_read_global_mmr64(uv_blade_to_pnode
475 (uv_cpu_to_blade_id(cpu
)),
476 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE
),
477 stat
->sflush
, stat
->dflush
,
478 stat
->retriesok
, stat
->nomsg
,
479 stat
->multmsg
, stat
->ntargeted
);
486 * 0: display meaning of the statistics
489 static ssize_t
uv_ptc_proc_write(struct file
*file
, const char __user
*user
,
490 size_t count
, loff_t
*data
)
495 if (count
== 0 || count
> sizeof(optstr
))
497 if (copy_from_user(optstr
, user
, count
))
499 optstr
[count
- 1] = '\0';
500 if (strict_strtoul(optstr
, 10, &newmode
) < 0) {
501 printk(KERN_DEBUG
"%s is invalid\n", optstr
);
506 printk(KERN_DEBUG
"# cpu: cpu number\n");
508 "requestor: times this cpu was the flush requestor\n");
510 "requestee: times this cpu was requested to flush its TLBs\n");
512 "one: times requested to flush a single address\n");
514 "all: times requested to flush all TLB's\n");
516 "sretry: number of retries of source-side timeouts\n");
518 "dretry: number of retries of destination-side timeouts\n");
520 "ptc_i: times UV fell through to IPI-style flushes\n");
522 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
524 "sflush_us: cycles spent in uv_flush_tlb_others()\n");
526 "dflush_us: cycles spent in handling flush requests\n");
527 printk(KERN_DEBUG
"sok: successes on retry\n");
528 printk(KERN_DEBUG
"dnomsg: interrupts with no message\n");
530 "dmult: interrupts with multiple messages\n");
531 printk(KERN_DEBUG
"starget: nodes targeted\n");
533 uv_bau_retry_limit
= newmode
;
534 printk(KERN_DEBUG
"timeout retry limit:%d\n",
541 static const struct seq_operations uv_ptc_seq_ops
= {
542 .start
= uv_ptc_seq_start
,
543 .next
= uv_ptc_seq_next
,
544 .stop
= uv_ptc_seq_stop
,
545 .show
= uv_ptc_seq_show
548 static int uv_ptc_proc_open(struct inode
*inode
, struct file
*file
)
550 return seq_open(file
, &uv_ptc_seq_ops
);
553 static const struct file_operations proc_uv_ptc_operations
= {
554 .open
= uv_ptc_proc_open
,
556 .write
= uv_ptc_proc_write
,
558 .release
= seq_release
,
561 static int __init
uv_ptc_init(void)
563 struct proc_dir_entry
*proc_uv_ptc
;
568 if (!proc_mkdir("sgi_uv", NULL
))
571 proc_uv_ptc
= create_proc_entry(UV_PTC_BASENAME
, 0444, NULL
);
573 printk(KERN_ERR
"unable to create %s proc entry\n",
575 remove_proc_entry("sgi_uv", NULL
);
578 proc_uv_ptc
->proc_fops
= &proc_uv_ptc_operations
;
583 * begin the initialization of the per-blade control structures
585 static struct bau_control
* __init
uv_table_bases_init(int blade
, int node
)
589 struct bau_msg_status
*msp
;
590 struct bau_control
*bau_tabp
;
593 kmalloc_node(sizeof(struct bau_control
), GFP_KERNEL
, node
);
596 bau_tabp
->msg_statuses
=
597 kmalloc_node(sizeof(struct bau_msg_status
) *
598 DEST_Q_SIZE
, GFP_KERNEL
, node
);
599 BUG_ON(!bau_tabp
->msg_statuses
);
601 for (i
= 0, msp
= bau_tabp
->msg_statuses
; i
< DEST_Q_SIZE
; i
++, msp
++)
602 bau_cpubits_clear(&msp
->seen_by
, (int)
603 uv_blade_nr_possible_cpus(blade
));
606 kmalloc_node(sizeof(int) * DEST_NUM_RESOURCES
, GFP_KERNEL
, node
);
607 BUG_ON(!bau_tabp
->watching
);
609 for (i
= 0, ip
= bau_tabp
->watching
; i
< DEST_Q_SIZE
; i
++, ip
++)
612 uv_bau_table_bases
[blade
] = bau_tabp
;
618 * finish the initialization of the per-blade control structures
621 uv_table_bases_finish(int blade
, int node
, int cur_cpu
,
622 struct bau_control
*bau_tablesp
,
623 struct bau_desc
*adp
)
625 struct bau_control
*bcp
;
628 for (i
= cur_cpu
; i
< cur_cpu
+ uv_blade_nr_possible_cpus(blade
); i
++) {
629 bcp
= (struct bau_control
*)&per_cpu(bau_control
, i
);
631 bcp
->bau_msg_head
= bau_tablesp
->va_queue_first
;
632 bcp
->va_queue_first
= bau_tablesp
->va_queue_first
;
633 bcp
->va_queue_last
= bau_tablesp
->va_queue_last
;
634 bcp
->watching
= bau_tablesp
->watching
;
635 bcp
->msg_statuses
= bau_tablesp
->msg_statuses
;
636 bcp
->descriptor_base
= adp
;
641 * initialize the sending side's sending buffers
643 static struct bau_desc
* __init
644 uv_activation_descriptor_init(int node
, int pnode
)
650 unsigned long mmr_image
;
651 struct bau_desc
*adp
;
652 struct bau_desc
*ad2
;
654 adp
= (struct bau_desc
*)
655 kmalloc_node(16384, GFP_KERNEL
, node
);
658 pa
= __pa((unsigned long)adp
);
662 mmr_image
= uv_read_global_mmr64(pnode
, UVH_LB_BAU_SB_DESCRIPTOR_BASE
);
664 uv_write_global_mmr64(pnode
, (unsigned long)
665 UVH_LB_BAU_SB_DESCRIPTOR_BASE
,
666 (n
<< UV_DESC_BASE_PNODE_SHIFT
| m
));
669 for (i
= 0, ad2
= adp
; i
< UV_ACTIVATION_DESCRIPTOR_SIZE
; i
++, ad2
++) {
670 memset(ad2
, 0, sizeof(struct bau_desc
));
671 ad2
->header
.sw_ack_flag
= 1;
672 ad2
->header
.base_dest_nodeid
=
673 uv_blade_to_pnode(uv_cpu_to_blade_id(0));
674 ad2
->header
.command
= UV_NET_ENDPOINT_INTD
;
675 ad2
->header
.int_both
= 1;
677 * all others need to be set to zero:
678 * fairness chaining multilevel count replied_to
685 * initialize the destination side's receiving buffers
687 static struct bau_payload_queue_entry
* __init
688 uv_payload_queue_init(int node
, int pnode
, struct bau_control
*bau_tablesp
)
690 struct bau_payload_queue_entry
*pqp
;
693 pqp
= (struct bau_payload_queue_entry
*) kmalloc_node(
694 (DEST_Q_SIZE
+ 1) * sizeof(struct bau_payload_queue_entry
),
698 cp
= (char *)pqp
+ 31;
699 pqp
= (struct bau_payload_queue_entry
*)(((unsigned long)cp
>> 5) << 5);
700 bau_tablesp
->va_queue_first
= pqp
;
701 uv_write_global_mmr64(pnode
,
702 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST
,
703 ((unsigned long)pnode
<<
704 UV_PAYLOADQ_PNODE_SHIFT
) |
705 uv_physnodeaddr(pqp
));
706 uv_write_global_mmr64(pnode
, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL
,
707 uv_physnodeaddr(pqp
));
708 bau_tablesp
->va_queue_last
= pqp
+ (DEST_Q_SIZE
- 1);
709 uv_write_global_mmr64(pnode
, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST
,
711 uv_physnodeaddr(bau_tablesp
->va_queue_last
));
712 memset(pqp
, 0, sizeof(struct bau_payload_queue_entry
) * DEST_Q_SIZE
);
718 * Initialization of each UV blade's structures
720 static int __init
uv_init_blade(int blade
, int node
, int cur_cpu
)
724 unsigned long apicid
;
725 struct bau_desc
*adp
;
726 struct bau_payload_queue_entry
*pqp
;
727 struct bau_control
*bau_tablesp
;
729 bau_tablesp
= uv_table_bases_init(blade
, node
);
730 pnode
= uv_blade_to_pnode(blade
);
731 adp
= uv_activation_descriptor_init(node
, pnode
);
732 pqp
= uv_payload_queue_init(node
, pnode
, bau_tablesp
);
733 uv_table_bases_finish(blade
, node
, cur_cpu
, bau_tablesp
, adp
);
735 * the below initialization can't be in firmware because the
736 * messaging IRQ will be determined by the OS
738 apicid
= per_cpu(x86_cpu_to_apicid
, cur_cpu
);
739 pa
= uv_read_global_mmr64(pnode
, UVH_BAU_DATA_CONFIG
);
740 if ((pa
& 0xff) != UV_BAU_MESSAGE
) {
741 uv_write_global_mmr64(pnode
, UVH_BAU_DATA_CONFIG
,
742 ((apicid
<< 32) | UV_BAU_MESSAGE
));
748 * Initialization of BAU-related structures
750 static int __init
uv_bau_init(void)
761 uv_bau_retry_limit
= 1;
762 uv_nshift
= uv_hub_info
->n_val
;
763 uv_mmask
= (1UL << uv_hub_info
->n_val
) - 1;
766 for_each_online_node(node
) {
767 blade
= uv_node_to_blade_id(node
);
768 if (blade
== last_blade
)
773 uv_bau_table_bases
= (struct bau_control
**)
774 kmalloc(nblades
* sizeof(struct bau_control
*), GFP_KERNEL
);
775 BUG_ON(!uv_bau_table_bases
);
778 for_each_online_node(node
) {
779 blade
= uv_node_to_blade_id(node
);
780 if (blade
== last_blade
)
783 uv_init_blade(blade
, node
, cur_cpu
);
784 cur_cpu
+= uv_blade_nr_possible_cpus(blade
);
786 set_intr_gate(UV_BAU_MESSAGE
, uv_bau_message_intr1
);
787 uv_enable_timeouts();
791 __initcall(uv_bau_init
);
792 __initcall(uv_ptc_init
);