[SCSI] mpt2sas: Fix for issue Port Reset taking long time(around 5 mins) to complete...
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mfd / wm8400-core.c
blobe06ba9440cdbea2c7143b7dcbe9f752e9d47936c
1 /*
2 * Core driver for WM8400.
4 * Copyright 2008 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
15 #include <linux/bug.h>
16 #include <linux/err.h>
17 #include <linux/i2c.h>
18 #include <linux/kernel.h>
19 #include <linux/mfd/core.h>
20 #include <linux/mfd/wm8400-private.h>
21 #include <linux/mfd/wm8400-audio.h>
22 #include <linux/regmap.h>
23 #include <linux/slab.h>
25 static struct {
26 u16 readable; /* Mask of readable bits */
27 u16 writable; /* Mask of writable bits */
28 u16 vol; /* Mask of volatile bits */
29 int is_codec; /* Register controlled by codec reset */
30 u16 default_val; /* Value on reset */
31 } reg_data[] = {
32 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
33 { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
34 { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
35 { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
36 { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
37 { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
38 { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
39 { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
40 { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
41 { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
42 { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
43 { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
44 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
45 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
46 { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
47 { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
48 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
49 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
50 { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
51 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
52 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
53 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
54 { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
55 { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
56 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
57 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
58 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
59 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
60 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
61 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
62 { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
63 { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
64 { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
65 { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
66 { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
67 { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
68 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
69 { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
70 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
71 { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
72 { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
73 { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
74 { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
75 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
76 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
77 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
78 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
79 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
80 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
81 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
82 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
83 { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
84 { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
85 { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
86 { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
87 { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
88 { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
89 { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
90 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
91 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
92 { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
93 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
94 { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
95 { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
96 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
97 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
98 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
99 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
100 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
101 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
102 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
103 { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
104 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
105 { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
106 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
107 { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
108 { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
109 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
110 { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
111 { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
112 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
113 { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
114 { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
115 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
116 { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
119 static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
121 int i, ret = 0;
123 BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
125 /* If there are any volatile reads then read back the entire block */
126 for (i = reg; i < reg + num_regs; i++)
127 if (reg_data[i].vol) {
128 ret = regmap_bulk_read(wm8400->regmap, reg, dest,
129 num_regs);
130 return ret;
133 /* Otherwise use the cache */
134 memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
136 return 0;
139 static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
140 u16 *src)
142 int ret, i;
144 BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
146 for (i = 0; i < num_regs; i++) {
147 BUG_ON(!reg_data[reg + i].writable);
148 wm8400->reg_cache[reg + i] = src[i];
149 ret = regmap_write(wm8400->regmap, reg, src[i]);
150 if (ret != 0)
151 return ret;
154 return 0;
158 * wm8400_reg_read - Single register read
160 * @wm8400: Pointer to wm8400 control structure
161 * @reg: Register to read
163 * @return Read value
165 u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
167 u16 val;
169 mutex_lock(&wm8400->io_lock);
171 wm8400_read(wm8400, reg, 1, &val);
173 mutex_unlock(&wm8400->io_lock);
175 return val;
177 EXPORT_SYMBOL_GPL(wm8400_reg_read);
179 int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
181 int ret;
183 mutex_lock(&wm8400->io_lock);
185 ret = wm8400_read(wm8400, reg, count, data);
187 mutex_unlock(&wm8400->io_lock);
189 return ret;
191 EXPORT_SYMBOL_GPL(wm8400_block_read);
194 * wm8400_set_bits - Bitmask write
196 * @wm8400: Pointer to wm8400 control structure
197 * @reg: Register to access
198 * @mask: Mask of bits to change
199 * @val: Value to set for masked bits
201 int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
203 u16 tmp;
204 int ret;
206 mutex_lock(&wm8400->io_lock);
208 ret = wm8400_read(wm8400, reg, 1, &tmp);
209 tmp = (tmp & ~mask) | val;
210 if (ret == 0)
211 ret = wm8400_write(wm8400, reg, 1, &tmp);
213 mutex_unlock(&wm8400->io_lock);
215 return ret;
217 EXPORT_SYMBOL_GPL(wm8400_set_bits);
220 * wm8400_reset_codec_reg_cache - Reset cached codec registers to
221 * their default values.
223 void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
225 int i;
227 mutex_lock(&wm8400->io_lock);
229 /* Reset all codec registers to their initial value */
230 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
231 if (reg_data[i].is_codec)
232 wm8400->reg_cache[i] = reg_data[i].default_val;
234 mutex_unlock(&wm8400->io_lock);
236 EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
238 static int wm8400_register_codec(struct wm8400 *wm8400)
240 struct mfd_cell cell = {
241 .name = "wm8400-codec",
242 .platform_data = wm8400,
243 .pdata_size = sizeof(*wm8400),
246 return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
250 * wm8400_init - Generic initialisation
252 * The WM8400 can be configured as either an I2C or SPI device. Probe
253 * functions for each bus set up the accessors then call into this to
254 * set up the device itself.
256 static int wm8400_init(struct wm8400 *wm8400,
257 struct wm8400_platform_data *pdata)
259 u16 reg;
260 int ret, i;
262 mutex_init(&wm8400->io_lock);
264 dev_set_drvdata(wm8400->dev, wm8400);
266 /* Check that this is actually a WM8400 */
267 ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, &i);
268 if (ret != 0) {
269 dev_err(wm8400->dev, "Chip ID register read failed\n");
270 return -EIO;
272 if (i != reg_data[WM8400_RESET_ID].default_val) {
273 dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
274 reg);
275 return -ENODEV;
278 /* We don't know what state the hardware is in and since this
279 * is a PMIC we can't reset it safely so initialise the register
280 * cache from the hardware.
282 ret = regmap_raw_read(wm8400->regmap, 0, wm8400->reg_cache,
283 ARRAY_SIZE(wm8400->reg_cache));
284 if (ret != 0) {
285 dev_err(wm8400->dev, "Register cache read failed\n");
286 return -EIO;
288 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
289 wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
291 /* If the codec is in reset use hard coded values */
292 if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
293 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
294 if (reg_data[i].is_codec)
295 wm8400->reg_cache[i] = reg_data[i].default_val;
297 ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
298 if (ret != 0) {
299 dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
300 return ret;
302 reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
303 dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
305 ret = wm8400_register_codec(wm8400);
306 if (ret != 0) {
307 dev_err(wm8400->dev, "Failed to register codec\n");
308 goto err_children;
311 if (pdata && pdata->platform_init) {
312 ret = pdata->platform_init(wm8400->dev);
313 if (ret != 0) {
314 dev_err(wm8400->dev, "Platform init failed: %d\n",
315 ret);
316 goto err_children;
318 } else
319 dev_warn(wm8400->dev, "No platform initialisation supplied\n");
321 return 0;
323 err_children:
324 mfd_remove_devices(wm8400->dev);
325 return ret;
328 static void wm8400_release(struct wm8400 *wm8400)
330 mfd_remove_devices(wm8400->dev);
333 static const struct regmap_config wm8400_regmap_config = {
334 .reg_bits = 8,
335 .val_bits = 16,
336 .max_register = WM8400_REGISTER_COUNT - 1,
339 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
340 static int wm8400_i2c_probe(struct i2c_client *i2c,
341 const struct i2c_device_id *id)
343 struct wm8400 *wm8400;
344 int ret;
346 wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
347 if (wm8400 == NULL) {
348 ret = -ENOMEM;
349 goto err;
352 wm8400->regmap = regmap_init_i2c(i2c, &wm8400_regmap_config);
353 if (IS_ERR(wm8400->regmap)) {
354 ret = PTR_ERR(wm8400->regmap);
355 goto struct_err;
358 wm8400->dev = &i2c->dev;
359 i2c_set_clientdata(i2c, wm8400);
361 ret = wm8400_init(wm8400, i2c->dev.platform_data);
362 if (ret != 0)
363 goto map_err;
365 return 0;
367 map_err:
368 regmap_exit(wm8400->regmap);
369 struct_err:
370 kfree(wm8400);
371 err:
372 return ret;
375 static int wm8400_i2c_remove(struct i2c_client *i2c)
377 struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
379 wm8400_release(wm8400);
380 regmap_exit(wm8400->regmap);
381 kfree(wm8400);
383 return 0;
386 static const struct i2c_device_id wm8400_i2c_id[] = {
387 { "wm8400", 0 },
390 MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
392 static struct i2c_driver wm8400_i2c_driver = {
393 .driver = {
394 .name = "WM8400",
395 .owner = THIS_MODULE,
397 .probe = wm8400_i2c_probe,
398 .remove = wm8400_i2c_remove,
399 .id_table = wm8400_i2c_id,
401 #endif
403 static int __init wm8400_module_init(void)
405 int ret = -ENODEV;
407 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
408 ret = i2c_add_driver(&wm8400_i2c_driver);
409 if (ret != 0)
410 pr_err("Failed to register I2C driver: %d\n", ret);
411 #endif
413 return ret;
415 subsys_initcall(wm8400_module_init);
417 static void __exit wm8400_module_exit(void)
419 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
420 i2c_del_driver(&wm8400_i2c_driver);
421 #endif
423 module_exit(wm8400_module_exit);
425 MODULE_LICENSE("GPL");
426 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");