[PATCH] Time: i386 Conversion - part 3: Enable Generic Timekeeping
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / i386 / kernel / time.c
blob2a6ab86ffc1571b76842d13eb92035c264588a38
1 /*
2 * linux/arch/i386/kernel/time.c
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
6 * This file contains the PC-specific time handling details:
7 * reading the RTC at bootup, etc..
8 * 1994-07-02 Alan Modra
9 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
10 * 1995-03-26 Markus Kuhn
11 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
12 * precision CMOS clock update
13 * 1996-05-03 Ingo Molnar
14 * fixed time warps in do_[slow|fast]_gettimeoffset()
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 * 1998-09-05 (Various)
18 * More robust do_fast_gettimeoffset() algorithm implemented
19 * (works with APM, Cyrix 6x86MX and Centaur C6),
20 * monotonic gettimeofday() with fast_get_timeoffset(),
21 * drift-proof precision TSC calibration on boot
22 * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
23 * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
24 * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
25 * 1998-12-16 Andrea Arcangeli
26 * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
27 * because was not accounting lost_ticks.
28 * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli
29 * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
30 * serialize accesses to xtime/lost_ticks).
33 #include <linux/errno.h>
34 #include <linux/sched.h>
35 #include <linux/kernel.h>
36 #include <linux/param.h>
37 #include <linux/string.h>
38 #include <linux/mm.h>
39 #include <linux/interrupt.h>
40 #include <linux/time.h>
41 #include <linux/delay.h>
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sysdev.h>
46 #include <linux/bcd.h>
47 #include <linux/efi.h>
48 #include <linux/mca.h>
50 #include <asm/io.h>
51 #include <asm/smp.h>
52 #include <asm/irq.h>
53 #include <asm/msr.h>
54 #include <asm/delay.h>
55 #include <asm/mpspec.h>
56 #include <asm/uaccess.h>
57 #include <asm/processor.h>
58 #include <asm/timer.h>
60 #include "mach_time.h"
62 #include <linux/timex.h>
63 #include <linux/config.h>
65 #include <asm/hpet.h>
67 #include <asm/arch_hooks.h>
69 #include "io_ports.h"
71 #include <asm/i8259.h>
73 int pit_latch_buggy; /* extern */
75 #include "do_timer.h"
77 unsigned int cpu_khz; /* Detected as we calibrate the TSC */
78 EXPORT_SYMBOL(cpu_khz);
80 extern unsigned long wall_jiffies;
82 DEFINE_SPINLOCK(rtc_lock);
83 EXPORT_SYMBOL(rtc_lock);
85 /* XXX - necessary to keep things compiling. to be removed later */
86 u32 pmtmr_ioport;
89 * This is a special lock that is owned by the CPU and holds the index
90 * register we are working with. It is required for NMI access to the
91 * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
93 volatile unsigned long cmos_lock = 0;
94 EXPORT_SYMBOL(cmos_lock);
96 /* Routines for accessing the CMOS RAM/RTC. */
97 unsigned char rtc_cmos_read(unsigned char addr)
99 unsigned char val;
100 lock_cmos_prefix(addr);
101 outb_p(addr, RTC_PORT(0));
102 val = inb_p(RTC_PORT(1));
103 lock_cmos_suffix(addr);
104 return val;
106 EXPORT_SYMBOL(rtc_cmos_read);
108 void rtc_cmos_write(unsigned char val, unsigned char addr)
110 lock_cmos_prefix(addr);
111 outb_p(addr, RTC_PORT(0));
112 outb_p(val, RTC_PORT(1));
113 lock_cmos_suffix(addr);
115 EXPORT_SYMBOL(rtc_cmos_write);
117 static int set_rtc_mmss(unsigned long nowtime)
119 int retval;
120 unsigned long flags;
122 /* gets recalled with irq locally disabled */
123 /* XXX - does irqsave resolve this? -johnstul */
124 spin_lock_irqsave(&rtc_lock, flags);
125 if (efi_enabled)
126 retval = efi_set_rtc_mmss(nowtime);
127 else
128 retval = mach_set_rtc_mmss(nowtime);
129 spin_unlock_irqrestore(&rtc_lock, flags);
131 return retval;
135 int timer_ack;
137 #if defined(CONFIG_SMP) && defined(CONFIG_FRAME_POINTER)
138 unsigned long profile_pc(struct pt_regs *regs)
140 unsigned long pc = instruction_pointer(regs);
142 if (in_lock_functions(pc))
143 return *(unsigned long *)(regs->ebp + 4);
145 return pc;
147 EXPORT_SYMBOL(profile_pc);
148 #endif
151 * This is the same as the above, except we _also_ save the current
152 * Time Stamp Counter value at the time of the timer interrupt, so that
153 * we later on can estimate the time of day more exactly.
155 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
158 * Here we are in the timer irq handler. We just have irqs locally
159 * disabled but we don't know if the timer_bh is running on the other
160 * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
161 * the irq version of write_lock because as just said we have irq
162 * locally disabled. -arca
164 write_seqlock(&xtime_lock);
166 #ifdef CONFIG_X86_IO_APIC
167 if (timer_ack) {
169 * Subtle, when I/O APICs are used we have to ack timer IRQ
170 * manually to reset the IRR bit for do_slow_gettimeoffset().
171 * This will also deassert NMI lines for the watchdog if run
172 * on an 82489DX-based system.
174 spin_lock(&i8259A_lock);
175 outb(0x0c, PIC_MASTER_OCW3);
176 /* Ack the IRQ; AEOI will end it automatically. */
177 inb(PIC_MASTER_POLL);
178 spin_unlock(&i8259A_lock);
180 #endif
182 do_timer_interrupt_hook(regs);
185 if (MCA_bus) {
186 /* The PS/2 uses level-triggered interrupts. You can't
187 turn them off, nor would you want to (any attempt to
188 enable edge-triggered interrupts usually gets intercepted by a
189 special hardware circuit). Hence we have to acknowledge
190 the timer interrupt. Through some incredibly stupid
191 design idea, the reset for IRQ 0 is done by setting the
192 high bit of the PPI port B (0x61). Note that some PS/2s,
193 notably the 55SX, work fine if this is removed. */
195 irq = inb_p( 0x61 ); /* read the current state */
196 outb_p( irq|0x80, 0x61 ); /* reset the IRQ */
199 write_sequnlock(&xtime_lock);
201 #ifdef CONFIG_X86_LOCAL_APIC
202 if (using_apic_timer)
203 smp_send_timer_broadcast_ipi(regs);
204 #endif
206 return IRQ_HANDLED;
209 /* not static: needed by APM */
210 unsigned long get_cmos_time(void)
212 unsigned long retval;
214 spin_lock(&rtc_lock);
216 if (efi_enabled)
217 retval = efi_get_time();
218 else
219 retval = mach_get_cmos_time();
221 spin_unlock(&rtc_lock);
223 return retval;
225 EXPORT_SYMBOL(get_cmos_time);
227 static void sync_cmos_clock(unsigned long dummy);
229 static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);
231 static void sync_cmos_clock(unsigned long dummy)
233 struct timeval now, next;
234 int fail = 1;
237 * If we have an externally synchronized Linux clock, then update
238 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
239 * called as close as possible to 500 ms before the new second starts.
240 * This code is run on a timer. If the clock is set, that timer
241 * may not expire at the correct time. Thus, we adjust...
243 if (!ntp_synced())
245 * Not synced, exit, do not restart a timer (if one is
246 * running, let it run out).
248 return;
250 do_gettimeofday(&now);
251 if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
252 now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
253 fail = set_rtc_mmss(now.tv_sec);
255 next.tv_usec = USEC_AFTER - now.tv_usec;
256 if (next.tv_usec <= 0)
257 next.tv_usec += USEC_PER_SEC;
259 if (!fail)
260 next.tv_sec = 659;
261 else
262 next.tv_sec = 0;
264 if (next.tv_usec >= USEC_PER_SEC) {
265 next.tv_sec++;
266 next.tv_usec -= USEC_PER_SEC;
268 mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
271 void notify_arch_cmos_timer(void)
273 mod_timer(&sync_cmos_timer, jiffies + 1);
276 static long clock_cmos_diff, sleep_start;
278 static int timer_suspend(struct sys_device *dev, pm_message_t state)
281 * Estimate time zone so that set_time can update the clock
283 clock_cmos_diff = -get_cmos_time();
284 clock_cmos_diff += get_seconds();
285 sleep_start = get_cmos_time();
286 return 0;
289 static int timer_resume(struct sys_device *dev)
291 unsigned long flags;
292 unsigned long sec;
293 unsigned long sleep_length;
295 #ifdef CONFIG_HPET_TIMER
296 if (is_hpet_enabled())
297 hpet_reenable();
298 #endif
299 setup_pit_timer();
300 sec = get_cmos_time() + clock_cmos_diff;
301 sleep_length = (get_cmos_time() - sleep_start) * HZ;
302 write_seqlock_irqsave(&xtime_lock, flags);
303 xtime.tv_sec = sec;
304 xtime.tv_nsec = 0;
305 jiffies_64 += sleep_length;
306 wall_jiffies += sleep_length;
307 write_sequnlock_irqrestore(&xtime_lock, flags);
308 touch_softlockup_watchdog();
309 return 0;
312 static struct sysdev_class timer_sysclass = {
313 .resume = timer_resume,
314 .suspend = timer_suspend,
315 set_kset_name("timer"),
319 /* XXX this driverfs stuff should probably go elsewhere later -john */
320 static struct sys_device device_timer = {
321 .id = 0,
322 .cls = &timer_sysclass,
325 static int time_init_device(void)
327 int error = sysdev_class_register(&timer_sysclass);
328 if (!error)
329 error = sysdev_register(&device_timer);
330 return error;
333 device_initcall(time_init_device);
335 #ifdef CONFIG_HPET_TIMER
336 extern void (*late_time_init)(void);
337 /* Duplicate of time_init() below, with hpet_enable part added */
338 static void __init hpet_time_init(void)
340 xtime.tv_sec = get_cmos_time();
341 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
342 set_normalized_timespec(&wall_to_monotonic,
343 -xtime.tv_sec, -xtime.tv_nsec);
345 if ((hpet_enable() >= 0) && hpet_use_timer) {
346 printk("Using HPET for base-timer\n");
349 time_init_hook();
351 #endif
353 void __init time_init(void)
355 #ifdef CONFIG_HPET_TIMER
356 if (is_hpet_capable()) {
358 * HPET initialization needs to do memory-mapped io. So, let
359 * us do a late initialization after mem_init().
361 late_time_init = hpet_time_init;
362 return;
364 #endif
365 xtime.tv_sec = get_cmos_time();
366 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
367 set_normalized_timespec(&wall_to_monotonic,
368 -xtime.tv_sec, -xtime.tv_nsec);
370 time_init_hook();