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Blackfin: boards: update ASoC resources after machine driver overhaul
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / blackfin / mach-bf537 / boards / stamp.c
blobe16dc456004864b9e2eaa260667a1aa545279abb
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/platform_device.h>
12 #include <linux/io.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/nand.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/mtd/plat-ram.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/flash.h>
20 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
21 #include <linux/usb/isp1362.h>
22 #endif
23 #include <linux/i2c.h>
24 #include <linux/i2c/adp5588.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ata_platform.h>
27 #include <linux/irq.h>
28 #include <linux/interrupt.h>
29 #include <linux/usb/sl811.h>
30 #include <linux/spi/mmc_spi.h>
31 #include <linux/leds.h>
32 #include <linux/input.h>
33 #include <asm/dma.h>
34 #include <asm/bfin5xx_spi.h>
35 #include <asm/reboot.h>
36 #include <asm/portmux.h>
37 #include <asm/dpmc.h>
38 #include <asm/bfin_sport.h>
39 #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
40 #include <linux/regulator/fixed.h>
41 #endif
42 #include <linux/regulator/machine.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/regulator/userspace-consumer.h>
45
46 /*
47 * Name the Board for the /proc/cpuinfo
48 */
49 const char bfin_board_name[] = "ADI BF537-STAMP";
50
51 /*
52 * Driver needs to know address, irq and flag pin.
53 */
54
55 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
56 #include <linux/usb/isp1760.h>
57 static struct resource bfin_isp1760_resources[] = {
58 [0] = {
59 .start = 0x203C0000,
60 .end = 0x203C0000 + 0x000fffff,
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64 .start = IRQ_PF7,
65 .end = IRQ_PF7,
66 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
67 },
68 };
69
70 static struct isp1760_platform_data isp1760_priv = {
71 .is_isp1761 = 0,
72 .bus_width_16 = 1,
73 .port1_otg = 0,
74 .analog_oc = 0,
75 .dack_polarity_high = 0,
76 .dreq_polarity_high = 0,
77 };
78
79 static struct platform_device bfin_isp1760_device = {
80 .name = "isp1760",
81 .id = 0,
82 .dev = {
83 .platform_data = &isp1760_priv,
84 },
85 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
86 .resource = bfin_isp1760_resources,
87 };
88 #endif
89
90 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
91 #include <linux/gpio_keys.h>
92
93 static struct gpio_keys_button bfin_gpio_keys_table[] = {
94 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
95 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
96 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
97 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
98 };
99
100 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
101 .buttons = bfin_gpio_keys_table,
102 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
103 };
104
105 static struct platform_device bfin_device_gpiokeys = {
106 .name = "gpio-keys",
107 .dev = {
108 .platform_data = &bfin_gpio_keys_data,
109 },
110 };
111 #endif
112
113 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
114 static struct resource bfin_pcmcia_cf_resources[] = {
115 {
116 .start = 0x20310000, /* IO PORT */
117 .end = 0x20312000,
118 .flags = IORESOURCE_MEM,
119 }, {
120 .start = 0x20311000, /* Attribute Memory */
121 .end = 0x20311FFF,
122 .flags = IORESOURCE_MEM,
123 }, {
124 .start = IRQ_PF4,
125 .end = IRQ_PF4,
126 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
127 }, {
128 .start = 6, /* Card Detect PF6 */
129 .end = 6,
130 .flags = IORESOURCE_IRQ,
131 },
132 };
133
134 static struct platform_device bfin_pcmcia_cf_device = {
135 .name = "bfin_cf_pcmcia",
136 .id = -1,
137 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
138 .resource = bfin_pcmcia_cf_resources,
139 };
140 #endif
141
142 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
143 static struct platform_device rtc_device = {
144 .name = "rtc-bfin",
145 .id = -1,
146 };
147 #endif
148
149 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
150 #include <linux/smc91x.h>
151
152 static struct smc91x_platdata smc91x_info = {
153 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
154 .leda = RPC_LED_100_10,
155 .ledb = RPC_LED_TX_RX,
156 };
157
158 static struct resource smc91x_resources[] = {
159 {
160 .name = "smc91x-regs",
161 .start = 0x20300300,
162 .end = 0x20300300 + 16,
163 .flags = IORESOURCE_MEM,
164 }, {
165
166 .start = IRQ_PF7,
167 .end = IRQ_PF7,
168 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
169 },
170 };
171 static struct platform_device smc91x_device = {
172 .name = "smc91x",
173 .id = 0,
174 .num_resources = ARRAY_SIZE(smc91x_resources),
175 .resource = smc91x_resources,
176 .dev = {
177 .platform_data = &smc91x_info,
178 },
179 };
180 #endif
181
182 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
183 static struct resource dm9000_resources[] = {
184 [0] = {
185 .start = 0x203FB800,
186 .end = 0x203FB800 + 1,
187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
190 .start = 0x203FB804,
191 .end = 0x203FB804 + 1,
192 .flags = IORESOURCE_MEM,
193 },
194 [2] = {
195 .start = IRQ_PF9,
196 .end = IRQ_PF9,
197 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
198 },
199 };
200
201 static struct platform_device dm9000_device = {
202 .name = "dm9000",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(dm9000_resources),
205 .resource = dm9000_resources,
206 };
207 #endif
208
209 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
210 static struct resource sl811_hcd_resources[] = {
211 {
212 .start = 0x20340000,
213 .end = 0x20340000,
214 .flags = IORESOURCE_MEM,
215 }, {
216 .start = 0x20340004,
217 .end = 0x20340004,
218 .flags = IORESOURCE_MEM,
219 }, {
220 .start = IRQ_PF4,
221 .end = IRQ_PF4,
222 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
223 },
224 };
225
226 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
227 void sl811_port_power(struct device *dev, int is_on)
228 {
229 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
230 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
231 }
232 #endif
233
234 static struct sl811_platform_data sl811_priv = {
235 .potpg = 10,
236 .power = 250, /* == 500mA */
237 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
238 .port_power = &sl811_port_power,
239 #endif
240 };
241
242 static struct platform_device sl811_hcd_device = {
243 .name = "sl811-hcd",
244 .id = 0,
245 .dev = {
246 .platform_data = &sl811_priv,
247 },
248 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
249 .resource = sl811_hcd_resources,
250 };
251 #endif
252
253 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
254 static struct resource isp1362_hcd_resources[] = {
255 {
256 .start = 0x20360000,
257 .end = 0x20360000,
258 .flags = IORESOURCE_MEM,
259 }, {
260 .start = 0x20360004,
261 .end = 0x20360004,
262 .flags = IORESOURCE_MEM,
263 }, {
264 .start = IRQ_PF3,
265 .end = IRQ_PF3,
266 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
267 },
268 };
269
270 static struct isp1362_platform_data isp1362_priv = {
271 .sel15Kres = 1,
272 .clknotstop = 0,
273 .oc_enable = 0,
274 .int_act_high = 0,
275 .int_edge_triggered = 0,
276 .remote_wakeup_connected = 0,
277 .no_power_switching = 1,
278 .power_switching_mode = 0,
279 };
280
281 static struct platform_device isp1362_hcd_device = {
282 .name = "isp1362-hcd",
283 .id = 0,
284 .dev = {
285 .platform_data = &isp1362_priv,
286 },
287 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
288 .resource = isp1362_hcd_resources,
289 };
290 #endif
291
292 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
293 static unsigned short bfin_can_peripherals[] = {
294 P_CAN0_RX, P_CAN0_TX, 0
295 };
296
297 static struct resource bfin_can_resources[] = {
298 {
299 .start = 0xFFC02A00,
300 .end = 0xFFC02FFF,
301 .flags = IORESOURCE_MEM,
302 },
303 {
304 .start = IRQ_CAN_RX,
305 .end = IRQ_CAN_RX,
306 .flags = IORESOURCE_IRQ,
307 },
308 {
309 .start = IRQ_CAN_TX,
310 .end = IRQ_CAN_TX,
311 .flags = IORESOURCE_IRQ,
312 },
313 {
314 .start = IRQ_CAN_ERROR,
315 .end = IRQ_CAN_ERROR,
316 .flags = IORESOURCE_IRQ,
317 },
318 };
319
320 static struct platform_device bfin_can_device = {
321 .name = "bfin_can",
322 .num_resources = ARRAY_SIZE(bfin_can_resources),
323 .resource = bfin_can_resources,
324 .dev = {
325 .platform_data = &bfin_can_peripherals, /* Passed to driver */
326 },
327 };
328 #endif
329
330 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
331 #include <linux/bfin_mac.h>
332 static const unsigned short bfin_mac_peripherals[] = P_MII0;
333
334 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
335 {
336 .addr = 1,
337 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
338 },
339 };
340
341 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
342 .phydev_number = 1,
343 .phydev_data = bfin_phydev_data,
344 .phy_mode = PHY_INTERFACE_MODE_MII,
345 .mac_peripherals = bfin_mac_peripherals,
346 };
347
348 static struct platform_device bfin_mii_bus = {
349 .name = "bfin_mii_bus",
350 .dev = {
351 .platform_data = &bfin_mii_bus_data,
352 }
353 };
354
355 static struct platform_device bfin_mac_device = {
356 .name = "bfin_mac",
357 .dev = {
358 .platform_data = &bfin_mii_bus,
359 }
360 };
361 #endif
362
363 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
364 static struct resource net2272_bfin_resources[] = {
365 {
366 .start = 0x20300000,
367 .end = 0x20300000 + 0x100,
368 .flags = IORESOURCE_MEM,
369 }, {
370 .start = IRQ_PF7,
371 .end = IRQ_PF7,
372 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
373 },
374 };
375
376 static struct platform_device net2272_bfin_device = {
377 .name = "net2272",
378 .id = -1,
379 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
380 .resource = net2272_bfin_resources,
381 };
382 #endif
383
384 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
385 #ifdef CONFIG_MTD_PARTITIONS
386 const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
387
388 static struct mtd_partition bfin_plat_nand_partitions[] = {
389 {
390 .name = "linux kernel(nand)",
391 .size = 0x400000,
392 .offset = 0,
393 }, {
394 .name = "file system(nand)",
395 .size = MTDPART_SIZ_FULL,
396 .offset = MTDPART_OFS_APPEND,
397 },
398 };
399 #endif
400
401 #define BFIN_NAND_PLAT_CLE 2
402 #define BFIN_NAND_PLAT_ALE 1
403 static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
404 {
405 struct nand_chip *this = mtd->priv;
406
407 if (cmd == NAND_CMD_NONE)
408 return;
409
410 if (ctrl & NAND_CLE)
411 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
412 else
413 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
414 }
415
416 #define BFIN_NAND_PLAT_READY GPIO_PF3
417 static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
418 {
419 return gpio_get_value(BFIN_NAND_PLAT_READY);
420 }
421
422 static struct platform_nand_data bfin_plat_nand_data = {
423 .chip = {
424 .nr_chips = 1,
425 .chip_delay = 30,
426 #ifdef CONFIG_MTD_PARTITIONS
427 .part_probe_types = part_probes,
428 .partitions = bfin_plat_nand_partitions,
429 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
430 #endif
431 },
432 .ctrl = {
433 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
434 .dev_ready = bfin_plat_nand_dev_ready,
435 },
436 };
437
438 #define MAX(x, y) (x > y ? x : y)
439 static struct resource bfin_plat_nand_resources = {
440 .start = 0x20212000,
441 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
442 .flags = IORESOURCE_MEM,
443 };
444
445 static struct platform_device bfin_async_nand_device = {
446 .name = "gen_nand",
447 .id = -1,
448 .num_resources = 1,
449 .resource = &bfin_plat_nand_resources,
450 .dev = {
451 .platform_data = &bfin_plat_nand_data,
452 },
453 };
454
455 static void bfin_plat_nand_init(void)
456 {
457 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
458 }
459 #else
460 static void bfin_plat_nand_init(void) {}
461 #endif
462
463 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
464 static struct mtd_partition stamp_partitions[] = {
465 {
466 .name = "bootloader(nor)",
467 .size = 0x40000,
468 .offset = 0,
469 }, {
470 .name = "linux kernel(nor)",
471 .size = 0x180000,
472 .offset = MTDPART_OFS_APPEND,
473 }, {
474 .name = "file system(nor)",
475 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
476 .offset = MTDPART_OFS_APPEND,
477 }, {
478 .name = "MAC Address(nor)",
479 .size = MTDPART_SIZ_FULL,
480 .offset = 0x3F0000,
481 .mask_flags = MTD_WRITEABLE,
482 }
483 };
484
485 static struct physmap_flash_data stamp_flash_data = {
486 .width = 2,
487 .parts = stamp_partitions,
488 .nr_parts = ARRAY_SIZE(stamp_partitions),
489 #ifdef CONFIG_ROMKERNEL
490 .probe_type = "map_rom",
491 #endif
492 };
493
494 static struct resource stamp_flash_resource = {
495 .start = 0x20000000,
496 .end = 0x203fffff,
497 .flags = IORESOURCE_MEM,
498 };
499
500 static struct platform_device stamp_flash_device = {
501 .name = "physmap-flash",
502 .id = 0,
503 .dev = {
504 .platform_data = &stamp_flash_data,
505 },
506 .num_resources = 1,
507 .resource = &stamp_flash_resource,
508 };
509 #endif
510
511 #if defined(CONFIG_MTD_M25P80) \
512 || defined(CONFIG_MTD_M25P80_MODULE)
513 static struct mtd_partition bfin_spi_flash_partitions[] = {
514 {
515 .name = "bootloader(spi)",
516 .size = 0x00040000,
517 .offset = 0,
518 .mask_flags = MTD_CAP_ROM
519 }, {
520 .name = "linux kernel(spi)",
521 .size = 0x180000,
522 .offset = MTDPART_OFS_APPEND,
523 }, {
524 .name = "file system(spi)",
525 .size = MTDPART_SIZ_FULL,
526 .offset = MTDPART_OFS_APPEND,
527 }
528 };
529
530 static struct flash_platform_data bfin_spi_flash_data = {
531 .name = "m25p80",
532 .parts = bfin_spi_flash_partitions,
533 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
534 /* .type = "m25p64", */
535 };
536
537 /* SPI flash chip (m25p64) */
538 static struct bfin5xx_spi_chip spi_flash_chip_info = {
539 .enable_dma = 0, /* use dma transfer with this chip*/
540 .bits_per_word = 8,
541 };
542 #endif
543
544 #if defined(CONFIG_BFIN_SPI_ADC) \
545 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
546 /* SPI ADC chip */
547 static struct bfin5xx_spi_chip spi_adc_chip_info = {
548 .enable_dma = 1, /* use dma transfer with this chip*/
549 .bits_per_word = 16,
550 };
551 #endif
552
553 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
554 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
555 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
556 .enable_dma = 0,
557 .bits_per_word = 16,
558 };
559 #endif
560
561 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
562 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
563 static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
564 .enable_dma = 0,
565 .bits_per_word = 8,
566 };
567 #endif
568
569 #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
570 || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
571 static struct bfin5xx_spi_chip adav801_spi_chip_info = {
572 .enable_dma = 0,
573 .bits_per_word = 8,
574 };
575 #endif
576
577 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
578 #include <linux/input/ad714x.h>
579 static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
580 .enable_dma = 0,
581 .bits_per_word = 16,
582 };
583
584 static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
585 {
586 .start_stage = 0,
587 .end_stage = 7,
588 .max_coord = 128,
589 },
590 };
591
592 static struct ad714x_button_plat ad7147_spi_button_plat[] = {
593 {
594 .keycode = BTN_FORWARD,
595 .l_mask = 0,
596 .h_mask = 0x600,
597 },
598 {
599 .keycode = BTN_LEFT,
600 .l_mask = 0,
601 .h_mask = 0x500,
602 },
603 {
604 .keycode = BTN_MIDDLE,
605 .l_mask = 0,
606 .h_mask = 0x800,
607 },
608 {
609 .keycode = BTN_RIGHT,
610 .l_mask = 0x100,
611 .h_mask = 0x400,
612 },
613 {
614 .keycode = BTN_BACK,
615 .l_mask = 0x200,
616 .h_mask = 0x400,
617 },
618 };
619 static struct ad714x_platform_data ad7147_spi_platform_data = {
620 .slider_num = 1,
621 .button_num = 5,
622 .slider = ad7147_spi_slider_plat,
623 .button = ad7147_spi_button_plat,
624 .stage_cfg_reg = {
625 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
626 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
627 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
628 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
629 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
630 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
631 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
632 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
633 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
634 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
635 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
636 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
637 },
638 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
639 };
640 #endif
641
642 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
643 #include <linux/input/ad714x.h>
644 static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
645 {
646 .keycode = BTN_1,
647 .l_mask = 0,
648 .h_mask = 0x1,
649 },
650 {
651 .keycode = BTN_2,
652 .l_mask = 0,
653 .h_mask = 0x2,
654 },
655 {
656 .keycode = BTN_3,
657 .l_mask = 0,
658 .h_mask = 0x4,
659 },
660 {
661 .keycode = BTN_4,
662 .l_mask = 0x0,
663 .h_mask = 0x8,
664 },
665 };
666 static struct ad714x_platform_data ad7142_i2c_platform_data = {
667 .button_num = 4,
668 .button = ad7142_i2c_button_plat,
669 .stage_cfg_reg = {
670 /* fixme: figure out right setting for all comoponent according
671 * to hardware feature of EVAL-AD7142EB board */
672 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
673 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
674 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
675 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
676 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
677 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
678 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
679 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
680 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
681 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
682 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
683 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
684 },
685 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
686 };
687 #endif
688
689 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
690 static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
691 .enable_dma = 0,
692 .bits_per_word = 16,
693 };
694 #endif
695
696 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
697 static unsigned short ad2s120x_platform_data[] = {
698 /* used as SAMPLE and RDVEL */
699 GPIO_PF5, GPIO_PF6, 0
700 };
701
702 static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
703 .enable_dma = 0,
704 .bits_per_word = 16,
705 };
706 #endif
707
708 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
709 static unsigned short ad2s1210_platform_data[] = {
710 /* use as SAMPLE, A0, A1 */
711 GPIO_PF7, GPIO_PF8, GPIO_PF9,
712 # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
713 /* the RES0 and RES1 pins */
714 GPIO_PF4, GPIO_PF5,
715 # endif
716 0,
717 };
718
719 static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
720 .enable_dma = 0,
721 .bits_per_word = 8,
722 };
723 #endif
724
725 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
726 static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
727 .enable_dma = 0,
728 .bits_per_word = 16,
729 };
730 #endif
731
732 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
733 static unsigned short ad7816_platform_data[] = {
734 GPIO_PF4, /* rdwr_pin */
735 GPIO_PF5, /* convert_pin */
736 GPIO_PF7, /* busy_pin */
737 0,
738 };
739
740 static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
741 .enable_dma = 0,
742 .bits_per_word = 8,
743 };
744 #endif
745
746 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
747 static unsigned long adt7310_platform_data[3] = {
748 /* INT bound temperature alarm event. line 1 */
749 IRQ_PG4, IRQF_TRIGGER_LOW,
750 /* CT bound temperature alarm event irq_flags. line 0 */
751 IRQF_TRIGGER_LOW,
752 };
753
754 static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
755 .enable_dma = 0,
756 .bits_per_word = 8,
757 };
758 #endif
759
760 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
761 static unsigned short ad7298_platform_data[] = {
762 GPIO_PF7, /* busy_pin */
763 0,
764 };
765
766 static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
767 .enable_dma = 0,
768 .bits_per_word = 16,
769 };
770 #endif
771
772 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
773 static unsigned long adt7316_spi_data[2] = {
774 IRQF_TRIGGER_LOW, /* interrupt flags */
775 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
776 };
777
778 static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
779 .enable_dma = 0,
780 .bits_per_word = 8,
781 };
782 #endif
783
784 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
785 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
786
787 static int bfin_mmc_spi_init(struct device *dev,
788 irqreturn_t (*detect_int)(int, void *), void *data)
789 {
790 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
791 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
792 }
793
794 static void bfin_mmc_spi_exit(struct device *dev, void *data)
795 {
796 free_irq(MMC_SPI_CARD_DETECT_INT, data);
797 }
798
799 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
800 .init = bfin_mmc_spi_init,
801 .exit = bfin_mmc_spi_exit,
802 .detect_delay = 100, /* msecs */
803 };
804
805 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
806 .enable_dma = 0,
807 .bits_per_word = 8,
808 .pio_interrupt = 0,
809 };
810 #endif
811
812 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
813 #include <linux/spi/ad7877.h>
814 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
815 .enable_dma = 0,
816 .bits_per_word = 16,
817 };
818
819 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
820 .model = 7877,
821 .vref_delay_usecs = 50, /* internal, no capacitor */
822 .x_plate_ohms = 419,
823 .y_plate_ohms = 486,
824 .pressure_max = 1000,
825 .pressure_min = 0,
826 .stopacq_polarity = 1,
827 .first_conversion_delay = 3,
828 .acquisition_time = 1,
829 .averaging = 1,
830 .pen_down_acc_interval = 1,
831 };
832 #endif
833
834 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
835 #include <linux/spi/ad7879.h>
836 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
837 .model = 7879, /* Model = AD7879 */
838 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
839 .pressure_max = 10000,
840 .pressure_min = 0,
841 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
842 .acquisition_time = 1, /* 4us acquisition time per sample */
843 .median = 2, /* do 8 measurements */
844 .averaging = 1, /* take the average of 4 middle samples */
845 .pen_down_acc_interval = 255, /* 9.4 ms */
846 .gpio_export = 1, /* Export GPIO to gpiolib */
847 .gpio_base = -1, /* Dynamic allocation */
848 };
849 #endif
850
851 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
852 #include <linux/input/adxl34x.h>
853 static const struct adxl34x_platform_data adxl34x_info = {
854 .x_axis_offset = 0,
855 .y_axis_offset = 0,
856 .z_axis_offset = 0,
857 .tap_threshold = 0x31,
858 .tap_duration = 0x10,
859 .tap_latency = 0x60,
860 .tap_window = 0xF0,
861 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
862 .act_axis_control = 0xFF,
863 .activity_threshold = 5,
864 .inactivity_threshold = 3,
865 .inactivity_time = 4,
866 .free_fall_threshold = 0x7,
867 .free_fall_time = 0x20,
868 .data_rate = 0x8,
869 .data_range = ADXL_FULL_RES,
870
871 .ev_type = EV_ABS,
872 .ev_code_x = ABS_X, /* EV_REL */
873 .ev_code_y = ABS_Y, /* EV_REL */
874 .ev_code_z = ABS_Z, /* EV_REL */
875
876 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
877
878 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
879 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
880 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
881 .fifo_mode = ADXL_FIFO_STREAM,
882 .orientation_enable = ADXL_EN_ORIENTATION_3D,
883 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
884 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
885 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
886 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
887 };
888 #endif
889
890 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
891 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
892 .enable_dma = 0,
893 .bits_per_word = 16,
894 };
895 #endif
896
897 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
898 static struct bfin5xx_spi_chip spidev_chip_info = {
899 .enable_dma = 0,
900 .bits_per_word = 8,
901 };
902 #endif
903
904 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
905 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
906 .enable_dma = 0,
907 .bits_per_word = 8,
908 };
909 #endif
910
911 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
912 static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
913 .enable_dma = 1,
914 .bits_per_word = 8,
915 };
916 #endif
917
918 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
919 static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
920 .bits_per_word = 16,
921 };
922
923 #include <linux/spi/adf702x.h>
924 #define TXREG 0x0160A470
925 static const u32 adf7021_regs[] = {
926 0x09608FA0,
927 0x00575011,
928 0x00A7F092,
929 0x2B141563,
930 0x81F29E94,
931 0x00003155,
932 0x050A4F66,
933 0x00000007,
934 0x00000008,
935 0x000231E9,
936 0x3296354A,
937 0x891A2B3B,
938 0x00000D9C,
939 0x0000000D,
940 0x0000000E,
941 0x0000000F,
942 };
943
944 static struct adf702x_platform_data adf7021_platform_data = {
945 .regs_base = (void *)SPORT1_TCR1,
946 .dma_ch_rx = CH_SPORT1_RX,
947 .dma_ch_tx = CH_SPORT1_TX,
948 .irq_sport_err = IRQ_SPORT1_ERROR,
949 .gpio_int_rfs = GPIO_PF8,
950 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
951 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
952 .adf702x_model = MODEL_ADF7021,
953 .adf702x_regs = adf7021_regs,
954 .tx_reg = TXREG,
955 };
956 static inline void adf702x_mac_init(void)
957 {
958 random_ether_addr(adf7021_platform_data.mac_addr);
959 }
960 #else
961 static inline void adf702x_mac_init(void) {}
962 #endif
963
964 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
965 #include <linux/spi/ads7846.h>
966 static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
967 .bits_per_word = 8,
968 };
969
970 static int ads7873_get_pendown_state(void)
971 {
972 return gpio_get_value(GPIO_PF6);
973 }
974
975 static struct ads7846_platform_data __initdata ad7873_pdata = {
976 .model = 7873, /* AD7873 */
977 .x_max = 0xfff,
978 .y_max = 0xfff,
979 .x_plate_ohms = 620,
980 .debounce_max = 1,
981 .debounce_rep = 0,
982 .debounce_tol = (~0),
983 .get_pendown_state = ads7873_get_pendown_state,
984 };
985 #endif
986
987 #if defined(CONFIG_MTD_DATAFLASH) \
988 || defined(CONFIG_MTD_DATAFLASH_MODULE)
989
990 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
991 {
992 .name = "bootloader(spi)",
993 .size = 0x00040000,
994 .offset = 0,
995 .mask_flags = MTD_CAP_ROM
996 }, {
997 .name = "linux kernel(spi)",
998 .size = 0x180000,
999 .offset = MTDPART_OFS_APPEND,
1000 }, {
1001 .name = "file system(spi)",
1002 .size = MTDPART_SIZ_FULL,
1003 .offset = MTDPART_OFS_APPEND,
1004 }
1005 };
1006
1007 static struct flash_platform_data bfin_spi_dataflash_data = {
1008 .name = "SPI Dataflash",
1009 .parts = bfin_spi_dataflash_partitions,
1010 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
1011 };
1012
1013 /* DataFlash chip */
1014 static struct bfin5xx_spi_chip data_flash_chip_info = {
1015 .enable_dma = 0, /* use dma transfer with this chip*/
1016 .bits_per_word = 8,
1017 };
1018 #endif
1019
1020 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1021 static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1022 .enable_dma = 0, /* use dma transfer with this chip*/
1023 .bits_per_word = 8,
1024 };
1025 #endif
1026
1027 #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
1028 static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
1029 .enable_dma = 0, /* use dma transfer with this chip*/
1030 .bits_per_word = 8,
1031 };
1032 #endif
1033
1034 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1035 #if defined(CONFIG_MTD_M25P80) \
1036 || defined(CONFIG_MTD_M25P80_MODULE)
1037 {
1038 /* the modalias must be the same as spi device driver name */
1039 .modalias = "m25p80", /* Name of spi_driver for this device */
1040 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1041 .bus_num = 0, /* Framework bus number */
1042 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
1043 .platform_data = &bfin_spi_flash_data,
1044 .controller_data = &spi_flash_chip_info,
1045 .mode = SPI_MODE_3,
1046 },
1047 #endif
1048 #if defined(CONFIG_MTD_DATAFLASH) \
1049 || defined(CONFIG_MTD_DATAFLASH_MODULE)
1050 { /* DataFlash chip */
1051 .modalias = "mtd_dataflash",
1052 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
1053 .bus_num = 0, /* Framework bus number */
1054 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
1055 .platform_data = &bfin_spi_dataflash_data,
1056 .controller_data = &data_flash_chip_info,
1057 .mode = SPI_MODE_3,
1058 },
1059 #endif
1060 #if defined(CONFIG_BFIN_SPI_ADC) \
1061 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1062 {
1063 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
1064 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1065 .bus_num = 0, /* Framework bus number */
1066 .chip_select = 1, /* Framework chip select. */
1067 .platform_data = NULL, /* No spi_driver specific config */
1068 .controller_data = &spi_adc_chip_info,
1069 },
1070 #endif
1071
1072 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1073 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1074 {
1075 .modalias = "ad183x",
1076 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1077 .bus_num = 0,
1078 .chip_select = 4,
1079 .platform_data = "ad1836", /* only includes chip name for the moment */
1080 .controller_data = &ad1836_spi_chip_info,
1081 .mode = SPI_MODE_3,
1082 },
1083 #endif
1084
1085 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
1086 {
1087 .modalias = "ad193x",
1088 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1089 .bus_num = 0,
1090 .chip_select = 5,
1091 .controller_data = &ad1938_spi_chip_info,
1092 .mode = SPI_MODE_3,
1093 },
1094 #endif
1095
1096 #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
1097 {
1098 .modalias = "adav80x",
1099 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1100 .bus_num = 0,
1101 .chip_select = 1,
1102 .controller_data = &adav801_spi_chip_info,
1103 .mode = SPI_MODE_3,
1104 },
1105 #endif
1106
1107 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
1108 {
1109 .modalias = "ad714x_captouch",
1110 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1111 .irq = IRQ_PF4,
1112 .bus_num = 0,
1113 .chip_select = 5,
1114 .mode = SPI_MODE_3,
1115 .platform_data = &ad7147_spi_platform_data,
1116 .controller_data = &ad7147_spi_chip_info,
1117 },
1118 #endif
1119
1120 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1121 {
1122 .modalias = "ad2s90",
1123 .bus_num = 0,
1124 .chip_select = 3, /* change it for your board */
1125 .mode = SPI_MODE_3,
1126 .platform_data = NULL,
1127 .controller_data = &ad2s90_spi_chip_info,
1128 },
1129 #endif
1130
1131 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1132 {
1133 .modalias = "ad2s120x",
1134 .bus_num = 0,
1135 .chip_select = 4, /* CS, change it for your board */
1136 .platform_data = ad2s120x_platform_data,
1137 .controller_data = &ad2s120x_spi_chip_info,
1138 },
1139 #endif
1140
1141 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1142 {
1143 .modalias = "ad2s1210",
1144 .max_speed_hz = 8192000,
1145 .bus_num = 0,
1146 .chip_select = 4, /* CS, change it for your board */
1147 .platform_data = ad2s1210_platform_data,
1148 .controller_data = &ad2s1210_spi_chip_info,
1149 },
1150 #endif
1151
1152 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1153 {
1154 .modalias = "ad7314",
1155 .max_speed_hz = 1000000,
1156 .bus_num = 0,
1157 .chip_select = 4, /* CS, change it for your board */
1158 .controller_data = &ad7314_spi_chip_info,
1159 .mode = SPI_MODE_1,
1160 },
1161 #endif
1162
1163 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1164 {
1165 .modalias = "ad7818",
1166 .max_speed_hz = 1000000,
1167 .bus_num = 0,
1168 .chip_select = 4, /* CS, change it for your board */
1169 .platform_data = ad7816_platform_data,
1170 .controller_data = &ad7816_spi_chip_info,
1171 .mode = SPI_MODE_3,
1172 },
1173 #endif
1174
1175 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1176 {
1177 .modalias = "adt7310",
1178 .max_speed_hz = 1000000,
1179 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1180 .bus_num = 0,
1181 .chip_select = 4, /* CS, change it for your board */
1182 .platform_data = adt7310_platform_data,
1183 .controller_data = &adt7310_spi_chip_info,
1184 .mode = SPI_MODE_3,
1185 },
1186 #endif
1187
1188 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1189 {
1190 .modalias = "ad7298",
1191 .max_speed_hz = 1000000,
1192 .bus_num = 0,
1193 .chip_select = 4, /* CS, change it for your board */
1194 .platform_data = ad7298_platform_data,
1195 .controller_data = &ad7298_spi_chip_info,
1196 .mode = SPI_MODE_3,
1197 },
1198 #endif
1199
1200 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1201 {
1202 .modalias = "adt7316",
1203 .max_speed_hz = 1000000,
1204 .irq = IRQ_PG5, /* interrupt line */
1205 .bus_num = 0,
1206 .chip_select = 4, /* CS, change it for your board */
1207 .platform_data = adt7316_spi_data,
1208 .controller_data = &adt7316_spi_chip_info,
1209 .mode = SPI_MODE_3,
1210 },
1211 #endif
1212
1213 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1214 {
1215 .modalias = "mmc_spi",
1216 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1217 .bus_num = 0,
1218 .chip_select = 4,
1219 .platform_data = &bfin_mmc_spi_pdata,
1220 .controller_data = &mmc_spi_chip_info,
1221 .mode = SPI_MODE_3,
1222 },
1223 #endif
1224 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1225 {
1226 .modalias = "ad7877",
1227 .platform_data = &bfin_ad7877_ts_info,
1228 .irq = IRQ_PF6,
1229 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1230 .bus_num = 0,
1231 .chip_select = 1,
1232 .controller_data = &spi_ad7877_chip_info,
1233 },
1234 #endif
1235 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
1236 {
1237 .modalias = "ad7879",
1238 .platform_data = &bfin_ad7879_ts_info,
1239 .irq = IRQ_PF7,
1240 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1241 .bus_num = 0,
1242 .chip_select = 1,
1243 .controller_data = &spi_ad7879_chip_info,
1244 .mode = SPI_CPHA | SPI_CPOL,
1245 },
1246 #endif
1247 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1248 {
1249 .modalias = "spidev",
1250 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1251 .bus_num = 0,
1252 .chip_select = 1,
1253 .controller_data = &spidev_chip_info,
1254 },
1255 #endif
1256 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1257 {
1258 .modalias = "bfin-lq035q1-spi",
1259 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1260 .bus_num = 0,
1261 .chip_select = 2,
1262 .controller_data = &lq035q1_spi_chip_info,
1263 .mode = SPI_CPHA | SPI_CPOL,
1264 },
1265 #endif
1266 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1267 {
1268 .modalias = "enc28j60",
1269 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1270 .irq = IRQ_PF6,
1271 .bus_num = 0,
1272 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1273 .controller_data = &enc28j60_spi_chip_info,
1274 .mode = SPI_MODE_0,
1275 },
1276 #endif
1277 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1278 {
1279 .modalias = "adxl34x",
1280 .platform_data = &adxl34x_info,
1281 .irq = IRQ_PF6,
1282 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1283 .bus_num = 0,
1284 .chip_select = 2,
1285 .controller_data = &spi_adxl34x_chip_info,
1286 .mode = SPI_MODE_3,
1287 },
1288 #endif
1289 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1290 {
1291 .modalias = "adf702x",
1292 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1293 .bus_num = 0,
1294 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1295 .controller_data = &adf7021_spi_chip_info,
1296 .platform_data = &adf7021_platform_data,
1297 .mode = SPI_MODE_0,
1298 },
1299 #endif
1300 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1301 {
1302 .modalias = "ads7846",
1303 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1304 .bus_num = 0,
1305 .irq = IRQ_PF6,
1306 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1307 .controller_data = &ad7873_spi_chip_info,
1308 .platform_data = &ad7873_pdata,
1309 .mode = SPI_MODE_0,
1310 },
1311 #endif
1312 #if defined(CONFIG_AD7476) \
1313 || defined(CONFIG_AD7476_MODULE)
1314 {
1315 .modalias = "ad7476", /* Name of spi_driver for this device */
1316 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1317 .bus_num = 0, /* Framework bus number */
1318 .chip_select = 1, /* Framework chip select. */
1319 .platform_data = NULL, /* No spi_driver specific config */
1320 .controller_data = &spi_ad7476_chip_info,
1321 .mode = SPI_MODE_3,
1322 },
1323 #endif
1324 #if defined(CONFIG_ADE7753) \
1325 || defined(CONFIG_ADE7753_MODULE)
1326 {
1327 .modalias = "ade7753",
1328 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1329 .bus_num = 0,
1330 .chip_select = 1, /* CS, change it for your board */
1331 .platform_data = NULL, /* No spi_driver specific config */
1332 .mode = SPI_MODE_1,
1333 },
1334 #endif
1335 #if defined(CONFIG_ADE7754) \
1336 || defined(CONFIG_ADE7754_MODULE)
1337 {
1338 .modalias = "ade7754",
1339 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1340 .bus_num = 0,
1341 .chip_select = 1, /* CS, change it for your board */
1342 .platform_data = NULL, /* No spi_driver specific config */
1343 .mode = SPI_MODE_1,
1344 },
1345 #endif
1346 #if defined(CONFIG_ADE7758) \
1347 || defined(CONFIG_ADE7758_MODULE)
1348 {
1349 .modalias = "ade7758",
1350 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1351 .bus_num = 0,
1352 .chip_select = 1, /* CS, change it for your board */
1353 .platform_data = NULL, /* No spi_driver specific config */
1354 .mode = SPI_MODE_1,
1355 },
1356 #endif
1357 #if defined(CONFIG_ADE7759) \
1358 || defined(CONFIG_ADE7759_MODULE)
1359 {
1360 .modalias = "ade7759",
1361 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1362 .bus_num = 0,
1363 .chip_select = 1, /* CS, change it for your board */
1364 .platform_data = NULL, /* No spi_driver specific config */
1365 .mode = SPI_MODE_1,
1366 },
1367 #endif
1368 #if defined(CONFIG_ADE7854_SPI) \
1369 || defined(CONFIG_ADE7854_SPI_MODULE)
1370 {
1371 .modalias = "ade7854",
1372 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1373 .bus_num = 0,
1374 .chip_select = 1, /* CS, change it for your board */
1375 .platform_data = NULL, /* No spi_driver specific config */
1376 .mode = SPI_MODE_3,
1377 },
1378 #endif
1379 #if defined(CONFIG_ADIS16060) \
1380 || defined(CONFIG_ADIS16060_MODULE)
1381 {
1382 .modalias = "adis16060_r",
1383 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1384 .bus_num = 0,
1385 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1386 .platform_data = NULL, /* No spi_driver specific config */
1387 .mode = SPI_MODE_0,
1388 },
1389 {
1390 .modalias = "adis16060_w",
1391 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1392 .bus_num = 0,
1393 .chip_select = 2, /* CS for write, change it for your board */
1394 .platform_data = NULL, /* No spi_driver specific config */
1395 .mode = SPI_MODE_1,
1396 },
1397 #endif
1398 #if defined(CONFIG_ADIS16130) \
1399 || defined(CONFIG_ADIS16130_MODULE)
1400 {
1401 .modalias = "adis16130",
1402 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1403 .bus_num = 0,
1404 .chip_select = 1, /* CS for read, change it for your board */
1405 .platform_data = NULL, /* No spi_driver specific config */
1406 .mode = SPI_MODE_3,
1407 },
1408 #endif
1409 #if defined(CONFIG_ADIS16201) \
1410 || defined(CONFIG_ADIS16201_MODULE)
1411 {
1412 .modalias = "adis16201",
1413 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1414 .bus_num = 0,
1415 .chip_select = 5, /* CS, change it for your board */
1416 .platform_data = NULL, /* No spi_driver specific config */
1417 .mode = SPI_MODE_3,
1418 .irq = IRQ_PF4,
1419 },
1420 #endif
1421 #if defined(CONFIG_ADIS16203) \
1422 || defined(CONFIG_ADIS16203_MODULE)
1423 {
1424 .modalias = "adis16203",
1425 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1426 .bus_num = 0,
1427 .chip_select = 5, /* CS, change it for your board */
1428 .platform_data = NULL, /* No spi_driver specific config */
1429 .mode = SPI_MODE_3,
1430 .irq = IRQ_PF4,
1431 },
1432 #endif
1433 #if defined(CONFIG_ADIS16204) \
1434 || defined(CONFIG_ADIS16204_MODULE)
1435 {
1436 .modalias = "adis16204",
1437 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1438 .bus_num = 0,
1439 .chip_select = 5, /* CS, change it for your board */
1440 .platform_data = NULL, /* No spi_driver specific config */
1441 .mode = SPI_MODE_3,
1442 .irq = IRQ_PF4,
1443 },
1444 #endif
1445 #if defined(CONFIG_ADIS16209) \
1446 || defined(CONFIG_ADIS16209_MODULE)
1447 {
1448 .modalias = "adis16209",
1449 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1450 .bus_num = 0,
1451 .chip_select = 5, /* CS, change it for your board */
1452 .platform_data = NULL, /* No spi_driver specific config */
1453 .mode = SPI_MODE_3,
1454 .irq = IRQ_PF4,
1455 },
1456 #endif
1457 #if defined(CONFIG_ADIS16220) \
1458 || defined(CONFIG_ADIS16220_MODULE)
1459 {
1460 .modalias = "adis16220",
1461 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1462 .bus_num = 0,
1463 .chip_select = 5, /* CS, change it for your board */
1464 .platform_data = NULL, /* No spi_driver specific config */
1465 .mode = SPI_MODE_3,
1466 .irq = IRQ_PF4,
1467 },
1468 #endif
1469 #if defined(CONFIG_ADIS16240) \
1470 || defined(CONFIG_ADIS16240_MODULE)
1471 {
1472 .modalias = "adis16240",
1473 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1474 .bus_num = 0,
1475 .chip_select = 5, /* CS, change it for your board */
1476 .platform_data = NULL, /* No spi_driver specific config */
1477 .mode = SPI_MODE_3,
1478 .irq = IRQ_PF4,
1479 },
1480 #endif
1481 #if defined(CONFIG_ADIS16260) \
1482 || defined(CONFIG_ADIS16260_MODULE)
1483 {
1484 .modalias = "adis16260",
1485 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1486 .bus_num = 0,
1487 .chip_select = 5, /* CS, change it for your board */
1488 .platform_data = NULL, /* No spi_driver specific config */
1489 .mode = SPI_MODE_3,
1490 .irq = IRQ_PF4,
1491 },
1492 #endif
1493 #if defined(CONFIG_ADIS16261) \
1494 || defined(CONFIG_ADIS16261_MODULE)
1495 {
1496 .modalias = "adis16261",
1497 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1498 .bus_num = 0,
1499 .chip_select = 1, /* CS, change it for your board */
1500 .platform_data = NULL, /* No spi_driver specific config */
1501 .mode = SPI_MODE_3,
1502 },
1503 #endif
1504 #if defined(CONFIG_ADIS16300) \
1505 || defined(CONFIG_ADIS16300_MODULE)
1506 {
1507 .modalias = "adis16300",
1508 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1509 .bus_num = 0,
1510 .chip_select = 5, /* CS, change it for your board */
1511 .platform_data = NULL, /* No spi_driver specific config */
1512 .mode = SPI_MODE_3,
1513 .irq = IRQ_PF4,
1514 },
1515 #endif
1516 #if defined(CONFIG_ADIS16350) \
1517 || defined(CONFIG_ADIS16350_MODULE)
1518 {
1519 .modalias = "adis16364",
1520 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1521 .bus_num = 0,
1522 .chip_select = 5, /* CS, change it for your board */
1523 .platform_data = NULL, /* No spi_driver specific config */
1524 .mode = SPI_MODE_3,
1525 .irq = IRQ_PF4,
1526 },
1527 #endif
1528 #if defined(CONFIG_ADIS16400) \
1529 || defined(CONFIG_ADIS16400_MODULE)
1530 {
1531 .modalias = "adis16400",
1532 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1533 .bus_num = 0,
1534 .chip_select = 1, /* CS, change it for your board */
1535 .platform_data = NULL, /* No spi_driver specific config */
1536 .mode = SPI_MODE_3,
1537 },
1538 #endif
1539 };
1540
1541 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1542 /* SPI controller data */
1543 static struct bfin5xx_spi_master bfin_spi0_info = {
1544 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1545 .enable_dma = 1, /* master has the ability to do dma transfer */
1546 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1547 };
1548
1549 /* SPI (0) */
1550 static struct resource bfin_spi0_resource[] = {
1551 [0] = {
1552 .start = SPI0_REGBASE,
1553 .end = SPI0_REGBASE + 0xFF,
1554 .flags = IORESOURCE_MEM,
1555 },
1556 [1] = {
1557 .start = CH_SPI,
1558 .end = CH_SPI,
1559 .flags = IORESOURCE_DMA,
1560 },
1561 [2] = {
1562 .start = IRQ_SPI,
1563 .end = IRQ_SPI,
1564 .flags = IORESOURCE_IRQ,
1565 },
1566 };
1567
1568 static struct platform_device bfin_spi0_device = {
1569 .name = "bfin-spi",
1570 .id = 0, /* Bus number */
1571 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1572 .resource = bfin_spi0_resource,
1573 .dev = {
1574 .platform_data = &bfin_spi0_info, /* Passed to driver */
1575 },
1576 };
1577 #endif /* spi master and devices */
1578
1579 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1580
1581 /* SPORT SPI controller data */
1582 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1583 .num_chipselect = 1, /* master only supports one device */
1584 .enable_dma = 0, /* master don't support DMA */
1585 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1586 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1587 };
1588
1589 static struct resource bfin_sport_spi0_resource[] = {
1590 [0] = {
1591 .start = SPORT0_TCR1,
1592 .end = SPORT0_TCR1 + 0xFF,
1593 .flags = IORESOURCE_MEM,
1594 },
1595 [1] = {
1596 .start = IRQ_SPORT0_ERROR,
1597 .end = IRQ_SPORT0_ERROR,
1598 .flags = IORESOURCE_IRQ,
1599 },
1600 };
1601
1602 static struct platform_device bfin_sport_spi0_device = {
1603 .name = "bfin-sport-spi",
1604 .id = 1, /* Bus number */
1605 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1606 .resource = bfin_sport_spi0_resource,
1607 .dev = {
1608 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1609 },
1610 };
1611
1612 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1613 .num_chipselect = 1, /* master only supports one device */
1614 .enable_dma = 0, /* master don't support DMA */
1615 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1616 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1617 };
1618
1619 static struct resource bfin_sport_spi1_resource[] = {
1620 [0] = {
1621 .start = SPORT1_TCR1,
1622 .end = SPORT1_TCR1 + 0xFF,
1623 .flags = IORESOURCE_MEM,
1624 },
1625 [1] = {
1626 .start = IRQ_SPORT1_ERROR,
1627 .end = IRQ_SPORT1_ERROR,
1628 .flags = IORESOURCE_IRQ,
1629 },
1630 };
1631
1632 static struct platform_device bfin_sport_spi1_device = {
1633 .name = "bfin-sport-spi",
1634 .id = 2, /* Bus number */
1635 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1636 .resource = bfin_sport_spi1_resource,
1637 .dev = {
1638 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1639 },
1640 };
1641
1642 #endif /* sport spi master and devices */
1643
1644 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1645 static struct platform_device bfin_fb_device = {
1646 .name = "bf537-lq035",
1647 };
1648 #endif
1649
1650 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1651 #include <asm/bfin-lq035q1.h>
1652
1653 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1654 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1655 .ppi_mode = USE_RGB565_16_BIT_PPI,
1656 .use_bl = 0, /* let something else control the LCD Blacklight */
1657 .gpio_bl = GPIO_PF7,
1658 };
1659
1660 static struct resource bfin_lq035q1_resources[] = {
1661 {
1662 .start = IRQ_PPI_ERROR,
1663 .end = IRQ_PPI_ERROR,
1664 .flags = IORESOURCE_IRQ,
1665 },
1666 };
1667
1668 static struct platform_device bfin_lq035q1_device = {
1669 .name = "bfin-lq035q1",
1670 .id = -1,
1671 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1672 .resource = bfin_lq035q1_resources,
1673 .dev = {
1674 .platform_data = &bfin_lq035q1_data,
1675 },
1676 };
1677 #endif
1678
1679 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1680 #ifdef CONFIG_SERIAL_BFIN_UART0
1681 static struct resource bfin_uart0_resources[] = {
1682 {
1683 .start = UART0_THR,
1684 .end = UART0_GCTL+2,
1685 .flags = IORESOURCE_MEM,
1686 },
1687 {
1688 .start = IRQ_UART0_RX,
1689 .end = IRQ_UART0_RX+1,
1690 .flags = IORESOURCE_IRQ,
1691 },
1692 {
1693 .start = IRQ_UART0_ERROR,
1694 .end = IRQ_UART0_ERROR,
1695 .flags = IORESOURCE_IRQ,
1696 },
1697 {
1698 .start = CH_UART0_TX,
1699 .end = CH_UART0_TX,
1700 .flags = IORESOURCE_DMA,
1701 },
1702 {
1703 .start = CH_UART0_RX,
1704 .end = CH_UART0_RX,
1705 .flags = IORESOURCE_DMA,
1706 },
1707 #ifdef CONFIG_BFIN_UART0_CTSRTS
1708 { /* CTS pin */
1709 .start = GPIO_PG7,
1710 .end = GPIO_PG7,
1711 .flags = IORESOURCE_IO,
1712 },
1713 { /* RTS pin */
1714 .start = GPIO_PG6,
1715 .end = GPIO_PG6,
1716 .flags = IORESOURCE_IO,
1717 },
1718 #endif
1719 };
1720
1721 static unsigned short bfin_uart0_peripherals[] = {
1722 P_UART0_TX, P_UART0_RX, 0
1723 };
1724
1725 static struct platform_device bfin_uart0_device = {
1726 .name = "bfin-uart",
1727 .id = 0,
1728 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1729 .resource = bfin_uart0_resources,
1730 .dev = {
1731 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1732 },
1733 };
1734 #endif
1735 #ifdef CONFIG_SERIAL_BFIN_UART1
1736 static struct resource bfin_uart1_resources[] = {
1737 {
1738 .start = UART1_THR,
1739 .end = UART1_GCTL+2,
1740 .flags = IORESOURCE_MEM,
1741 },
1742 {
1743 .start = IRQ_UART1_RX,
1744 .end = IRQ_UART1_RX+1,
1745 .flags = IORESOURCE_IRQ,
1746 },
1747 {
1748 .start = IRQ_UART1_ERROR,
1749 .end = IRQ_UART1_ERROR,
1750 .flags = IORESOURCE_IRQ,
1751 },
1752 {
1753 .start = CH_UART1_TX,
1754 .end = CH_UART1_TX,
1755 .flags = IORESOURCE_DMA,
1756 },
1757 {
1758 .start = CH_UART1_RX,
1759 .end = CH_UART1_RX,
1760 .flags = IORESOURCE_DMA,
1761 },
1762 };
1763
1764 static unsigned short bfin_uart1_peripherals[] = {
1765 P_UART1_TX, P_UART1_RX, 0
1766 };
1767
1768 static struct platform_device bfin_uart1_device = {
1769 .name = "bfin-uart",
1770 .id = 1,
1771 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1772 .resource = bfin_uart1_resources,
1773 .dev = {
1774 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1775 },
1776 };
1777 #endif
1778 #endif
1779
1780 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1781 #ifdef CONFIG_BFIN_SIR0
1782 static struct resource bfin_sir0_resources[] = {
1783 {
1784 .start = 0xFFC00400,
1785 .end = 0xFFC004FF,
1786 .flags = IORESOURCE_MEM,
1787 },
1788 {
1789 .start = IRQ_UART0_RX,
1790 .end = IRQ_UART0_RX+1,
1791 .flags = IORESOURCE_IRQ,
1792 },
1793 {
1794 .start = CH_UART0_RX,
1795 .end = CH_UART0_RX+1,
1796 .flags = IORESOURCE_DMA,
1797 },
1798 };
1799
1800 static struct platform_device bfin_sir0_device = {
1801 .name = "bfin_sir",
1802 .id = 0,
1803 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1804 .resource = bfin_sir0_resources,
1805 };
1806 #endif
1807 #ifdef CONFIG_BFIN_SIR1
1808 static struct resource bfin_sir1_resources[] = {
1809 {
1810 .start = 0xFFC02000,
1811 .end = 0xFFC020FF,
1812 .flags = IORESOURCE_MEM,
1813 },
1814 {
1815 .start = IRQ_UART1_RX,
1816 .end = IRQ_UART1_RX+1,
1817 .flags = IORESOURCE_IRQ,
1818 },
1819 {
1820 .start = CH_UART1_RX,
1821 .end = CH_UART1_RX+1,
1822 .flags = IORESOURCE_DMA,
1823 },
1824 };
1825
1826 static struct platform_device bfin_sir1_device = {
1827 .name = "bfin_sir",
1828 .id = 1,
1829 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1830 .resource = bfin_sir1_resources,
1831 };
1832 #endif
1833 #endif
1834
1835 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1836 static struct resource bfin_twi0_resource[] = {
1837 [0] = {
1838 .start = TWI0_REGBASE,
1839 .end = TWI0_REGBASE,
1840 .flags = IORESOURCE_MEM,
1841 },
1842 [1] = {
1843 .start = IRQ_TWI,
1844 .end = IRQ_TWI,
1845 .flags = IORESOURCE_IRQ,
1846 },
1847 };
1848
1849 static struct platform_device i2c_bfin_twi_device = {
1850 .name = "i2c-bfin-twi",
1851 .id = 0,
1852 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1853 .resource = bfin_twi0_resource,
1854 };
1855 #endif
1856
1857 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1858 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1859 [0] = KEY_GRAVE,
1860 [1] = KEY_1,
1861 [2] = KEY_2,
1862 [3] = KEY_3,
1863 [4] = KEY_4,
1864 [5] = KEY_5,
1865 [6] = KEY_6,
1866 [7] = KEY_7,
1867 [8] = KEY_8,
1868 [9] = KEY_9,
1869 [10] = KEY_0,
1870 [11] = KEY_MINUS,
1871 [12] = KEY_EQUAL,
1872 [13] = KEY_BACKSLASH,
1873 [15] = KEY_KP0,
1874 [16] = KEY_Q,
1875 [17] = KEY_W,
1876 [18] = KEY_E,
1877 [19] = KEY_R,
1878 [20] = KEY_T,
1879 [21] = KEY_Y,
1880 [22] = KEY_U,
1881 [23] = KEY_I,
1882 [24] = KEY_O,
1883 [25] = KEY_P,
1884 [26] = KEY_LEFTBRACE,
1885 [27] = KEY_RIGHTBRACE,
1886 [29] = KEY_KP1,
1887 [30] = KEY_KP2,
1888 [31] = KEY_KP3,
1889 [32] = KEY_A,
1890 [33] = KEY_S,
1891 [34] = KEY_D,
1892 [35] = KEY_F,
1893 [36] = KEY_G,
1894 [37] = KEY_H,
1895 [38] = KEY_J,
1896 [39] = KEY_K,
1897 [40] = KEY_L,
1898 [41] = KEY_SEMICOLON,
1899 [42] = KEY_APOSTROPHE,
1900 [43] = KEY_BACKSLASH,
1901 [45] = KEY_KP4,
1902 [46] = KEY_KP5,
1903 [47] = KEY_KP6,
1904 [48] = KEY_102ND,
1905 [49] = KEY_Z,
1906 [50] = KEY_X,
1907 [51] = KEY_C,
1908 [52] = KEY_V,
1909 [53] = KEY_B,
1910 [54] = KEY_N,
1911 [55] = KEY_M,
1912 [56] = KEY_COMMA,
1913 [57] = KEY_DOT,
1914 [58] = KEY_SLASH,
1915 [60] = KEY_KPDOT,
1916 [61] = KEY_KP7,
1917 [62] = KEY_KP8,
1918 [63] = KEY_KP9,
1919 [64] = KEY_SPACE,
1920 [65] = KEY_BACKSPACE,
1921 [66] = KEY_TAB,
1922 [67] = KEY_KPENTER,
1923 [68] = KEY_ENTER,
1924 [69] = KEY_ESC,
1925 [70] = KEY_DELETE,
1926 [74] = KEY_KPMINUS,
1927 [76] = KEY_UP,
1928 [77] = KEY_DOWN,
1929 [78] = KEY_RIGHT,
1930 [79] = KEY_LEFT,
1931 };
1932
1933 static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1934 .rows = 8,
1935 .cols = 10,
1936 .keymap = adp5588_keymap,
1937 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1938 .repeat = 0,
1939 };
1940 #endif
1941
1942 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1943 #include <linux/mfd/adp5520.h>
1944
1945 /*
1946 * ADP5520/5501 Backlight Data
1947 */
1948
1949 static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1950 .fade_in = ADP5520_FADE_T_1200ms,
1951 .fade_out = ADP5520_FADE_T_1200ms,
1952 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1953 .en_ambl_sens = 1,
1954 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1955 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1956 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1957 .l2_office_max = ADP5520_BL_CUR_mA(7),
1958 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1959 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1960 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1961 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1962 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1963 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1964 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
1965 };
1966
1967 /*
1968 * ADP5520/5501 LEDs Data
1969 */
1970
1971 static struct led_info adp5520_leds[] = {
1972 {
1973 .name = "adp5520-led1",
1974 .default_trigger = "none",
1975 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
1976 },
1977 #ifdef ADP5520_EN_ALL_LEDS
1978 {
1979 .name = "adp5520-led2",
1980 .default_trigger = "none",
1981 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1982 },
1983 {
1984 .name = "adp5520-led3",
1985 .default_trigger = "none",
1986 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1987 },
1988 #endif
1989 };
1990
1991 static struct adp5520_leds_platform_data adp5520_leds_data = {
1992 .num_leds = ARRAY_SIZE(adp5520_leds),
1993 .leds = adp5520_leds,
1994 .fade_in = ADP5520_FADE_T_600ms,
1995 .fade_out = ADP5520_FADE_T_600ms,
1996 .led_on_time = ADP5520_LED_ONT_600ms,
1997 };
1998
1999 /*
2000 * ADP5520 GPIO Data
2001 */
2002
2003 static struct adp5520_gpio_platform_data adp5520_gpio_data = {
2004 .gpio_start = 50,
2005 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
2006 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
2007 };
2008
2009 /*
2010 * ADP5520 Keypad Data
2011 */
2012
2013 static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
2014 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
2015 [ADP5520_KEY(0, 1)] = KEY_1,
2016 [ADP5520_KEY(0, 2)] = KEY_2,
2017 [ADP5520_KEY(0, 3)] = KEY_3,
2018 [ADP5520_KEY(1, 0)] = KEY_4,
2019 [ADP5520_KEY(1, 1)] = KEY_5,
2020 [ADP5520_KEY(1, 2)] = KEY_6,
2021 [ADP5520_KEY(1, 3)] = KEY_7,
2022 [ADP5520_KEY(2, 0)] = KEY_8,
2023 [ADP5520_KEY(2, 1)] = KEY_9,
2024 [ADP5520_KEY(2, 2)] = KEY_0,
2025 [ADP5520_KEY(2, 3)] = KEY_MINUS,
2026 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
2027 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
2028 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
2029 [ADP5520_KEY(3, 3)] = KEY_ENTER,
2030 };
2031
2032 static struct adp5520_keys_platform_data adp5520_keys_data = {
2033 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
2034 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
2035 .keymap = adp5520_keymap,
2036 .keymapsize = ARRAY_SIZE(adp5520_keymap),
2037 .repeat = 0,
2038 };
2039
2040 /*
2041 * ADP5520/5501 Multifunction Device Init Data
2042 */
2043
2044 static struct adp5520_platform_data adp5520_pdev_data = {
2045 .backlight = &adp5520_backlight_data,
2046 .leds = &adp5520_leds_data,
2047 .gpio = &adp5520_gpio_data,
2048 .keys = &adp5520_keys_data,
2049 };
2050
2051 #endif
2052
2053 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2054 static struct adp5588_gpio_platform_data adp5588_gpio_data = {
2055 .gpio_start = 50,
2056 .pullup_dis_mask = 0,
2057 };
2058 #endif
2059
2060 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2061 #include <linux/i2c/adp8870.h>
2062 static struct led_info adp8870_leds[] = {
2063 {
2064 .name = "adp8870-led7",
2065 .default_trigger = "none",
2066 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2067 },
2068 };
2069
2070
2071 static struct adp8870_backlight_platform_data adp8870_pdata = {
2072 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2073 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2074 .pwm_assign = 0, /* 1 = Enables PWM mode */
2075
2076 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2077 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2078 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2079
2080 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2081 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2082
2083 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2084 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2085 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2086 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2087 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2088 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2089 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2090 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2091 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2092 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2093
2094 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2095 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2096 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2097 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2098 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2099 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2100 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2101 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2102
2103 .leds = adp8870_leds,
2104 .num_leds = ARRAY_SIZE(adp8870_leds),
2105 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2106 .led_fade_in = ADP8870_FADE_T_600ms,
2107 .led_fade_out = ADP8870_FADE_T_600ms,
2108 .led_on_time = ADP8870_LED_ONT_200ms,
2109 };
2110 #endif
2111
2112 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2113 #include <linux/i2c/adp8860.h>
2114 static struct led_info adp8860_leds[] = {
2115 {
2116 .name = "adp8860-led7",
2117 .default_trigger = "none",
2118 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2119 },
2120 };
2121
2122 static struct adp8860_backlight_platform_data adp8860_pdata = {
2123 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2124 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2125
2126 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2127 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2128 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2129
2130 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2131 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2132
2133 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2134 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2135 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2136 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2137 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2138 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2139
2140 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2141 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2142 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2143 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2144
2145 .leds = adp8860_leds,
2146 .num_leds = ARRAY_SIZE(adp8860_leds),
2147 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2148 .led_fade_in = ADP8860_FADE_T_600ms,
2149 .led_fade_out = ADP8860_FADE_T_600ms,
2150 .led_on_time = ADP8860_LED_ONT_200ms,
2151 };
2152 #endif
2153
2154 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2155 static struct regulator_consumer_supply ad5398_consumer = {
2156 .supply = "current",
2157 };
2158
2159 static struct regulator_init_data ad5398_regulator_data = {
2160 .constraints = {
2161 .name = "current range",
2162 .max_uA = 120000,
2163 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2164 },
2165 .num_consumer_supplies = 1,
2166 .consumer_supplies = &ad5398_consumer,
2167 };
2168
2169 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2170 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2171 static struct platform_device ad5398_virt_consumer_device = {
2172 .name = "reg-virt-consumer",
2173 .id = 0,
2174 .dev = {
2175 .platform_data = "current", /* Passed to driver */
2176 },
2177 };
2178 #endif
2179 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2180 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2181 static struct regulator_bulk_data ad5398_bulk_data = {
2182 .supply = "current",
2183 };
2184
2185 static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2186 .name = "ad5398",
2187 .num_supplies = 1,
2188 .supplies = &ad5398_bulk_data,
2189 };
2190
2191 static struct platform_device ad5398_userspace_consumer_device = {
2192 .name = "reg-userspace-consumer",
2193 .id = 0,
2194 .dev = {
2195 .platform_data = &ad5398_userspace_comsumer_data,
2196 },
2197 };
2198 #endif
2199 #endif
2200
2201 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2202 /* INT bound temperature alarm event. line 1 */
2203 static unsigned long adt7410_platform_data[2] = {
2204 IRQ_PG4, IRQF_TRIGGER_LOW,
2205 };
2206 #endif
2207
2208 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2209 /* INT bound temperature alarm event. line 1 */
2210 static unsigned long adt7316_i2c_data[2] = {
2211 IRQF_TRIGGER_LOW, /* interrupt flags */
2212 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2213 };
2214 #endif
2215
2216 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
2217 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
2218 {
2219 I2C_BOARD_INFO("ad1937", 0x04),
2220 },
2221 #endif
2222
2223 #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
2224 {
2225 I2C_BOARD_INFO("adav803", 0x10),
2226 },
2227 #endif
2228
2229 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
2230 {
2231 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
2232 .irq = IRQ_PG5,
2233 .platform_data = (void *)&ad7142_i2c_platform_data,
2234 },
2235 #endif
2236
2237 #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2238 {
2239 I2C_BOARD_INFO("ad7150", 0x48),
2240 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2241 },
2242 #endif
2243
2244 #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2245 {
2246 I2C_BOARD_INFO("ad7152", 0x48),
2247 },
2248 #endif
2249
2250 #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2251 {
2252 I2C_BOARD_INFO("ad774x", 0x48),
2253 },
2254 #endif
2255
2256 #if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
2257 {
2258 I2C_BOARD_INFO("ad7414", 0x9),
2259 .irq = IRQ_PG5,
2260 .irq_flags = IRQF_TRIGGER_LOW,
2261 },
2262 #endif
2263
2264 #if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
2265 {
2266 I2C_BOARD_INFO("ad7417", 0xb),
2267 .irq = IRQ_PG5,
2268 .irq_flags = IRQF_TRIGGER_LOW,
2269 .platform_data = (void *)GPIO_PF4,
2270 },
2271 #endif
2272
2273 #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2274 {
2275 I2C_BOARD_INFO("ade7854", 0x38),
2276 },
2277 #endif
2278
2279 #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2280 {
2281 I2C_BOARD_INFO("adt75", 0x9),
2282 .irq = IRQ_PG5,
2283 .irq_flags = IRQF_TRIGGER_LOW,
2284 },
2285 #endif
2286
2287 #if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
2288 {
2289 I2C_BOARD_INFO("adt7408", 0x18),
2290 .irq = IRQ_PG5,
2291 .irq_flags = IRQF_TRIGGER_LOW,
2292 },
2293 #endif
2294
2295 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2296 {
2297 I2C_BOARD_INFO("adt7410", 0x48),
2298 /* CT critical temperature event. line 0 */
2299 .irq = IRQ_PG5,
2300 .irq_flags = IRQF_TRIGGER_LOW,
2301 .platform_data = (void *)&adt7410_platform_data,
2302 },
2303 #endif
2304
2305 #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2306 {
2307 I2C_BOARD_INFO("ad7291", 0x20),
2308 .irq = IRQ_PG5,
2309 .irq_flags = IRQF_TRIGGER_LOW,
2310 },
2311 #endif
2312
2313 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2314 {
2315 I2C_BOARD_INFO("adt7316", 0x48),
2316 .irq = IRQ_PG6,
2317 .platform_data = (void *)&adt7316_i2c_data,
2318 },
2319 #endif
2320
2321 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2322 {
2323 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
2324 },
2325 #endif
2326 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
2327 {
2328 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
2329 .irq = IRQ_PG6,
2330 },
2331 #endif
2332 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2333 {
2334 I2C_BOARD_INFO("ad7879", 0x2F),
2335 .irq = IRQ_PG5,
2336 .platform_data = (void *)&bfin_ad7879_ts_info,
2337 },
2338 #endif
2339 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2340 {
2341 I2C_BOARD_INFO("adp5588-keys", 0x34),
2342 .irq = IRQ_PG0,
2343 .platform_data = (void *)&adp5588_kpad_data,
2344 },
2345 #endif
2346 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2347 {
2348 I2C_BOARD_INFO("pmic-adp5520", 0x32),
2349 .irq = IRQ_PG0,
2350 .platform_data = (void *)&adp5520_pdev_data,
2351 },
2352 #endif
2353 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2354 {
2355 I2C_BOARD_INFO("adxl34x", 0x53),
2356 .irq = IRQ_PG3,
2357 .platform_data = (void *)&adxl34x_info,
2358 },
2359 #endif
2360 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2361 {
2362 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2363 .platform_data = (void *)&adp5588_gpio_data,
2364 },
2365 #endif
2366 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2367 {
2368 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2369 },
2370 #endif
2371 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2372 {
2373 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
2374 },
2375 #endif
2376 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2377 {
2378 I2C_BOARD_INFO("adp8870", 0x2B),
2379 .platform_data = (void *)&adp8870_pdata,
2380 },
2381 #endif
2382 #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2383 {
2384 I2C_BOARD_INFO("adau1371", 0x1A),
2385 },
2386 #endif
2387 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2388 {
2389 I2C_BOARD_INFO("adau1761", 0x38),
2390 },
2391 #endif
2392 #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2393 {
2394 I2C_BOARD_INFO("adau1361", 0x38),
2395 },
2396 #endif
2397 #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2398 {
2399 I2C_BOARD_INFO("ad5258", 0x18),
2400 },
2401 #endif
2402 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2403 {
2404 I2C_BOARD_INFO("ssm2602", 0x1b),
2405 },
2406 #endif
2407 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2408 {
2409 I2C_BOARD_INFO("ad5398", 0xC),
2410 .platform_data = (void *)&ad5398_regulator_data,
2411 },
2412 #endif
2413 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2414 {
2415 I2C_BOARD_INFO("adp8860", 0x2A),
2416 .platform_data = (void *)&adp8860_pdata,
2417 },
2418 #endif
2419 #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2420 {
2421 I2C_BOARD_INFO("adau1373", 0x1A),
2422 },
2423 #endif
2424 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2425 {
2426 I2C_BOARD_INFO("ad5252", 0x2e),
2427 },
2428 #endif
2429 };
2430
2431 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2432 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2433 static struct resource bfin_sport0_uart_resources[] = {
2434 {
2435 .start = SPORT0_TCR1,
2436 .end = SPORT0_MRCS3+4,
2437 .flags = IORESOURCE_MEM,
2438 },
2439 {
2440 .start = IRQ_SPORT0_RX,
2441 .end = IRQ_SPORT0_RX+1,
2442 .flags = IORESOURCE_IRQ,
2443 },
2444 {
2445 .start = IRQ_SPORT0_ERROR,
2446 .end = IRQ_SPORT0_ERROR,
2447 .flags = IORESOURCE_IRQ,
2448 },
2449 };
2450
2451 static unsigned short bfin_sport0_peripherals[] = {
2452 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2453 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
2454 };
2455
2456 static struct platform_device bfin_sport0_uart_device = {
2457 .name = "bfin-sport-uart",
2458 .id = 0,
2459 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2460 .resource = bfin_sport0_uart_resources,
2461 .dev = {
2462 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2463 },
2464 };
2465 #endif
2466 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2467 static struct resource bfin_sport1_uart_resources[] = {
2468 {
2469 .start = SPORT1_TCR1,
2470 .end = SPORT1_MRCS3+4,
2471 .flags = IORESOURCE_MEM,
2472 },
2473 {
2474 .start = IRQ_SPORT1_RX,
2475 .end = IRQ_SPORT1_RX+1,
2476 .flags = IORESOURCE_IRQ,
2477 },
2478 {
2479 .start = IRQ_SPORT1_ERROR,
2480 .end = IRQ_SPORT1_ERROR,
2481 .flags = IORESOURCE_IRQ,
2482 },
2483 };
2484
2485 static unsigned short bfin_sport1_peripherals[] = {
2486 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2487 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
2488 };
2489
2490 static struct platform_device bfin_sport1_uart_device = {
2491 .name = "bfin-sport-uart",
2492 .id = 1,
2493 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2494 .resource = bfin_sport1_uart_resources,
2495 .dev = {
2496 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2497 },
2498 };
2499 #endif
2500 #endif
2501
2502 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2503 #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2504 /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
2505
2506 #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2507 #define PATA_INT IRQ_PF5
2508 static struct pata_platform_info bfin_pata_platform_data = {
2509 .ioport_shift = 1,
2510 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
2511 };
2512
2513 static struct resource bfin_pata_resources[] = {
2514 {
2515 .start = 0x20314020,
2516 .end = 0x2031403F,
2517 .flags = IORESOURCE_MEM,
2518 },
2519 {
2520 .start = 0x2031401C,
2521 .end = 0x2031401F,
2522 .flags = IORESOURCE_MEM,
2523 },
2524 {
2525 .start = PATA_INT,
2526 .end = PATA_INT,
2527 .flags = IORESOURCE_IRQ,
2528 },
2529 };
2530 #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2531 static struct pata_platform_info bfin_pata_platform_data = {
2532 .ioport_shift = 0,
2533 };
2534 /* CompactFlash Storage Card Memory Mapped Addressing
2535 * /REG = A11 = 1
2536 */
2537 static struct resource bfin_pata_resources[] = {
2538 {
2539 .start = 0x20211800,
2540 .end = 0x20211807,
2541 .flags = IORESOURCE_MEM,
2542 },
2543 {
2544 .start = 0x2021180E, /* Device Ctl */
2545 .end = 0x2021180E,
2546 .flags = IORESOURCE_MEM,
2547 },
2548 };
2549 #endif
2550
2551 static struct platform_device bfin_pata_device = {
2552 .name = "pata_platform",
2553 .id = -1,
2554 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2555 .resource = bfin_pata_resources,
2556 .dev = {
2557 .platform_data = &bfin_pata_platform_data,
2558 }
2559 };
2560 #endif
2561
2562 static const unsigned int cclk_vlev_datasheet[] =
2563 {
2564 VRPAIR(VLEV_085, 250000000),
2565 VRPAIR(VLEV_090, 376000000),
2566 VRPAIR(VLEV_095, 426000000),
2567 VRPAIR(VLEV_100, 426000000),
2568 VRPAIR(VLEV_105, 476000000),
2569 VRPAIR(VLEV_110, 476000000),
2570 VRPAIR(VLEV_115, 476000000),
2571 VRPAIR(VLEV_120, 500000000),
2572 VRPAIR(VLEV_125, 533000000),
2573 VRPAIR(VLEV_130, 600000000),
2574 };
2575
2576 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2577 .tuple_tab = cclk_vlev_datasheet,
2578 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2579 .vr_settling_time = 25 /* us */,
2580 };
2581
2582 static struct platform_device bfin_dpmc = {
2583 .name = "bfin dpmc",
2584 .dev = {
2585 .platform_data = &bfin_dmpc_vreg_data,
2586 },
2587 };
2588
2589 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2590 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2591 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2592
2593 #define SPORT_REQ(x) \
2594 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2595 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2596
2597 static const u16 bfin_snd_pin[][7] = {
2598 SPORT_REQ(0),
2599 SPORT_REQ(1),
2600 };
2601
2602 static struct bfin_snd_platform_data bfin_snd_data[] = {
2603 {
2604 .pin_req = &bfin_snd_pin[0][0],
2605 },
2606 {
2607 .pin_req = &bfin_snd_pin[1][0],
2608 },
2609 };
2610
2611 #define BFIN_SND_RES(x) \
2612 [x] = { \
2613 { \
2614 .start = SPORT##x##_TCR1, \
2615 .end = SPORT##x##_TCR1, \
2616 .flags = IORESOURCE_MEM \
2617 }, \
2618 { \
2619 .start = CH_SPORT##x##_RX, \
2620 .end = CH_SPORT##x##_RX, \
2621 .flags = IORESOURCE_DMA, \
2622 }, \
2623 { \
2624 .start = CH_SPORT##x##_TX, \
2625 .end = CH_SPORT##x##_TX, \
2626 .flags = IORESOURCE_DMA, \
2627 }, \
2628 { \
2629 .start = IRQ_SPORT##x##_ERROR, \
2630 .end = IRQ_SPORT##x##_ERROR, \
2631 .flags = IORESOURCE_IRQ, \
2632 } \
2633 }
2634
2635 static struct resource bfin_snd_resources[][4] = {
2636 BFIN_SND_RES(0),
2637 BFIN_SND_RES(1),
2638 };
2639
2640 static struct platform_device bfin_pcm = {
2641 .name = "bfin-pcm-audio",
2642 .id = -1,
2643 };
2644 #endif
2645
2646 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2647 static struct platform_device bfin_ad73311_codec_device = {
2648 .name = "ad73311",
2649 .id = -1,
2650 };
2651 #endif
2652
2653 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2654 static struct platform_device bfin_i2s = {
2655 .name = "bfin-i2s",
2656 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2657 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2658 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2659 .dev = {
2660 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2661 },
2662 };
2663 #endif
2664
2665 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2666 static struct platform_device bfin_tdm = {
2667 .name = "bfin-tdm",
2668 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2669 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2670 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2671 .dev = {
2672 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2673 },
2674 };
2675 #endif
2676
2677 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2678 static struct platform_device bfin_ac97 = {
2679 .name = "bfin-ac97",
2680 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2681 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2682 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2683 .dev = {
2684 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2685 },
2686 };
2687 #endif
2688
2689 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2690 #define REGULATOR_ADP122 "adp122"
2691 #define REGULATOR_ADP122_UV 2500000
2692
2693 static struct regulator_consumer_supply adp122_consumers = {
2694 .supply = REGULATOR_ADP122,
2695 };
2696
2697 static struct regulator_init_data adp_switch_regulator_data = {
2698 .constraints = {
2699 .name = REGULATOR_ADP122,
2700 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2701 .min_uV = REGULATOR_ADP122_UV,
2702 .max_uV = REGULATOR_ADP122_UV,
2703 .min_uA = 0,
2704 .max_uA = 300000,
2705 },
2706 .num_consumer_supplies = 1, /* only 1 */
2707 .consumer_supplies = &adp122_consumers,
2708 };
2709
2710 static struct fixed_voltage_config adp_switch_pdata = {
2711 .supply_name = REGULATOR_ADP122,
2712 .microvolts = REGULATOR_ADP122_UV,
2713 .gpio = GPIO_PF2,
2714 .enable_high = 1,
2715 .enabled_at_boot = 0,
2716 .init_data = &adp_switch_regulator_data,
2717 };
2718
2719 static struct platform_device adp_switch_device = {
2720 .name = "reg-fixed-voltage",
2721 .id = 0,
2722 .dev = {
2723 .platform_data = &adp_switch_pdata,
2724 },
2725 };
2726
2727 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2728 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2729 static struct regulator_bulk_data adp122_bulk_data = {
2730 .supply = REGULATOR_ADP122,
2731 };
2732
2733 static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2734 .name = REGULATOR_ADP122,
2735 .num_supplies = 1,
2736 .supplies = &adp122_bulk_data,
2737 };
2738
2739 static struct platform_device adp122_userspace_consumer_device = {
2740 .name = "reg-userspace-consumer",
2741 .id = 0,
2742 .dev = {
2743 .platform_data = &adp122_userspace_comsumer_data,
2744 },
2745 };
2746 #endif
2747 #endif
2748
2749 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2750 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2751
2752 static struct resource iio_gpio_trigger_resources[] = {
2753 [0] = {
2754 .start = IRQ_PF5,
2755 .end = IRQ_PF5,
2756 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2757 },
2758 };
2759
2760 static struct platform_device iio_gpio_trigger = {
2761 .name = "iio_gpio_trigger",
2762 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2763 .resource = iio_gpio_trigger_resources,
2764 };
2765 #endif
2766
2767 static struct platform_device *stamp_devices[] __initdata = {
2768
2769 &bfin_dpmc,
2770
2771 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2772 &bfin_pcmcia_cf_device,
2773 #endif
2774
2775 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2776 &rtc_device,
2777 #endif
2778
2779 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2780 &sl811_hcd_device,
2781 #endif
2782
2783 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2784 &isp1362_hcd_device,
2785 #endif
2786
2787 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2788 &bfin_isp1760_device,
2789 #endif
2790
2791 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2792 &smc91x_device,
2793 #endif
2794
2795 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2796 &dm9000_device,
2797 #endif
2798
2799 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2800 &bfin_can_device,
2801 #endif
2802
2803 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
2804 &bfin_mii_bus,
2805 &bfin_mac_device,
2806 #endif
2807
2808 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2809 &net2272_bfin_device,
2810 #endif
2811
2812 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
2813 &bfin_spi0_device,
2814 #endif
2815
2816 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2817 &bfin_sport_spi0_device,
2818 &bfin_sport_spi1_device,
2819 #endif
2820
2821 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2822 &bfin_fb_device,
2823 #endif
2824
2825 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2826 &bfin_lq035q1_device,
2827 #endif
2828
2829 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
2830 #ifdef CONFIG_SERIAL_BFIN_UART0
2831 &bfin_uart0_device,
2832 #endif
2833 #ifdef CONFIG_SERIAL_BFIN_UART1
2834 &bfin_uart1_device,
2835 #endif
2836 #endif
2837
2838 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
2839 #ifdef CONFIG_BFIN_SIR0
2840 &bfin_sir0_device,
2841 #endif
2842 #ifdef CONFIG_BFIN_SIR1
2843 &bfin_sir1_device,
2844 #endif
2845 #endif
2846
2847 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2848 &i2c_bfin_twi_device,
2849 #endif
2850
2851 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2852 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2853 &bfin_sport0_uart_device,
2854 #endif
2855 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2856 &bfin_sport1_uart_device,
2857 #endif
2858 #endif
2859
2860 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2861 &bfin_pata_device,
2862 #endif
2863
2864 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2865 &bfin_device_gpiokeys,
2866 #endif
2867
2868 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2869 &bfin_async_nand_device,
2870 #endif
2871
2872 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2873 &stamp_flash_device,
2874 #endif
2875
2876 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2877 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2878 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2879 &bfin_pcm,
2880 #endif
2881
2882 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2883 &bfin_ad73311_codec_device,
2884 #endif
2885
2886 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2887 &bfin_i2s,
2888 #endif
2889
2890 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2891 &bfin_tdm,
2892 #endif
2893
2894 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2895 &bfin_ac97,
2896 #endif
2897
2898 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2899 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2900 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2901 &ad5398_virt_consumer_device,
2902 #endif
2903 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2904 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2905 &ad5398_userspace_consumer_device,
2906 #endif
2907 #endif
2908
2909 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2910 &adp_switch_device,
2911 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2912 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2913 &adp122_userspace_consumer_device,
2914 #endif
2915 #endif
2916
2917 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2918 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2919 &iio_gpio_trigger,
2920 #endif
2921 };
2922
2923 static int __init stamp_init(void)
2924 {
2925 printk(KERN_INFO "%s(): registering device resources\n", __func__);
2926 bfin_plat_nand_init();
2927 adf702x_mac_init();
2928 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
2929 i2c_register_board_info(0, bfin_i2c_board_info,
2930 ARRAY_SIZE(bfin_i2c_board_info));
2931 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
2932
2933 return 0;
2934 }
2935
2936 arch_initcall(stamp_init);
2937
2938
2939 static struct platform_device *stamp_early_devices[] __initdata = {
2940 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2941 #ifdef CONFIG_SERIAL_BFIN_UART0
2942 &bfin_uart0_device,
2943 #endif
2944 #ifdef CONFIG_SERIAL_BFIN_UART1
2945 &bfin_uart1_device,
2946 #endif
2947 #endif
2948
2949 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2950 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2951 &bfin_sport0_uart_device,
2952 #endif
2953 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2954 &bfin_sport1_uart_device,
2955 #endif
2956 #endif
2957 };
2958
2959 void __init native_machine_early_platform_add_devices(void)
2960 {
2961 printk(KERN_INFO "register early platform devices\n");
2962 early_platform_add_devices(stamp_early_devices,
2963 ARRAY_SIZE(stamp_early_devices));
2964 }
2965
2966 void native_machine_restart(char *cmd)
2967 {
2968 /* workaround reboot hang when booting from SPI */
2969 if ((bfin_read_SYSCR() & 0x7) == 0x3)
2970 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
2971 }
2972
2973 /*
2974 * Currently the MAC address is saved in Flash by U-Boot
2975 */
2976 #define FLASH_MAC 0x203f0000
2977 void bfin_get_ether_addr(char *addr)
2978 {
2979 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2980 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2981 }
2982 EXPORT_SYMBOL(bfin_get_ether_addr);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree