2 * IDE tuning and bus mastering support for the CS5510/CS5520
5 * The CS5510/CS5520 are slightly unusual devices. Unlike the
6 * typical IDE controllers they do bus mastering with the drive in
7 * PIO mode and smarter silicon.
9 * The practical upshot of this is that we must always tune the
10 * drive for the right PIO mode. We must also ignore all the blacklists
11 * and the drive bus mastering DMA information.
13 * *** This driver is strictly experimental ***
15 * (c) Copyright Red Hat Inc 2002
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2, or (at your option) any
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
27 * For the avoidance of doubt the "preferred form" of this code is one which
28 * is in an open non patent encumbered format. Where cryptographic key signing
29 * forms part of the process of creating an executable the information
30 * including keys needed to generate an equivalently functional executable
31 * are deemed to be part of the source code.
35 #include <linux/module.h>
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/delay.h>
39 #include <linux/timer.h>
41 #include <linux/ioport.h>
42 #include <linux/blkdev.h>
43 #include <linux/hdreg.h>
45 #include <linux/interrupt.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/ide.h>
49 #include <linux/dma-mapping.h>
61 static struct pio_clocks cs5520_pio_clocks
[]={
69 static int cs5520_tune_chipset(ide_drive_t
*drive
, u8 xferspeed
)
71 ide_hwif_t
*hwif
= HWIF(drive
);
72 struct pci_dev
*pdev
= hwif
->pci_dev
;
73 u8 speed
= min((u8
)XFER_PIO_4
, xferspeed
);
76 int controller
= drive
->dn
> 1 ? 1 : 0;
90 printk(KERN_ERR
"cs55x0: bad ide timing.\n");
93 printk("PIO clocking = %d\n", pio
);
95 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
97 /* 8bit CAT/CRT - 8bit command timing for channel */
98 pci_write_config_byte(pdev
, 0x62 + controller
,
99 (cs5520_pio_clocks
[pio
].recovery
<< 4) |
100 (cs5520_pio_clocks
[pio
].assert));
102 /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
104 /* FIXME: should these use address ? */
105 /* Data read timing */
106 pci_write_config_byte(pdev
, 0x64 + 4*controller
+ (drive
->dn
&1),
107 (cs5520_pio_clocks
[pio
].recovery
<< 4) |
108 (cs5520_pio_clocks
[pio
].assert));
109 /* Write command timing */
110 pci_write_config_byte(pdev
, 0x66 + 4*controller
+ (drive
->dn
&1),
111 (cs5520_pio_clocks
[pio
].recovery
<< 4) |
112 (cs5520_pio_clocks
[pio
].assert));
114 /* Set the DMA enable/disable flag */
115 reg
= inb(hwif
->dma_base
+ 0x02 + 8*controller
);
116 reg
|= 1<<((drive
->dn
&1)+5);
117 outb(reg
, hwif
->dma_base
+ 0x02 + 8*controller
);
119 error
= ide_config_drive_speed(drive
, speed
);
120 /* ATAPI is harder so leave it for now */
121 if(!error
&& drive
->media
== ide_disk
)
122 error
= hwif
->ide_dma_on(drive
);
127 static void cs5520_tune_drive(ide_drive_t
*drive
, u8 pio
)
129 pio
= ide_get_best_pio_mode(drive
, pio
, 4);
130 cs5520_tune_chipset(drive
, (XFER_PIO_0
+ pio
));
133 static int cs5520_config_drive_xfer_rate(ide_drive_t
*drive
)
135 /* Tune the drive for PIO modes up to PIO 4 */
136 cs5520_tune_drive(drive
, 255);
138 /* Then tell the core to use DMA operations */
143 * We provide a callback for our nonstandard DMA location
146 static void __devinit
cs5520_init_setup_dma(struct pci_dev
*dev
, ide_pci_device_t
*d
, ide_hwif_t
*hwif
)
148 unsigned long bmide
= pci_resource_start(dev
, 2); /* Not the usual 4 */
149 if(hwif
->mate
&& hwif
->mate
->dma_base
) /* Second channel at primary + 8 */
151 ide_setup_dma(hwif
, bmide
, 8);
155 * We wrap the DMA activate to set the vdma flag. This is needed
156 * so that the IDE DMA layer issues PIO not DMA commands over the
160 static int cs5520_dma_on(ide_drive_t
*drive
)
166 static void __devinit
init_hwif_cs5520(ide_hwif_t
*hwif
)
168 hwif
->tuneproc
= &cs5520_tune_drive
;
169 hwif
->speedproc
= &cs5520_tune_chipset
;
170 hwif
->ide_dma_check
= &cs5520_config_drive_xfer_rate
;
171 hwif
->ide_dma_on
= &cs5520_dma_on
;
178 hwif
->drives
[0].autotune
= 1;
179 hwif
->drives
[1].autotune
= 1;
184 hwif
->ultra_mask
= 0;
185 hwif
->swdma_mask
= 0;
186 hwif
->mwdma_mask
= 0;
188 hwif
->drives
[0].autodma
= hwif
->autodma
;
189 hwif
->drives
[1].autodma
= hwif
->autodma
;
192 #define DECLARE_CS_DEV(name_str) \
195 .init_setup_dma = cs5520_init_setup_dma, \
196 .init_hwif = init_hwif_cs5520, \
197 .autodma = AUTODMA, \
198 .bootable = ON_BOARD, \
199 .host_flags = IDE_HFLAG_ISA_PORTS, \
200 .pio_mask = ATA_PIO4, \
203 static ide_pci_device_t cyrix_chipsets
[] __devinitdata
= {
204 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
205 /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
209 * The 5510/5520 are a bit weird. They don't quite set up the way
210 * the PCI helper layer expects so we must do much of the set up
214 static int __devinit
cs5520_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
216 ide_hwif_t
*hwif
= NULL
, *mate
= NULL
;
218 ide_pci_device_t
*d
= &cyrix_chipsets
[id
->driver_data
];
220 ide_setup_pci_noise(dev
, d
);
222 /* We must not grab the entire device, it has 'ISA' space in its
223 BARS too and we will freak out other bits of the kernel */
224 if (pci_enable_device_bars(dev
, 1<<2)) {
225 printk(KERN_WARNING
"%s: Unable to enable 55x0.\n", d
->name
);
229 if (pci_set_dma_mask(dev
, DMA_32BIT_MASK
)) {
230 printk(KERN_WARNING
"cs5520: No suitable DMA available.\n");
237 * Now the chipset is configured we can let the core
238 * do all the device setup for us
241 ide_pci_setup_ports(dev
, d
, 14, &index
);
243 if ((index
.b
.low
& 0xf0) != 0xf0)
244 hwif
= &ide_hwifs
[index
.b
.low
];
245 if ((index
.b
.high
& 0xf0) != 0xf0)
246 mate
= &ide_hwifs
[index
.b
.high
];
249 probe_hwif_init(hwif
);
251 probe_hwif_init(mate
);
254 ide_proc_register_port(hwif
);
256 ide_proc_register_port(mate
);
261 static struct pci_device_id cs5520_pci_tbl
[] = {
262 { PCI_VENDOR_ID_CYRIX
, PCI_DEVICE_ID_CYRIX_5510
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
263 { PCI_VENDOR_ID_CYRIX
, PCI_DEVICE_ID_CYRIX_5520
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
266 MODULE_DEVICE_TABLE(pci
, cs5520_pci_tbl
);
268 static struct pci_driver driver
= {
270 .id_table
= cs5520_pci_tbl
,
271 .probe
= cs5520_init_one
,
274 static int __init
cs5520_ide_init(void)
276 return ide_pci_register_driver(&driver
);
279 module_init(cs5520_ide_init
);
281 MODULE_AUTHOR("Alan Cox");
282 MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
283 MODULE_LICENSE("GPL");