wl1271: implement dco itrim parameters setting
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / wl12xx / wl1271_acx.h
blobfa5d9539440dc51a91118170b77f80d83dd78e14
1 /*
2 * This file is part of wl1271
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
25 #ifndef __WL1271_ACX_H__
26 #define __WL1271_ACX_H__
28 #include "wl1271.h"
29 #include "wl1271_cmd.h"
31 /*************************************************************************
33 Host Interrupt Register (WiLink -> Host)
35 **************************************************************************/
36 /* HW Initiated interrupt Watchdog timer expiration */
37 #define WL1271_ACX_INTR_WATCHDOG BIT(0)
38 /* Init sequence is done (masked interrupt, detection through polling only ) */
39 #define WL1271_ACX_INTR_INIT_COMPLETE BIT(1)
40 /* Event was entered to Event MBOX #A*/
41 #define WL1271_ACX_INTR_EVENT_A BIT(2)
42 /* Event was entered to Event MBOX #B*/
43 #define WL1271_ACX_INTR_EVENT_B BIT(3)
44 /* Command processing completion*/
45 #define WL1271_ACX_INTR_CMD_COMPLETE BIT(4)
46 /* Signaling the host on HW wakeup */
47 #define WL1271_ACX_INTR_HW_AVAILABLE BIT(5)
48 /* The MISC bit is used for aggregation of RX, TxComplete and TX rate update */
49 #define WL1271_ACX_INTR_DATA BIT(6)
50 /* Trace meassge on MBOX #A */
51 #define WL1271_ACX_INTR_TRACE_A BIT(7)
52 /* Trace meassge on MBOX #B */
53 #define WL1271_ACX_INTR_TRACE_B BIT(8)
55 #define WL1271_ACX_INTR_ALL 0xFFFFFFFF
56 #define WL1271_ACX_ALL_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \
57 WL1271_ACX_INTR_INIT_COMPLETE | \
58 WL1271_ACX_INTR_EVENT_A | \
59 WL1271_ACX_INTR_EVENT_B | \
60 WL1271_ACX_INTR_CMD_COMPLETE | \
61 WL1271_ACX_INTR_HW_AVAILABLE | \
62 WL1271_ACX_INTR_DATA)
64 #define WL1271_INTR_MASK (WL1271_ACX_INTR_EVENT_A | \
65 WL1271_ACX_INTR_EVENT_B | \
66 WL1271_ACX_INTR_HW_AVAILABLE | \
67 WL1271_ACX_INTR_DATA)
69 /* Target's information element */
70 struct acx_header {
71 struct wl1271_cmd_header cmd;
73 /* acx (or information element) header */
74 __le16 id;
76 /* payload length (not including headers */
77 __le16 len;
78 } __attribute__ ((packed));
80 struct acx_error_counter {
81 struct acx_header header;
83 /* The number of PLCP errors since the last time this */
84 /* information element was interrogated. This field is */
85 /* automatically cleared when it is interrogated.*/
86 __le32 PLCP_error;
88 /* The number of FCS errors since the last time this */
89 /* information element was interrogated. This field is */
90 /* automatically cleared when it is interrogated.*/
91 __le32 FCS_error;
93 /* The number of MPDUs without PLCP header errors received*/
94 /* since the last time this information element was interrogated. */
95 /* This field is automatically cleared when it is interrogated.*/
96 __le32 valid_frame;
98 /* the number of missed sequence numbers in the squentially */
99 /* values of frames seq numbers */
100 __le32 seq_num_miss;
101 } __attribute__ ((packed));
103 struct acx_revision {
104 struct acx_header header;
107 * The WiLink firmware version, an ASCII string x.x.x.x,
108 * that uniquely identifies the current firmware.
109 * The left most digit is incremented each time a
110 * significant change is made to the firmware, such as
111 * code redesign or new platform support.
112 * The second digit is incremented when major enhancements
113 * are added or major fixes are made.
114 * The third digit is incremented for each GA release.
115 * The fourth digit is incremented for each build.
116 * The first two digits identify a firmware release version,
117 * in other words, a unique set of features.
118 * The first three digits identify a GA release.
120 char fw_version[20];
123 * This 4 byte field specifies the WiLink hardware version.
124 * bits 0 - 15: Reserved.
125 * bits 16 - 23: Version ID - The WiLink version ID
126 * (1 = first spin, 2 = second spin, and so on).
127 * bits 24 - 31: Chip ID - The WiLink chip ID.
129 __le32 hw_version;
130 } __attribute__ ((packed));
132 enum wl1271_psm_mode {
133 /* Active mode */
134 WL1271_PSM_CAM = 0,
136 /* Power save mode */
137 WL1271_PSM_PS = 1,
139 /* Extreme low power */
140 WL1271_PSM_ELP = 2,
143 struct acx_sleep_auth {
144 struct acx_header header;
146 /* The sleep level authorization of the device. */
147 /* 0 - Always active*/
148 /* 1 - Power down mode: light / fast sleep*/
149 /* 2 - ELP mode: Deep / Max sleep*/
150 u8 sleep_auth;
151 u8 padding[3];
152 } __attribute__ ((packed));
154 enum {
155 HOSTIF_PCI_MASTER_HOST_INDIRECT,
156 HOSTIF_PCI_MASTER_HOST_DIRECT,
157 HOSTIF_SLAVE,
158 HOSTIF_PKT_RING,
159 HOSTIF_DONTCARE = 0xFF
162 #define DEFAULT_UCAST_PRIORITY 0
163 #define DEFAULT_RX_Q_PRIORITY 0
164 #define DEFAULT_NUM_STATIONS 1
165 #define DEFAULT_RXQ_PRIORITY 0 /* low 0 .. 15 high */
166 #define DEFAULT_RXQ_TYPE 0x07 /* All frames, Data/Ctrl/Mgmt */
167 #define TRACE_BUFFER_MAX_SIZE 256
169 #define DP_RX_PACKET_RING_CHUNK_SIZE 1600
170 #define DP_TX_PACKET_RING_CHUNK_SIZE 1600
171 #define DP_RX_PACKET_RING_CHUNK_NUM 2
172 #define DP_TX_PACKET_RING_CHUNK_NUM 2
173 #define DP_TX_COMPLETE_TIME_OUT 20
175 #define TX_MSDU_LIFETIME_MIN 0
176 #define TX_MSDU_LIFETIME_MAX 3000
177 #define TX_MSDU_LIFETIME_DEF 512
178 #define RX_MSDU_LIFETIME_MIN 0
179 #define RX_MSDU_LIFETIME_MAX 0xFFFFFFFF
180 #define RX_MSDU_LIFETIME_DEF 512000
182 struct acx_rx_msdu_lifetime {
183 struct acx_header header;
186 * The maximum amount of time, in TU, before the
187 * firmware discards the MSDU.
189 __le32 lifetime;
190 } __attribute__ ((packed));
193 * RX Config Options Table
194 * Bit Definition
195 * === ==========
196 * 31:14 Reserved
197 * 13 Copy RX Status - when set, write three receive status words
198 * to top of rx'd MPDUs.
199 * When cleared, do not write three status words (added rev 1.5)
200 * 12 Reserved
201 * 11 RX Complete upon FCS error - when set, give rx complete
202 * interrupt for FCS errors, after the rx filtering, e.g. unicast
203 * frames not to us with FCS error will not generate an interrupt.
204 * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
205 * probe request, and probe response frames with an SSID that does
206 * not match the SSID specified by the host in the START/JOIN
207 * command.
208 * When clear, the WiLink receives frames with any SSID.
209 * 9 Broadcast Filter Enable - When set, the WiLink discards all
210 * broadcast frames. When clear, the WiLink receives all received
211 * broadcast frames.
212 * 8:6 Reserved
213 * 5 BSSID Filter Enable - When set, the WiLink discards any frames
214 * with a BSSID that does not match the BSSID specified by the
215 * host.
216 * When clear, the WiLink receives frames from any BSSID.
217 * 4 MAC Addr Filter - When set, the WiLink discards any frames
218 * with a destination address that does not match the MAC address
219 * of the adaptor.
220 * When clear, the WiLink receives frames destined to any MAC
221 * address.
222 * 3 Promiscuous - When set, the WiLink receives all valid frames
223 * (i.e., all frames that pass the FCS check).
224 * When clear, only frames that pass the other filters specified
225 * are received.
226 * 2 FCS - When set, the WiLink includes the FCS with the received
227 * frame.
228 * When cleared, the FCS is discarded.
229 * 1 PLCP header - When set, write all data from baseband to frame
230 * buffer including PHY header.
231 * 0 Reserved - Always equal to 0.
233 * RX Filter Options Table
234 * Bit Definition
235 * === ==========
236 * 31:12 Reserved - Always equal to 0.
237 * 11 Association - When set, the WiLink receives all association
238 * related frames (association request/response, reassocation
239 * request/response, and disassociation). When clear, these frames
240 * are discarded.
241 * 10 Auth/De auth - When set, the WiLink receives all authentication
242 * and de-authentication frames. When clear, these frames are
243 * discarded.
244 * 9 Beacon - When set, the WiLink receives all beacon frames.
245 * When clear, these frames are discarded.
246 * 8 Contention Free - When set, the WiLink receives all contention
247 * free frames.
248 * When clear, these frames are discarded.
249 * 7 Control - When set, the WiLink receives all control frames.
250 * When clear, these frames are discarded.
251 * 6 Data - When set, the WiLink receives all data frames.
252 * When clear, these frames are discarded.
253 * 5 FCS Error - When set, the WiLink receives frames that have FCS
254 * errors.
255 * When clear, these frames are discarded.
256 * 4 Management - When set, the WiLink receives all management
257 * frames.
258 * When clear, these frames are discarded.
259 * 3 Probe Request - When set, the WiLink receives all probe request
260 * frames.
261 * When clear, these frames are discarded.
262 * 2 Probe Response - When set, the WiLink receives all probe
263 * response frames.
264 * When clear, these frames are discarded.
265 * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
266 * frames.
267 * When clear, these frames are discarded.
268 * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
269 * that have reserved frame types and sub types as defined by the
270 * 802.11 specification.
271 * When clear, these frames are discarded.
273 struct acx_rx_config {
274 struct acx_header header;
276 __le32 config_options;
277 __le32 filter_options;
278 } __attribute__ ((packed));
280 struct acx_packet_detection {
281 struct acx_header header;
283 __le32 threshold;
284 } __attribute__ ((packed));
287 enum acx_slot_type {
288 SLOT_TIME_LONG = 0,
289 SLOT_TIME_SHORT = 1,
290 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT,
291 MAX_SLOT_TIMES = 0xFF
294 #define STATION_WONE_INDEX 0
296 struct acx_slot {
297 struct acx_header header;
299 u8 wone_index; /* Reserved */
300 u8 slot_time;
301 u8 reserved[6];
302 } __attribute__ ((packed));
305 #define ACX_MC_ADDRESS_GROUP_MAX (8)
306 #define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ACX_MC_ADDRESS_GROUP_MAX)
308 struct acx_dot11_grp_addr_tbl {
309 struct acx_header header;
311 u8 enabled;
312 u8 num_groups;
313 u8 pad[2];
314 u8 mac_table[ADDRESS_GROUP_MAX_LEN];
315 } __attribute__ ((packed));
317 struct acx_rx_timeout {
318 struct acx_header header;
320 __le16 ps_poll_timeout;
321 __le16 upsd_timeout;
322 } __attribute__ ((packed));
324 struct acx_rts_threshold {
325 struct acx_header header;
327 __le16 threshold;
328 u8 pad[2];
329 } __attribute__ ((packed));
331 struct acx_beacon_filter_option {
332 struct acx_header header;
334 u8 enable;
337 * The number of beacons without the unicast TIM
338 * bit set that the firmware buffers before
339 * signaling the host about ready frames.
340 * When set to 0 and the filter is enabled, beacons
341 * without the unicast TIM bit set are dropped.
343 u8 max_num_beacons;
344 u8 pad[2];
345 } __attribute__ ((packed));
348 * ACXBeaconFilterEntry (not 221)
349 * Byte Offset Size (Bytes) Definition
350 * =========== ============ ==========
351 * 0 1 IE identifier
352 * 1 1 Treatment bit mask
354 * ACXBeaconFilterEntry (221)
355 * Byte Offset Size (Bytes) Definition
356 * =========== ============ ==========
357 * 0 1 IE identifier
358 * 1 1 Treatment bit mask
359 * 2 3 OUI
360 * 5 1 Type
361 * 6 2 Version
364 * Treatment bit mask - The information element handling:
365 * bit 0 - The information element is compared and transferred
366 * in case of change.
367 * bit 1 - The information element is transferred to the host
368 * with each appearance or disappearance.
369 * Note that both bits can be set at the same time.
371 #define BEACON_FILTER_TABLE_MAX_IE_NUM (32)
372 #define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6)
373 #define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2)
374 #define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6)
375 #define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * \
376 BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \
377 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
378 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
380 struct acx_beacon_filter_ie_table {
381 struct acx_header header;
383 u8 num_ie;
384 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
385 u8 pad[3];
386 } __attribute__ ((packed));
388 struct acx_conn_monit_params {
389 struct acx_header header;
391 __le32 synch_fail_thold; /* number of beacons missed */
392 __le32 bss_lose_timeout; /* number of TU's from synch fail */
393 } __attribute__ ((packed));
395 enum {
396 SG_ENABLE = 0,
397 SG_DISABLE,
398 SG_SENSE_NO_ACTIVITY,
399 SG_SENSE_ACTIVE
402 struct acx_bt_wlan_coex {
403 struct acx_header header;
406 * 0 -> PTA enabled
407 * 1 -> PTA disabled
408 * 2 -> sense no active mode, i.e.
409 * an interrupt is sent upon
410 * BT activity.
411 * 3 -> PTA is switched on in response
412 * to the interrupt sending.
414 u8 enable;
415 u8 pad[3];
416 } __attribute__ ((packed));
418 struct acx_smart_reflex_state {
419 struct acx_header header;
421 u8 enable;
422 u8 padding[3];
423 } __attribute__ ((packed));
425 struct smart_reflex_err_table {
426 u8 len;
427 s8 upper_limit;
428 s8 values[14];
429 } __attribute__ ((packed));
431 struct acx_smart_reflex_config_params {
432 struct acx_header header;
434 struct smart_reflex_err_table error_table[3];
435 } __attribute__ ((packed));
437 struct acx_dco_itrim_params {
438 struct acx_header header;
440 u8 enable;
441 u8 padding[3];
442 __le32 timeout;
443 } __attribute__ ((packed));
445 #define PTA_ANTENNA_TYPE_DEF (0)
446 #define PTA_BT_HP_MAXTIME_DEF (2000)
447 #define PTA_WLAN_HP_MAX_TIME_DEF (5000)
448 #define PTA_SENSE_DISABLE_TIMER_DEF (1350)
449 #define PTA_PROTECTIVE_RX_TIME_DEF (1500)
450 #define PTA_PROTECTIVE_TX_TIME_DEF (1500)
451 #define PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF (3000)
452 #define PTA_SIGNALING_TYPE_DEF (1)
453 #define PTA_AFH_LEVERAGE_ON_DEF (0)
454 #define PTA_NUMBER_QUIET_CYCLE_DEF (0)
455 #define PTA_MAX_NUM_CTS_DEF (3)
456 #define PTA_NUMBER_OF_WLAN_PACKETS_DEF (2)
457 #define PTA_NUMBER_OF_BT_PACKETS_DEF (2)
458 #define PTA_PROTECTIVE_RX_TIME_FAST_DEF (1500)
459 #define PTA_PROTECTIVE_TX_TIME_FAST_DEF (3000)
460 #define PTA_CYCLE_TIME_FAST_DEF (8700)
461 #define PTA_RX_FOR_AVALANCHE_DEF (5)
462 #define PTA_ELP_HP_DEF (0)
463 #define PTA_ANTI_STARVE_PERIOD_DEF (500)
464 #define PTA_ANTI_STARVE_NUM_CYCLE_DEF (4)
465 #define PTA_ALLOW_PA_SD_DEF (1)
466 #define PTA_TIME_BEFORE_BEACON_DEF (6300)
467 #define PTA_HPDM_MAX_TIME_DEF (1600)
468 #define PTA_TIME_OUT_NEXT_WLAN_DEF (2550)
469 #define PTA_AUTO_MODE_NO_CTS_DEF (0)
470 #define PTA_BT_HP_RESPECTED_DEF (3)
471 #define PTA_WLAN_RX_MIN_RATE_DEF (24)
472 #define PTA_ACK_MODE_DEF (1)
474 struct acx_bt_wlan_coex_param {
475 struct acx_header header;
477 __le32 per_threshold;
478 __le32 max_scan_compensation_time;
479 __le16 nfs_sample_interval;
480 u8 load_ratio;
481 u8 auto_ps_mode;
482 u8 probe_req_compensation;
483 u8 scan_window_compensation;
484 u8 antenna_config;
485 u8 beacon_miss_threshold;
486 __le32 rate_adaptation_threshold;
487 s8 rate_adaptation_snr;
488 u8 padding[3];
489 } __attribute__ ((packed));
491 struct acx_energy_detection {
492 struct acx_header header;
494 /* The RX Clear Channel Assessment threshold in the PHY */
495 __le16 rx_cca_threshold;
496 u8 tx_energy_detection;
497 u8 pad;
498 } __attribute__ ((packed));
500 struct acx_beacon_broadcast {
501 struct acx_header header;
503 __le16 beacon_rx_timeout;
504 __le16 broadcast_timeout;
506 /* Enables receiving of broadcast packets in PS mode */
507 u8 rx_broadcast_in_ps;
509 /* Consecutive PS Poll failures before updating the host */
510 u8 ps_poll_threshold;
511 u8 pad[2];
512 } __attribute__ ((packed));
514 struct acx_event_mask {
515 struct acx_header header;
517 __le32 event_mask;
518 __le32 high_event_mask; /* Unused */
519 } __attribute__ ((packed));
521 #define CFG_RX_FCS BIT(2)
522 #define CFG_RX_ALL_GOOD BIT(3)
523 #define CFG_UNI_FILTER_EN BIT(4)
524 #define CFG_BSSID_FILTER_EN BIT(5)
525 #define CFG_MC_FILTER_EN BIT(6)
526 #define CFG_MC_ADDR0_EN BIT(7)
527 #define CFG_MC_ADDR1_EN BIT(8)
528 #define CFG_BC_REJECT_EN BIT(9)
529 #define CFG_SSID_FILTER_EN BIT(10)
530 #define CFG_RX_INT_FCS_ERROR BIT(11)
531 #define CFG_RX_INT_ENCRYPTED BIT(12)
532 #define CFG_RX_WR_RX_STATUS BIT(13)
533 #define CFG_RX_FILTER_NULTI BIT(14)
534 #define CFG_RX_RESERVE BIT(15)
535 #define CFG_RX_TIMESTAMP_TSF BIT(16)
537 #define CFG_RX_RSV_EN BIT(0)
538 #define CFG_RX_RCTS_ACK BIT(1)
539 #define CFG_RX_PRSP_EN BIT(2)
540 #define CFG_RX_PREQ_EN BIT(3)
541 #define CFG_RX_MGMT_EN BIT(4)
542 #define CFG_RX_FCS_ERROR BIT(5)
543 #define CFG_RX_DATA_EN BIT(6)
544 #define CFG_RX_CTL_EN BIT(7)
545 #define CFG_RX_CF_EN BIT(8)
546 #define CFG_RX_BCN_EN BIT(9)
547 #define CFG_RX_AUTH_EN BIT(10)
548 #define CFG_RX_ASSOC_EN BIT(11)
550 #define SCAN_PASSIVE BIT(0)
551 #define SCAN_5GHZ_BAND BIT(1)
552 #define SCAN_TRIGGERED BIT(2)
553 #define SCAN_PRIORITY_HIGH BIT(3)
555 /* When set, disable HW encryption */
556 #define DF_ENCRYPTION_DISABLE 0x01
557 #define DF_SNIFF_MODE_ENABLE 0x80
559 struct acx_feature_config {
560 struct acx_header header;
562 __le32 options;
563 __le32 data_flow_options;
564 } __attribute__ ((packed));
566 struct acx_current_tx_power {
567 struct acx_header header;
569 u8 current_tx_power;
570 u8 padding[3];
571 } __attribute__ ((packed));
573 struct acx_wake_up_condition {
574 struct acx_header header;
576 u8 wake_up_event; /* Only one bit can be set */
577 u8 listen_interval;
578 u8 pad[2];
579 } __attribute__ ((packed));
581 struct acx_aid {
582 struct acx_header header;
585 * To be set when associated with an AP.
587 __le16 aid;
588 u8 pad[2];
589 } __attribute__ ((packed));
591 enum acx_preamble_type {
592 ACX_PREAMBLE_LONG = 0,
593 ACX_PREAMBLE_SHORT = 1
596 struct acx_preamble {
597 struct acx_header header;
600 * When set, the WiLink transmits the frames with a short preamble and
601 * when cleared, the WiLink transmits the frames with a long preamble.
603 u8 preamble;
604 u8 padding[3];
605 } __attribute__ ((packed));
607 enum acx_ctsprotect_type {
608 CTSPROTECT_DISABLE = 0,
609 CTSPROTECT_ENABLE = 1
612 struct acx_ctsprotect {
613 struct acx_header header;
614 u8 ctsprotect;
615 u8 padding[3];
616 } __attribute__ ((packed));
618 struct acx_tx_statistics {
619 __le32 internal_desc_overflow;
620 } __attribute__ ((packed));
622 struct acx_rx_statistics {
623 __le32 out_of_mem;
624 __le32 hdr_overflow;
625 __le32 hw_stuck;
626 __le32 dropped;
627 __le32 fcs_err;
628 __le32 xfr_hint_trig;
629 __le32 path_reset;
630 __le32 reset_counter;
631 } __attribute__ ((packed));
633 struct acx_dma_statistics {
634 __le32 rx_requested;
635 __le32 rx_errors;
636 __le32 tx_requested;
637 __le32 tx_errors;
638 } __attribute__ ((packed));
640 struct acx_isr_statistics {
641 /* host command complete */
642 __le32 cmd_cmplt;
644 /* fiqisr() */
645 __le32 fiqs;
647 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
648 __le32 rx_headers;
650 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
651 __le32 rx_completes;
653 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
654 __le32 rx_mem_overflow;
656 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
657 __le32 rx_rdys;
659 /* irqisr() */
660 __le32 irqs;
662 /* (INT_STS_ND & INT_TRIG_TX_PROC) */
663 __le32 tx_procs;
665 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
666 __le32 decrypt_done;
668 /* (INT_STS_ND & INT_TRIG_DMA0) */
669 __le32 dma0_done;
671 /* (INT_STS_ND & INT_TRIG_DMA1) */
672 __le32 dma1_done;
674 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
675 __le32 tx_exch_complete;
677 /* (INT_STS_ND & INT_TRIG_COMMAND) */
678 __le32 commands;
680 /* (INT_STS_ND & INT_TRIG_RX_PROC) */
681 __le32 rx_procs;
683 /* (INT_STS_ND & INT_TRIG_PM_802) */
684 __le32 hw_pm_mode_changes;
686 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
687 __le32 host_acknowledges;
689 /* (INT_STS_ND & INT_TRIG_PM_PCI) */
690 __le32 pci_pm;
692 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
693 __le32 wakeups;
695 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
696 __le32 low_rssi;
697 } __attribute__ ((packed));
699 struct acx_wep_statistics {
700 /* WEP address keys configured */
701 __le32 addr_key_count;
703 /* default keys configured */
704 __le32 default_key_count;
706 __le32 reserved;
708 /* number of times that WEP key not found on lookup */
709 __le32 key_not_found;
711 /* number of times that WEP key decryption failed */
712 __le32 decrypt_fail;
714 /* WEP packets decrypted */
715 __le32 packets;
717 /* WEP decrypt interrupts */
718 __le32 interrupt;
719 } __attribute__ ((packed));
721 #define ACX_MISSED_BEACONS_SPREAD 10
723 struct acx_pwr_statistics {
724 /* the amount of enters into power save mode (both PD & ELP) */
725 __le32 ps_enter;
727 /* the amount of enters into ELP mode */
728 __le32 elp_enter;
730 /* the amount of missing beacon interrupts to the host */
731 __le32 missing_bcns;
733 /* the amount of wake on host-access times */
734 __le32 wake_on_host;
736 /* the amount of wake on timer-expire */
737 __le32 wake_on_timer_exp;
739 /* the number of packets that were transmitted with PS bit set */
740 __le32 tx_with_ps;
742 /* the number of packets that were transmitted with PS bit clear */
743 __le32 tx_without_ps;
745 /* the number of received beacons */
746 __le32 rcvd_beacons;
748 /* the number of entering into PowerOn (power save off) */
749 __le32 power_save_off;
751 /* the number of entries into power save mode */
752 __le16 enable_ps;
755 * the number of exits from power save, not including failed PS
756 * transitions
758 __le16 disable_ps;
761 * the number of times the TSF counter was adjusted because
762 * of drift
764 __le32 fix_tsf_ps;
766 /* Gives statistics about the spread continuous missed beacons.
767 * The 16 LSB are dedicated for the PS mode.
768 * The 16 MSB are dedicated for the PS mode.
769 * cont_miss_bcns_spread[0] - single missed beacon.
770 * cont_miss_bcns_spread[1] - two continuous missed beacons.
771 * cont_miss_bcns_spread[2] - three continuous missed beacons.
772 * ...
773 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
775 __le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
777 /* the number of beacons in awake mode */
778 __le32 rcvd_awake_beacons;
779 } __attribute__ ((packed));
781 struct acx_mic_statistics {
782 __le32 rx_pkts;
783 __le32 calc_failure;
784 } __attribute__ ((packed));
786 struct acx_aes_statistics {
787 __le32 encrypt_fail;
788 __le32 decrypt_fail;
789 __le32 encrypt_packets;
790 __le32 decrypt_packets;
791 __le32 encrypt_interrupt;
792 __le32 decrypt_interrupt;
793 } __attribute__ ((packed));
795 struct acx_event_statistics {
796 __le32 heart_beat;
797 __le32 calibration;
798 __le32 rx_mismatch;
799 __le32 rx_mem_empty;
800 __le32 rx_pool;
801 __le32 oom_late;
802 __le32 phy_transmit_error;
803 __le32 tx_stuck;
804 } __attribute__ ((packed));
806 struct acx_ps_statistics {
807 __le32 pspoll_timeouts;
808 __le32 upsd_timeouts;
809 __le32 upsd_max_sptime;
810 __le32 upsd_max_apturn;
811 __le32 pspoll_max_apturn;
812 __le32 pspoll_utilization;
813 __le32 upsd_utilization;
814 } __attribute__ ((packed));
816 struct acx_rxpipe_statistics {
817 __le32 rx_prep_beacon_drop;
818 __le32 descr_host_int_trig_rx_data;
819 __le32 beacon_buffer_thres_host_int_trig_rx_data;
820 __le32 missed_beacon_host_int_trig_rx_data;
821 __le32 tx_xfr_host_int_trig_rx_data;
822 } __attribute__ ((packed));
824 struct acx_statistics {
825 struct acx_header header;
827 struct acx_tx_statistics tx;
828 struct acx_rx_statistics rx;
829 struct acx_dma_statistics dma;
830 struct acx_isr_statistics isr;
831 struct acx_wep_statistics wep;
832 struct acx_pwr_statistics pwr;
833 struct acx_aes_statistics aes;
834 struct acx_mic_statistics mic;
835 struct acx_event_statistics event;
836 struct acx_ps_statistics ps;
837 struct acx_rxpipe_statistics rxpipe;
838 } __attribute__ ((packed));
840 struct acx_rate_class {
841 __le32 enabled_rates;
842 u8 short_retry_limit;
843 u8 long_retry_limit;
844 u8 aflags;
845 u8 reserved;
848 struct acx_rate_policy {
849 struct acx_header header;
851 __le32 rate_class_cnt;
852 struct acx_rate_class rate_class[CONF_TX_MAX_RATE_CLASSES];
853 } __attribute__ ((packed));
855 struct acx_ac_cfg {
856 struct acx_header header;
857 u8 ac;
858 u8 cw_min;
859 __le16 cw_max;
860 u8 aifsn;
861 u8 reserved;
862 __le16 tx_op_limit;
863 } __attribute__ ((packed));
865 struct acx_tid_config {
866 struct acx_header header;
867 u8 queue_id;
868 u8 channel_type;
869 u8 tsid;
870 u8 ps_scheme;
871 u8 ack_policy;
872 u8 padding[3];
873 __le32 apsd_conf[2];
874 } __attribute__ ((packed));
876 struct acx_frag_threshold {
877 struct acx_header header;
878 __le16 frag_threshold;
879 u8 padding[2];
880 } __attribute__ ((packed));
882 struct acx_tx_config_options {
883 struct acx_header header;
884 __le16 tx_compl_timeout; /* msec */
885 __le16 tx_compl_threshold; /* number of packets */
886 } __attribute__ ((packed));
888 #define ACX_RX_MEM_BLOCKS 64
889 #define ACX_TX_MIN_MEM_BLOCKS 64
890 #define ACX_TX_DESCRIPTORS 32
891 #define ACX_NUM_SSID_PROFILES 1
893 struct wl1271_acx_config_memory {
894 struct acx_header header;
896 u8 rx_mem_block_num;
897 u8 tx_min_mem_block_num;
898 u8 num_stations;
899 u8 num_ssid_profiles;
900 __le32 total_tx_descriptors;
901 } __attribute__ ((packed));
903 struct wl1271_acx_mem_map {
904 struct acx_header header;
906 __le32 code_start;
907 __le32 code_end;
909 __le32 wep_defkey_start;
910 __le32 wep_defkey_end;
912 __le32 sta_table_start;
913 __le32 sta_table_end;
915 __le32 packet_template_start;
916 __le32 packet_template_end;
918 /* Address of the TX result interface (control block) */
919 __le32 tx_result;
920 __le32 tx_result_queue_start;
922 __le32 queue_memory_start;
923 __le32 queue_memory_end;
925 __le32 packet_memory_pool_start;
926 __le32 packet_memory_pool_end;
928 __le32 debug_buffer1_start;
929 __le32 debug_buffer1_end;
931 __le32 debug_buffer2_start;
932 __le32 debug_buffer2_end;
934 /* Number of blocks FW allocated for TX packets */
935 __le32 num_tx_mem_blocks;
937 /* Number of blocks FW allocated for RX packets */
938 __le32 num_rx_mem_blocks;
940 /* the following 4 fields are valid in SLAVE mode only */
941 u8 *tx_cbuf;
942 u8 *rx_cbuf;
943 __le32 rx_ctrl;
944 __le32 tx_ctrl;
945 } __attribute__ ((packed));
947 struct wl1271_acx_rx_config_opt {
948 struct acx_header header;
950 __le16 mblk_threshold;
951 __le16 threshold;
952 __le16 timeout;
953 u8 queue_type;
954 u8 reserved;
955 } __attribute__ ((packed));
958 struct wl1271_acx_bet_enable {
959 struct acx_header header;
961 u8 enable;
962 u8 max_consecutive;
963 u8 padding[2];
964 } __attribute__ ((packed));
966 #define ACX_IPV4_VERSION 4
967 #define ACX_IPV6_VERSION 6
968 #define ACX_IPV4_ADDR_SIZE 4
969 struct wl1271_acx_arp_filter {
970 struct acx_header header;
971 u8 version; /* ACX_IPV4_VERSION, ACX_IPV6_VERSION */
972 u8 enable; /* 1 to enable ARP filtering, 0 to disable */
973 u8 padding[2];
974 u8 address[16]; /* The configured device IP address - all ARP
975 requests directed to this IP address will pass
976 through. For IPv4, the first four bytes are
977 used. */
978 } __attribute__((packed));
981 enum {
982 ACX_WAKE_UP_CONDITIONS = 0x0002,
983 ACX_MEM_CFG = 0x0003,
984 ACX_SLOT = 0x0004,
985 ACX_AC_CFG = 0x0007,
986 ACX_MEM_MAP = 0x0008,
987 ACX_AID = 0x000A,
988 /* ACX_FW_REV is missing in the ref driver, but seems to work */
989 ACX_FW_REV = 0x000D,
990 ACX_MEDIUM_USAGE = 0x000F,
991 ACX_RX_CFG = 0x0010,
992 ACX_TX_QUEUE_CFG = 0x0011, /* FIXME: only used by wl1251 */
993 ACX_STATISTICS = 0x0013, /* Debug API */
994 ACX_PWR_CONSUMPTION_STATISTICS = 0x0014,
995 ACX_FEATURE_CFG = 0x0015,
996 ACX_TID_CFG = 0x001A,
997 ACX_PS_RX_STREAMING = 0x001B,
998 ACX_BEACON_FILTER_OPT = 0x001F,
999 ACX_NOISE_HIST = 0x0021,
1000 ACX_HDK_VERSION = 0x0022, /* ??? */
1001 ACX_PD_THRESHOLD = 0x0023,
1002 ACX_TX_CONFIG_OPT = 0x0024,
1003 ACX_CCA_THRESHOLD = 0x0025,
1004 ACX_EVENT_MBOX_MASK = 0x0026,
1005 ACX_CONN_MONIT_PARAMS = 0x002D,
1006 ACX_CONS_TX_FAILURE = 0x002F,
1007 ACX_BCN_DTIM_OPTIONS = 0x0031,
1008 ACX_SG_ENABLE = 0x0032,
1009 ACX_SG_CFG = 0x0033,
1010 ACX_BEACON_FILTER_TABLE = 0x0038,
1011 ACX_ARP_IP_FILTER = 0x0039,
1012 ACX_ROAMING_STATISTICS_TBL = 0x003B,
1013 ACX_RATE_POLICY = 0x003D,
1014 ACX_CTS_PROTECTION = 0x003E,
1015 ACX_SLEEP_AUTH = 0x003F,
1016 ACX_PREAMBLE_TYPE = 0x0040,
1017 ACX_ERROR_CNT = 0x0041,
1018 ACX_IBSS_FILTER = 0x0044,
1019 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045,
1020 ACX_TSF_INFO = 0x0046,
1021 ACX_CONFIG_PS_WMM = 0x0049,
1022 ACX_ENABLE_RX_DATA_FILTER = 0x004A,
1023 ACX_SET_RX_DATA_FILTER = 0x004B,
1024 ACX_GET_DATA_FILTER_STATISTICS = 0x004C,
1025 ACX_RX_CONFIG_OPT = 0x004E,
1026 ACX_FRAG_CFG = 0x004F,
1027 ACX_BET_ENABLE = 0x0050,
1028 ACX_RSSI_SNR_TRIGGER = 0x0051,
1029 ACX_RSSI_SNR_WEIGHTS = 0x0051,
1030 ACX_KEEP_ALIVE_MODE = 0x0052,
1031 ACX_SET_KEEP_ALIVE_CONFIG = 0x0054,
1032 ACX_BA_SESSION_RESPONDER_POLICY = 0x0055,
1033 ACX_BA_SESSION_INITIATOR_POLICY = 0x0056,
1034 ACX_PEER_HT_CAP = 0x0057,
1035 ACX_HT_BSS_OPERATION = 0x0058,
1036 ACX_COEX_ACTIVITY = 0x0059,
1037 ACX_SET_SMART_REFLEX_DEBUG = 0x005A,
1038 ACX_SET_SMART_REFLEX_STATE = 0x005B,
1039 ACX_SET_SMART_REFLEX_PARAMS = 0x005F,
1040 ACX_SET_DCO_ITRIM_PARAMS = 0x0061,
1041 DOT11_RX_MSDU_LIFE_TIME = 0x1004,
1042 DOT11_CUR_TX_PWR = 0x100D,
1043 DOT11_RX_DOT11_MODE = 0x1012,
1044 DOT11_RTS_THRESHOLD = 0x1013,
1045 DOT11_GROUP_ADDRESS_TBL = 0x1014,
1047 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
1049 MAX_IE = 0xFFFF
1053 int wl1271_acx_wake_up_conditions(struct wl1271 *wl);
1054 int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth);
1055 int wl1271_acx_fw_version(struct wl1271 *wl, char *buf, size_t len);
1056 int wl1271_acx_tx_power(struct wl1271 *wl, int power);
1057 int wl1271_acx_feature_cfg(struct wl1271 *wl);
1058 int wl1271_acx_mem_map(struct wl1271 *wl,
1059 struct acx_header *mem_map, size_t len);
1060 int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl);
1061 int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter);
1062 int wl1271_acx_pd_threshold(struct wl1271 *wl);
1063 int wl1271_acx_slot(struct wl1271 *wl, enum acx_slot_type slot_time);
1064 int wl1271_acx_group_address_tbl(struct wl1271 *wl, bool enable,
1065 void *mc_list, u32 mc_list_len);
1066 int wl1271_acx_service_period_timeout(struct wl1271 *wl);
1067 int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold);
1068 int wl1271_acx_dco_itrim_params(struct wl1271 *wl);
1069 int wl1271_acx_beacon_filter_opt(struct wl1271 *wl, bool enable_filter);
1070 int wl1271_acx_beacon_filter_table(struct wl1271 *wl);
1071 int wl1271_acx_conn_monit_params(struct wl1271 *wl);
1072 int wl1271_acx_sg_enable(struct wl1271 *wl);
1073 int wl1271_acx_sg_cfg(struct wl1271 *wl);
1074 int wl1271_acx_cca_threshold(struct wl1271 *wl);
1075 int wl1271_acx_bcn_dtim_options(struct wl1271 *wl);
1076 int wl1271_acx_aid(struct wl1271 *wl, u16 aid);
1077 int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask);
1078 int wl1271_acx_set_preamble(struct wl1271 *wl, enum acx_preamble_type preamble);
1079 int wl1271_acx_cts_protect(struct wl1271 *wl,
1080 enum acx_ctsprotect_type ctsprotect);
1081 int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats);
1082 int wl1271_acx_rate_policies(struct wl1271 *wl, u32 enabled_rates);
1083 int wl1271_acx_ac_cfg(struct wl1271 *wl);
1084 int wl1271_acx_tid_cfg(struct wl1271 *wl);
1085 int wl1271_acx_frag_threshold(struct wl1271 *wl);
1086 int wl1271_acx_tx_config_options(struct wl1271 *wl);
1087 int wl1271_acx_mem_cfg(struct wl1271 *wl);
1088 int wl1271_acx_init_mem_config(struct wl1271 *wl);
1089 int wl1271_acx_init_rx_interrupt(struct wl1271 *wl);
1090 int wl1271_acx_smart_reflex(struct wl1271 *wl);
1091 int wl1271_acx_bet_enable(struct wl1271 *wl, bool enable);
1092 int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, u8 *address,
1093 u8 version);
1095 #endif /* __WL1271_ACX_H__ */