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KVM: MMU: fix mmu notifier invalidate handler for huge spte
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kvm / mmu.c
blob812770cddc8d5456f59056996531357cf9592c4f
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
11 *
12 * Authors:
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
49 */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x) \
86 if (!(x)) { \
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
89 }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164 u64 addr;
165 hpa_t shadow_addr;
166 int level;
167 u64 *sptep;
168 unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
175
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193 return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205 shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
221 {
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227 return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232 return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243 return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248 return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253 return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258 return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263 if (level == PT_PAGE_TABLE_LEVEL)
264 return 1;
265 if (is_large_pte(pte))
266 return 1;
267 return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285 set_64bit((unsigned long *)sptep, spte);
286 #else
287 set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
292 {
293 #ifdef CONFIG_X86_64
294 return xchg(sptep, new_spte);
295 #else
296 u64 old_spte;
297
298 do {
299 old_spte = *sptep;
300 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
301
302 return old_spte;
303 #endif
304 }
305
306 static void update_spte(u64 *sptep, u64 new_spte)
307 {
308 u64 old_spte;
309
310 if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311 __set_spte(sptep, new_spte);
312 } else {
313 old_spte = __xchg_spte(sptep, new_spte);
314 if (old_spte & shadow_accessed_mask)
315 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
316 }
317 }
318
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320 struct kmem_cache *base_cache, int min)
321 {
322 void *obj;
323
324 if (cache->nobjs >= min)
325 return 0;
326 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
328 if (!obj)
329 return -ENOMEM;
330 cache->objects[cache->nobjs++] = obj;
331 }
332 return 0;
333 }
334
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336 struct kmem_cache *cache)
337 {
338 while (mc->nobjs)
339 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
340 }
341
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
343 int min)
344 {
345 struct page *page;
346
347 if (cache->nobjs >= min)
348 return 0;
349 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350 page = alloc_page(GFP_KERNEL);
351 if (!page)
352 return -ENOMEM;
353 cache->objects[cache->nobjs++] = page_address(page);
354 }
355 return 0;
356 }
357
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
359 {
360 while (mc->nobjs)
361 free_page((unsigned long)mc->objects[--mc->nobjs]);
362 }
363
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
365 {
366 int r;
367
368 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
369 pte_chain_cache, 4);
370 if (r)
371 goto out;
372 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
373 rmap_desc_cache, 4);
374 if (r)
375 goto out;
376 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
377 if (r)
378 goto out;
379 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380 mmu_page_header_cache, 4);
381 out:
382 return r;
383 }
384
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
386 {
387 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391 mmu_page_header_cache);
392 }
393
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
395 size_t size)
396 {
397 void *p;
398
399 BUG_ON(!mc->nobjs);
400 p = mc->objects[--mc->nobjs];
401 return p;
402 }
403
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
405 {
406 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407 sizeof(struct kvm_pte_chain));
408 }
409
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
411 {
412 kmem_cache_free(pte_chain_cache, pc);
413 }
414
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
416 {
417 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418 sizeof(struct kvm_rmap_desc));
419 }
420
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
422 {
423 kmem_cache_free(rmap_desc_cache, rd);
424 }
425
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
427 {
428 if (!sp->role.direct)
429 return sp->gfns[index];
430
431 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
432 }
433
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
435 {
436 if (sp->role.direct)
437 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
438 else
439 sp->gfns[index] = gfn;
440 }
441
442 /*
443 * Return the pointer to the largepage write count for a given
444 * gfn, handling slots that are not large page aligned.
445 */
446 static int *slot_largepage_idx(gfn_t gfn,
447 struct kvm_memory_slot *slot,
448 int level)
449 {
450 unsigned long idx;
451
452 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454 return &slot->lpage_info[level - 2][idx].write_count;
455 }
456
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
458 {
459 struct kvm_memory_slot *slot;
460 int *write_count;
461 int i;
462
463 slot = gfn_to_memslot(kvm, gfn);
464 for (i = PT_DIRECTORY_LEVEL;
465 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466 write_count = slot_largepage_idx(gfn, slot, i);
467 *write_count += 1;
468 }
469 }
470
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
472 {
473 struct kvm_memory_slot *slot;
474 int *write_count;
475 int i;
476
477 slot = gfn_to_memslot(kvm, gfn);
478 for (i = PT_DIRECTORY_LEVEL;
479 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480 write_count = slot_largepage_idx(gfn, slot, i);
481 *write_count -= 1;
482 WARN_ON(*write_count < 0);
483 }
484 }
485
486 static int has_wrprotected_page(struct kvm *kvm,
487 gfn_t gfn,
488 int level)
489 {
490 struct kvm_memory_slot *slot;
491 int *largepage_idx;
492
493 slot = gfn_to_memslot(kvm, gfn);
494 if (slot) {
495 largepage_idx = slot_largepage_idx(gfn, slot, level);
496 return *largepage_idx;
497 }
498
499 return 1;
500 }
501
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
503 {
504 unsigned long page_size;
505 int i, ret = 0;
506
507 page_size = kvm_host_page_size(kvm, gfn);
508
509 for (i = PT_PAGE_TABLE_LEVEL;
510 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511 if (page_size >= KVM_HPAGE_SIZE(i))
512 ret = i;
513 else
514 break;
515 }
516
517 return ret;
518 }
519
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
521 {
522 struct kvm_memory_slot *slot;
523 int host_level, level, max_level;
524
525 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526 if (slot && slot->dirty_bitmap)
527 return PT_PAGE_TABLE_LEVEL;
528
529 host_level = host_mapping_level(vcpu->kvm, large_gfn);
530
531 if (host_level == PT_PAGE_TABLE_LEVEL)
532 return host_level;
533
534 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535 kvm_x86_ops->get_lpage_level() : host_level;
536
537 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
539 break;
540
541 return level - 1;
542 }
543
544 /*
545 * Take gfn and return the reverse mapping to it.
546 */
547
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
549 {
550 struct kvm_memory_slot *slot;
551 unsigned long idx;
552
553 slot = gfn_to_memslot(kvm, gfn);
554 if (likely(level == PT_PAGE_TABLE_LEVEL))
555 return &slot->rmap[gfn - slot->base_gfn];
556
557 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
559
560 return &slot->lpage_info[level - 2][idx].rmap_pde;
561 }
562
563 /*
564 * Reverse mapping data structures:
565 *
566 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567 * that points to page_address(page).
568 *
569 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570 * containing more mappings.
571 *
572 * Returns the number of rmap entries before the spte was added or zero if
573 * the spte was not added.
574 *
575 */
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
577 {
578 struct kvm_mmu_page *sp;
579 struct kvm_rmap_desc *desc;
580 unsigned long *rmapp;
581 int i, count = 0;
582
583 if (!is_rmap_spte(*spte))
584 return count;
585 sp = page_header(__pa(spte));
586 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
588 if (!*rmapp) {
589 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590 *rmapp = (unsigned long)spte;
591 } else if (!(*rmapp & 1)) {
592 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593 desc = mmu_alloc_rmap_desc(vcpu);
594 desc->sptes[0] = (u64 *)*rmapp;
595 desc->sptes[1] = spte;
596 *rmapp = (unsigned long)desc | 1;
597 } else {
598 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600 while (desc->sptes[RMAP_EXT-1] && desc->more) {
601 desc = desc->more;
602 count += RMAP_EXT;
603 }
604 if (desc->sptes[RMAP_EXT-1]) {
605 desc->more = mmu_alloc_rmap_desc(vcpu);
606 desc = desc->more;
607 }
608 for (i = 0; desc->sptes[i]; ++i)
609 ;
610 desc->sptes[i] = spte;
611 }
612 return count;
613 }
614
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616 struct kvm_rmap_desc *desc,
617 int i,
618 struct kvm_rmap_desc *prev_desc)
619 {
620 int j;
621
622 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
623 ;
624 desc->sptes[i] = desc->sptes[j];
625 desc->sptes[j] = NULL;
626 if (j != 0)
627 return;
628 if (!prev_desc && !desc->more)
629 *rmapp = (unsigned long)desc->sptes[0];
630 else
631 if (prev_desc)
632 prev_desc->more = desc->more;
633 else
634 *rmapp = (unsigned long)desc->more | 1;
635 mmu_free_rmap_desc(desc);
636 }
637
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
639 {
640 struct kvm_rmap_desc *desc;
641 struct kvm_rmap_desc *prev_desc;
642 struct kvm_mmu_page *sp;
643 gfn_t gfn;
644 unsigned long *rmapp;
645 int i;
646
647 sp = page_header(__pa(spte));
648 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
650 if (!*rmapp) {
651 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
652 BUG();
653 } else if (!(*rmapp & 1)) {
654 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
655 if ((u64 *)*rmapp != spte) {
656 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
657 spte, *spte);
658 BUG();
659 }
660 *rmapp = 0;
661 } else {
662 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
664 prev_desc = NULL;
665 while (desc) {
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667 if (desc->sptes[i] == spte) {
668 rmap_desc_remove_entry(rmapp,
669 desc, i,
670 prev_desc);
671 return;
672 }
673 prev_desc = desc;
674 desc = desc->more;
675 }
676 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
677 BUG();
678 }
679 }
680
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
682 {
683 pfn_t pfn;
684 u64 old_spte;
685
686 old_spte = __xchg_spte(sptep, new_spte);
687 if (!is_rmap_spte(old_spte))
688 return;
689 pfn = spte_to_pfn(old_spte);
690 if (old_spte & shadow_accessed_mask)
691 kvm_set_pfn_accessed(pfn);
692 if (is_writable_pte(old_spte))
693 kvm_set_pfn_dirty(pfn);
694 rmap_remove(kvm, sptep);
695 }
696
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
698 {
699 struct kvm_rmap_desc *desc;
700 u64 *prev_spte;
701 int i;
702
703 if (!*rmapp)
704 return NULL;
705 else if (!(*rmapp & 1)) {
706 if (!spte)
707 return (u64 *)*rmapp;
708 return NULL;
709 }
710 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
711 prev_spte = NULL;
712 while (desc) {
713 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714 if (prev_spte == spte)
715 return desc->sptes[i];
716 prev_spte = desc->sptes[i];
717 }
718 desc = desc->more;
719 }
720 return NULL;
721 }
722
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
724 {
725 unsigned long *rmapp;
726 u64 *spte;
727 int i, write_protected = 0;
728
729 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
730
731 spte = rmap_next(kvm, rmapp, NULL);
732 while (spte) {
733 BUG_ON(!spte);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736 if (is_writable_pte(*spte)) {
737 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
738 write_protected = 1;
739 }
740 spte = rmap_next(kvm, rmapp, spte);
741 }
742 if (write_protected) {
743 pfn_t pfn;
744
745 spte = rmap_next(kvm, rmapp, NULL);
746 pfn = spte_to_pfn(*spte);
747 kvm_set_pfn_dirty(pfn);
748 }
749
750 /* check for huge page mappings */
751 for (i = PT_DIRECTORY_LEVEL;
752 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753 rmapp = gfn_to_rmap(kvm, gfn, i);
754 spte = rmap_next(kvm, rmapp, NULL);
755 while (spte) {
756 BUG_ON(!spte);
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760 if (is_writable_pte(*spte)) {
761 drop_spte(kvm, spte,
762 shadow_trap_nonpresent_pte);
763 --kvm->stat.lpages;
764 spte = NULL;
765 write_protected = 1;
766 }
767 spte = rmap_next(kvm, rmapp, spte);
768 }
769 }
770
771 return write_protected;
772 }
773
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
775 unsigned long data)
776 {
777 u64 *spte;
778 int need_tlb_flush = 0;
779
780 while ((spte = rmap_next(kvm, rmapp, NULL))) {
781 BUG_ON(!(*spte & PT_PRESENT_MASK));
782 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
784 need_tlb_flush = 1;
785 }
786 return need_tlb_flush;
787 }
788
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
790 unsigned long data)
791 {
792 int need_flush = 0;
793 u64 *spte, new_spte, old_spte;
794 pte_t *ptep = (pte_t *)data;
795 pfn_t new_pfn;
796
797 WARN_ON(pte_huge(*ptep));
798 new_pfn = pte_pfn(*ptep);
799 spte = rmap_next(kvm, rmapp, NULL);
800 while (spte) {
801 BUG_ON(!is_shadow_present_pte(*spte));
802 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
803 need_flush = 1;
804 if (pte_write(*ptep)) {
805 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806 spte = rmap_next(kvm, rmapp, NULL);
807 } else {
808 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809 new_spte |= (u64)new_pfn << PAGE_SHIFT;
810
811 new_spte &= ~PT_WRITABLE_MASK;
812 new_spte &= ~SPTE_HOST_WRITEABLE;
813 new_spte &= ~shadow_accessed_mask;
814 if (is_writable_pte(*spte))
815 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816 old_spte = __xchg_spte(spte, new_spte);
817 if (is_shadow_present_pte(old_spte)
818 && (old_spte & shadow_accessed_mask))
819 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820 spte = rmap_next(kvm, rmapp, spte);
821 }
822 }
823 if (need_flush)
824 kvm_flush_remote_tlbs(kvm);
825
826 return 0;
827 }
828
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
830 unsigned long data,
831 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
832 unsigned long data))
833 {
834 int i, j;
835 int ret;
836 int retval = 0;
837 struct kvm_memslots *slots;
838
839 slots = kvm_memslots(kvm);
840
841 for (i = 0; i < slots->nmemslots; i++) {
842 struct kvm_memory_slot *memslot = &slots->memslots[i];
843 unsigned long start = memslot->userspace_addr;
844 unsigned long end;
845
846 end = start + (memslot->npages << PAGE_SHIFT);
847 if (hva >= start && hva < end) {
848 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
849
850 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
851
852 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
853 unsigned long idx;
854 int sh;
855
856 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
857 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
858 (memslot->base_gfn >> sh);
859 ret |= handler(kvm,
860 &memslot->lpage_info[j][idx].rmap_pde,
861 data);
862 }
863 trace_kvm_age_page(hva, memslot, ret);
864 retval |= ret;
865 }
866 }
867
868 return retval;
869 }
870
871 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
872 {
873 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
874 }
875
876 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
877 {
878 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
879 }
880
881 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
882 unsigned long data)
883 {
884 u64 *spte;
885 int young = 0;
886
887 /*
888 * Emulate the accessed bit for EPT, by checking if this page has
889 * an EPT mapping, and clearing it if it does. On the next access,
890 * a new EPT mapping will be established.
891 * This has some overhead, but not as much as the cost of swapping
892 * out actively used pages or breaking up actively used hugepages.
893 */
894 if (!shadow_accessed_mask)
895 return kvm_unmap_rmapp(kvm, rmapp, data);
896
897 spte = rmap_next(kvm, rmapp, NULL);
898 while (spte) {
899 int _young;
900 u64 _spte = *spte;
901 BUG_ON(!(_spte & PT_PRESENT_MASK));
902 _young = _spte & PT_ACCESSED_MASK;
903 if (_young) {
904 young = 1;
905 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
906 }
907 spte = rmap_next(kvm, rmapp, spte);
908 }
909 return young;
910 }
911
912 #define RMAP_RECYCLE_THRESHOLD 1000
913
914 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
915 {
916 unsigned long *rmapp;
917 struct kvm_mmu_page *sp;
918
919 sp = page_header(__pa(spte));
920
921 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
922
923 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
924 kvm_flush_remote_tlbs(vcpu->kvm);
925 }
926
927 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
928 {
929 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
930 }
931
932 #ifdef MMU_DEBUG
933 static int is_empty_shadow_page(u64 *spt)
934 {
935 u64 *pos;
936 u64 *end;
937
938 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
939 if (is_shadow_present_pte(*pos)) {
940 printk(KERN_ERR "%s: %p %llx\n", __func__,
941 pos, *pos);
942 return 0;
943 }
944 return 1;
945 }
946 #endif
947
948 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
949 {
950 ASSERT(is_empty_shadow_page(sp->spt));
951 hlist_del(&sp->hash_link);
952 list_del(&sp->link);
953 __free_page(virt_to_page(sp->spt));
954 if (!sp->role.direct)
955 __free_page(virt_to_page(sp->gfns));
956 kmem_cache_free(mmu_page_header_cache, sp);
957 ++kvm->arch.n_free_mmu_pages;
958 }
959
960 static unsigned kvm_page_table_hashfn(gfn_t gfn)
961 {
962 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
963 }
964
965 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
966 u64 *parent_pte, int direct)
967 {
968 struct kvm_mmu_page *sp;
969
970 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
971 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
972 if (!direct)
973 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
974 PAGE_SIZE);
975 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
976 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
977 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
978 sp->multimapped = 0;
979 sp->parent_pte = parent_pte;
980 --vcpu->kvm->arch.n_free_mmu_pages;
981 return sp;
982 }
983
984 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
985 struct kvm_mmu_page *sp, u64 *parent_pte)
986 {
987 struct kvm_pte_chain *pte_chain;
988 struct hlist_node *node;
989 int i;
990
991 if (!parent_pte)
992 return;
993 if (!sp->multimapped) {
994 u64 *old = sp->parent_pte;
995
996 if (!old) {
997 sp->parent_pte = parent_pte;
998 return;
999 }
1000 sp->multimapped = 1;
1001 pte_chain = mmu_alloc_pte_chain(vcpu);
1002 INIT_HLIST_HEAD(&sp->parent_ptes);
1003 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1004 pte_chain->parent_ptes[0] = old;
1005 }
1006 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1007 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1008 continue;
1009 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1010 if (!pte_chain->parent_ptes[i]) {
1011 pte_chain->parent_ptes[i] = parent_pte;
1012 return;
1013 }
1014 }
1015 pte_chain = mmu_alloc_pte_chain(vcpu);
1016 BUG_ON(!pte_chain);
1017 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1018 pte_chain->parent_ptes[0] = parent_pte;
1019 }
1020
1021 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1022 u64 *parent_pte)
1023 {
1024 struct kvm_pte_chain *pte_chain;
1025 struct hlist_node *node;
1026 int i;
1027
1028 if (!sp->multimapped) {
1029 BUG_ON(sp->parent_pte != parent_pte);
1030 sp->parent_pte = NULL;
1031 return;
1032 }
1033 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1034 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1035 if (!pte_chain->parent_ptes[i])
1036 break;
1037 if (pte_chain->parent_ptes[i] != parent_pte)
1038 continue;
1039 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1040 && pte_chain->parent_ptes[i + 1]) {
1041 pte_chain->parent_ptes[i]
1042 = pte_chain->parent_ptes[i + 1];
1043 ++i;
1044 }
1045 pte_chain->parent_ptes[i] = NULL;
1046 if (i == 0) {
1047 hlist_del(&pte_chain->link);
1048 mmu_free_pte_chain(pte_chain);
1049 if (hlist_empty(&sp->parent_ptes)) {
1050 sp->multimapped = 0;
1051 sp->parent_pte = NULL;
1052 }
1053 }
1054 return;
1055 }
1056 BUG();
1057 }
1058
1059 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1060 {
1061 struct kvm_pte_chain *pte_chain;
1062 struct hlist_node *node;
1063 struct kvm_mmu_page *parent_sp;
1064 int i;
1065
1066 if (!sp->multimapped && sp->parent_pte) {
1067 parent_sp = page_header(__pa(sp->parent_pte));
1068 fn(parent_sp, sp->parent_pte);
1069 return;
1070 }
1071
1072 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1073 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1074 u64 *spte = pte_chain->parent_ptes[i];
1075
1076 if (!spte)
1077 break;
1078 parent_sp = page_header(__pa(spte));
1079 fn(parent_sp, spte);
1080 }
1081 }
1082
1083 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1084 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1085 {
1086 mmu_parent_walk(sp, mark_unsync);
1087 }
1088
1089 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1090 {
1091 unsigned int index;
1092
1093 index = spte - sp->spt;
1094 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1095 return;
1096 if (sp->unsync_children++)
1097 return;
1098 kvm_mmu_mark_parents_unsync(sp);
1099 }
1100
1101 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1102 struct kvm_mmu_page *sp)
1103 {
1104 int i;
1105
1106 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1107 sp->spt[i] = shadow_trap_nonpresent_pte;
1108 }
1109
1110 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1111 struct kvm_mmu_page *sp, bool clear_unsync)
1112 {
1113 return 1;
1114 }
1115
1116 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1117 {
1118 }
1119
1120 #define KVM_PAGE_ARRAY_NR 16
1121
1122 struct kvm_mmu_pages {
1123 struct mmu_page_and_offset {
1124 struct kvm_mmu_page *sp;
1125 unsigned int idx;
1126 } page[KVM_PAGE_ARRAY_NR];
1127 unsigned int nr;
1128 };
1129
1130 #define for_each_unsync_children(bitmap, idx) \
1131 for (idx = find_first_bit(bitmap, 512); \
1132 idx < 512; \
1133 idx = find_next_bit(bitmap, 512, idx+1))
1134
1135 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1136 int idx)
1137 {
1138 int i;
1139
1140 if (sp->unsync)
1141 for (i=0; i < pvec->nr; i++)
1142 if (pvec->page[i].sp == sp)
1143 return 0;
1144
1145 pvec->page[pvec->nr].sp = sp;
1146 pvec->page[pvec->nr].idx = idx;
1147 pvec->nr++;
1148 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1149 }
1150
1151 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1152 struct kvm_mmu_pages *pvec)
1153 {
1154 int i, ret, nr_unsync_leaf = 0;
1155
1156 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1157 struct kvm_mmu_page *child;
1158 u64 ent = sp->spt[i];
1159
1160 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1161 goto clear_child_bitmap;
1162
1163 child = page_header(ent & PT64_BASE_ADDR_MASK);
1164
1165 if (child->unsync_children) {
1166 if (mmu_pages_add(pvec, child, i))
1167 return -ENOSPC;
1168
1169 ret = __mmu_unsync_walk(child, pvec);
1170 if (!ret)
1171 goto clear_child_bitmap;
1172 else if (ret > 0)
1173 nr_unsync_leaf += ret;
1174 else
1175 return ret;
1176 } else if (child->unsync) {
1177 nr_unsync_leaf++;
1178 if (mmu_pages_add(pvec, child, i))
1179 return -ENOSPC;
1180 } else
1181 goto clear_child_bitmap;
1182
1183 continue;
1184
1185 clear_child_bitmap:
1186 __clear_bit(i, sp->unsync_child_bitmap);
1187 sp->unsync_children--;
1188 WARN_ON((int)sp->unsync_children < 0);
1189 }
1190
1191
1192 return nr_unsync_leaf;
1193 }
1194
1195 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1196 struct kvm_mmu_pages *pvec)
1197 {
1198 if (!sp->unsync_children)
1199 return 0;
1200
1201 mmu_pages_add(pvec, sp, 0);
1202 return __mmu_unsync_walk(sp, pvec);
1203 }
1204
1205 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1206 {
1207 WARN_ON(!sp->unsync);
1208 trace_kvm_mmu_sync_page(sp);
1209 sp->unsync = 0;
1210 --kvm->stat.mmu_unsync;
1211 }
1212
1213 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1214 struct list_head *invalid_list);
1215 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1216 struct list_head *invalid_list);
1217
1218 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1219 hlist_for_each_entry(sp, pos, \
1220 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1221 if ((sp)->gfn != (gfn)) {} else
1222
1223 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1224 hlist_for_each_entry(sp, pos, \
1225 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1226 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1227 (sp)->role.invalid) {} else
1228
1229 /* @sp->gfn should be write-protected at the call site */
1230 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1231 struct list_head *invalid_list, bool clear_unsync)
1232 {
1233 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1234 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1235 return 1;
1236 }
1237
1238 if (clear_unsync)
1239 kvm_unlink_unsync_page(vcpu->kvm, sp);
1240
1241 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1242 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1243 return 1;
1244 }
1245
1246 kvm_mmu_flush_tlb(vcpu);
1247 return 0;
1248 }
1249
1250 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1251 struct kvm_mmu_page *sp)
1252 {
1253 LIST_HEAD(invalid_list);
1254 int ret;
1255
1256 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1257 if (ret)
1258 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1259
1260 return ret;
1261 }
1262
1263 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1264 struct list_head *invalid_list)
1265 {
1266 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1267 }
1268
1269 /* @gfn should be write-protected at the call site */
1270 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1271 {
1272 struct kvm_mmu_page *s;
1273 struct hlist_node *node;
1274 LIST_HEAD(invalid_list);
1275 bool flush = false;
1276
1277 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1278 if (!s->unsync)
1279 continue;
1280
1281 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1282 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1283 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1284 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1285 continue;
1286 }
1287 kvm_unlink_unsync_page(vcpu->kvm, s);
1288 flush = true;
1289 }
1290
1291 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1292 if (flush)
1293 kvm_mmu_flush_tlb(vcpu);
1294 }
1295
1296 struct mmu_page_path {
1297 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1298 unsigned int idx[PT64_ROOT_LEVEL-1];
1299 };
1300
1301 #define for_each_sp(pvec, sp, parents, i) \
1302 for (i = mmu_pages_next(&pvec, &parents, -1), \
1303 sp = pvec.page[i].sp; \
1304 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1305 i = mmu_pages_next(&pvec, &parents, i))
1306
1307 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1308 struct mmu_page_path *parents,
1309 int i)
1310 {
1311 int n;
1312
1313 for (n = i+1; n < pvec->nr; n++) {
1314 struct kvm_mmu_page *sp = pvec->page[n].sp;
1315
1316 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1317 parents->idx[0] = pvec->page[n].idx;
1318 return n;
1319 }
1320
1321 parents->parent[sp->role.level-2] = sp;
1322 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1323 }
1324
1325 return n;
1326 }
1327
1328 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1329 {
1330 struct kvm_mmu_page *sp;
1331 unsigned int level = 0;
1332
1333 do {
1334 unsigned int idx = parents->idx[level];
1335
1336 sp = parents->parent[level];
1337 if (!sp)
1338 return;
1339
1340 --sp->unsync_children;
1341 WARN_ON((int)sp->unsync_children < 0);
1342 __clear_bit(idx, sp->unsync_child_bitmap);
1343 level++;
1344 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1345 }
1346
1347 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1348 struct mmu_page_path *parents,
1349 struct kvm_mmu_pages *pvec)
1350 {
1351 parents->parent[parent->role.level-1] = NULL;
1352 pvec->nr = 0;
1353 }
1354
1355 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1356 struct kvm_mmu_page *parent)
1357 {
1358 int i;
1359 struct kvm_mmu_page *sp;
1360 struct mmu_page_path parents;
1361 struct kvm_mmu_pages pages;
1362 LIST_HEAD(invalid_list);
1363
1364 kvm_mmu_pages_init(parent, &parents, &pages);
1365 while (mmu_unsync_walk(parent, &pages)) {
1366 int protected = 0;
1367
1368 for_each_sp(pages, sp, parents, i)
1369 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1370
1371 if (protected)
1372 kvm_flush_remote_tlbs(vcpu->kvm);
1373
1374 for_each_sp(pages, sp, parents, i) {
1375 kvm_sync_page(vcpu, sp, &invalid_list);
1376 mmu_pages_clear_parents(&parents);
1377 }
1378 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1379 cond_resched_lock(&vcpu->kvm->mmu_lock);
1380 kvm_mmu_pages_init(parent, &parents, &pages);
1381 }
1382 }
1383
1384 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1385 gfn_t gfn,
1386 gva_t gaddr,
1387 unsigned level,
1388 int direct,
1389 unsigned access,
1390 u64 *parent_pte)
1391 {
1392 union kvm_mmu_page_role role;
1393 unsigned quadrant;
1394 struct kvm_mmu_page *sp;
1395 struct hlist_node *node;
1396 bool need_sync = false;
1397
1398 role = vcpu->arch.mmu.base_role;
1399 role.level = level;
1400 role.direct = direct;
1401 if (role.direct)
1402 role.cr4_pae = 0;
1403 role.access = access;
1404 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1405 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1406 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1407 role.quadrant = quadrant;
1408 }
1409 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1410 if (!need_sync && sp->unsync)
1411 need_sync = true;
1412
1413 if (sp->role.word != role.word)
1414 continue;
1415
1416 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1417 break;
1418
1419 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1420 if (sp->unsync_children) {
1421 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1422 kvm_mmu_mark_parents_unsync(sp);
1423 } else if (sp->unsync)
1424 kvm_mmu_mark_parents_unsync(sp);
1425
1426 trace_kvm_mmu_get_page(sp, false);
1427 return sp;
1428 }
1429 ++vcpu->kvm->stat.mmu_cache_miss;
1430 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1431 if (!sp)
1432 return sp;
1433 sp->gfn = gfn;
1434 sp->role = role;
1435 hlist_add_head(&sp->hash_link,
1436 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1437 if (!direct) {
1438 if (rmap_write_protect(vcpu->kvm, gfn))
1439 kvm_flush_remote_tlbs(vcpu->kvm);
1440 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1441 kvm_sync_pages(vcpu, gfn);
1442
1443 account_shadowed(vcpu->kvm, gfn);
1444 }
1445 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1446 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1447 else
1448 nonpaging_prefetch_page(vcpu, sp);
1449 trace_kvm_mmu_get_page(sp, true);
1450 return sp;
1451 }
1452
1453 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1454 struct kvm_vcpu *vcpu, u64 addr)
1455 {
1456 iterator->addr = addr;
1457 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1458 iterator->level = vcpu->arch.mmu.shadow_root_level;
1459 if (iterator->level == PT32E_ROOT_LEVEL) {
1460 iterator->shadow_addr
1461 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1462 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1463 --iterator->level;
1464 if (!iterator->shadow_addr)
1465 iterator->level = 0;
1466 }
1467 }
1468
1469 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1470 {
1471 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1472 return false;
1473
1474 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1475 if (is_large_pte(*iterator->sptep))
1476 return false;
1477
1478 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1479 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1480 return true;
1481 }
1482
1483 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1484 {
1485 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1486 --iterator->level;
1487 }
1488
1489 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1490 {
1491 u64 spte;
1492
1493 spte = __pa(sp->spt)
1494 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1495 | PT_WRITABLE_MASK | PT_USER_MASK;
1496 __set_spte(sptep, spte);
1497 }
1498
1499 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1500 {
1501 if (is_large_pte(*sptep)) {
1502 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1503 kvm_flush_remote_tlbs(vcpu->kvm);
1504 }
1505 }
1506
1507 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1508 unsigned direct_access)
1509 {
1510 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1511 struct kvm_mmu_page *child;
1512
1513 /*
1514 * For the direct sp, if the guest pte's dirty bit
1515 * changed form clean to dirty, it will corrupt the
1516 * sp's access: allow writable in the read-only sp,
1517 * so we should update the spte at this point to get
1518 * a new sp with the correct access.
1519 */
1520 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1521 if (child->role.access == direct_access)
1522 return;
1523
1524 mmu_page_remove_parent_pte(child, sptep);
1525 __set_spte(sptep, shadow_trap_nonpresent_pte);
1526 kvm_flush_remote_tlbs(vcpu->kvm);
1527 }
1528 }
1529
1530 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1531 struct kvm_mmu_page *sp)
1532 {
1533 unsigned i;
1534 u64 *pt;
1535 u64 ent;
1536
1537 pt = sp->spt;
1538
1539 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1540 ent = pt[i];
1541
1542 if (is_shadow_present_pte(ent)) {
1543 if (!is_last_spte(ent, sp->role.level)) {
1544 ent &= PT64_BASE_ADDR_MASK;
1545 mmu_page_remove_parent_pte(page_header(ent),
1546 &pt[i]);
1547 } else {
1548 if (is_large_pte(ent))
1549 --kvm->stat.lpages;
1550 drop_spte(kvm, &pt[i],
1551 shadow_trap_nonpresent_pte);
1552 }
1553 }
1554 pt[i] = shadow_trap_nonpresent_pte;
1555 }
1556 }
1557
1558 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1559 {
1560 mmu_page_remove_parent_pte(sp, parent_pte);
1561 }
1562
1563 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1564 {
1565 int i;
1566 struct kvm_vcpu *vcpu;
1567
1568 kvm_for_each_vcpu(i, vcpu, kvm)
1569 vcpu->arch.last_pte_updated = NULL;
1570 }
1571
1572 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1573 {
1574 u64 *parent_pte;
1575
1576 while (sp->multimapped || sp->parent_pte) {
1577 if (!sp->multimapped)
1578 parent_pte = sp->parent_pte;
1579 else {
1580 struct kvm_pte_chain *chain;
1581
1582 chain = container_of(sp->parent_ptes.first,
1583 struct kvm_pte_chain, link);
1584 parent_pte = chain->parent_ptes[0];
1585 }
1586 BUG_ON(!parent_pte);
1587 kvm_mmu_put_page(sp, parent_pte);
1588 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1589 }
1590 }
1591
1592 static int mmu_zap_unsync_children(struct kvm *kvm,
1593 struct kvm_mmu_page *parent,
1594 struct list_head *invalid_list)
1595 {
1596 int i, zapped = 0;
1597 struct mmu_page_path parents;
1598 struct kvm_mmu_pages pages;
1599
1600 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1601 return 0;
1602
1603 kvm_mmu_pages_init(parent, &parents, &pages);
1604 while (mmu_unsync_walk(parent, &pages)) {
1605 struct kvm_mmu_page *sp;
1606
1607 for_each_sp(pages, sp, parents, i) {
1608 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1609 mmu_pages_clear_parents(&parents);
1610 zapped++;
1611 }
1612 kvm_mmu_pages_init(parent, &parents, &pages);
1613 }
1614
1615 return zapped;
1616 }
1617
1618 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1619 struct list_head *invalid_list)
1620 {
1621 int ret;
1622
1623 trace_kvm_mmu_prepare_zap_page(sp);
1624 ++kvm->stat.mmu_shadow_zapped;
1625 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1626 kvm_mmu_page_unlink_children(kvm, sp);
1627 kvm_mmu_unlink_parents(kvm, sp);
1628 if (!sp->role.invalid && !sp->role.direct)
1629 unaccount_shadowed(kvm, sp->gfn);
1630 if (sp->unsync)
1631 kvm_unlink_unsync_page(kvm, sp);
1632 if (!sp->root_count) {
1633 /* Count self */
1634 ret++;
1635 list_move(&sp->link, invalid_list);
1636 } else {
1637 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1638 kvm_reload_remote_mmus(kvm);
1639 }
1640
1641 sp->role.invalid = 1;
1642 kvm_mmu_reset_last_pte_updated(kvm);
1643 return ret;
1644 }
1645
1646 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1647 struct list_head *invalid_list)
1648 {
1649 struct kvm_mmu_page *sp;
1650
1651 if (list_empty(invalid_list))
1652 return;
1653
1654 kvm_flush_remote_tlbs(kvm);
1655
1656 do {
1657 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1658 WARN_ON(!sp->role.invalid || sp->root_count);
1659 kvm_mmu_free_page(kvm, sp);
1660 } while (!list_empty(invalid_list));
1661
1662 }
1663
1664 /*
1665 * Changing the number of mmu pages allocated to the vm
1666 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1667 */
1668 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1669 {
1670 int used_pages;
1671 LIST_HEAD(invalid_list);
1672
1673 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1674 used_pages = max(0, used_pages);
1675
1676 /*
1677 * If we set the number of mmu pages to be smaller be than the
1678 * number of actived pages , we must to free some mmu pages before we
1679 * change the value
1680 */
1681
1682 if (used_pages > kvm_nr_mmu_pages) {
1683 while (used_pages > kvm_nr_mmu_pages &&
1684 !list_empty(&kvm->arch.active_mmu_pages)) {
1685 struct kvm_mmu_page *page;
1686
1687 page = container_of(kvm->arch.active_mmu_pages.prev,
1688 struct kvm_mmu_page, link);
1689 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1690 &invalid_list);
1691 }
1692 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1693 kvm_nr_mmu_pages = used_pages;
1694 kvm->arch.n_free_mmu_pages = 0;
1695 }
1696 else
1697 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1698 - kvm->arch.n_alloc_mmu_pages;
1699
1700 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1701 }
1702
1703 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1704 {
1705 struct kvm_mmu_page *sp;
1706 struct hlist_node *node;
1707 LIST_HEAD(invalid_list);
1708 int r;
1709
1710 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1711 r = 0;
1712
1713 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1714 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1715 sp->role.word);
1716 r = 1;
1717 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1718 }
1719 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1720 return r;
1721 }
1722
1723 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1724 {
1725 struct kvm_mmu_page *sp;
1726 struct hlist_node *node;
1727 LIST_HEAD(invalid_list);
1728
1729 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1730 pgprintk("%s: zap %lx %x\n",
1731 __func__, gfn, sp->role.word);
1732 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1733 }
1734 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1735 }
1736
1737 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1738 {
1739 int slot = memslot_id(kvm, gfn);
1740 struct kvm_mmu_page *sp = page_header(__pa(pte));
1741
1742 __set_bit(slot, sp->slot_bitmap);
1743 }
1744
1745 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1746 {
1747 int i;
1748 u64 *pt = sp->spt;
1749
1750 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1751 return;
1752
1753 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1754 if (pt[i] == shadow_notrap_nonpresent_pte)
1755 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1756 }
1757 }
1758
1759 /*
1760 * The function is based on mtrr_type_lookup() in
1761 * arch/x86/kernel/cpu/mtrr/generic.c
1762 */
1763 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1764 u64 start, u64 end)
1765 {
1766 int i;
1767 u64 base, mask;
1768 u8 prev_match, curr_match;
1769 int num_var_ranges = KVM_NR_VAR_MTRR;
1770
1771 if (!mtrr_state->enabled)
1772 return 0xFF;
1773
1774 /* Make end inclusive end, instead of exclusive */
1775 end--;
1776
1777 /* Look in fixed ranges. Just return the type as per start */
1778 if (mtrr_state->have_fixed && (start < 0x100000)) {
1779 int idx;
1780
1781 if (start < 0x80000) {
1782 idx = 0;
1783 idx += (start >> 16);
1784 return mtrr_state->fixed_ranges[idx];
1785 } else if (start < 0xC0000) {
1786 idx = 1 * 8;
1787 idx += ((start - 0x80000) >> 14);
1788 return mtrr_state->fixed_ranges[idx];
1789 } else if (start < 0x1000000) {
1790 idx = 3 * 8;
1791 idx += ((start - 0xC0000) >> 12);
1792 return mtrr_state->fixed_ranges[idx];
1793 }
1794 }
1795
1796 /*
1797 * Look in variable ranges
1798 * Look of multiple ranges matching this address and pick type
1799 * as per MTRR precedence
1800 */
1801 if (!(mtrr_state->enabled & 2))
1802 return mtrr_state->def_type;
1803
1804 prev_match = 0xFF;
1805 for (i = 0; i < num_var_ranges; ++i) {
1806 unsigned short start_state, end_state;
1807
1808 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1809 continue;
1810
1811 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1812 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1813 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1814 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1815
1816 start_state = ((start & mask) == (base & mask));
1817 end_state = ((end & mask) == (base & mask));
1818 if (start_state != end_state)
1819 return 0xFE;
1820
1821 if ((start & mask) != (base & mask))
1822 continue;
1823
1824 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1825 if (prev_match == 0xFF) {
1826 prev_match = curr_match;
1827 continue;
1828 }
1829
1830 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1831 curr_match == MTRR_TYPE_UNCACHABLE)
1832 return MTRR_TYPE_UNCACHABLE;
1833
1834 if ((prev_match == MTRR_TYPE_WRBACK &&
1835 curr_match == MTRR_TYPE_WRTHROUGH) ||
1836 (prev_match == MTRR_TYPE_WRTHROUGH &&
1837 curr_match == MTRR_TYPE_WRBACK)) {
1838 prev_match = MTRR_TYPE_WRTHROUGH;
1839 curr_match = MTRR_TYPE_WRTHROUGH;
1840 }
1841
1842 if (prev_match != curr_match)
1843 return MTRR_TYPE_UNCACHABLE;
1844 }
1845
1846 if (prev_match != 0xFF)
1847 return prev_match;
1848
1849 return mtrr_state->def_type;
1850 }
1851
1852 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1853 {
1854 u8 mtrr;
1855
1856 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1857 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1858 if (mtrr == 0xfe || mtrr == 0xff)
1859 mtrr = MTRR_TYPE_WRBACK;
1860 return mtrr;
1861 }
1862 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1863
1864 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1865 {
1866 trace_kvm_mmu_unsync_page(sp);
1867 ++vcpu->kvm->stat.mmu_unsync;
1868 sp->unsync = 1;
1869
1870 kvm_mmu_mark_parents_unsync(sp);
1871 mmu_convert_notrap(sp);
1872 }
1873
1874 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1875 {
1876 struct kvm_mmu_page *s;
1877 struct hlist_node *node;
1878
1879 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1880 if (s->unsync)
1881 continue;
1882 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1883 __kvm_unsync_page(vcpu, s);
1884 }
1885 }
1886
1887 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1888 bool can_unsync)
1889 {
1890 struct kvm_mmu_page *s;
1891 struct hlist_node *node;
1892 bool need_unsync = false;
1893
1894 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1895 if (!can_unsync)
1896 return 1;
1897
1898 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1899 return 1;
1900
1901 if (!need_unsync && !s->unsync) {
1902 if (!oos_shadow)
1903 return 1;
1904 need_unsync = true;
1905 }
1906 }
1907 if (need_unsync)
1908 kvm_unsync_pages(vcpu, gfn);
1909 return 0;
1910 }
1911
1912 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1913 unsigned pte_access, int user_fault,
1914 int write_fault, int dirty, int level,
1915 gfn_t gfn, pfn_t pfn, bool speculative,
1916 bool can_unsync, bool reset_host_protection)
1917 {
1918 u64 spte;
1919 int ret = 0;
1920
1921 /*
1922 * We don't set the accessed bit, since we sometimes want to see
1923 * whether the guest actually used the pte (in order to detect
1924 * demand paging).
1925 */
1926 spte = shadow_base_present_pte | shadow_dirty_mask;
1927 if (!speculative)
1928 spte |= shadow_accessed_mask;
1929 if (!dirty)
1930 pte_access &= ~ACC_WRITE_MASK;
1931 if (pte_access & ACC_EXEC_MASK)
1932 spte |= shadow_x_mask;
1933 else
1934 spte |= shadow_nx_mask;
1935 if (pte_access & ACC_USER_MASK)
1936 spte |= shadow_user_mask;
1937 if (level > PT_PAGE_TABLE_LEVEL)
1938 spte |= PT_PAGE_SIZE_MASK;
1939 if (tdp_enabled)
1940 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1941 kvm_is_mmio_pfn(pfn));
1942
1943 if (reset_host_protection)
1944 spte |= SPTE_HOST_WRITEABLE;
1945
1946 spte |= (u64)pfn << PAGE_SHIFT;
1947
1948 if ((pte_access & ACC_WRITE_MASK)
1949 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1950 && !user_fault)) {
1951
1952 if (level > PT_PAGE_TABLE_LEVEL &&
1953 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1954 ret = 1;
1955 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1956 goto done;
1957 }
1958
1959 spte |= PT_WRITABLE_MASK;
1960
1961 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1962 spte &= ~PT_USER_MASK;
1963
1964 /*
1965 * Optimization: for pte sync, if spte was writable the hash
1966 * lookup is unnecessary (and expensive). Write protection
1967 * is responsibility of mmu_get_page / kvm_sync_page.
1968 * Same reasoning can be applied to dirty page accounting.
1969 */
1970 if (!can_unsync && is_writable_pte(*sptep))
1971 goto set_pte;
1972
1973 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1974 pgprintk("%s: found shadow page for %lx, marking ro\n",
1975 __func__, gfn);
1976 ret = 1;
1977 pte_access &= ~ACC_WRITE_MASK;
1978 if (is_writable_pte(spte))
1979 spte &= ~PT_WRITABLE_MASK;
1980 }
1981 }
1982
1983 if (pte_access & ACC_WRITE_MASK)
1984 mark_page_dirty(vcpu->kvm, gfn);
1985
1986 set_pte:
1987 update_spte(sptep, spte);
1988 done:
1989 return ret;
1990 }
1991
1992 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1993 unsigned pt_access, unsigned pte_access,
1994 int user_fault, int write_fault, int dirty,
1995 int *ptwrite, int level, gfn_t gfn,
1996 pfn_t pfn, bool speculative,
1997 bool reset_host_protection)
1998 {
1999 int was_rmapped = 0;
2000 int was_writable = is_writable_pte(*sptep);
2001 int rmap_count;
2002
2003 pgprintk("%s: spte %llx access %x write_fault %d"
2004 " user_fault %d gfn %lx\n",
2005 __func__, *sptep, pt_access,
2006 write_fault, user_fault, gfn);
2007
2008 if (is_rmap_spte(*sptep)) {
2009 /*
2010 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2011 * the parent of the now unreachable PTE.
2012 */
2013 if (level > PT_PAGE_TABLE_LEVEL &&
2014 !is_large_pte(*sptep)) {
2015 struct kvm_mmu_page *child;
2016 u64 pte = *sptep;
2017
2018 child = page_header(pte & PT64_BASE_ADDR_MASK);
2019 mmu_page_remove_parent_pte(child, sptep);
2020 __set_spte(sptep, shadow_trap_nonpresent_pte);
2021 kvm_flush_remote_tlbs(vcpu->kvm);
2022 } else if (pfn != spte_to_pfn(*sptep)) {
2023 pgprintk("hfn old %lx new %lx\n",
2024 spte_to_pfn(*sptep), pfn);
2025 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2026 kvm_flush_remote_tlbs(vcpu->kvm);
2027 } else
2028 was_rmapped = 1;
2029 }
2030
2031 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2032 dirty, level, gfn, pfn, speculative, true,
2033 reset_host_protection)) {
2034 if (write_fault)
2035 *ptwrite = 1;
2036 kvm_mmu_flush_tlb(vcpu);
2037 }
2038
2039 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2040 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2041 is_large_pte(*sptep)? "2MB" : "4kB",
2042 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2043 *sptep, sptep);
2044 if (!was_rmapped && is_large_pte(*sptep))
2045 ++vcpu->kvm->stat.lpages;
2046
2047 page_header_update_slot(vcpu->kvm, sptep, gfn);
2048 if (!was_rmapped) {
2049 rmap_count = rmap_add(vcpu, sptep, gfn);
2050 kvm_release_pfn_clean(pfn);
2051 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2052 rmap_recycle(vcpu, sptep, gfn);
2053 } else {
2054 if (was_writable)
2055 kvm_release_pfn_dirty(pfn);
2056 else
2057 kvm_release_pfn_clean(pfn);
2058 }
2059 if (speculative) {
2060 vcpu->arch.last_pte_updated = sptep;
2061 vcpu->arch.last_pte_gfn = gfn;
2062 }
2063 }
2064
2065 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2066 {
2067 }
2068
2069 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2070 int level, gfn_t gfn, pfn_t pfn)
2071 {
2072 struct kvm_shadow_walk_iterator iterator;
2073 struct kvm_mmu_page *sp;
2074 int pt_write = 0;
2075 gfn_t pseudo_gfn;
2076
2077 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2078 if (iterator.level == level) {
2079 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2080 0, write, 1, &pt_write,
2081 level, gfn, pfn, false, true);
2082 ++vcpu->stat.pf_fixed;
2083 break;
2084 }
2085
2086 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2087 u64 base_addr = iterator.addr;
2088
2089 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2090 pseudo_gfn = base_addr >> PAGE_SHIFT;
2091 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2092 iterator.level - 1,
2093 1, ACC_ALL, iterator.sptep);
2094 if (!sp) {
2095 pgprintk("nonpaging_map: ENOMEM\n");
2096 kvm_release_pfn_clean(pfn);
2097 return -ENOMEM;
2098 }
2099
2100 __set_spte(iterator.sptep,
2101 __pa(sp->spt)
2102 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2103 | shadow_user_mask | shadow_x_mask);
2104 }
2105 }
2106 return pt_write;
2107 }
2108
2109 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2110 {
2111 char buf[1];
2112 void __user *hva;
2113 int r;
2114
2115 /* Touch the page, so send SIGBUS */
2116 hva = (void __user *)gfn_to_hva(kvm, gfn);
2117 r = copy_from_user(buf, hva, 1);
2118 }
2119
2120 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2121 {
2122 kvm_release_pfn_clean(pfn);
2123 if (is_hwpoison_pfn(pfn)) {
2124 kvm_send_hwpoison_signal(kvm, gfn);
2125 return 0;
2126 } else if (is_fault_pfn(pfn))
2127 return -EFAULT;
2128
2129 return 1;
2130 }
2131
2132 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2133 {
2134 int r;
2135 int level;
2136 pfn_t pfn;
2137 unsigned long mmu_seq;
2138
2139 level = mapping_level(vcpu, gfn);
2140
2141 /*
2142 * This path builds a PAE pagetable - so we can map 2mb pages at
2143 * maximum. Therefore check if the level is larger than that.
2144 */
2145 if (level > PT_DIRECTORY_LEVEL)
2146 level = PT_DIRECTORY_LEVEL;
2147
2148 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2149
2150 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2151 smp_rmb();
2152 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2153
2154 /* mmio */
2155 if (is_error_pfn(pfn))
2156 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2157
2158 spin_lock(&vcpu->kvm->mmu_lock);
2159 if (mmu_notifier_retry(vcpu, mmu_seq))
2160 goto out_unlock;
2161 kvm_mmu_free_some_pages(vcpu);
2162 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2163 spin_unlock(&vcpu->kvm->mmu_lock);
2164
2165
2166 return r;
2167
2168 out_unlock:
2169 spin_unlock(&vcpu->kvm->mmu_lock);
2170 kvm_release_pfn_clean(pfn);
2171 return 0;
2172 }
2173
2174
2175 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2176 {
2177 int i;
2178 struct kvm_mmu_page *sp;
2179 LIST_HEAD(invalid_list);
2180
2181 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2182 return;
2183 spin_lock(&vcpu->kvm->mmu_lock);
2184 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2185 hpa_t root = vcpu->arch.mmu.root_hpa;
2186
2187 sp = page_header(root);
2188 --sp->root_count;
2189 if (!sp->root_count && sp->role.invalid) {
2190 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2191 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2192 }
2193 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2194 spin_unlock(&vcpu->kvm->mmu_lock);
2195 return;
2196 }
2197 for (i = 0; i < 4; ++i) {
2198 hpa_t root = vcpu->arch.mmu.pae_root[i];
2199
2200 if (root) {
2201 root &= PT64_BASE_ADDR_MASK;
2202 sp = page_header(root);
2203 --sp->root_count;
2204 if (!sp->root_count && sp->role.invalid)
2205 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2206 &invalid_list);
2207 }
2208 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2209 }
2210 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2211 spin_unlock(&vcpu->kvm->mmu_lock);
2212 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2213 }
2214
2215 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2216 {
2217 int ret = 0;
2218
2219 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2220 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2221 ret = 1;
2222 }
2223
2224 return ret;
2225 }
2226
2227 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2228 {
2229 int i;
2230 gfn_t root_gfn;
2231 struct kvm_mmu_page *sp;
2232 int direct = 0;
2233 u64 pdptr;
2234
2235 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2236
2237 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2238 hpa_t root = vcpu->arch.mmu.root_hpa;
2239
2240 ASSERT(!VALID_PAGE(root));
2241 if (mmu_check_root(vcpu, root_gfn))
2242 return 1;
2243 if (tdp_enabled) {
2244 direct = 1;
2245 root_gfn = 0;
2246 }
2247 spin_lock(&vcpu->kvm->mmu_lock);
2248 kvm_mmu_free_some_pages(vcpu);
2249 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2250 PT64_ROOT_LEVEL, direct,
2251 ACC_ALL, NULL);
2252 root = __pa(sp->spt);
2253 ++sp->root_count;
2254 spin_unlock(&vcpu->kvm->mmu_lock);
2255 vcpu->arch.mmu.root_hpa = root;
2256 return 0;
2257 }
2258 direct = !is_paging(vcpu);
2259 for (i = 0; i < 4; ++i) {
2260 hpa_t root = vcpu->arch.mmu.pae_root[i];
2261
2262 ASSERT(!VALID_PAGE(root));
2263 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2264 pdptr = kvm_pdptr_read(vcpu, i);
2265 if (!is_present_gpte(pdptr)) {
2266 vcpu->arch.mmu.pae_root[i] = 0;
2267 continue;
2268 }
2269 root_gfn = pdptr >> PAGE_SHIFT;
2270 } else if (vcpu->arch.mmu.root_level == 0)
2271 root_gfn = 0;
2272 if (mmu_check_root(vcpu, root_gfn))
2273 return 1;
2274 if (tdp_enabled) {
2275 direct = 1;
2276 root_gfn = i << 30;
2277 }
2278 spin_lock(&vcpu->kvm->mmu_lock);
2279 kvm_mmu_free_some_pages(vcpu);
2280 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2281 PT32_ROOT_LEVEL, direct,
2282 ACC_ALL, NULL);
2283 root = __pa(sp->spt);
2284 ++sp->root_count;
2285 spin_unlock(&vcpu->kvm->mmu_lock);
2286
2287 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2288 }
2289 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2290 return 0;
2291 }
2292
2293 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2294 {
2295 int i;
2296 struct kvm_mmu_page *sp;
2297
2298 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2299 return;
2300 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2301 hpa_t root = vcpu->arch.mmu.root_hpa;
2302 sp = page_header(root);
2303 mmu_sync_children(vcpu, sp);
2304 return;
2305 }
2306 for (i = 0; i < 4; ++i) {
2307 hpa_t root = vcpu->arch.mmu.pae_root[i];
2308
2309 if (root && VALID_PAGE(root)) {
2310 root &= PT64_BASE_ADDR_MASK;
2311 sp = page_header(root);
2312 mmu_sync_children(vcpu, sp);
2313 }
2314 }
2315 }
2316
2317 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2318 {
2319 spin_lock(&vcpu->kvm->mmu_lock);
2320 mmu_sync_roots(vcpu);
2321 spin_unlock(&vcpu->kvm->mmu_lock);
2322 }
2323
2324 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2325 u32 access, u32 *error)
2326 {
2327 if (error)
2328 *error = 0;
2329 return vaddr;
2330 }
2331
2332 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2333 u32 error_code)
2334 {
2335 gfn_t gfn;
2336 int r;
2337
2338 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2339 r = mmu_topup_memory_caches(vcpu);
2340 if (r)
2341 return r;
2342
2343 ASSERT(vcpu);
2344 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2345
2346 gfn = gva >> PAGE_SHIFT;
2347
2348 return nonpaging_map(vcpu, gva & PAGE_MASK,
2349 error_code & PFERR_WRITE_MASK, gfn);
2350 }
2351
2352 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2353 u32 error_code)
2354 {
2355 pfn_t pfn;
2356 int r;
2357 int level;
2358 gfn_t gfn = gpa >> PAGE_SHIFT;
2359 unsigned long mmu_seq;
2360
2361 ASSERT(vcpu);
2362 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2363
2364 r = mmu_topup_memory_caches(vcpu);
2365 if (r)
2366 return r;
2367
2368 level = mapping_level(vcpu, gfn);
2369
2370 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2371
2372 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2373 smp_rmb();
2374 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2375 if (is_error_pfn(pfn))
2376 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2377 spin_lock(&vcpu->kvm->mmu_lock);
2378 if (mmu_notifier_retry(vcpu, mmu_seq))
2379 goto out_unlock;
2380 kvm_mmu_free_some_pages(vcpu);
2381 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2382 level, gfn, pfn);
2383 spin_unlock(&vcpu->kvm->mmu_lock);
2384
2385 return r;
2386
2387 out_unlock:
2388 spin_unlock(&vcpu->kvm->mmu_lock);
2389 kvm_release_pfn_clean(pfn);
2390 return 0;
2391 }
2392
2393 static void nonpaging_free(struct kvm_vcpu *vcpu)
2394 {
2395 mmu_free_roots(vcpu);
2396 }
2397
2398 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2399 {
2400 struct kvm_mmu *context = &vcpu->arch.mmu;
2401
2402 context->new_cr3 = nonpaging_new_cr3;
2403 context->page_fault = nonpaging_page_fault;
2404 context->gva_to_gpa = nonpaging_gva_to_gpa;
2405 context->free = nonpaging_free;
2406 context->prefetch_page = nonpaging_prefetch_page;
2407 context->sync_page = nonpaging_sync_page;
2408 context->invlpg = nonpaging_invlpg;
2409 context->root_level = 0;
2410 context->shadow_root_level = PT32E_ROOT_LEVEL;
2411 context->root_hpa = INVALID_PAGE;
2412 return 0;
2413 }
2414
2415 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2416 {
2417 ++vcpu->stat.tlb_flush;
2418 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2419 }
2420
2421 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2422 {
2423 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2424 mmu_free_roots(vcpu);
2425 }
2426
2427 static void inject_page_fault(struct kvm_vcpu *vcpu,
2428 u64 addr,
2429 u32 err_code)
2430 {
2431 kvm_inject_page_fault(vcpu, addr, err_code);
2432 }
2433
2434 static void paging_free(struct kvm_vcpu *vcpu)
2435 {
2436 nonpaging_free(vcpu);
2437 }
2438
2439 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2440 {
2441 int bit7;
2442
2443 bit7 = (gpte >> 7) & 1;
2444 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2445 }
2446
2447 #define PTTYPE 64
2448 #include "paging_tmpl.h"
2449 #undef PTTYPE
2450
2451 #define PTTYPE 32
2452 #include "paging_tmpl.h"
2453 #undef PTTYPE
2454
2455 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2456 {
2457 struct kvm_mmu *context = &vcpu->arch.mmu;
2458 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2459 u64 exb_bit_rsvd = 0;
2460
2461 if (!is_nx(vcpu))
2462 exb_bit_rsvd = rsvd_bits(63, 63);
2463 switch (level) {
2464 case PT32_ROOT_LEVEL:
2465 /* no rsvd bits for 2 level 4K page table entries */
2466 context->rsvd_bits_mask[0][1] = 0;
2467 context->rsvd_bits_mask[0][0] = 0;
2468 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2469
2470 if (!is_pse(vcpu)) {
2471 context->rsvd_bits_mask[1][1] = 0;
2472 break;
2473 }
2474
2475 if (is_cpuid_PSE36())
2476 /* 36bits PSE 4MB page */
2477 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2478 else
2479 /* 32 bits PSE 4MB page */
2480 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2481 break;
2482 case PT32E_ROOT_LEVEL:
2483 context->rsvd_bits_mask[0][2] =
2484 rsvd_bits(maxphyaddr, 63) |
2485 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2486 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2487 rsvd_bits(maxphyaddr, 62); /* PDE */
2488 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2489 rsvd_bits(maxphyaddr, 62); /* PTE */
2490 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2491 rsvd_bits(maxphyaddr, 62) |
2492 rsvd_bits(13, 20); /* large page */
2493 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2494 break;
2495 case PT64_ROOT_LEVEL:
2496 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2497 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2498 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2499 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2500 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2501 rsvd_bits(maxphyaddr, 51);
2502 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2503 rsvd_bits(maxphyaddr, 51);
2504 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2505 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2506 rsvd_bits(maxphyaddr, 51) |
2507 rsvd_bits(13, 29);
2508 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2509 rsvd_bits(maxphyaddr, 51) |
2510 rsvd_bits(13, 20); /* large page */
2511 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2512 break;
2513 }
2514 }
2515
2516 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2517 {
2518 struct kvm_mmu *context = &vcpu->arch.mmu;
2519
2520 ASSERT(is_pae(vcpu));
2521 context->new_cr3 = paging_new_cr3;
2522 context->page_fault = paging64_page_fault;
2523 context->gva_to_gpa = paging64_gva_to_gpa;
2524 context->prefetch_page = paging64_prefetch_page;
2525 context->sync_page = paging64_sync_page;
2526 context->invlpg = paging64_invlpg;
2527 context->free = paging_free;
2528 context->root_level = level;
2529 context->shadow_root_level = level;
2530 context->root_hpa = INVALID_PAGE;
2531 return 0;
2532 }
2533
2534 static int paging64_init_context(struct kvm_vcpu *vcpu)
2535 {
2536 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2537 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2538 }
2539
2540 static int paging32_init_context(struct kvm_vcpu *vcpu)
2541 {
2542 struct kvm_mmu *context = &vcpu->arch.mmu;
2543
2544 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2545 context->new_cr3 = paging_new_cr3;
2546 context->page_fault = paging32_page_fault;
2547 context->gva_to_gpa = paging32_gva_to_gpa;
2548 context->free = paging_free;
2549 context->prefetch_page = paging32_prefetch_page;
2550 context->sync_page = paging32_sync_page;
2551 context->invlpg = paging32_invlpg;
2552 context->root_level = PT32_ROOT_LEVEL;
2553 context->shadow_root_level = PT32E_ROOT_LEVEL;
2554 context->root_hpa = INVALID_PAGE;
2555 return 0;
2556 }
2557
2558 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2559 {
2560 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2561 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2562 }
2563
2564 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2565 {
2566 struct kvm_mmu *context = &vcpu->arch.mmu;
2567
2568 context->new_cr3 = nonpaging_new_cr3;
2569 context->page_fault = tdp_page_fault;
2570 context->free = nonpaging_free;
2571 context->prefetch_page = nonpaging_prefetch_page;
2572 context->sync_page = nonpaging_sync_page;
2573 context->invlpg = nonpaging_invlpg;
2574 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2575 context->root_hpa = INVALID_PAGE;
2576
2577 if (!is_paging(vcpu)) {
2578 context->gva_to_gpa = nonpaging_gva_to_gpa;
2579 context->root_level = 0;
2580 } else if (is_long_mode(vcpu)) {
2581 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2582 context->gva_to_gpa = paging64_gva_to_gpa;
2583 context->root_level = PT64_ROOT_LEVEL;
2584 } else if (is_pae(vcpu)) {
2585 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2586 context->gva_to_gpa = paging64_gva_to_gpa;
2587 context->root_level = PT32E_ROOT_LEVEL;
2588 } else {
2589 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2590 context->gva_to_gpa = paging32_gva_to_gpa;
2591 context->root_level = PT32_ROOT_LEVEL;
2592 }
2593
2594 return 0;
2595 }
2596
2597 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2598 {
2599 int r;
2600
2601 ASSERT(vcpu);
2602 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2603
2604 if (!is_paging(vcpu))
2605 r = nonpaging_init_context(vcpu);
2606 else if (is_long_mode(vcpu))
2607 r = paging64_init_context(vcpu);
2608 else if (is_pae(vcpu))
2609 r = paging32E_init_context(vcpu);
2610 else
2611 r = paging32_init_context(vcpu);
2612
2613 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2614 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2615
2616 return r;
2617 }
2618
2619 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2620 {
2621 vcpu->arch.update_pte.pfn = bad_pfn;
2622
2623 if (tdp_enabled)
2624 return init_kvm_tdp_mmu(vcpu);
2625 else
2626 return init_kvm_softmmu(vcpu);
2627 }
2628
2629 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2630 {
2631 ASSERT(vcpu);
2632 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2633 /* mmu.free() should set root_hpa = INVALID_PAGE */
2634 vcpu->arch.mmu.free(vcpu);
2635 }
2636
2637 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2638 {
2639 destroy_kvm_mmu(vcpu);
2640 return init_kvm_mmu(vcpu);
2641 }
2642 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2643
2644 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2645 {
2646 int r;
2647
2648 r = mmu_topup_memory_caches(vcpu);
2649 if (r)
2650 goto out;
2651 r = mmu_alloc_roots(vcpu);
2652 spin_lock(&vcpu->kvm->mmu_lock);
2653 mmu_sync_roots(vcpu);
2654 spin_unlock(&vcpu->kvm->mmu_lock);
2655 if (r)
2656 goto out;
2657 /* set_cr3() should ensure TLB has been flushed */
2658 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2659 out:
2660 return r;
2661 }
2662 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2663
2664 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2665 {
2666 mmu_free_roots(vcpu);
2667 }
2668
2669 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2670 struct kvm_mmu_page *sp,
2671 u64 *spte)
2672 {
2673 u64 pte;
2674 struct kvm_mmu_page *child;
2675
2676 pte = *spte;
2677 if (is_shadow_present_pte(pte)) {
2678 if (is_last_spte(pte, sp->role.level))
2679 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2680 else {
2681 child = page_header(pte & PT64_BASE_ADDR_MASK);
2682 mmu_page_remove_parent_pte(child, spte);
2683 }
2684 }
2685 __set_spte(spte, shadow_trap_nonpresent_pte);
2686 if (is_large_pte(pte))
2687 --vcpu->kvm->stat.lpages;
2688 }
2689
2690 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2691 struct kvm_mmu_page *sp,
2692 u64 *spte,
2693 const void *new)
2694 {
2695 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2696 ++vcpu->kvm->stat.mmu_pde_zapped;
2697 return;
2698 }
2699
2700 ++vcpu->kvm->stat.mmu_pte_updated;
2701 if (!sp->role.cr4_pae)
2702 paging32_update_pte(vcpu, sp, spte, new);
2703 else
2704 paging64_update_pte(vcpu, sp, spte, new);
2705 }
2706
2707 static bool need_remote_flush(u64 old, u64 new)
2708 {
2709 if (!is_shadow_present_pte(old))
2710 return false;
2711 if (!is_shadow_present_pte(new))
2712 return true;
2713 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2714 return true;
2715 old ^= PT64_NX_MASK;
2716 new ^= PT64_NX_MASK;
2717 return (old & ~new & PT64_PERM_MASK) != 0;
2718 }
2719
2720 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2721 bool remote_flush, bool local_flush)
2722 {
2723 if (zap_page)
2724 return;
2725
2726 if (remote_flush)
2727 kvm_flush_remote_tlbs(vcpu->kvm);
2728 else if (local_flush)
2729 kvm_mmu_flush_tlb(vcpu);
2730 }
2731
2732 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2733 {
2734 u64 *spte = vcpu->arch.last_pte_updated;
2735
2736 return !!(spte && (*spte & shadow_accessed_mask));
2737 }
2738
2739 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2740 u64 gpte)
2741 {
2742 gfn_t gfn;
2743 pfn_t pfn;
2744
2745 if (!is_present_gpte(gpte))
2746 return;
2747 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2748
2749 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2750 smp_rmb();
2751 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2752
2753 if (is_error_pfn(pfn)) {
2754 kvm_release_pfn_clean(pfn);
2755 return;
2756 }
2757 vcpu->arch.update_pte.gfn = gfn;
2758 vcpu->arch.update_pte.pfn = pfn;
2759 }
2760
2761 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2762 {
2763 u64 *spte = vcpu->arch.last_pte_updated;
2764
2765 if (spte
2766 && vcpu->arch.last_pte_gfn == gfn
2767 && shadow_accessed_mask
2768 && !(*spte & shadow_accessed_mask)
2769 && is_shadow_present_pte(*spte))
2770 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2771 }
2772
2773 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2774 const u8 *new, int bytes,
2775 bool guest_initiated)
2776 {
2777 gfn_t gfn = gpa >> PAGE_SHIFT;
2778 struct kvm_mmu_page *sp;
2779 struct hlist_node *node;
2780 LIST_HEAD(invalid_list);
2781 u64 entry, gentry;
2782 u64 *spte;
2783 unsigned offset = offset_in_page(gpa);
2784 unsigned pte_size;
2785 unsigned page_offset;
2786 unsigned misaligned;
2787 unsigned quadrant;
2788 int level;
2789 int flooded = 0;
2790 int npte;
2791 int r;
2792 int invlpg_counter;
2793 bool remote_flush, local_flush, zap_page;
2794
2795 zap_page = remote_flush = local_flush = false;
2796
2797 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2798
2799 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2800
2801 /*
2802 * Assume that the pte write on a page table of the same type
2803 * as the current vcpu paging mode. This is nearly always true
2804 * (might be false while changing modes). Note it is verified later
2805 * by update_pte().
2806 */
2807 if ((is_pae(vcpu) && bytes == 4) || !new) {
2808 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2809 if (is_pae(vcpu)) {
2810 gpa &= ~(gpa_t)7;
2811 bytes = 8;
2812 }
2813 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2814 if (r)
2815 gentry = 0;
2816 new = (const u8 *)&gentry;
2817 }
2818
2819 switch (bytes) {
2820 case 4:
2821 gentry = *(const u32 *)new;
2822 break;
2823 case 8:
2824 gentry = *(const u64 *)new;
2825 break;
2826 default:
2827 gentry = 0;
2828 break;
2829 }
2830
2831 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2832 spin_lock(&vcpu->kvm->mmu_lock);
2833 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2834 gentry = 0;
2835 kvm_mmu_access_page(vcpu, gfn);
2836 kvm_mmu_free_some_pages(vcpu);
2837 ++vcpu->kvm->stat.mmu_pte_write;
2838 kvm_mmu_audit(vcpu, "pre pte write");
2839 if (guest_initiated) {
2840 if (gfn == vcpu->arch.last_pt_write_gfn
2841 && !last_updated_pte_accessed(vcpu)) {
2842 ++vcpu->arch.last_pt_write_count;
2843 if (vcpu->arch.last_pt_write_count >= 3)
2844 flooded = 1;
2845 } else {
2846 vcpu->arch.last_pt_write_gfn = gfn;
2847 vcpu->arch.last_pt_write_count = 1;
2848 vcpu->arch.last_pte_updated = NULL;
2849 }
2850 }
2851
2852 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2853 pte_size = sp->role.cr4_pae ? 8 : 4;
2854 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2855 misaligned |= bytes < 4;
2856 if (misaligned || flooded) {
2857 /*
2858 * Misaligned accesses are too much trouble to fix
2859 * up; also, they usually indicate a page is not used
2860 * as a page table.
2861 *
2862 * If we're seeing too many writes to a page,
2863 * it may no longer be a page table, or we may be
2864 * forking, in which case it is better to unmap the
2865 * page.
2866 */
2867 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2868 gpa, bytes, sp->role.word);
2869 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2870 &invalid_list);
2871 ++vcpu->kvm->stat.mmu_flooded;
2872 continue;
2873 }
2874 page_offset = offset;
2875 level = sp->role.level;
2876 npte = 1;
2877 if (!sp->role.cr4_pae) {
2878 page_offset <<= 1; /* 32->64 */
2879 /*
2880 * A 32-bit pde maps 4MB while the shadow pdes map
2881 * only 2MB. So we need to double the offset again
2882 * and zap two pdes instead of one.
2883 */
2884 if (level == PT32_ROOT_LEVEL) {
2885 page_offset &= ~7; /* kill rounding error */
2886 page_offset <<= 1;
2887 npte = 2;
2888 }
2889 quadrant = page_offset >> PAGE_SHIFT;
2890 page_offset &= ~PAGE_MASK;
2891 if (quadrant != sp->role.quadrant)
2892 continue;
2893 }
2894 local_flush = true;
2895 spte = &sp->spt[page_offset / sizeof(*spte)];
2896 while (npte--) {
2897 entry = *spte;
2898 mmu_pte_write_zap_pte(vcpu, sp, spte);
2899 if (gentry)
2900 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2901 if (!remote_flush && need_remote_flush(entry, *spte))
2902 remote_flush = true;
2903 ++spte;
2904 }
2905 }
2906 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2907 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2908 kvm_mmu_audit(vcpu, "post pte write");
2909 spin_unlock(&vcpu->kvm->mmu_lock);
2910 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2911 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2912 vcpu->arch.update_pte.pfn = bad_pfn;
2913 }
2914 }
2915
2916 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2917 {
2918 gpa_t gpa;
2919 int r;
2920
2921 if (tdp_enabled)
2922 return 0;
2923
2924 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2925
2926 spin_lock(&vcpu->kvm->mmu_lock);
2927 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2928 spin_unlock(&vcpu->kvm->mmu_lock);
2929 return r;
2930 }
2931 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2932
2933 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2934 {
2935 int free_pages;
2936 LIST_HEAD(invalid_list);
2937
2938 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2939 while (free_pages < KVM_REFILL_PAGES &&
2940 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2941 struct kvm_mmu_page *sp;
2942
2943 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2944 struct kvm_mmu_page, link);
2945 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2946 &invalid_list);
2947 ++vcpu->kvm->stat.mmu_recycled;
2948 }
2949 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2950 }
2951
2952 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2953 {
2954 int r;
2955 enum emulation_result er;
2956
2957 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2958 if (r < 0)
2959 goto out;
2960
2961 if (!r) {
2962 r = 1;
2963 goto out;
2964 }
2965
2966 r = mmu_topup_memory_caches(vcpu);
2967 if (r)
2968 goto out;
2969
2970 er = emulate_instruction(vcpu, cr2, error_code, 0);
2971
2972 switch (er) {
2973 case EMULATE_DONE:
2974 return 1;
2975 case EMULATE_DO_MMIO:
2976 ++vcpu->stat.mmio_exits;
2977 /* fall through */
2978 case EMULATE_FAIL:
2979 return 0;
2980 default:
2981 BUG();
2982 }
2983 out:
2984 return r;
2985 }
2986 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2987
2988 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2989 {
2990 vcpu->arch.mmu.invlpg(vcpu, gva);
2991 kvm_mmu_flush_tlb(vcpu);
2992 ++vcpu->stat.invlpg;
2993 }
2994 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2995
2996 void kvm_enable_tdp(void)
2997 {
2998 tdp_enabled = true;
2999 }
3000 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3001
3002 void kvm_disable_tdp(void)
3003 {
3004 tdp_enabled = false;
3005 }
3006 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3007
3008 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3009 {
3010 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3011 }
3012
3013 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3014 {
3015 struct page *page;
3016 int i;
3017
3018 ASSERT(vcpu);
3019
3020 /*
3021 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3022 * Therefore we need to allocate shadow page tables in the first
3023 * 4GB of memory, which happens to fit the DMA32 zone.
3024 */
3025 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3026 if (!page)
3027 return -ENOMEM;
3028
3029 vcpu->arch.mmu.pae_root = page_address(page);
3030 for (i = 0; i < 4; ++i)
3031 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3032
3033 return 0;
3034 }
3035
3036 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3037 {
3038 ASSERT(vcpu);
3039 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3040
3041 return alloc_mmu_pages(vcpu);
3042 }
3043
3044 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3045 {
3046 ASSERT(vcpu);
3047 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3048
3049 return init_kvm_mmu(vcpu);
3050 }
3051
3052 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3053 {
3054 ASSERT(vcpu);
3055
3056 destroy_kvm_mmu(vcpu);
3057 free_mmu_pages(vcpu);
3058 mmu_free_memory_caches(vcpu);
3059 }
3060
3061 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3062 {
3063 struct kvm_mmu_page *sp;
3064
3065 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3066 int i;
3067 u64 *pt;
3068
3069 if (!test_bit(slot, sp->slot_bitmap))
3070 continue;
3071
3072 pt = sp->spt;
3073 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3074 /* avoid RMW */
3075 if (is_writable_pte(pt[i]))
3076 pt[i] &= ~PT_WRITABLE_MASK;
3077 }
3078 kvm_flush_remote_tlbs(kvm);
3079 }
3080
3081 void kvm_mmu_zap_all(struct kvm *kvm)
3082 {
3083 struct kvm_mmu_page *sp, *node;
3084 LIST_HEAD(invalid_list);
3085
3086 spin_lock(&kvm->mmu_lock);
3087 restart:
3088 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3089 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3090 goto restart;
3091
3092 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3093 spin_unlock(&kvm->mmu_lock);
3094 }
3095
3096 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3097 struct list_head *invalid_list)
3098 {
3099 struct kvm_mmu_page *page;
3100
3101 page = container_of(kvm->arch.active_mmu_pages.prev,
3102 struct kvm_mmu_page, link);
3103 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3104 }
3105
3106 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3107 {
3108 struct kvm *kvm;
3109 struct kvm *kvm_freed = NULL;
3110 int cache_count = 0;
3111
3112 spin_lock(&kvm_lock);
3113
3114 list_for_each_entry(kvm, &vm_list, vm_list) {
3115 int npages, idx, freed_pages;
3116 LIST_HEAD(invalid_list);
3117
3118 idx = srcu_read_lock(&kvm->srcu);
3119 spin_lock(&kvm->mmu_lock);
3120 npages = kvm->arch.n_alloc_mmu_pages -
3121 kvm->arch.n_free_mmu_pages;
3122 cache_count += npages;
3123 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3124 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3125 &invalid_list);
3126 cache_count -= freed_pages;
3127 kvm_freed = kvm;
3128 }
3129 nr_to_scan--;
3130
3131 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3132 spin_unlock(&kvm->mmu_lock);
3133 srcu_read_unlock(&kvm->srcu, idx);
3134 }
3135 if (kvm_freed)
3136 list_move_tail(&kvm_freed->vm_list, &vm_list);
3137
3138 spin_unlock(&kvm_lock);
3139
3140 return cache_count;
3141 }
3142
3143 static struct shrinker mmu_shrinker = {
3144 .shrink = mmu_shrink,
3145 .seeks = DEFAULT_SEEKS * 10,
3146 };
3147
3148 static void mmu_destroy_caches(void)
3149 {
3150 if (pte_chain_cache)
3151 kmem_cache_destroy(pte_chain_cache);
3152 if (rmap_desc_cache)
3153 kmem_cache_destroy(rmap_desc_cache);
3154 if (mmu_page_header_cache)
3155 kmem_cache_destroy(mmu_page_header_cache);
3156 }
3157
3158 void kvm_mmu_module_exit(void)
3159 {
3160 mmu_destroy_caches();
3161 unregister_shrinker(&mmu_shrinker);
3162 }
3163
3164 int kvm_mmu_module_init(void)
3165 {
3166 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3167 sizeof(struct kvm_pte_chain),
3168 0, 0, NULL);
3169 if (!pte_chain_cache)
3170 goto nomem;
3171 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3172 sizeof(struct kvm_rmap_desc),
3173 0, 0, NULL);
3174 if (!rmap_desc_cache)
3175 goto nomem;
3176
3177 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3178 sizeof(struct kvm_mmu_page),
3179 0, 0, NULL);
3180 if (!mmu_page_header_cache)
3181 goto nomem;
3182
3183 register_shrinker(&mmu_shrinker);
3184
3185 return 0;
3186
3187 nomem:
3188 mmu_destroy_caches();
3189 return -ENOMEM;
3190 }
3191
3192 /*
3193 * Caculate mmu pages needed for kvm.
3194 */
3195 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3196 {
3197 int i;
3198 unsigned int nr_mmu_pages;
3199 unsigned int nr_pages = 0;
3200 struct kvm_memslots *slots;
3201
3202 slots = kvm_memslots(kvm);
3203
3204 for (i = 0; i < slots->nmemslots; i++)
3205 nr_pages += slots->memslots[i].npages;
3206
3207 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3208 nr_mmu_pages = max(nr_mmu_pages,
3209 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3210
3211 return nr_mmu_pages;
3212 }
3213
3214 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3215 unsigned len)
3216 {
3217 if (len > buffer->len)
3218 return NULL;
3219 return buffer->ptr;
3220 }
3221
3222 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3223 unsigned len)
3224 {
3225 void *ret;
3226
3227 ret = pv_mmu_peek_buffer(buffer, len);
3228 if (!ret)
3229 return ret;
3230 buffer->ptr += len;
3231 buffer->len -= len;
3232 buffer->processed += len;
3233 return ret;
3234 }
3235
3236 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3237 gpa_t addr, gpa_t value)
3238 {
3239 int bytes = 8;
3240 int r;
3241
3242 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3243 bytes = 4;
3244
3245 r = mmu_topup_memory_caches(vcpu);
3246 if (r)
3247 return r;
3248
3249 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3250 return -EFAULT;
3251
3252 return 1;
3253 }
3254
3255 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3256 {
3257 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3258 return 1;
3259 }
3260
3261 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3262 {
3263 spin_lock(&vcpu->kvm->mmu_lock);
3264 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3265 spin_unlock(&vcpu->kvm->mmu_lock);
3266 return 1;
3267 }
3268
3269 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3270 struct kvm_pv_mmu_op_buffer *buffer)
3271 {
3272 struct kvm_mmu_op_header *header;
3273
3274 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3275 if (!header)
3276 return 0;
3277 switch (header->op) {
3278 case KVM_MMU_OP_WRITE_PTE: {
3279 struct kvm_mmu_op_write_pte *wpte;
3280
3281 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3282 if (!wpte)
3283 return 0;
3284 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3285 wpte->pte_val);
3286 }
3287 case KVM_MMU_OP_FLUSH_TLB: {
3288 struct kvm_mmu_op_flush_tlb *ftlb;
3289
3290 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3291 if (!ftlb)
3292 return 0;
3293 return kvm_pv_mmu_flush_tlb(vcpu);
3294 }
3295 case KVM_MMU_OP_RELEASE_PT: {
3296 struct kvm_mmu_op_release_pt *rpt;
3297
3298 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3299 if (!rpt)
3300 return 0;
3301 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3302 }
3303 default: return 0;
3304 }
3305 }
3306
3307 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3308 gpa_t addr, unsigned long *ret)
3309 {
3310 int r;
3311 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3312
3313 buffer->ptr = buffer->buf;
3314 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3315 buffer->processed = 0;
3316
3317 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3318 if (r)
3319 goto out;
3320
3321 while (buffer->len) {
3322 r = kvm_pv_mmu_op_one(vcpu, buffer);
3323 if (r < 0)
3324 goto out;
3325 if (r == 0)
3326 break;
3327 }
3328
3329 r = 1;
3330 out:
3331 *ret = buffer->processed;
3332 return r;
3333 }
3334
3335 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3336 {
3337 struct kvm_shadow_walk_iterator iterator;
3338 int nr_sptes = 0;
3339
3340 spin_lock(&vcpu->kvm->mmu_lock);
3341 for_each_shadow_entry(vcpu, addr, iterator) {
3342 sptes[iterator.level-1] = *iterator.sptep;
3343 nr_sptes++;
3344 if (!is_shadow_present_pte(*iterator.sptep))
3345 break;
3346 }
3347 spin_unlock(&vcpu->kvm->mmu_lock);
3348
3349 return nr_sptes;
3350 }
3351 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3352
3353 #ifdef AUDIT
3354
3355 static const char *audit_msg;
3356
3357 static gva_t canonicalize(gva_t gva)
3358 {
3359 #ifdef CONFIG_X86_64
3360 gva = (long long)(gva << 16) >> 16;
3361 #endif
3362 return gva;
3363 }
3364
3365
3366 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3367
3368 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3369 inspect_spte_fn fn)
3370 {
3371 int i;
3372
3373 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3374 u64 ent = sp->spt[i];
3375
3376 if (is_shadow_present_pte(ent)) {
3377 if (!is_last_spte(ent, sp->role.level)) {
3378 struct kvm_mmu_page *child;
3379 child = page_header(ent & PT64_BASE_ADDR_MASK);
3380 __mmu_spte_walk(kvm, child, fn);
3381 } else
3382 fn(kvm, &sp->spt[i]);
3383 }
3384 }
3385 }
3386
3387 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3388 {
3389 int i;
3390 struct kvm_mmu_page *sp;
3391
3392 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3393 return;
3394 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3395 hpa_t root = vcpu->arch.mmu.root_hpa;
3396 sp = page_header(root);
3397 __mmu_spte_walk(vcpu->kvm, sp, fn);
3398 return;
3399 }
3400 for (i = 0; i < 4; ++i) {
3401 hpa_t root = vcpu->arch.mmu.pae_root[i];
3402
3403 if (root && VALID_PAGE(root)) {
3404 root &= PT64_BASE_ADDR_MASK;
3405 sp = page_header(root);
3406 __mmu_spte_walk(vcpu->kvm, sp, fn);
3407 }
3408 }
3409 return;
3410 }
3411
3412 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3413 gva_t va, int level)
3414 {
3415 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3416 int i;
3417 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3418
3419 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3420 u64 ent = pt[i];
3421
3422 if (ent == shadow_trap_nonpresent_pte)
3423 continue;
3424
3425 va = canonicalize(va);
3426 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3427 audit_mappings_page(vcpu, ent, va, level - 1);
3428 else {
3429 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3430 gfn_t gfn = gpa >> PAGE_SHIFT;
3431 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3432 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3433
3434 if (is_error_pfn(pfn)) {
3435 kvm_release_pfn_clean(pfn);
3436 continue;
3437 }
3438
3439 if (is_shadow_present_pte(ent)
3440 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3441 printk(KERN_ERR "xx audit error: (%s) levels %d"
3442 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3443 audit_msg, vcpu->arch.mmu.root_level,
3444 va, gpa, hpa, ent,
3445 is_shadow_present_pte(ent));
3446 else if (ent == shadow_notrap_nonpresent_pte
3447 && !is_error_hpa(hpa))
3448 printk(KERN_ERR "audit: (%s) notrap shadow,"
3449 " valid guest gva %lx\n", audit_msg, va);
3450 kvm_release_pfn_clean(pfn);
3451
3452 }
3453 }
3454 }
3455
3456 static void audit_mappings(struct kvm_vcpu *vcpu)
3457 {
3458 unsigned i;
3459
3460 if (vcpu->arch.mmu.root_level == 4)
3461 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3462 else
3463 for (i = 0; i < 4; ++i)
3464 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3465 audit_mappings_page(vcpu,
3466 vcpu->arch.mmu.pae_root[i],
3467 i << 30,
3468 2);
3469 }
3470
3471 static int count_rmaps(struct kvm_vcpu *vcpu)
3472 {
3473 struct kvm *kvm = vcpu->kvm;
3474 struct kvm_memslots *slots;
3475 int nmaps = 0;
3476 int i, j, k, idx;
3477
3478 idx = srcu_read_lock(&kvm->srcu);
3479 slots = kvm_memslots(kvm);
3480 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3481 struct kvm_memory_slot *m = &slots->memslots[i];
3482 struct kvm_rmap_desc *d;
3483
3484 for (j = 0; j < m->npages; ++j) {
3485 unsigned long *rmapp = &m->rmap[j];
3486
3487 if (!*rmapp)
3488 continue;
3489 if (!(*rmapp & 1)) {
3490 ++nmaps;
3491 continue;
3492 }
3493 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3494 while (d) {
3495 for (k = 0; k < RMAP_EXT; ++k)
3496 if (d->sptes[k])
3497 ++nmaps;
3498 else
3499 break;
3500 d = d->more;
3501 }
3502 }
3503 }
3504 srcu_read_unlock(&kvm->srcu, idx);
3505 return nmaps;
3506 }
3507
3508 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3509 {
3510 unsigned long *rmapp;
3511 struct kvm_mmu_page *rev_sp;
3512 gfn_t gfn;
3513
3514 if (is_writable_pte(*sptep)) {
3515 rev_sp = page_header(__pa(sptep));
3516 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3517
3518 if (!gfn_to_memslot(kvm, gfn)) {
3519 if (!printk_ratelimit())
3520 return;
3521 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3522 audit_msg, gfn);
3523 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3524 audit_msg, (long int)(sptep - rev_sp->spt),
3525 rev_sp->gfn);
3526 dump_stack();
3527 return;
3528 }
3529
3530 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3531 if (!*rmapp) {
3532 if (!printk_ratelimit())
3533 return;
3534 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3535 audit_msg, *sptep);
3536 dump_stack();
3537 }
3538 }
3539
3540 }
3541
3542 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3543 {
3544 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3545 }
3546
3547 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3548 {
3549 struct kvm_mmu_page *sp;
3550 int i;
3551
3552 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3553 u64 *pt = sp->spt;
3554
3555 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3556 continue;
3557
3558 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3559 u64 ent = pt[i];
3560
3561 if (!(ent & PT_PRESENT_MASK))
3562 continue;
3563 if (!is_writable_pte(ent))
3564 continue;
3565 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3566 }
3567 }
3568 return;
3569 }
3570
3571 static void audit_rmap(struct kvm_vcpu *vcpu)
3572 {
3573 check_writable_mappings_rmap(vcpu);
3574 count_rmaps(vcpu);
3575 }
3576
3577 static void audit_write_protection(struct kvm_vcpu *vcpu)
3578 {
3579 struct kvm_mmu_page *sp;
3580 struct kvm_memory_slot *slot;
3581 unsigned long *rmapp;
3582 u64 *spte;
3583 gfn_t gfn;
3584
3585 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3586 if (sp->role.direct)
3587 continue;
3588 if (sp->unsync)
3589 continue;
3590
3591 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3592 rmapp = &slot->rmap[gfn - slot->base_gfn];
3593
3594 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3595 while (spte) {
3596 if (is_writable_pte(*spte))
3597 printk(KERN_ERR "%s: (%s) shadow page has "
3598 "writable mappings: gfn %lx role %x\n",
3599 __func__, audit_msg, sp->gfn,
3600 sp->role.word);
3601 spte = rmap_next(vcpu->kvm, rmapp, spte);
3602 }
3603 }
3604 }
3605
3606 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3607 {
3608 int olddbg = dbg;
3609
3610 dbg = 0;
3611 audit_msg = msg;
3612 audit_rmap(vcpu);
3613 audit_write_protection(vcpu);
3614 if (strcmp("pre pte write", audit_msg) != 0)
3615 audit_mappings(vcpu);
3616 audit_writable_sptes_have_rmaps(vcpu);
3617 dbg = olddbg;
3618 }
3619
3620 #endif
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree